CN110610991A - Epitaxial structure and low on-voltage transistor - Google Patents
Epitaxial structure and low on-voltage transistor Download PDFInfo
- Publication number
- CN110610991A CN110610991A CN201910921313.3A CN201910921313A CN110610991A CN 110610991 A CN110610991 A CN 110610991A CN 201910921313 A CN201910921313 A CN 201910921313A CN 110610991 A CN110610991 A CN 110610991A
- Authority
- CN
- China
- Prior art keywords
- base electrode
- electrode layer
- layer
- epitaxial structure
- reduced
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000463 material Substances 0.000 claims abstract description 29
- 239000002131 composite material Substances 0.000 claims abstract description 28
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims abstract description 11
- 239000000203 mixture Substances 0.000 claims description 11
- 230000000694 effects Effects 0.000 abstract description 8
- 238000012360 testing method Methods 0.000 abstract description 6
- 238000004891 communication Methods 0.000 abstract description 2
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 148
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Substances [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 14
- 229910052751 metal Inorganic materials 0.000 description 13
- 239000002184 metal Substances 0.000 description 13
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 10
- 238000000034 method Methods 0.000 description 6
- 238000002360 preparation method Methods 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000006798 recombination Effects 0.000 description 3
- 238000005215 recombination Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 238000000137 annealing Methods 0.000 description 2
- 238000004364 calculation method Methods 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 108091006149 Electron carriers Proteins 0.000 description 1
- 229910005540 GaP Inorganic materials 0.000 description 1
- 241001125929 Trisopterus luscus Species 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 210000003127 knee Anatomy 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1004—Base region of bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/201—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
- H01L29/205—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/737—Hetero-junction transistors
- H01L29/7371—Vertical transistors
Abstract
The application provides an epitaxial structure and a low-breakover voltage transistor, and relates to the technical field of semiconductors and communication. The low on-voltage transistor includes an epitaxial structure. The epitaxial structure includes a composite base electrode layer and an emitter layer. The composite base electrode layer comprises a first base electrode layer and a second base electrode layer manufactured on the basis of the first base electrode layer; wherein the material of the first base electrode layer comprises GaAs, and the material of the second base electrode layer comprises InxGa1‑xAs. The composite base electrode layer can reduce the energy gap of the base electrode layer, so that the peak effect of a conductive band between the base electrode layer and the emitter layer is reduced, and when the composite base electrode layer is applied to a transistor, the conduction voltage can be reduced, and the power consumption is reduced; the ohmic contact layer is easier to form by adopting Pt on the second base electrode layer, the thickness of the Pt can be reduced, and the driving amount of the Pt into the composite base electrode layer is reduced, so that the Pt can be easily driven into the composite base electrode layerThe condition that the device generates interface composite current is reduced, and the reliability test of the device is more stable and reliable.
Description
Technical Field
The application relates to the technical field of semiconductors and communication, in particular to an epitaxial structure and a low-on-voltage transistor.
Background
In the current 3G or 4G power amplifiers, power added efficiency ("PAE") is a very important parameter. PAE is defined as the ratio of the difference between the output power Pout and the input power Pin to the dc input power Pdc, i.e.: (Pout-Pin)/Pdc. PAE is a pointer to the quality of efficiency of the PA, and the larger this value, the more power consumption of the PA can be suppressed. The improvement of the dc power consumption is to reduce the on voltage (Von), the knee voltage (Vk) and the offset voltage (Voff). However, the transistor on-voltage used in the conventional power amplifier is too large and is difficult to be reduced, resulting in large power consumption of the device.
Therefore, it is an urgent technical problem to design a transistor that can be applied to low on-voltage and reduce power consumption.
Disclosure of Invention
In view of the above, the present application aims to provide an epitaxial structure and a low on-voltage transistor to improve the above problems.
An embodiment of the present application provides an epitaxial structure, including:
the composite base electrode layer comprises a first base electrode layer and a second base electrode layer manufactured on the basis of the first base electrode layer;
an emitter layer fabricated based on the second base electrode layer;
wherein the material of the first base electrode layer comprises GaAs, and the material of the second base electrode layer comprises InxGa1- xAs。
The In of the epitaxial structure In the above embodimentxGa1-xIn As, the value of x remains unchanged.
In the epitaxial structure of the above embodiment, x is 0.25.
In the second base electrode layer of the epitaxial structure of the above embodiment, the In composition is 25%.
The In of the epitaxial structure In the above embodimentxGa1-xIn As, the value of x gradually increases in a direction approaching the emitter layer.
In the epitaxial structure of the above embodiment, the value of x gradually increases from 0.05 to 0.25.
In the second base electrode layer of the epitaxial structure of the above embodiment, the composition range of In is 5% to 25%.
In the epitaxial structure of the above embodiment, the thickness of the second base electrode layer is 5nm or less than a critical thickness.
In the epitaxial structure of the above embodiment, the material of the emitter layer includes InGaP.
The embodiment of the application also provides a low-breakover voltage transistor which comprises the epitaxial structure.
The epitaxial structure and the low-on-voltage transistor provided by the embodiment of the application have the beneficial effects that:
1. adding a second base electrode layer between the first base electrode layer and the emitter layer, wherein the material of the second base electrode layer comprises InxGa1-xAs,InxGa1-xAs has the advantage of low energy gap, can reduce the energy gap of the base electrode layer, is that the conduction band peak effect between the base electrode layer and the emitter layer is reduced, and when the As is applied to a transistor, the on-state voltage can be reduced, and the power consumption is reduced;
2. because of InxGa1-xAs has the advantage of low energy gap, it is easier to form the ohmic contact layer on the second base electrode layer by adopting Pt, and the thickness of Pt can be reduced, so that the amount of Pt driven into the composite base electrode layer is reduced, the condition that the device generates interface recombination current is reduced, and the reliability test of the device is more stable and reliable.
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained from the drawings without inventive effort.
Fig. 1 is a schematic view of an epitaxial structure according to a first embodiment of the present application.
Fig. 2 is a flow chart of a method of fabricating the epitaxial structure of fig. 1.
Fig. 3 is a schematic diagram of a low-turn-on voltage transistor according to a third embodiment of the present application.
Icon: 100-epitaxial structure; 1-a composite base electrode layer; 11-a first base electrode layer; 12-a second base electrode layer; 2-an emitter layer; 3-a substrate; 4-sub-collector layer; 5-a collector layer; 6-a cap layer; 7-emitter metal contact layer; an 8-base electrode metal contact layer; 9-collector metal contact layer.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all the embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the gallium arsenide-based single heterojunction transistor device, the base electrode layer is made of gallium arsenide (GaAs), the emitter layer is made of indium gallium phosphide (InGaP), and the GaAs and the InGaP have a large energy gap difference (Δ Ec) in a conduction band, so that a conduction band spike (conduction band spike) effect between the base electrode layer and the emitter layer is obvious, and a large forward conduction voltage is obtained. Since the energy gap difference between the base electrode layer and the collector layer under the homogeneous material is Δ Ec equal to 0, the base emitter turn-on voltage (Vbe, on) is larger than that between the base and collector layers, and the device offset voltage (Voff) is larger.
Platinum metal (Pt metal) is an important material for forming a metal Ohmic contact (Base Ohmic contact) on the Base electrode. In the process of forming ohmic contact by the platinum metal in the thermal annealing process (thermal annealing), the platinum metal reacts with the gallium arsenide-based electrode layer, so that the base electrode current (base current) is easy to generate higher interface recombination current (interface recombination current), and the reliability test result of the device is influenced.
Embodiments of the present application provide an epitaxial structure and a low on-voltage transistor, which not only can reduce the compensation voltage of a device, but also can make the reliability test result of the device more reliable.
First embodiment
Referring to fig. 1, the present embodiment provides an epitaxial structure 100, which includes a composite base electrode layer 1 and an emitter layer 2 fabricated on the basis of the composite base electrode layer 1.
The composite base electrode layer 1 is a double-layer material structure, and includes a first base electrode layer 11 and a second base electrode layer 12 manufactured based on the first base electrode layer 11. The material of the first base electrode layer 11 includes GaAs, and the material of the second base electrode layer 12 includes InxGa1-xAs。InxGa1-xAs is a material with a lower energy gap than GaAs, when applied to a transistor, the effect of a conduction band spike (PSP) effect can be improved, the on-state voltage of the transistor can be reduced, and the power consumption can be reduced.
In the second base electrode layer 12, the In content is equal In the direction close to the emitter layer 2, that is, the In content distribution from bottom to top of the second base electrode layer 12 In fig. 1 is uniform and remains equalxGa1-xIn As, the value of x remains unchanged.
InxGa1-xIn As, the value of x has various choices, and the selectable range is 0.2-0.3, and in the embodiment, the value of x is 0.25. That is, In the second base electrode layer 12, the In composition may be any fixed value In the range of 20% to 30%, and In the present embodiment, the In composition is selected to be 25%.
The emitter layer 2 is a single-layer material structure. The material of the emitter layer 2 includes GaInP. The In content In the emitter layer 2 is a fixed composition adapted to the gallium arsenide based electrode layer.
Referring to fig. 2, the present embodiment further provides a method for manufacturing the epitaxial structure 100, including the following steps:
s1: fabricating a first base electrode layer 11
The material of the first base electrode layer 11 is GaAs. During the formation of the first base electrode layer 11, the layer is grown with a suitable mole ratio (mole ratio) depending on the material growth requirements.
S2: fabricating the second base electrode layer 12
In is used as the material of the second base electrode layer 12xGa1-xAs. In the formation of the second base electrode layer 12, the value of x is selected to be 0.25, so that the mole fraction of In and the mole fraction of Ga are proportionally adjusted, and the second base electrode layer 12 with high quality adapted to the composition is gradually formed by stacking.
The thickness of the second base electrode layer 12 may be designed to be 5nm or less than the critical thickness (x ═ 0.25) for this composition. The critical thickness is the maximum film thickness of a single crystal material that can be grown without lattice mismatch of the epitaxial layers. According to theoretical calculation, InxGa1-xIn As, x is 0.25, the critical thickness of the second base electrode layer 12 is about 40A, but the critical thickness can be As large As 75A with current advances in epitaxial technology.
S3: fabricating the emitter layer 2
The emitter layer 2 is designed to be a single-layer material structure, the material of the emitter layer 2 is InGaP, and the emitter layer 2 is gradually formed on the second base electrode layer 12 by growing the layer at a proper molar ratio according to the material growth requirement in the formation process of the emitter layer 2.
The epitaxial structure 100 and the preparation method thereof provided by the embodiment have the following beneficial effects:
1. a second base electrode layer 12 is interposed between the first base electrode layer 11 and the emitter layer 2, the material of the second base electrode layer 12 including InxGa1-xAs,InxGa1-xAs has the advantage of low energy gap, and can improve the secondThe conduction band spike effect between the base electrode layer 12 and the emitter electrode layer 2 is applied to the transistor, so that the conduction voltage can be reduced, and the power consumption can be reduced;
2. because of InxGa1-xAs has the advantage of low energy gap, the ohmic contact layer is easier to form by adopting Pt on the second base electrode layer 12, the thickness of Pt can be reduced, and the driving amount of Pt into the composite base electrode layer 1 is reduced, so that the condition that the device generates interface composite current is reduced, and the reliability test of the device is more stable and reliable;
3. the preparation method only needs to correspondingly adjust the feeding mole fraction of the raw materials, and is convenient and quick and low in cost.
Second embodiment
The present embodiment provides an epitaxial structure 100 that differs from the epitaxial structure 100 provided In the first embodiment In that the composition of In the second base electrode layer 12 is different.
The epitaxial structure 100 includes a composite base electrode layer 1 and an emitter layer 2. The composite base electrode layer 1 is a double-layer material structure and comprises a first base electrode layer 11 and a second base electrode layer 12 manufactured on the basis of the first base electrode layer 11. Here, the first base electrode layer 11 and the emitter layer 2 are the same as those in the first embodiment, and are not described again here.
In the second base electrode layer 12xGa1-xAs, the value of x increases gradually in the direction toward the emitter layer 2. That is, In the second base electrode layer 12 In fig. 1, the In content gradually increases with the increase of the thickness, the increasing speed may keep a linear relationship with the thickness, and the size relationship may be flexibly designed according to the performance requirement, so long as the In content tends to increase with the increase of the height, which shall fall within the protection scope of the present application.
The increasing of the In content can improve the carrier mobility of electrons, keep the resistance value at a lower level, and ensure good frequency characteristics of the transistor when the In content is applied to the transistor. Meanwhile, the conduction band peak between the second base electrode layer 12 and the emitter layer 2 is reduced as the In content gradually increases, further reducing the on-voltage of the transistor.
Specifically, the secondIn the base electrode layer 12xGa1-xAs, the value of x may be selected to gradually increase from 0.05 to 0.25 in the direction toward the emitter layer 2. That is, In composition In the second base electrode layer 12 ranges from 5% to 25%.
In the process of preparing the second base electrode layer 12 on the first base electrode layer 11, the mole fraction of In and the mole fraction of Ga are first proportionally adjusted, wherein the mole fraction of In will gradually increase and the mole fraction of Ga will gradually decrease. Therefore, the In content is gradually increased, the Ga content is gradually reduced, and the As content is kept unchanged In the second base electrode layer 12 from bottom to top.
The epitaxial structure 100 and the method for manufacturing the same provided in this embodiment not only have the beneficial effects of the first embodiment, but also can improve the electron carrier mobility, keep the resistance value at a low level, and ensure good frequency characteristics of a transistor when applied to the transistor. Meanwhile, the conduction band peak between the second base electrode layer 12 and the emitter layer 2 is reduced as the In content gradually increases, further reducing the on-voltage of the transistor.
Third embodiment
The present embodiment provides an epitaxial structure 100, which is further designed to be suitable for an epitaxial structure 100 of an HBT (heterojunction bipolar transistor) on the basis of the epitaxial structure 100 provided in the first embodiment or the second embodiment.
Referring to fig. 3, the epitaxial structure 100 includes a substrate 3, a sub-collector layer 4, a collector layer 5, a composite base electrode layer 1, an emitter layer 2, and a cap layer 6, which are sequentially grown from bottom to top. Here, the composite base electrode layer 1 and the emitter layer 2 adopt the structure in the first embodiment or the second embodiment.
In addition, an emitter metal contact layer 7 is arranged above the emitter layer 2, the emitter metal contact layer 7 covers the cap layer 6 and is in ohmic contact with the emitter layer 2, and a through hole for the emitter metal contact layer 7 to pass through is etched in the cap layer 6. The composite base electrode layer 1 is provided with a base electrode metal contact layer 8, and the base electrode metal contact layer 8 is in ohmic contact with the composite base electrode layer 1. A collector metal contact layer 9 is provided on the sub-collector layer 4, and the collector metal contact layer 9 is in ohmic contact with the sub-collector layer 4.
The materials of the substrate 3, the sub-collector layer 4, the collector layer 5 and the cap layer 6 may be GaAs. In the base electrode metal contact layer 8, Pt, Ti, and Au may be stacked in this order from below. In the second base electrode layer 12, In the direction close to the emitter layer 2, the In content is equal or gradually increased, so that the ohmic contact layer can be formed on the second base electrode layer 12 more easily by adopting Pt, the thickness of Pt can be reduced, and the amount of Pt driven into the composite base electrode layer 1 is reduced, thereby reducing the condition that the device generates interface composite current, and ensuring that the reliability test of the device is more stable and reliable.
Only the example of applying the epitaxial structure 100 to the HBT is described in detail in this application, and the epitaxial structure 100 provided in this application may also be applied to transistors with other structural forms, which are not described herein again, and as long as the composite base electrode layer 1 provided in this application is applied, all of which shall fall within the scope of the claims of this application.
The epitaxial structure 100 and the low on-voltage transistor provided in the present application may also be applied to a power amplifier, and a power amplifier or other electrical appliances using the epitaxial structure 100 and the low on-voltage transistor provided in the present application shall fall within the scope of the present application.
It should be noted that the numerical values mentioned in the present application, including the values of the components and the values of the thicknesses, are only reliable values obtained by the applicant through experiments and calculations, and are not limited to only these values. Those skilled in the art may make further experiments based on the scheme of the present application to obtain other values with similar effects, which do not depart from the core of the present application and should also fall within the scope of the protection claimed in the present application.
In the above embodiments of the present application, the composite base electrode layer 1 is a two-layer material structure, according to the principle in the present application, the composite base electrode layer 1 may further be designed with a greater number of layer structures, and the technical effect of the composite base electrode layer 1 in the present application can also be achieved, so in other embodiments, the number of layer structures may not be limited.
The epitaxial structure 100 and the low on-voltage transistor provided by the above embodiments of the present application use low-energy gap materials, which can reduce the on-voltage of the transistor and reduce power consumption; meanwhile, the In content In the second base electrode layer 12 gradually increases from bottom to top, so that the carrier mobility of electrons can be improved, the resistance value is kept at a low level, and the frequency characteristic of the transistor is ensured to be good. In addition, the preparation process only needs to correspondingly adjust the discharging speed of the raw materials, and the preparation method is simple and has low cost.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (10)
1. An epitaxial structure, comprising:
a composite base electrode layer (1) including a first base electrode layer (11) and a second base electrode layer (12) fabricated on the basis of the first base electrode layer (11);
an emitter layer (2) fabricated on the basis of the second base electrode layer (12);
wherein the material of the first base electrode layer (11) comprises GaAs, and the material of the second base electrode layer (12) comprises InxGa1-xAs。
2. The epitaxial structure of claim 1, wherein the InxGa1-xIn As, the value of x remains unchanged.
3. The epitaxial structure of claim 2 wherein x is 0.25.
4. Epitaxial structure according to claim 2, characterized In that the In composition In the second base electrode layer (12) is 25%.
5. The epitaxial structure of claim 1, wherein the InxGa1-xAs, the value of x gradually increases in the direction of approaching the emitter layer (2).
6. Epitaxial structure according to claim 3, characterized in that the value of x increases gradually from 0.05 to 0.25.
7. Epitaxial structure according to claim 2, characterized In that the composition of In the second base electrode layer (12) ranges from 5% to 25%.
8. Epitaxial structure according to claim 1, characterized in that the thickness of the second base electrode layer (12) is 5nm or less than a critical thickness.
9. Epitaxial structure according to claim 1, characterized in that the material of the emitter layer (2) comprises InGaP.
10. A low on-voltage transistor comprising an epitaxial structure according to any of claims 1 to 9.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910921313.3A CN110610991A (en) | 2019-09-27 | 2019-09-27 | Epitaxial structure and low on-voltage transistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910921313.3A CN110610991A (en) | 2019-09-27 | 2019-09-27 | Epitaxial structure and low on-voltage transistor |
Publications (1)
Publication Number | Publication Date |
---|---|
CN110610991A true CN110610991A (en) | 2019-12-24 |
Family
ID=68893822
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201910921313.3A Pending CN110610991A (en) | 2019-09-27 | 2019-09-27 | Epitaxial structure and low on-voltage transistor |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN110610991A (en) |
Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10154714A (en) * | 1996-11-21 | 1998-06-09 | Sharp Corp | Compound semiconductor device and its production |
US6188137B1 (en) * | 1995-05-25 | 2001-02-13 | Sharp Kabushiki Kaisha | Ohmic electrode structure, semiconductor device including such ohmic electrode structure, and method for producing such semiconductor device |
TW493224B (en) * | 2001-10-22 | 2002-07-01 | Hational Cheng Kung University | Composite doped channel heterostructure field-effect transistor |
US20040262634A1 (en) * | 2003-06-30 | 2004-12-30 | Keiichi Murayama | Hetero-junction bipolar transistor and manufacturing method thereof |
CN1574388A (en) * | 2003-05-28 | 2005-02-02 | 株式会社东芝 | Semiconductor device |
JP2006237045A (en) * | 2005-02-22 | 2006-09-07 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor quantum dot structure and manufacturing method thereof |
CN1885555A (en) * | 2005-06-21 | 2006-12-27 | 松下电器产业株式会社 | Hetero-junction bipolar transistor and manufacturing method thereof |
TW200903800A (en) * | 2007-07-09 | 2009-01-16 | Univ Nat Kaohsiung Normal | Superlattice-base heterostructure bipolar transistors |
CN101533841A (en) * | 2008-03-13 | 2009-09-16 | 松下电器产业株式会社 | Semiconductor device and manufacturing method thereof |
US20170200816A1 (en) * | 2014-05-26 | 2017-07-13 | Sumitomo Chemical Company, Limited | Epitaxial wafer for heterojunction bipolar transistor and heterojunction bipolar transistor |
US20190165150A1 (en) * | 2017-11-30 | 2019-05-30 | International Business Machines Corporation | Lateral bipolar junction transistor with dual base region |
-
2019
- 2019-09-27 CN CN201910921313.3A patent/CN110610991A/en active Pending
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6188137B1 (en) * | 1995-05-25 | 2001-02-13 | Sharp Kabushiki Kaisha | Ohmic electrode structure, semiconductor device including such ohmic electrode structure, and method for producing such semiconductor device |
JPH10154714A (en) * | 1996-11-21 | 1998-06-09 | Sharp Corp | Compound semiconductor device and its production |
TW493224B (en) * | 2001-10-22 | 2002-07-01 | Hational Cheng Kung University | Composite doped channel heterostructure field-effect transistor |
CN1574388A (en) * | 2003-05-28 | 2005-02-02 | 株式会社东芝 | Semiconductor device |
US20040262634A1 (en) * | 2003-06-30 | 2004-12-30 | Keiichi Murayama | Hetero-junction bipolar transistor and manufacturing method thereof |
JP2006237045A (en) * | 2005-02-22 | 2006-09-07 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor quantum dot structure and manufacturing method thereof |
CN1885555A (en) * | 2005-06-21 | 2006-12-27 | 松下电器产业株式会社 | Hetero-junction bipolar transistor and manufacturing method thereof |
TW200903800A (en) * | 2007-07-09 | 2009-01-16 | Univ Nat Kaohsiung Normal | Superlattice-base heterostructure bipolar transistors |
CN101533841A (en) * | 2008-03-13 | 2009-09-16 | 松下电器产业株式会社 | Semiconductor device and manufacturing method thereof |
US20170200816A1 (en) * | 2014-05-26 | 2017-07-13 | Sumitomo Chemical Company, Limited | Epitaxial wafer for heterojunction bipolar transistor and heterojunction bipolar transistor |
US20190165150A1 (en) * | 2017-11-30 | 2019-05-30 | International Business Machines Corporation | Lateral bipolar junction transistor with dual base region |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US20050133821A1 (en) | Semiconductor device | |
TWI695504B (en) | Heterojunction bipolar transistor | |
US11508835B2 (en) | Bipolar transistor and method for producing the same | |
US9331187B2 (en) | Bipolar transistor | |
CA2529595C (en) | Heterostructure bipolar transistor | |
US6410396B1 (en) | Silicon carbide: germanium (SiC:Ge) heterojunction bipolar transistor; a new semiconductor transistor for high-speed, high-power applications | |
US20050199909A1 (en) | Heterojunction bipolar transistor and manufacturing method thereof | |
TWI745095B (en) | Epitaxial structure and transistor | |
CN110610991A (en) | Epitaxial structure and low on-voltage transistor | |
JP7403201B2 (en) | Compound semiconductor heterojunction bipolar transistor | |
JP2964637B2 (en) | Field effect transistor | |
JP2004022818A (en) | Double heterojunction bipolar transistor | |
JP3709832B2 (en) | Heterojunction bipolar transistor | |
JP2004022835A (en) | Epitaxial wafer for heterojunction bipolar transistor, and the heterojunction bipolar transistor | |
Chen et al. | InAlAs/InGaAsSb/InGaAs double heterojunction bipolar transistors with high current gain and low base sheet resistance | |
JP2007294782A (en) | Semiconductor device | |
Ohkubo et al. | High-performance self-aligned InP/InGaAs DHBTs with a passivation ledge utilizing a thin etching stop layer | |
JP2000306920A (en) | Heterojunction bipolar transistor and manufacture of the same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20191224 |