CN110610906A - Semiconductor electromagnetic shielding structure and manufacturing method thereof - Google Patents
Semiconductor electromagnetic shielding structure and manufacturing method thereof Download PDFInfo
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- CN110610906A CN110610906A CN201910907399.4A CN201910907399A CN110610906A CN 110610906 A CN110610906 A CN 110610906A CN 201910907399 A CN201910907399 A CN 201910907399A CN 110610906 A CN110610906 A CN 110610906A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 124
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 238000004806 packaging method and process Methods 0.000 claims abstract description 31
- 239000000758 substrate Substances 0.000 claims abstract description 26
- 238000000034 method Methods 0.000 claims abstract description 14
- 238000005538 encapsulation Methods 0.000 claims description 32
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 24
- 238000004544 sputter deposition Methods 0.000 claims description 13
- 229910052759 nickel Inorganic materials 0.000 claims description 12
- 229910052709 silver Inorganic materials 0.000 claims description 12
- 239000004332 silver Substances 0.000 claims description 12
- 239000000463 material Substances 0.000 claims description 10
- 239000007769 metal material Substances 0.000 claims description 10
- 239000003822 epoxy resin Substances 0.000 claims description 6
- 229920000647 polyepoxide Polymers 0.000 claims description 6
- 125000006850 spacer group Chemical group 0.000 claims description 5
- 238000007747 plating Methods 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 6
- 239000002184 metal Substances 0.000 description 9
- 229910052751 metal Inorganic materials 0.000 description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000005137 deposition process Methods 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 230000001788 irregular Effects 0.000 description 2
- 238000003698 laser cutting Methods 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 238000005452 bending Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
The invention discloses a semiconductor electromagnetic shielding structure, which comprises: the circuit board comprises a substrate, a first circuit board and a second circuit board, wherein the substrate is provided with a first surface and a second surface which are opposite to each other; at least two semiconductor devices disposed on the second surface with a mounting space between each two adjacent semiconductor devices, the semiconductor devices being electrically connected to the circuit connection structure; the packaging layer at least covers the semiconductor devices and the second surface, and is provided with a filling gap, and the part of the filling gap in the assembly interval extends along the assembly interval so as to separate the two adjacent semiconductor devices; and the electromagnetic shielding layer comprises a first shielding layer filled in the filling gap and a second shielding layer covering the surface of the packaging layer, and the first shielding layer and the second shielding layer are integrally connected. The electromagnetic shielding structure formed by the method has better electromagnetic signal anti-interference effect.
Description
Technical Field
The invention relates to the technical field of semiconductor device electromagnetic shielding, in particular to a semiconductor electromagnetic shielding structure and a manufacturing method thereof.
Background
With the trend of multi-function and miniaturization of electronic products, a plurality of chips are often integrated on a semiconductor module, and in order to prevent electromagnetic signals between the chips from interfering with each other, a surface-mounted magnetic isolation material or a metal shielding case is generally adopted to achieve the effect of shielding electromagnetic interference of the signals. Although these electromagnetic shielding methods are simple to implement, they have the same obvious disadvantages, such as large space occupation due to their own structure and assembly structure.
Take the electromagnetic shield structure that sets up on the chip as an example, need paste the edge of metal shield cover on the chip surface, the position that metal shield cover and PCB board contact need outwards concave a region of bending out for with PCB board adhesion. For the integrated semiconductor module, the gap between the chips needs to be as small as possible, and if one metal shield is separately disposed for each chip, the gap between the chips is increased, so that the overall volume of the semiconductor module is increased, and the requirement for use in combination with other electronic components cannot be satisfied.
Disclosure of Invention
The invention mainly aims to provide a semiconductor electromagnetic shielding structure, and aims to solve the technical problem that the existing electromagnetic shielding structure occupies a large space.
In order to achieve the above object, the present invention provides a semiconductor electromagnetic shielding structure, comprising:
the circuit board comprises a substrate, a first connecting piece and a second connecting piece, wherein the substrate is provided with a first surface and a second surface which are opposite, and a circuit connecting structure is arranged inside the substrate;
at least two semiconductor devices disposed on the second surface with a mounting space between each two adjacent semiconductor devices, the semiconductor devices being electrically connected to the circuit connection structure;
an encapsulation layer at least covering the semiconductor device and the second surface, wherein the encapsulation layer is provided with a filling gap which extends inwards from the surface of the encapsulation layer opposite to the second surface and is at least partially positioned at the assembly interval, and the part of the filling gap in the assembly interval extends along the assembly interval to separate two adjacent semiconductor devices;
and the electromagnetic shielding layer comprises a first shielding layer filled in the filling gap and a second shielding layer covering the surface of the packaging layer, and the first shielding layer and the second shielding layer are integrally connected.
Preferably, the first shielding layer is formed by filling silver in the filling gap.
Preferably, the second shielding layer is formed by sputtering nickel on a surface of the encapsulation layer.
Preferably, the second shielding layer includes an inner shielding layer formed by sputtering on a surface of the encapsulation layer and an outer shielding layer formed by electroplating on a surface of the inner shielding layer.
Preferably, the material of the inner shielding layer is nickel, and the material of the outer shielding layer is silver.
Preferably, the thickness of the inner shielding layer is 3-5 μm, and the thickness of the outer shielding layer is 0.5-1 μm.
Preferably, the cross-sectional shape of the filling gap is T-shaped.
Preferably, the filling gap includes a spacer portion at the fitting interval and an enclosing portion extending along a circumferential remaining portion of the semiconductor device, the spacer portion communicating with the enclosing portion to form an annular structure surrounding the semiconductor device.
Preferably, the encapsulation layer is made of epoxy resin.
The invention also provides a manufacturing method of the semiconductor electromagnetic shielding structure, which comprises the following steps:
the method comprises the steps of providing a semiconductor module, wherein the semiconductor module comprises a substrate, at least two semiconductor devices and an encapsulation layer, the substrate is provided with a first surface and a second surface which are opposite, and a circuit connection structure is formed inside the substrate; the at least two semiconductor devices are attached to the second surface, an assembly interval is reserved between every two adjacent semiconductor devices, and the semiconductor devices are electrically connected with the circuit connecting structure; the packaging layer at least covers the semiconductor device and the second surface;
step two, forming a filling gap on the packaging layer, wherein the filling gap extends inwards from the surface opposite to the second surface of the packaging layer and is at least partially positioned at the assembly interval, and the part of the filling gap in the assembly interval extends along the assembly interval so as to separate two adjacent semiconductor devices;
filling a first metal material in the filling gap to form a first shielding layer, and sputtering a second metal material on the surface of the packaging layer to form a second shielding layer, wherein the first shielding layer and the second shielding layer are integrally connected.
Compared with the prior art, the invention fully utilizes the assembly interval between the two adjacent semiconductor devices, the filling gap positioned at the assembly interval is arranged on the packaging layer, the first shielding layer is filled in the filling gap to separate the two adjacent semiconductor devices, the second shielding layer covers the surface of the packaging layer, and the first shielding layer and the second shielding layer are connected into a whole, thereby forming a finished electromagnetic shielding cover structure, realizing the electromagnetic shielding between the semiconductor devices under the condition of hardly increasing the volume of the semiconductor module, and simultaneously meeting the design requirement of the integrated module; and partial embedded shielding structure has better electromagnetic signal anti-interference effect.
Drawings
Fig. 1 is a schematic structural view of a first embodiment of a semiconductor electromagnetic shielding structure according to the present invention;
fig. 2 is a partial enlarged view of a second embodiment of the semiconductor electromagnetic shield structure of the present invention;
fig. 3 is an enlarged view of a portion of a third embodiment of the semiconductor electromagnetic shield structure of the present invention;
fig. 4 is a schematic structural diagram of a fourth embodiment of the semiconductor electromagnetic shielding structure of the present invention.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
In order to solve the above technical problem, the present invention provides a semiconductor electromagnetic shielding structure, referring to fig. 1 and fig. 2, the semiconductor electromagnetic shielding structure includes a substrate 10, at least two semiconductor devices 20, an encapsulation layer 30 and an electromagnetic shielding layer 40, wherein the substrate 10 mainly provides a mounting base for the semiconductor devices 20, and has a first surface and a second surface opposite to each other, a circuit connection structure 11 is disposed inside the substrate 10, and the circuit connection structure 11 is used for electrically connecting the semiconductor devices 20 and other external electronic devices, for example, in one implementation, the substrate 10 is a PCB, the circuit connection structure 11 is a copper-clad structure and a conductive via hole disposed inside, and a first metal contact 12 electrically connected to the circuit connection structure 11 is disposed on the first surface. It should be noted that the circuit connection structure 11 shown in fig. 1 is only an example, and those skilled in the art may design a matching circuit connection structure according to the specific structure of the semiconductor device 20, for example, to adapt to the packaging requirements of the SIP product. In addition, it should be noted that the semiconductor device 20 may be a single electronic component, or may be a functional unit formed by combining a plurality of electronic components, for example, the single electronic component may be various chips adapted to specific application scenarios, and the functional unit may be a combination of a chip and its supporting electronic component.
The semiconductor device 20 is disposed on the second surface, and the mounting process with the substrate 10 is mainly various forms of soldering. In this embodiment, a plurality of semiconductor devices 20 are mounted on the second surface according to specific design requirements, taking the semiconductor device 20 as a single chip, for example, the plurality of chips are arranged along a straight line, for example, the plurality of chips are arranged along a horizontal straight line and a longitudinal straight line, and an assembly interval is reserved between every two adjacent chips, and in order to reduce the volume of the integrated semiconductor module and improve the integration degree, the assembly interval should be as small as possible. In the present embodiment, the surface of the semiconductor device 20 facing the second surface is provided with a second metal contact 21 electrically connected to the circuit connection structure 11, and it can be understood that the semiconductor device 20 is mechanically and electrically connected to the second surface.
The encapsulation layer 30 covers the semiconductor device 20 and the second surface, for example, the embodiment adopts a plastic encapsulation process, the encapsulation layer 30 is made of epoxy resin, and the specific encapsulation process is well known to those skilled in the art and will not be described herein. The encapsulating layer 30 encapsulates the substrate 10 and the semiconductor device 20 into a whole, and the structure of the whole semiconductor module is more compact. The encapsulation layer 30 is provided with a filling gap extending inward from a surface opposite to the second surface and at least partially located at the mounting space, a portion of the filling gap in the mounting space extends along the mounting space to separate two adjacent semiconductor devices 20, and a depth of the filling gap can be determined according to a size and a mounting position of the semiconductor devices 20, and mainly covers an electromagnetic signal generating portion of the semiconductor devices 20, for example, in a preferred embodiment, the filling gap penetrates through two opposite sides of the encapsulation layer 30. Specifically, the outer shape of the semiconductor device 20 is generally a specific regular shape, and especially for a single chip, the outer shape is mostly square or rectangular, and for example, all chips are arranged along a straight line, the filling gap may be a long straight slit extending along one side line of the chip, and the filling gap may further include a portion outside the assembly interval. However, when the semiconductor device 20 is a unit type cell, the shape thereof may be irregular in terms of the entire unit, and the filling gap formed at this time is also irregular. In this embodiment, the filling gap may be cut on the encapsulation layer 30 by laser, and using laser cutting, a very narrow filling gap can be obtained, so that the size of the assembly space is controlled to a small range, and the filling gap can be adapted to a variety of extended shapes. Taking the epoxy resin cured and molded packaging layer 30 as an example, the width of the filling gap can be controlled to be 20-50 μm, and the depth can be selected according to the thickness of the packaging layer 30.
And an electromagnetic shielding layer 40, which includes a first shielding layer 41 filled in the filling gap and a second shielding layer 42 covering the surface of the encapsulation layer 30, wherein the first shielding layer 41 and the second shielding layer 42 are integrally connected, and the connection includes a mechanical connection and an electrical connection, so that the first shielding layer 41 and the second shielding layer 42 are combined into a whole, which is equivalent to a shielding case structure for realizing the electromagnetic signal interference resistance. In order to achieve the shielding effect of the electromagnetic signal, the first shielding layer 41 and the second shielding layer 42 are formed by metal materials, and the usable metal materials include, but are not limited to, copper, nickel, silver, and the like.
In a preferred embodiment, the first shielding layer 41 is formed by filling silver into the filling gap, and the second shielding layer 42 is formed by sputtering nickel on the surface of the packaging layer 30, so that the bonding performance of nickel and silver is good, and therefore the first shielding layer 41 and the second shielding layer 42 can form a tight and firm connection to maintain the continuity of the electric conduction. The space for filling the gap is small, so that the cost is not increased significantly when silver is filled in the gap, and the coverage surface of the packaging layer 30 is large, so that nickel with low cost is used as a deposition material, and the combination mode can reduce the comprehensive cost.
In another preferred embodiment, the second shield layer 42 includes an inner shield layer formed by sputtering on the surface of the encapsulation layer 30 and an outer shield layer formed by electroplating on the surface of the inner shield layer. From the perspective of the sputtering deposition process, the second shielding layer 42 is obtained by two sputtering deposition processes, an inner shielding layer is formed firstly, and an outer shielding layer is formed on the basis of the inner shielding layer. In practical application, the thickness of the inner and outer shielding layers can be controlled by a sputtering process, for example, the thickness of the inner shielding layer is controlled within a range of 3-5 μm, for example, the thickness of the inner shielding layer is about 4 μm, and the thickness of the outer shielding layer is controlled within a range of 0.5-1 μm, which shows that the second shielding layer 42 of the embodiment has almost no influence on the volume of the whole semiconductor module, and meanwhile, the first shielding layer 41 is obtained by replacing part of the material of the encapsulation layer 30, so that the influence on the volume of the whole semiconductor module is not caused.
In another preferred embodiment, referring to fig. 3, the cross-sectional shape of the filling gap is T-shaped, which is equivalent to forming a connecting portion 43 with a larger area at the end of the first shielding layer 41, and with this structure, the contact area between the first shielding layer 41 and the second shielding layer 42 can be increased, and especially when the materials of the two shielding layers are different, the bonding performance between the two shielding layers can be improved, and the tightness of the mechanical connection and the electrical connection can be ensured.
The above embodiments mainly focus on the electromagnetic shielding scheme of forming the first shielding layer 41 in the mounting space and forming the second shielding layer 42 on the surface of the encapsulation layer 30, and a good anti-interference effect between the semiconductor devices 20 can be achieved based on the electromagnetic shielding scheme. In order to further ensure the independence of the working environment of each semiconductor device 20, on the basis of the above embodiment, referring to fig. 4, the filling gap of the present embodiment includes a spacing portion 31 located at the assembly spacing and a surrounding portion 32 extending along the remaining part of the circumference of the semiconductor device 20, the spacing portion 31 is communicated with the surrounding portion 32 to form a ring structure surrounding the semiconductor device 20, that is, the filling gap is arranged along the circumferential direction of the semiconductor device 20, so that the first shielding layer 41 formed thereby forms an electromagnetic shield surrounding the semiconductor device 20 after being combined with the second shielding layer 42, and the circuit connection structure 11 arranged in the substrate 10 can also play an electromagnetic shielding role. In the present embodiment, one spacer portion 31 is shared between two adjacent semiconductor devices 20, so that a reserved space can be reduced for a space of an assembly interval.
In addition, the invention also provides a manufacturing method of the semiconductor electromagnetic shielding structure, which comprises the following steps:
the method comprises the following steps of providing a semiconductor module, wherein the semiconductor module comprises a substrate, at least two semiconductor devices and an encapsulation layer, the substrate is provided with a first surface and a second surface which are opposite, and a circuit connection structure is formed inside the substrate; at least two semiconductor devices are attached to the second surface, an assembly interval is reserved between every two adjacent semiconductor devices, and the semiconductor devices are electrically connected with the circuit connecting structure; the packaging layer at least covers the semiconductor device and the second surface;
the base plate mainly provides the subsides dress basis for semiconductor device, and it has and is relative first surface and second surface, and the inside of base plate is equipped with circuit connection structure, realizes being connected with semiconductor device's electricity through this circuit connection structure to and realize being connected with other electron device's of outside electricity, for example in an implementation, the base plate is the PCB board, and circuit connection structure covers copper structure and electrically conducts the perforation for inside setting, is equipped with the first metal contact of being connected with circuit connection structure electricity on the first surface.
And at least two semiconductor devices are attached to the second surface, an assembly interval is reserved between every two adjacent semiconductor devices, and a second metal contact electrically connected with the circuit connecting structure is formed on one surface of each semiconductor device, which faces the second surface. It should be noted that the semiconductor device may be a single electronic component, or may be a functional unit formed by combining a plurality of electronic components, for example, the single electronic component may be various chips adapted to a specific application scenario, and the functional unit may be a combination of a chip and its supporting electronic component.
The semiconductor device is arranged on the second surface, and the mounting process of the semiconductor device and the substrate is various forms of welding. In this embodiment, a plurality of semiconductor devices are mounted on the second surface according to specific design requirements, for example, the plurality of semiconductor devices are arranged along a straight line, taking the semiconductor device as a single chip as an example, and for example, the plurality of chips are arranged along a horizontal straight line and a longitudinal straight line, an assembly interval is reserved between every two adjacent chips, in order to reduce the volume of the integrated semiconductor module and improve the integration degree, the assembly interval should be as small as possible, a second metal contact electrically connected with the circuit connection structure is provided on a surface of the chip facing the second surface, and it can be understood that the chip and the second surface form mechanical connection and electrical connection.
The encapsulation layer covers the semiconductor device and the second surface, for example, the embodiment adopts a plastic encapsulation process, the encapsulation layer is made of epoxy resin, and the specific encapsulation process is well known to those skilled in the art and will not be described herein. The packaging layer packages the substrate and the semiconductor device into a whole, and the structure of the whole semiconductor module is more compact.
Forming a filling gap on the packaging layer, wherein the filling gap extends inwards from the surface opposite to the second surface of the packaging layer and is at least partially positioned at the assembly interval, and the part of the filling gap in the assembly interval extends along the assembly interval so as to separate two adjacent semiconductor devices;
in this embodiment, the filling gap may be cut on the encapsulation layer by laser, and using laser cutting, a very narrow filling gap can be obtained, thus controlling the size of the assembly gap in a small range. Taking the epoxy resin cured and molded packaging layer as an example, the width of the filling gap can be controlled to be 20-50 μm, and the depth can be selected according to the thickness of the packaging layer. The depth of the filling gap may be determined according to the size and mounting position of the semiconductor device, and mainly covers the electromagnetic signal generating portion of the semiconductor device, for example, in a preferred embodiment, the filling gap penetrates through two opposite sides of the packaging layer.
And step three, filling a first metal material in the filling gap to form a first shielding layer, and sputtering a second metal material on the surface of the packaging layer to form a second shielding layer, wherein the first shielding layer and the second shielding layer are integrally connected.
The first shielding layer and the second shielding layer are both formed by metal materials, usable metal materials include but are not limited to copper, nickel, silver and the like, and the materials of the two shielding layers can be the same or different. In a preferred embodiment, the first shielding layer is formed by filling silver into the filling gap, and the second shielding layer is formed by sputtering nickel on the surface of the packaging layer, so that the bonding performance of nickel and silver is good, and the first shielding layer and the second shielding layer can form tight and firm connection to keep continuity of electric conduction. The accommodating space for filling the gap is small, so that the cost cannot be obviously increased by filling silver in the gap, the coverage surface of the packaging layer is large, and therefore, nickel with low cost is used as a deposition material, and the combination mode can reduce the comprehensive cost.
In summary, the assembly interval between two adjacent semiconductor devices is fully utilized, the packaging layer is provided with the filling gap at the assembly interval, the filling gap is filled with the first shielding layer to separate the two adjacent semiconductor devices, the surface of the packaging layer is covered with the second shielding layer, and the first shielding layer and the second shielding layer are connected into a whole, so that a finished electromagnetic shielding cover structure is formed, electromagnetic shielding between the semiconductor devices can be realized under the condition that the volume of the semiconductor module is hardly increased, and meanwhile, the design requirement of the integrated module is met; and partial embedded shielding structure has better electromagnetic signal anti-interference effect.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A semiconductor electromagnetic shield structure, comprising:
the circuit board comprises a substrate, a first connecting piece and a second connecting piece, wherein the substrate is provided with a first surface and a second surface which are opposite, and a circuit connecting structure is arranged inside the substrate;
at least two semiconductor devices disposed on the second surface with a mounting space between each two adjacent semiconductor devices, the semiconductor devices being electrically connected to the circuit connection structure;
an encapsulation layer at least covering the semiconductor device and the second surface, wherein the encapsulation layer is provided with a filling gap which extends inwards from the surface of the encapsulation layer opposite to the second surface and is at least partially positioned at the assembly interval, and the part of the filling gap in the assembly interval extends along the assembly interval to separate two adjacent semiconductor devices;
and the electromagnetic shielding layer comprises a first shielding layer filled in the filling gap and a second shielding layer covering the surface of the packaging layer, and the first shielding layer and the second shielding layer are integrally connected.
2. The semiconductor electromagnetic shielding structure of claim 1, wherein the first shielding layer is formed by filling silver in the filling gap.
3. The semiconductor electromagnetic shielding structure according to claim 1 or 2, wherein the second shielding layer is formed by sputtering nickel on a surface of the encapsulation layer.
4. The semiconductor electromagnetic shield structure of claim 1, wherein the second shield layer comprises an inner shield layer formed by sputtering on a surface of the encapsulation layer and an outer shield layer formed by plating on a surface of the inner shield layer.
5. The semiconductor electromagnetic shielding structure of claim 4, wherein the material of the inner shielding layer is nickel and the material of the outer shielding layer is silver.
6. The semiconductor electromagnetic shielding structure of claim 5, wherein the inner shielding layer has a thickness of 3 to 5 μm, and the outer shielding layer has a thickness of 0.5 to 1 μm.
7. A semiconductor electromagnetic shielding structure according to claim 1 or 2, wherein the filling gap has a T-shaped cross-sectional shape.
8. A semiconductor electromagnetic shield structure according to claim 1 or 2, wherein the filling gap includes a spacer portion at the fitting interval and an enclosure portion extending along a circumferential remainder of the semiconductor device, the spacer portion communicating with the enclosure portion to form an annular structure surrounding the semiconductor device.
9. A semiconductor electromagnetic shielding structure according to claim 1 or 2, wherein the encapsulation layer is made of epoxy resin.
10. A method for manufacturing a semiconductor electromagnetic shielding structure is characterized by comprising the following steps:
the method comprises the steps of providing a semiconductor module, wherein the semiconductor module comprises a substrate, at least two semiconductor devices and an encapsulation layer, the substrate is provided with a first surface and a second surface which are opposite, and a circuit connection structure is formed inside the substrate; the at least two semiconductor devices are attached to the second surface, an assembly interval is reserved between every two adjacent semiconductor devices, and the semiconductor devices are electrically connected with the circuit connecting structure; the packaging layer at least covers the semiconductor device and the second surface;
step two, forming a filling gap on the packaging layer, wherein the filling gap extends inwards from the surface opposite to the second surface of the packaging layer and is at least partially positioned at the assembly interval, and the part of the filling gap in the assembly interval extends along the assembly interval so as to separate two adjacent semiconductor devices;
filling a first metal material in the filling gap to form a first shielding layer, and sputtering a second metal material on the surface of the packaging layer to form a second shielding layer, wherein the first shielding layer and the second shielding layer are integrally connected.
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| CN201910907399.4A CN110610906A (en) | 2019-09-24 | 2019-09-24 | Semiconductor electromagnetic shielding structure and manufacturing method thereof |
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| CN201910907399.4A CN110610906A (en) | 2019-09-24 | 2019-09-24 | Semiconductor electromagnetic shielding structure and manufacturing method thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113811078A (en) * | 2020-06-12 | 2021-12-17 | 深南电路股份有限公司 | Manufacturing method of packaging structure and packaging structure |
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