CN110602503A - SOP packet decoding method, storage device and decoder suitable for USB-PD protocol - Google Patents
SOP packet decoding method, storage device and decoder suitable for USB-PD protocol Download PDFInfo
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- H—ELECTRICITY
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- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
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Abstract
The present invention relates to the field of decoding technologies, and in particular, to a method, a storage device, and a decoder for decoding an SOP packet applicable to a USB-PD protocol. The method for decoding the SOP packet suitable for the USB-PD protocol comprises the following steps: after the Preamble is correctly received, setting f, and counting b; if the first K-code is correctly received, adding 1 to a counter c; if the first K-code is not received correctly, setting h to be 1 when b is greater than 5; if the matching event of the K-code packet occurs when b is less than 5, setting d to be 1; if a matching event of a K-code packet occurs when 8< ═ b < ═ 10 and h < ═ 1, then e is set to 1; when d is 1, correcting b to 5; when e is 1, correcting b to 10; when b is 20, setting g to 1; when d is 1, e is 1 or K-code packet matching, b is 5, 10, 15 and 20, c is added with 1; carrying out sop decoding when c > is 3; the sop decoding result is stored in j. By the technical scheme, the whole sop packet can be completely decoded under the condition of any 1K-code error or the last 1 preamble error in the total 4K-codes.
Description
Technical Field
The present invention relates to the field of decoding technologies, and in particular, to a method, a storage device, and a decoder for decoding an SOP packet applicable to a USB-PD protocol.
Background
According to the requirements of Table5-3 of section 5.4 of protocol of Universal Serial Bus Power Delivery Specification, 4K-codes need to be judged in the receiving process of sop packets, and only one wrong K-code does not influence the receiving of sop packets.
However, in the prior art, most of the processes of receiving the SOP packets are realized by using a single chip microcomputer, how to solve the problem when an error code exists is not considered in the process, and particularly, the receiving of the SOP packets is still influenced when only one wrong K-code exists, so that the error packet rate is extremely high.
Disclosure of Invention
Therefore, a decoding method for SOP packets suitable for the USB-PD protocol needs to be provided, and the specific technical solution is as follows:
a method for decoding SOP packets suitable for USB-PD protocol includes the following steps: judging whether the Preamble is correctly received and finished, if the Preamble is correctly received and finished, setting f, and counting b; judging whether the first K-code is correctly received, and if the first K-code is correctly received, adding 1 to a counter c; if the first K-code is not received correctly, setting h to be 1 when b is greater than 5; if the matching event of the K-code packet occurs when b is less than 5, setting d to be 1; if a matching event of a K-code packet occurs when 8< ═ b < ═ 10 and h < ═ 1, then e is set to 1; when d is 1, correcting b to 5; when e is 1, correcting b to 10; when b is 20, setting g to 1; when d is 1, e is 1 or K-code packet matching, b is 5, 10, 15 and 20, c is added with 1; carrying out sop decoding when c > is 3; the sop decoding result is stored in j; the a is a bmc code receiver; b is a bmc code counter; the c is a K-code counter; d and e are respectively a K-code corrector; f is a K-code initial zone bit; the g is a K-code ending zone bit; the h is a K-code error zone bit; the j is the sop packet decoding result register.
Further, if Preamble is not correctly received, K compares whether the received bmc code is consistent with the K-code agreed by the protocol, if so, the K-code corrector d is set to be 1; and K is a K-code matcher.
Further, the matching event of the K-code packet refers to: the K-code codes of Sync-1, Sync-2, RST-1, RST-2, EOP and Sync-3 are 11000, 10001, 00111, 11001, 01101 and 00110 respectively.
Further, the SOP packet decoding means: the instruction set is decoded for SOP packet, SOP ' packet, Hard Reset packet, Cable Reset packet, SOP ' _ Debug packet and SOP ' _ Debug packet respectively.
Further, the SOP packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, Sync-1 and Sync-2; the SOP' packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, Sync-3 and Sync-3; the SOP "packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, Sync-3, Sync-1 and Sync-3; the Hard Reset packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: RST-1, RST-1 and RST-2; the Cable Reset packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: RST-1, Sync-1, RST-1 and Sync-3; the SOP' _ Debug packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, RST-2 and Sync-3; the SOP "_ debug packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, RST-2, Sync-3 and Sync-2.
In order to solve the technical problem, the storage device is further provided, and the specific technical scheme is as follows:
a storage device having stored therein a set of instructions for performing: judging whether the Preamble is correctly received and finished, if the Preamble is correctly received and finished, setting f, and counting b; judging whether the first K-code is correctly received, and if the first K-code is correctly received, adding 1 to a counter c; if the first K-code is not received correctly, setting h to be 1 when b is greater than 5; if the matching event of the K-code packet occurs when b is less than 5, setting d to be 1; if a matching event of a K-code packet occurs when 8< ═ b < ═ 10 and h < ═ 1, then e is set to 1; when d is 1, correcting b to 5; when e is 1, correcting b to 10; when b is 20, setting g to 1; when d is 1, e is 1 or K-code packet matching, b is 5, 10, 15 and 20, c is added with 1; carrying out sop decoding when c > is 3; the sop decoding result is stored in j; the a is a bmc code receiver; b is a bmc code counter; the c is a K-code counter; d and e are respectively a K-code corrector; f is a K-code initial zone bit; the g is a K-code ending zone bit; the h is a K-code error zone bit; the j is the sop packet decoding result register.
Further, the set of instructions is further for performing: if Preamble is not correctly received, K compares whether the received bmc code is consistent with the K-code agreed by the protocol, if so, setting the K-code corrector d to be 1; and K is a K-code matcher.
Further, the matching event of the K-code packet refers to: the K-code codes of Sync-1, Sync-2, RST-1, RST-2, EOP and Sync-3 are 11000, 10001, 00111, 11001, 01101 and 00110 respectively.
Further, the SOP packet decoding means: the instruction set is decoded for SOP packet, SOP ' packet, Hard Reset packet, Cable Reset packet, SOP ' _ Debug packet and SOP ' _ Debug packet respectively.
Further, the SOP packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, Sync-1 and Sync-2; the SOP' packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, Sync-3 and Sync-3; the SOP "packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, Sync-3, Sync-1 and Sync-3; the Hard Reset packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: RST-1, RST-1 and RST-2; the Cable Reset packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: RST-1, Sync-1, RST-1 and Sync-3; the SOP' _ Debug packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, RST-2 and Sync-3; the SOP "_ debug packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, RST-2, Sync-3 and Sync-2.
In order to solve the above technical problem, a decoder is also provided, and the specific technical scheme is as follows:
a decoder, comprising: 1 bmc code receiver a; 1 bmc code counter b; 1K-code counter c; 2K-code correctors d, e; 1K-code initial flag bit f; 1K-code ending flag bit g; 1K-code error flag bit h; and 1 sop packet decoding result register j; the bmc code receiver a is respectively connected with a bmc code counter b, a K-code counter c, a K-code starting zone bit f, a K-code ending zone bit g, a sop packet decoding result register j and a K-code corrector e; the bmc code counter b is respectively connected with a K-code counter c, a K-code corrector d, a K-code error flag bit h and a K-code corrector e.
The invention has the beneficial effects that: after Preamble receiving is finished, f begins to be set, and b begins to count at the same time; judging whether the first K-code is correctly received, and if the first K-code is correctly received, adding 1 to a counter c; if the first K-code is not received correctly, setting h to be 1 when b is greater than 5; if the matching event of the K-code packet occurs when b is less than 5, setting d to be 1; if a matching event of a K-code packet occurs when 8< ═ b < ═ 10 and h < ═ 1, then e is set to 1; when d is 1, correcting b to 5; when e is 1, correcting b to 10; when b is 20, setting g to 1; when d is 1, e is 1 or K-code packet matching, b is 5, 10, 15 and 20, c is added with 1; carrying out sop decoding when c > is 3; the sop decoding result is stored in j. Because the scheme comprises a K-code counter and judges whether the number of the correct K-codes reaches the standard of > 3, if only 1K-code is wrong, the judgment process of the whole sop packet is not influenced. Secondly, if the Preamble is not finished correctly, the scheme also comprises a K-code matcher for this purpose, the matcher starts to operate already in the Preamble receiving stage, and since the K-code is completely inconsistent with the code of the Preamble, once the K-code matcher detects that the received bmc code is matched with the K-code agreed by the protocol, the K-code corrector d is set to 1, and then the step of correcting b to 5 and the like is continuously executed when d is 1. In this case, the K-code can be correctly judged even in the case where the Preamble reception is erroneous or the transmission is erroneous.
Drawings
FIG. 1 is a diagram of a decoder according to an embodiment;
FIG. 2 is a flowchart of a method for decoding SOP packets according to the USB-PD protocol according to an embodiment;
fig. 3 is a schematic block diagram of a storage device according to an embodiment.
Description of reference numerals:
300. a storage device.
Detailed Description
To explain technical contents, structural features, and objects and effects of the technical solutions in detail, the following detailed description is given with reference to the accompanying drawings in conjunction with the embodiments.
Referring to fig. 1 to 2, in the present embodiment, a method for decoding an SOP packet applicable to a USB-PD protocol is applied to a decoder, as shown in fig. 1, the decoder includes: 1 bmc code receiver a; 1 bmc code counter b; 1K-code counter c; 2K-code correctors d, e; 1K-code initial flag bit f; 1K-code ending flag bit g; 1K-code error flag bit h; and 1 sop packet decoding result register j; the bmc code receiver a is respectively connected with a bmc code counter b, a K-code counter c, a K-code starting zone bit f, a K-code ending zone bit g, a sop packet decoding result register j and a K-code corrector e; the bmc code counter b is respectively connected with a K-code counter c, a K-code corrector d, a K-code error flag bit h and a K-code corrector e.
The following description is made of a specific embodiment of a method for decoding SOP packets applicable to the USB-PD protocol:
step S201: and judging whether the Preamble is correctly received and finished, setting f after the Preamble is correctly received, and starting counting b at the same time.
Step S202: and judging whether the first K-code is correctly received, and if the first K-code is correctly received, adding 1 to a counter c.
Step S203: if the first K-code is not received correctly, h is set to 1 when b > 5.
Step S204: if the matching event of the K-code packet occurs when b is less than 5, d is set to 1.
Step S205: if a matching event of a K-code packet occurs when 8< b > 10 and h < 1, e is set to 1.
Step S206: when d is 1, b is corrected to 5.
Step S207: when e is 1, b is corrected to 10.
Step S208: when b is 20, g is set to 1.
Step S209: when d is 1, e is 1, or K-code packet matches, b is 5, 10, 15, 20, c is added with 1.
Step S210: sop decoding is carried out when c > -3.
Step S211: the sop decoding result is stored in j.
Because the scheme comprises a K-code counter and judges whether the number of the correct K-codes reaches the standard of > 3, if only 1K-code is wrong, the judgment process of the whole sop packet is not influenced.
Further, if Preamble is not correctly received, K compares whether the received bmc code is consistent with the K-code agreed by the protocol, if so, the K-code corrector d is set to be 1; and K is a K-code matcher.
The method comprises the following steps of setting a code of a Preamble, setting a code matcher (K-code matcher) as 1 when the K-code matcher detects that a received bmc code is matched with a K-code agreed by a protocol, and correcting b to 5 when d is 1. In this case, the K-code can be correctly judged even in the case where the Preamble reception is erroneous or the transmission is erroneous.
Further, in this embodiment, the matching event of the K-code packet refers to: the K-code codes of Sync-1, Sync-2, RST-1, RST-2, EOP and Sync-3 are 11000, 10001, 00111, 11001, 01101 and 00110 respectively.
Further, in this embodiment, the SOP packet decoding means: the instruction set is decoded for SOP packet, SOP ' packet, Hard Reset packet, Cable Reset packet, SOP ' _ Debug packet and SOP ' _ Debug packet respectively.
Further, in this embodiment, the SOP packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, Sync-1 and Sync-2; the SOP' packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, Sync-3 and Sync-3; the SOP "packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, Sync-3, Sync-1 and Sync-3; the HardReset packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: RST-1, RST-1 and RST-2; the Cable Reset packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: RST-1, Sync-1, RST-1 and Sync-3; the SOP' _ Debug packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, RST-2 and Sync-3; the SOP "_ debug packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, RST-2, Sync-3 and Sync-2.
Referring to fig. 3, in the present embodiment, a memory device 300 is implemented as follows:
a storage device 300 having stored therein a set of instructions for performing: judging whether the Preamble is correctly received and finished, if the Preamble is correctly received and finished, setting f, and counting b; judging whether the first K-code is correctly received, and if the first K-code is correctly received, adding 1 to a counter c; if the first K-code is not received correctly, setting h to be 1 when b is greater than 5; if the matching event of the K-code packet occurs when b is less than 5, setting d to be 1; if a matching event of a K-code packet occurs when 8< ═ b < ═ 10 and h < ═ 1, then e is set to 1; when d is 1, correcting b to 5; when e is 1, correcting b to 10; when b is 20, setting g to 1; when d is 1, e is 1 or K-code packet matching, b is 5, 10, 15 and 20, c is added with 1; carrying out sop decoding when c > is 3; the sop decoding result is stored in j; the a is a bmc code receiver; b is a bmc code counter; the c is a K-code counter; d and e are respectively a K-code corrector; f is a K-code initial zone bit; the g is a K-code ending zone bit; the h is a K-code error zone bit; the j is the sop packet decoding result register.
The above steps are performed by the storage device 300 such that the entire sop packet can still be decoded in its entirety for any 1K-code error or the last 1 preamble error out of the total of 4K-codes.
Further, the set of instructions is further for performing: if Preamble is not correctly received, K compares whether the received bmc code is consistent with the K-code agreed by the protocol, if the received bmc code is completely inconsistent with the K-code agreed by the protocol, adding 1 to a K-code corrector d when K-code matching is detected; and K is a K-code matcher.
Further, the matching event of the K-code packet refers to: the K-code codes of Sync-1, Sync-2, RST-1, RST-2, EOP and Sync-3 are 11000, 10001, 00111, 11001, 01101 and 00110 respectively.
Further, the SOP packet decoding means: the instruction set is decoded for SOP packet, SOP ' packet, Hard Reset packet, Cable Reset packet, SOP ' _ Debug packet and SOP ' _ Debug packet respectively.
Further, the SOP packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, Sync-1 and Sync-2; the SOP' packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, Sync-3 and Sync-3; the SOP "packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, Sync-3, Sync-1 and Sync-3; the Hard Reset packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: RST-1, RST-1 and RST-2; the Cable Reset packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: RST-1, Sync-1, RST-1 and Sync-3; the SOP' _ Debug packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, RST-2 and Sync-3; the SOP "_ debug packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, RST-2, Sync-3 and Sync-2.
Referring to fig. 1, in the present embodiment, a decoder is implemented as follows:
a decoder, comprising: 1 bmc code receiver a; 1 bmc code counter b; 1K-code counter c; 2K-code correctors d, e; 1K-code initial flag bit f; 1K-code ending flag bit g; 1K-code error flag bit h; and 1 sop packet decoding result register j; the bmc code receiver a is respectively connected with a bmc code counter b, a K-code counter c, a K-code starting zone bit f, a K-code ending zone bit g, a sop packet decoding result register j and a K-code corrector e; the bmc code counter b is respectively connected with a K-code counter c, a K-code corrector d, a K-code error flag bit h and a K-code corrector e.
The above decoder can be used to completely decode the whole sop packet in case of any 1K-code error or the last 1 preamble error in the total 4K-codes.
Further, the decoder further includes 1K-code matcher K. The matcher starts to operate already in a Preamble receiving stage, and since the K-code is completely inconsistent with the code of the Preamble, once the K-code matcher detects that the received bmc code is matched with the K-code agreed by the protocol, the K-code corrector d is set to be 1, and then the step of correcting b to be 5 and the like is continuously executed when d is equal to 1. In this case, the K-code can be correctly judged even in the case where the Preamble reception is erroneous or the transmission is erroneous.
It should be noted that, although the above embodiments have been described herein, the invention is not limited thereto. Therefore, based on the innovative concepts of the present invention, the technical solutions of the present invention can be directly or indirectly applied to other related technical fields by making changes and modifications to the embodiments described herein, or by using equivalent structures or equivalent processes performed in the content of the present specification and the attached drawings, which are included in the scope of the present invention.
Claims (10)
1. A method for decoding SOP packets for a USB-PD protocol, comprising the steps of:
judging whether the Preamble is correctly received and finished, if the Preamble is correctly received and finished, setting f, and counting b;
judging whether the first K-code is correctly received, and if the first K-code is correctly received, adding 1 to a counter c;
if the first K-code is not received correctly, setting h to be 1 when b is greater than 5;
if the matching event of the K-code packet occurs when b is less than 5, setting d to be 1;
if a matching event of a K-code packet occurs when 8< ═ b < ═ 10 and h < ═ 1, then e is set to 1;
when d is 1, correcting b to 5;
when e is 1, correcting b to 10;
when b is 20, setting g to 1;
when d is 1, e is 1 or K-code packet matching, b is 5, 10, 15 and 20, c is added with 1;
carrying out sop decoding when c > is 3;
the sop decoding result is stored in j;
the a is a bmc code receiver;
b is a bmc code counter;
the c is a K-code counter;
d and e are respectively a K-code corrector;
f is a K-code initial zone bit;
the g is a K-code ending zone bit;
the h is a K-code error zone bit;
the j is the sop packet decoding result register.
2. The method for decoding the SOP packet of the USB-PD protocol according to claim 1, further comprising the steps of:
if Preamble is not correctly received, K compares whether the received bmc code is consistent with the K-code agreed by the protocol, if so, setting the K-code corrector d to be 1;
and K is a K-code matcher.
3. The method of claim 1, wherein the SOP packet decoding method applied to USB-PD protocol,
the matching event of the K-code packet refers to: the K-code codes of Sync-1, Sync-2, RST-1, RST-2, EOP and Sync-3 are 11000, 10001, 00111, 11001, 01101 and 00110 respectively.
4. The method of claim 1, wherein the SOP packet decoding method applied to USB-PD protocol,
the SOP packet decoding refers to: the instruction set is decoded for SOP packet, SOP ' packet, Hard Reset packet, Cable Reset packet, SOP ' _ Debug packet and SOP ' _ Debug packet respectively.
5. The method of claim 4, wherein the SOP packet decoding method applied to USB-PD protocol,
the SOP packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, Sync-1 and Sync-2;
the SOP' packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, Sync-3 and Sync-3;
the SOP "packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, Sync-3, Sync-1 and Sync-3;
the Hard Reset packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: RST-1, RST-1 and RST-2;
the Cable Reset packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: RST-1, Sync-1, RST-1 and Sync-3;
the SOP' _ Debug packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, RST-2 and Sync-3;
the SOP "_ debug packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, RST-2, Sync-3 and Sync-2.
6. A storage device having a set of instructions stored therein, the set of instructions being operable to perform:
judging whether the Preamble is correctly received and finished, if the Preamble is correctly received and finished, setting f, and counting b;
judging whether the first K-code is correctly received, and if the first K-code is correctly received, adding 1 to a counter c;
if the first K-code is not received correctly, setting h to be 1 when b is greater than 5;
if the matching event of the K-code packet occurs when b is less than 5, setting d to be 1;
if a matching event of a K-code packet occurs when 8< ═ b < ═ 10 and h < ═ 1, then e is set to 1;
when d is 1, correcting b to 5;
when e is 1, correcting b to 10;
when b is 20, setting g to 1;
when d is 1, e is 1 or K-code packet matching, b is 5, 10, 15 and 20, c is added with 1;
carrying out sop decoding when c > is 3;
the sop decoding result is stored in j;
the a is a bmc code receiver;
b is a bmc code counter;
the c is a K-code counter;
d and e are respectively a K-code corrector;
f is a K-code initial zone bit;
the g is a K-code ending zone bit;
the h is a K-code error zone bit;
the j is the sop packet decoding result register.
7. The storage device of claim 6, wherein the set of instructions is further configured to perform:
if Preamble is not correctly received, K compares whether the received bmc code is consistent with the K-code agreed by the protocol, if so, setting the K-code corrector d to be 1;
and K is a K-code matcher.
8. A storage device according to claim 6,
the matching event of the K-code packet refers to: the K-code codes of Sync-1, Sync-2, RST-1, RST-2, EOP and Sync-3 are 11000, 10001, 00111, 11001, 01101 and 00110 respectively.
9. A storage device according to claim 6,
the SOP packet decoding refers to: the instruction set is decoded for SOP packet, SOP ' packet, Hard Reset packet, Cable Reset packet, SOP ' _ Debug packet and SOP ' _ Debug packet respectively.
The SOP packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, Sync-1 and Sync-2;
the SOP' packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, Sync-3 and Sync-3;
the SOP "packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, Sync-3, Sync-1 and Sync-3;
the Hard Reset packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: RST-1, RST-1 and RST-2;
the Cable Reset packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: RST-1, Sync-1, RST-1 and Sync-3;
the SOP' _ Debug packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, RST-2 and Sync-3;
the SOP "_ debug packet refers to: the first K-code, the second K-code, the third K-code and the fourth K-code respectively correspond to: sync-1, RST-2, Sync-3 and Sync-2.
10. A decoder, comprising:
1 bmc code receiver a;
1 bmc code counter b;
1K-code counter c;
2K-code correctors d, e;
1K-code initial flag bit f;
1K-code ending flag bit g;
1K-code error flag bit h;
and 1 sop packet decoding result register j;
the bmc code receiver a is respectively connected with a bmc code counter b, a K-code counter c, a K-code starting zone bit f, a K-code ending zone bit g, a sop packet decoding result register j and a K-code corrector e;
the bmc code counter b is respectively connected with a K-code counter c, a K-code corrector d, a K-code error flag bit h and a K-code corrector e.
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