CN110571281A - Hybrid Pin junction Schottky diode and manufacturing method thereof - Google Patents

Hybrid Pin junction Schottky diode and manufacturing method thereof Download PDF

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CN110571281A
CN110571281A CN201910707755.8A CN201910707755A CN110571281A CN 110571281 A CN110571281 A CN 110571281A CN 201910707755 A CN201910707755 A CN 201910707755A CN 110571281 A CN110571281 A CN 110571281A
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regions
plasma diffusion
epitaxial layer
diode
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CN110571281B (en
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任娜
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Jinan Xinghuo Technology Development Co ltd
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Shandong Tianyue Electronic Technology Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609Diodes
    • H01L29/66136PN junction diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609Diodes
    • H01L29/66143Schottky diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/868PIN diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/872Schottky diodes
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
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  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

The application discloses a mixed Pin junction Schottky diode and a manufacturing method thereof, wherein the mixed Pin junction Schottky diode comprises the following components: a plasma diffusion layer and a semiconductor region; the semiconductor region is arranged below the surface of the epitaxial layer; the semiconductor region includes: a plurality of cells, each cell comprising: a first region and a plurality of second regions; the plasma diffusion layer is arranged below the surface of the epitaxial layer and comprises a plurality of plasma diffusion channels, and each plasma diffusion channel is communicated with the first regions of the two unit cells and penetrates through the second regions of the unit cells; the first region, the plurality of second regions, the plasma diffusion layer and the epitaxial layer form a PN junction of the mixed PiN junction Schottky diode. The anti-surge current capability of the mixed PiN junction Schottky diode can be improved.

Description

Hybrid Pin junction Schottky diode and manufacturing method thereof
Technical Field
The application relates to the technical field of microelectronics, in particular to a hybrid Pin junction Schottky diode and a manufacturing method thereof.
Background
in the event of a current surge, the temperature of the PN junction in the diode rises rapidly, possibly causing the reliability of the diode to decrease and even performance degradation and failure to occur. Therefore, the diode having excellent surge current resistance can effectively dissipate such energy without degradation or failure, thereby providing a higher safety margin to the power equipment, improving reliability and life span of the power equipment.
The hybrid Pin junction Schottky diode has lower resistivity and higher current conduction capability under the condition of surge large current impact. Therefore, when designing a circuit, a designer will often choose a hybrid PiN junction schottky diode as the device to withstand the surge current.
However, the structure design of the conventional hybrid PiN junction schottky diode is not reasonable enough, so that the surge current resistance of the hybrid PiN junction schottky diode is reduced.
Disclosure of Invention
In order to solve the above problems, the present application provides a hybrid PiN junction schottky diode and a manufacturing method thereof, which can improve the surge current resistance of the hybrid PiN junction schottky diode.
In a first aspect, an embodiment of the present application provides a hybrid PiN junction schottky diode, including: a plasma diffusion layer and a semiconductor region;
the semiconductor region is arranged below the surface of the epitaxial layer;
The semiconductor region includes: a plurality of cells, each cell comprising: a first region and a plurality of second regions; the depth of the first region and the depth of the second region in the epitaxial layer are the same, and the width of the first region is larger than that of the second region;
The plasma diffusion layer is arranged below the surface of the epitaxial layer and comprises a plurality of plasma diffusion channels, and each plasma diffusion channel is communicated with the first areas in the two unit cells and penetrates through the second areas in the unit cells; the first region, the plurality of second regions, the plasma diffusion layer and the epitaxial layer form a PN junction of the hybrid PiN junction Schottky diode.
In one example, a plurality of first regions are uniformly surrounded centering on each of the first regions, and the center points of the surrounding plurality of first regions constitute a regular hexagon in which the plasma diffusion channel of each of the first regions communicates with other adjacent first regions.
in one example, a plurality of first regions are uniformly surrounded centering on each first region, and the center points of the surrounded plurality of first regions constitute a regular hexagon, in which the plasma diffusion channel of each first region communicates with other first regions that are not adjacent except the diagonal corners of the first region.
In one example, the first region is a regular hexagon;
The second region is an annular regular hexagon, and six edges of the second region are respectively parallel to corresponding edges of the corresponding first region.
In one example, in one of the unit cells, a plurality of the second regions are surrounded with the first region as a center;
And the number of plasma diffusion channels corresponding to one of the first regions is related to the number of other first regions surrounding the first region.
In one example, the first region is a regular polygon, and the number of plasma diffusion channels corresponding to the first region is equal to the number of sides of the regular polygon.
In one example, the first area of each of the plurality of cells is different in size, and the number of the plasma diffusion channels connected to the first area is positively correlated with the size of the first area.
In one example, the plasma diffusion channel has the same width as the second region, and the plasma diffusion channel has the same depth as the first region and the second region.
In one example, the plasma diffusion channel connects two of the first regions having a distance within a preset range of values.
In one example, the communication mode of the plasma diffusion channel is related to the size of each first region, specifically:
The sizes of the first regions in the plurality of unit cells are not completely the same, and the plasma diffusion channel preferentially connects two P + regions having different sizes.
In a second aspect, an embodiment of the present application provides a method for manufacturing a hybrid PiN junction schottky diode, including:
forming a substrate;
Forming an epitaxial layer made of silicon carbide on the substrate; the doping concentration of the epitaxial layer is lower than that of the substrate;
Forming a plurality of first regions, a plurality of plasma diffusion channels and a plurality of second regions on the epitaxial layer, wherein the plasma diffusion channels are communicated with the first regions in two unit cells and penetrate through the second regions in the unit cells; each of the unit cells includes: one said first region and a plurality of said second regions;
Forming an ohmic contact metal layer over each of the first regions, each of the second regions, and each of the plasma diffusion channels, respectively;
forming a Schottky contact metal layer on the surface of one side, away from the substrate, of the epitaxial layer;
And forming an ohmic contact metal layer on the surface of the substrate on the side away from the epitaxial layer.
The embodiment of the application provides a hybrid PiN junction Schottky diode, and plasmas in each first region are rapidly diffused into other drift regions in the moment of surge impact through constructing a plasma diffusion layer comprising a plurality of plasma diffusion channels, so that surge current and heat energy generated in the device are rapidly dispersed to each region of the device, and the phenomenon of local heating is avoided. Therefore, the technical scheme provided by the application can improve the surge current resistance of the hybrid PiN junction Schottky diode.
drawings
the accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:
fig. 1 is a schematic cross-sectional view of a hybrid PiN junction schottky diode according to an embodiment of the present disclosure;
fig. 2 is a schematic cross-sectional view of another hybrid PiN junction schottky diode provided in an embodiment of the present application;
fig. 3 is a schematic perspective cross-sectional view of a hybrid PiN junction schottky diode according to an embodiment of the present disclosure;
Fig. 4 is a schematic perspective cross-sectional view of another hybrid PiN junction schottky diode provided in an embodiment of the present application;
Fig. 5 is a schematic perspective cross-sectional view of another hybrid PiN junction schottky diode provided in the embodiments of the present application;
Fig. 6 is a schematic cross-sectional view of another hybrid PiN junction schottky diode provided in the embodiments of the present application;
Fig. 7 is a schematic diagram illustrating a variation of the surge current resistance of the hybrid PiN junction schottky diode with the plasma diffusion layer according to the embodiment of the present application;
fig. 8 is a schematic diagram illustrating the variation of the maximum energy that can be sustained by the device of the hybrid PiN junction schottky diode with the plasma diffusion layer according to the embodiment of the present application.
Detailed Description
in order to more clearly explain the overall concept of the present application, the following detailed description is given by way of example in conjunction with the accompanying drawings.
For convenience of description, the present application takes a hexagonal cell as an example, as shown in fig. 1 and fig. 2:
The epitaxial layer is N-type in conductivity type, and the semiconductor region is P + type in conductivity type, wherein the semiconductor region includes: a plurality of cells, each cell comprising: a first region 110 and a plurality of second regions 120, wherein the first region 110 is a wide P + region and the second regions 120 are narrow P + regions. The wide P + regions are at the same depth in the epitaxial layer as the narrow P + regions. The width of the wide P + region is greater than the width of the narrow P + region. The wide P + region is a regular hexagon, the narrow P + region is an annular regular hexagon, and six sides of the annular regular hexagon are respectively parallel to the sides of the corresponding wide P + region. The wide P + region and the narrow P + region are arranged to be in a regular hexagon, so that the dense distribution of the P + regions can be better realized.
In fig. 1, the wide P + region is a regular hexagon, each side of the wide P + region corresponds to one plasma diffusion channel 130, and the plasma diffusion channel 130 is perpendicular to the side of the wide P + region and is a midpoint of the side of the wide P + region, so as to realize uniform distribution of current in the hybrid PiN junction schottky diode, thereby preventing a single wide P + region from bearing excessive current. In fig. 2, the wide P + region is a regular hexagon, each vertex of the wide P + region corresponds to one plasma diffusion channel 130, and an extension line of each plasma diffusion channel 130 in the wide P + region intersects a geometric center point of the wide P + region, so as to achieve uniform distribution of current in the hybrid PiN junction schottky diode, thereby preventing a single wide P + region from bearing excessive current.
it should be noted that the first region 110 and the second region 120 may also be N + regions, and in the embodiment of the present application, only the P + region is taken as an example for description. The wide P + region and the narrow P + region may be other regular polygons. When the wide P + region and the narrow P + region are other regular polygons, each side of the wide P + region corresponds to at least one plasma diffusion channel respectively. Because the internal angles of the regular polygon are equal, the plasma diffusion channel corresponding to each side can uniformly disperse the wide P + region to other wide P + regions and narrow P + regions.
according to the characteristics of the hybrid PiN junction Schottky diode, the semiconductor region is arranged below the surface of the epitaxial layer, the wide P + region and the narrow P + region in the semiconductor region respectively form a PN junction with the epitaxial layer, and ohmic contact is formed on one side, far away from the PN junction, of the semiconductor region.
the plasma diffusion layer includes a plurality of plasma diffusion channels 130 that communicate the wide P + regions in the two cells and pass through the narrow P + regions in the cells. Each plasma diffusion channel 130 forms a PN junction with the epitaxial layer. Wherein the width of the ion diffusion channel is the same as the narrow P + region, and the depth of the plasma diffusion channel 130 in the epitaxial layer is the same as the wide P + region and the narrow P + region. The generated plasma is accumulated near the PN junction, and if the plasma diffusion channel 130 has a depth difference with the wide P + region and the narrow P + region, it is not favorable for the generated plasma to enter other wide P + region and narrow P + region through the plasma diffusion channel 130.
the sizes of the wide P + regions in the cells in the hybrid PiN junction schottky diode may be the same or different. For the condition that the wide P + region has the same size, after a surge current enters the diode, because the PN junction of the wide P + region has the lowest turn-on voltage, the wide P + region is firstly generated into electron-hole plasmas, the plasmas are firstly generated below the PN junction, and at the moment of surge impact, if no plasma diffusion layer is arranged, the plasmas are difficult to rapidly diffuse into other drift regions, so that the local temperature of the device is overhigh. If the plasma diffusion layer is arranged, the plasmas enter the corresponding narrow P + region through the plasma channel to disperse heat, meanwhile, the plasmas entering the narrow P + region open PN junctions corresponding to the narrow P + region, surge current is uniformly distributed in each P + region of the mixed PiN junction Schottky diode, and the surge current resistance of the mixed PiN junction Schottky diode is enhanced.
in addition, due to the fact that errors exist in the process of manufacturing the mixed Pin-junction Schottky diode, the size and the components of each wide P + region cannot be completely the same, the PN junction starting voltage of a part of the wide P + regions is increased, surge current is not uniformly distributed in each wide P + region, the effective conduction area of the mixed Pin-junction Schottky diode is reduced, and the problems can be well solved through the plasma diffusion layer.
for the case that the wide P + regions are not the same in size, the conductivity of the hybrid PiN junction schottky diode in case of surge current is mainly determined by the wide P + regions. The key point of realizing the surge current resistance of the mixed Pin junction Schottky diode is to start the PN junctions corresponding to the wide P + regions as soon as possible. The PN junction which is firstly started is necessarily the wide P + region with the largest area, and the electron-hole plasma generated by the PN junction enters the smaller wide P + region through the plasma diffusion layer to start the PN junction of the smaller wide P + region, so that the PN junctions of the wide P + regions are quickly started, the surge current is uniformly distributed in the wide P + regions, and the surge current resistance of the hybrid PiN junction Schottky diode is improved. Meanwhile, the plasma diffusion channel 130 can penetrate through the narrow P + region while connecting the two adjacent wide P + regions, so that the electron-hole pairs can also diffuse into the narrow P + region, the diffusion of the electron-hole pairs in the drift region of the device can be further accelerated, the surge current can be uniformly distributed in the mixed Pin junction Schottky diode, and the effect of further improving the surge current resistance of the mixed Pin junction Schottky diode is achieved.
In the embodiment of the application, a plurality of narrow P + regions are surrounded by a wide P + region as a center in one unit cell. The number of plasma diffusion channels 130 corresponding to a wide P + region is related to the number of other wide P + regions surrounding that region. For example, six cells, numbered 1-6, are provided around the region a in fig. 3 and 4, and 6 plasma diffusion channels 130 are provided in the region a in order to maximally disperse the plasma. Thus, at the moment when the surge current enters the area A, the plasma generated in the area A is dispersed into six unit cells No. 1-6, wherein the difference between the connection modes of the plasma diffusion channels in the graph of FIG. 3 and the graph of FIG. 4 is different. It should be noted that too few plasma diffusion channels 130 cannot diffuse plasma in time, and too many plasma diffusion channels 130 increase the area of the P + region, thereby reducing the conductivity of the hybrid PiN junction schottky diode under normal current conditions.
for convenience of explaining the connection manner of the wide P + region plasma diffusion channel in fig. 4, the embodiment of the present application provides a schematic perspective cross-sectional view of another hybrid PiN junction schottky diode, as shown in fig. 5, since the plasma diffusion channel 130 is parallel to the corresponding side of the a region, the a region is directly connected to the wide P + region in six cells No. 1-6 through a plurality of plasma diffusion channels 130, for example, the a region is connected to the wide P + region in cell No. 2 through the T1 channel and the T3 channel in fig. 5, and the T2 channel and the T4 channel.
In the embodiment of the application, the P + region can improve the conductivity of the hybrid PiN junction schottky diode under the condition of surge current, but the conductivity of the hybrid PiN junction schottky diode under the condition of normal current can be reduced due to the fact that the P + region is too large. Therefore, when the wide P + region is designed, the size of the wide P + region can be reduced, or the distance between the wide P + regions is increased, so that the total area of the P + regions of the mixed PiN junction Schottky diode is reduced.
in the embodiment of the present application, each of the plasma diffusion channels 130 constitutes a mesh-shaped plasma diffusion layer, and thus the plasma diffusion layer has a mesh-shaped structure. The mesh structure can ensure that each wide P + region can be connected with the plasma diffusion layer, so that surge current is prevented from being borne by a single wide P + region. And the network structure of the plasma diffusion layer is related to the area between the wide P + regions and the distance between the wide P + regions.
specifically, when the areas of the respective wide P + regions are different, the number of the plasma diffusion channels 130 is related not only to the number of other unit cells surrounding the wide P + regions but also to the areas of the wide P + regions. As shown in fig. 4, the wide P + region is classified into type I, type II and type III according to the area of the wide P + region. Wherein, the area of the I type P + area is the largest, the area of the II type P + area is the next to the area of the III type P + area is the smallest. Since the type I P + region has the largest area, the corresponding PN junction is turned on first and the generated plasma is the most, so more plasma diffusion channels 130 are needed to diffuse the plasma generated from the type I P + region into the type II P + region or the type III P + region. While the type II P + region generates less plasma and therefore requires fewer plasma diffusion channels 130. The type III P + region generates the least amount of plasma and therefore requires the least amount of plasma diffusion channel 130.
If the areas of the two P + regions are the same, the two P + regions can be opened at the same time, and the instantaneous temperatures corresponding to the two wide P + regions which are opened at the same time are not much different, at the moment, the plasma diffuses from one wide P + region to the other wide P + region, and the function of dispersing heat is limited. Therefore, the plasma diffusion channel 130 preferentially connects two wide P + regions having different areas in the embodiment of the present application.
Specifically, when the distance of the wide P + region is too close, the length of the plasma diffusion channel is correspondingly shortened; when the wide P + region is too far apart, the plasma diffusion channel length increases accordingly. Too short a plasma diffusion channel reduces efficiency, i.e., increases the total P + region area, thereby reducing the normal current conduction capability of the hybrid PiN junction schottky diode. When the plasma diffusion channel is too long, the resistance in the channel is increased, the diffusion speed of the electron-hole pair is reduced, and the improvement of the anti-surge current of the mixed Pin junction Schottky diode is not facilitated.
The embodiment of the application provides a manufacturing method of a hybrid Pin junction Schottky diode, which comprises the following steps:
Step 1, forming a substrate.
In the embodiment of the present application, N + -type silicon carbide is used as the substrate.
And 2, forming an epitaxial layer made of silicon carbide on the substrate.
in the embodiment of the application, the doping concentration of the epitaxial layer is lower than that of the substrate;
And 3, forming a plurality of first regions, a plurality of plasma diffusion channels and a plurality of second regions on the epitaxial layer.
In the embodiment of the present application, the first region is a wide P + region. The plasma diffusion channel is communicated with a first area in the two unit cells and penetrates through second areas in the unit cells, wherein the second areas are narrow P + areas, and each unit cell comprises: a first region and a plurality of second regions.
the specific method is to deposit a mask layer on the epitaxial layer, and form pattern transfer by photoetching and etching the mask layer. And performing ion implantation in the region with the opening of the mask layer, thereby realizing a first region, a plasma diffusion channel and a second region doped with p-type impurities at a specific part of the surface of the epitaxial layer, wherein the type of the doped impurities can be aluminum or boron. And reserving the deposited metal on the surface of the epitaxial layer when the mask layer is formed, and annealing the deposited metal to form ohmic contact on the interface of the deposited metal and the surface of the epitaxial layer, which is in direct contact. And finally, wet etching to remove the mask layer and the redundant metal on the mask layer.
and 4, forming a Schottky contact metal layer on the surface of one side of the epitaxial layer, which is far away from the substrate.
in particular, metal is deposited on the surface of the epitaxial layer on the side facing away from the substrate. And annealing the metal to form a Schottky contact on the surface of the top of the epitaxial layer.
and 5, forming an ohmic contact metal layer on the surface of the substrate on the side away from the epitaxial layer.
In particular, metal is deposited on the surface of the substrate on the side facing away from the epitaxial layer. And then annealing the metal to form an ohmic contact layer between the metal and the surface of the substrate.
In the embodiment of the present application, steps 3 to 5 are all methods that can be obtained by a person skilled in the art through the existing knowledge.
As shown in fig. 7 and 8, in the embodiments of the present application, a common mixed PiN junction schottky diode is used as a control group, a mixed PiN junction schottky diode with a plasma diffusion layer is used as an experimental group, and the surge current resistance of the mixed PiN junction schottky diode with the plasma diffusion layer and the maximum energy value that the device of the mixed PiN junction schottky diode with the plasma diffusion layer can bear in the surge test are respectively tested. The surge current resistance of the mixed Pin junction Schottky diode with the plasma diffusion layer is improved by 10%, the maximum energy borne by the device with the mixed Pin junction Schottky diode with the plasma diffusion layer is increased by 20%, and the plasma diffusion layer is further proved to be capable of enabling current and generated heat to be uniformly diffused to the surface of the device, so that the device damage caused by local overheating is effectively prevented, and the device has good surge current resistance.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the system embodiment, since it is substantially similar to the method embodiment, the description is simple, and for the relevant points, reference may be made to the partial description of the method embodiment.
The above description is only an example of the present application and is not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.

Claims (10)

1. a hybrid PiN junction schottky diode, comprising: a plasma diffusion layer and a semiconductor region;
The semiconductor region is arranged below the surface of the epitaxial layer;
The semiconductor region includes: a plurality of cells, each cell comprising: a first region and a plurality of second regions; the depth of the first region and the depth of the second region in the epitaxial layer are the same, and the width of the first region is larger than that of the second region;
the plasma diffusion layer is arranged below the surface of the epitaxial layer and comprises a plurality of plasma diffusion channels, and each plasma diffusion channel is communicated with the first areas in the two unit cells and penetrates through the second areas in the unit cells; the first region, the plurality of second regions, the plasma diffusion layer and the epitaxial layer form a PN junction of the hybrid PiN junction Schottky diode.
2. The diode of claim 1,
and uniformly surrounding a plurality of first regions by taking each first region as a center, wherein the center points of the surrounding plurality of first regions form a regular hexagon, and the plasma diffusion channel of each first region is communicated with other adjacent first regions in the formed regular hexagon.
3. the diode of claim 1,
And uniformly surrounding a plurality of first regions with the centers of the plurality of first regions as centers, wherein the centers of the plurality of surrounding first regions form a regular hexagon, and the plasma diffusion channel of each first region is communicated with other non-adjacent first regions except for the opposite corners of the first region.
4. The diode of claim 1,
the first area is a regular hexagon;
the second region is an annular regular hexagon, and six edges of the second region are respectively parallel to corresponding edges of the corresponding first region.
5. the diode of claim 1,
A plurality of second regions are surrounded around the first region in one of the unit cells;
and the number of plasma diffusion channels corresponding to one of the first regions is related to the number of other first regions surrounding the first region.
6. the diode of claim 1,
The size of a first area of each of the plurality of cells is different, and the number of the plasma diffusion channels connected to the first area is positively correlated with the size of the first area.
7. The diode of claim 1,
The width of the plasma diffusion channel is the same as the second region, and the depth of the plasma diffusion channel is the same as the first region and the second region.
8. the diode of claim 1,
the plasma diffusion channel connects the two first regions with a distance within a preset value range.
9. The diode of claim 1,
The communication mode of the plasma diffusion channel is related to the size of each first area, and specifically comprises the following steps:
the sizes of the first regions in the plurality of unit cells are not completely the same, and the plasma diffusion channel preferentially connects two P + regions having different sizes.
10. a method for manufacturing a hybrid PiN junction Schottky diode is characterized by comprising the following steps:
forming a substrate;
forming an epitaxial layer made of silicon carbide on the substrate; the doping concentration of the epitaxial layer is lower than that of the substrate;
forming a plurality of first regions, a plurality of plasma diffusion channels and a plurality of second regions on the epitaxial layer, wherein the plasma diffusion channels are communicated with the first regions in two unit cells and penetrate through the second regions in the unit cells; each of the unit cells includes: one said first region and a plurality of said second regions;
Forming an ohmic contact metal layer over each of the first regions, each of the second regions, and each of the plasma diffusion channels, respectively;
Forming a Schottky contact metal layer on the surface of one side, away from the substrate, of the epitaxial layer;
And forming an ohmic contact metal layer on the surface of the substrate on the side away from the epitaxial layer.
CN201910707755.8A 2019-08-01 2019-08-01 Mixed Pin junction Schottky diode and manufacturing method thereof Active CN110571281B (en)

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