CN110557220A

CN110557220A - Physical layer channel coding and decoding method

Info

Publication number: CN110557220A
Application number: CN201810544413.4A
Authority: CN
Inventors: 韩雄川; 黄戈; 李超; 王白羽; 柴亮; 杨前军; 奚晓明
Original assignee: Shanghai Silicon Long Microelectronics Co Ltd
Current assignee: Shanghai Silicon Long Microelectronics Co Ltd
Priority date: 2018-05-30
Filing date: 2018-05-30
Publication date: 2019-12-10
Anticipated expiration: 2038-05-30
Also published as: CN110557220B

Abstract

the invention provides a physical layer channel coding and decoding method; the encoding method includes encoding a frame control FC segment and a Payload segment. The first method is that the information bit to be transmitted is directly coded with a certain fixed code rate; filling information bits to be transmitted, then coding at a certain fixed code rate, and removing the previous filling bits from the coded output information bits to realize a code rate lower than the fixed code rate; and thirdly, coding the information bit to be transmitted with a certain fixed code rate, and punching the output check bit to realize a code rate higher than the fixed code rate.

Description

Physical layer channel coding and decoding method

Technical Field

The invention belongs to the field of communication, and particularly relates to a channel coding and decoding method.

Background

channel coding, interleaving, which is a key technology of the physical layer, is widely used in various communication systems; in terms of channel coding, both Turbo codes and LDPC codes are widely adopted; in an actual physical layer system, according to different service requirements, some service requirements require a low receiving threshold, and some service requirements require a high data rate, so in a physical layer coding scheme, a plurality of code rates need to be designed for selected codes to support different applications, which brings complexity increase to a certain extent.

In some systems using Turbo coding as a coding scheme, such as an OFDM system of the Homeplug AV standard, 1/2 coding is implemented as a mother code by using Turbo coding, and a higher code rate is implemented by using a puncturing mode after coding.

However, this system is limited in that a code rate below 1/2 cannot be achieved, and in some systems that require a very low receive threshold, this will not work.

Disclosure of Invention

The invention aims at the problems and provides a flexible physical layer channel coding method which comprises one or more of the following three methods:

The first method is that the information bit to be transmitted is directly coded with a certain fixed code rate;

Filling information bits to be transmitted, then coding at a certain fixed code rate, and removing the previous filling bits from the coded output information bits to realize a code rate lower than the fixed code rate;

coding the information bit to be transmitted with a certain fixed code rate, and punching the output check bit to realize a code rate higher than the fixed code rate;

The channel coding method further adopts Turbo codes for coding.

the channel coding method further comprises the step of channel coding of the frame control FC section and/or the Payload section. And the method one and/or the method two are/is adopted for channel coding of the frame control FC section, and the method one, the method two and the method three are adopted for channel coding of the Payload section.

The channel coding method adopts a method two that an alternate insertion mode is adopted when filling information bits to be transmitted; and a pseudo random sequence PRBS is adopted when filling information bits to be transmitted.

The channel coding method comprises the steps of filling information bits to be transmitted in the channel coding method of the frame control FC section, then carrying out Turbo coding with 1/2 code rates, and removing the previous filling bits of the coded output information bits to realize the 1/3 code rate.

According to the channel coding method, the data Payload section realizes coding with different code rates according to service requirements, 1/3 code rates are realized according to the method one, 1/2 code rates are realized according to the method two, and code rates higher than 1/2 are realized according to the method three.

In the channel coding method, the code rate of a mother code encoder of the frame control FC section is 1/2, the code length of the mother code is 512 bits, the length of the frame control information bit is 128 bits, the length of the check bit is 256 bits, and the code length after the frame control coding is 384 bits.

In the channel coding method, the data Payload section realizes coding with different code rates according to the service requirement: 1/3, 1/2, 2/3, 3/4 and 6/7.

the channel coding method also carries out bit interleaving after coding, data after Turbo coding keeps the sequence before coding, information bits are in the front, check bits are in the back, wherein K represents the number of the information bits, N represents the actual code length after coding, N-K represents the number of the check bits, K information bits can be divided into 4 subblocks, the size of each subblock is K/4 bits, N-K check bits are divided into 4 subblocks, and the size of each subblock is (N-K)/4 bits. Bit interleaving comprises four steps:

Step one, interleaving of information codes: writing the information code output by Turbo coding into the matrix storage space, the encoder sequentially outputs the first block (K/4 bit) of information bits to the block 1, the second block (K/4 bit) to the block 2, the third block (K/4 bit) to the block 3, and the fourth block (K/4 bit) to the block 4, which is equivalent to storing the information bits into a matrix of K/4 rows and 4 columns, wherein the 1 st column represents the block 1, the 2 nd column represents the block 2, the 3 rd column represents the block 3, and the 4 th column represents the block 4. The interleaving is performed with 4 bits read out simultaneously per row. When data is read out from the matrix, firstly, the data is read out from the 0 th row, then, the reading step size StepSize is added to each reading of the first row address, the reading sequence of the first row address is (0, StepSize, 2 StepSize, …), after the reading of the [ K/4]/StepSize row, the matrix tail is read, then, the first row address of the next reading round is added with 1, then, the step size StepSize is added to each reading of the row address, the tail is reached again after the reading of the [ K/4]/StepSize row, the reading sequence of the second reading row address is (1, 1+ StepSize, 1+2 StepSize, …), then, the third row address is added with 1 to be 2, and the like, and the reading of all rows after the pSize round is finished.

Step two, check code interleaving: firstly, the interleaving types are classified according to the code length and the code rate and are divided into an interleaving type 1 and an interleaving type 2. The first block (N-K)/4 bits of the parity bits output from the Turbo coding are input into block 1, the second block (N-K)/4 bits are input into block 2, the third block (N-K)/4 bits are input into block 3, and the fourth block (N-K)/4 bits are input into block 4, which can be regarded as a matrix storing the parity bits into (N-K)/4 rows and 4 columns, wherein column 1 represents block 1, column 2 represents block 2, column 3 represents block 3, and column 4 represents block 4. Subsequently, for different interleaving types, for interleaving type 1, the reading method of parity bits is similar to that of information bits, except that the first reading of parity bits is started from a row defined by a parity offset parameter offset, and a step size parameter is also StepSize, we define that T is (N-K)/4, the sequence of rows read in the first round is (offset, (offset + StepSize) mod T, (offset +2 StepSize) mod T, …), then the first row in the second round is added with 1, and the StepSize-1 round is repeated, and finally, T/StepSize row data are read out in each round and T row data are read in total through the StepSize round. For interleave type 2, the row pointer is not initialized every read cycle, but the read continues from the beginning (offset + StepSize) mod T, (offset +2 StepSize) mod T, …) until the T row read is completed.

in this step, the specific interleaving parameters of the frame control FC segment are as follows:

The specific interleaving parameters of the Payload section are as follows:

Step three, interleaving between the information code and the check code: then for code rate 1/3, the first 4 bits are output as information codes, then 2 4 bits check codes, and so on. For code rate 1/2, the first 4 bits are output as an information code, then 4 bits are output as a check code, and so on. For code rate 2/3, the first 2 4 bits are output as information codes, followed by 4-bit check codes, and so on. For code rate 3/4, the first 3 4-bit information codes are output, followed by a 4-bit check code, and so on. For code rate 6/7, the first 6 bits are output as information bits, then 4 bits are output as check bits, and so on.

Step four, nibble shift: the nibble shift is performed in units of 4 bits, and the order is adjusted every two nibbles regardless of information bits or check bits, and the rule is as shown in the following table. Where b0 indicates that the bits are from chunk 1 of information or parity bits, and so on, b1 indicates that t is from chunk 2, b2 indicates from chunk 3, and b3 indicates from chunk 4. When the bits are serially output, the leftmost bit of the 4 bits is output first, from left to right.

output nibble sequence number	Shift mode
		1 or 2	b0b1b2b3
3 or 4	b3b0b1b2
		5 or 6	b2b3b0b1
7 or 8	b1b2b3b0
		9 or 10	b0b1b2b3

According to another aspect of the present invention, the present invention further provides a physical layer channel decoding method, including:

The method is suitable for a signal to be received generated by the first encoding method, and comprises the steps of adopting the first decoding method, obtaining a log-likelihood ratio sequence of a bit stream to be decoded at a receiving end through signal processing steps such as synchronization, equalization, constellation de-mapping and the like, and then directly sending the log-likelihood ratio sequence of the bit stream to a decoder for decoding; after decoding, the check bits are deleted and the valid information bits are recovered.

The method is suitable for a signal to be received generated by the second encoding method, the second decoding method is adopted, after a log-likelihood ratio sequence of a bit stream to be decoded is obtained at a receiving end through signal processing steps of synchronization, equalization, constellation de-mapping and the like, the log-likelihood ratio sequence of the bit stream to be decoded is filled with the log-likelihood ratios of the known filling sequences at corresponding positions during encoding generation, and then the filled log-likelihood ratio sequence is sent to a decoder for decoding; after decoding, the check bits and the padding information bits are deleted, and the effective information bits are recovered.

The method is suitable for a signal to be received generated by the coding method III, a decoding method III is adopted, after a log-likelihood ratio sequence of a bit stream to be decoded is obtained at a receiving end through signal processing steps of synchronization, equalization, constellation de-mapping and the like, log-likelihood ratio information of corresponding bits is filled on the log-likelihood ratio sequence of the check bit stream according to a punching position generated during coding, and then the filled log-likelihood ratio sequence is sent to a decoder for decoding; after decoding, the check bits are deleted and the valid information bits are recovered.

Further, based on the signal generated as follows: the information bits to be transmitted are filled, then Turbo coding with 1/2 code rate is carried out, and the previous filling bits are removed from the output information bits of the coding, so as to realize 1/3 code rate. The decoding method comprises the following steps: after a receiving end obtains a log-likelihood ratio sequence of a bit stream to be decoded through signal processing steps of synchronization, equalization, constellation de-mapping and the like, filling corresponding positions with log-likelihood ratios of known filling sequences when the information bit stream is generated according to coding on the log-likelihood ratio sequence, and then sending the filled log-likelihood ratio sequence to a mother code decoder for Turbo decoding with 1/2 code rates; after decoding, the check bits and the padding information bits are deleted, and the effective information bits are recovered.

Compared with the prior art, the technical scheme provided by the invention has the following beneficial effects:

the method comprises the steps that a code with fixed coding efficiency is used as a mother code, when the coding requirement lower than the mother code rate is realized, information bits to be transmitted are filled, then the mother code rate is coded, and then the information bits output by coding are removed from the previous filling bits, so that the code rate lower than the mother code coding rate is realized; when the coding requirement higher than the mother code rate is realized, the information bit to be transmitted is firstly coded with the mother code rate, and then the check bit output by coding is punched to realize the code rate higher than the mother code coding rate; furthermore, during filling, a pseudo random sequence PRBS and an alternate insertion mode are adopted, so that the coding performance can be effectively improved. The coding method realizes the coding requirements of various code rates of the communication system with very low complexity, and can realize very excellent performance on each code rate.

Drawings

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principles of the invention. In the drawings:

FIG. 1 is a schematic diagram of the encoding method of the present invention;

FIG. 2 is a schematic diagram of the encoding of the frame control FC segment of the present invention;

FIG. 3 is a schematic diagram of a binary Turbo mother code encoder according to the present invention;

FIG. 4 is a schematic diagram of a filling method of a second encoding method of the present invention;

FIG. 5 is a schematic encoding of Payload segments of the present invention;

FIG. 6 is a decoding diagram of the present invention;

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention clearer and more obvious, the present invention is further described in detail below with reference to the accompanying drawings. The exemplary embodiments and descriptions of the present invention are provided to explain the present invention, but not to limit the present invention. The term "unit" or "module" used hereinafter may be hardware, software, or a combination of both that implement a predetermined function, and while the embodiment is described in one implementation, the other two implementations may also implement the intent of the inventive concept and thus fall within the scope of the inventive concept.

Fig. 1 is a schematic diagram of the encoding method of the present invention. As shown in fig. 1, in order to realize different code rates to support different receiving thresholds and data rates, a physical layer communication system adopts one, two, or three of three coding methods to realize different code rates; the core encoder adopts a fixed code rate, and different required code rates are realized by filling information bits to be input into the encoder or punching check bits of the encoder.

the first method is that the information bit to be transmitted is directly coded with a certain fixed code rate; filling information bits to be transmitted, then coding at a certain fixed code rate, and removing the previous filling bits from the coded output information bits to realize a code rate lower than the fixed code rate; coding the information bit to be transmitted with a certain fixed code rate, and punching the output check bit to realize a code rate higher than the fixed code rate;

In this embodiment, the Turbo code is used for channel coding. And method one and/or method two is employed for channel coding of the frame control FC segment. Methods one, two and three are adopted for channel coding of Payload segments.

First, the present embodiment first describes channel coding of the frame control FC segment. The coding with the code rate 1/3 is realized by the above-mentioned first method, as shown in fig. 2. The mother code encoder adopts a binary Turbo code encoding structure with a fixed code rate of 1/2, and as shown in fig. 3, each pair of information bits [ u1, u2] is input, and systematic bits [ u1, u2] and check bits [ p, q ] are output. (p: component encoder 1 check output, q: component encoder 2 check output). The mother code encoder includes an inner interleaver, which is an S random interleaver or a random interleaver known in the Turbo coding technology, and the inner interleaver of the encoder is not described herein any more, and is two completely different interleaving methods from bit interleaving which will be described later in the text.

Firstly, filling a segment of PRBS stream pad _ b with the same length as the information bits in the information bit stream u, then sending the information bit stream to a double-bit encoder for encoding, and then combining the information bit check bits (p: the check output of the component encoder 1, q: the check output of the component encoder 2) for output after removing the filling part. For a dual bit Turbo encoder: each input pair of information bits [ u1, u2], output systematic bits [ u1, u2] and parity bits [ p, q ]. The FC encoding flow is shown in fig. 3. Table 1 gives a typical set of frame control FC encoder parameters. The mother code length refers to the code length of the dibit encoder. The actual code length refers to the output code length after all steps of encoding.

table 1: FC encoder parameters

in this set of parameters, the input information bits are 128 bits, the information bits are padded first and then changed to 256 bits,

Filling mode this embodiment adopts an alternate insertion mode, and the information bit u and the filling bit pad _ b are alternately inserted. For 1/3 encoding, the insertion mode: [ u (1), pad _ b (1), u (2), pad _ b (2).. u (128), pad _ b (128) ], as shown in FIG. 4, wherein pad _ b (1), pad _ b (2) represent padding bits generated by a known pseudo-random sequence PRBS. Fig. 4 also shows padding to achieve coding at lower code rates such as 1/4 and 1/5. After the 256 bits are filled, turbo coding with a code rate of 1/2 is performed, output information bits are 256 bits, output check bits are 256 bits, then all the filling bits in the 256 bits of information bits are deleted, the original 128 bits of information bits are restored, and the 256 bits of check bits are added, so that 384 bits of coded output is obtained, namely, the 1/3 code rate coding is realized.

The method for generating the Payload section by encoding is described below. The Payload section and the FC section use the same 1/2 rate mother code encoder, which supports the encoding rate: 1/3, 1/2, 2/3, 3/4 and 6/7, the above first method, the second method and the third method are adopted according to the code rate selection, as shown in fig. 5. 1/3 the realization method of code rate is consistent with FC; 1/2 code rate is realized by direct output of mother code encoder; the code rates 2/3, 3/4, and 6/7 are implemented by puncturing check bits (p, q) after the output of the mother encoder, and the puncturing patterns are different for different coding rates, as shown in fig. 5. The parent encoder parameters for Payload segments are shown in table 5. Puncturing matrices for different code rates are shown in tables 2-4 (0: puncturing position 1: reserved position).

TABLE 2 code rate puncturing matrix of 2/3

p	101010101010
		q	101010101010

TABLE 3 code rate puncturing matrix of 3/4

p	100100100100
		q	100100100100

TABLE 4 code rate puncturing matrix of 6/7

p	100000100000
		q	100000100000

TABLE 5 Payload mother code encoder parameters

After the encoding is completed, interleaving is typically performed to break up errors that occur during transmission. After Turbo coding, data keeps the sequence before coding, information bits are in the front, check bits are in the back (p is in the front, q is in the back), wherein K represents the number of information bits, N represents the actual code length after coding, N-K represents the number of check bits, K information bits can be divided into 4 subblocks, the size of each subblock is K/4 bits, N-K check bits are divided into 4 subblocks, and the size of each subblock is (N-K)/4 bits.

in this embodiment, the following bit interleaving method is adopted, and the following four steps are included:

step two, check code interleaving: firstly, the interleaving types are classified according to the code length and the code rate and are divided into an interleaving type 1 and an interleaving type 2. The first block (N-K)/4 bits of the parity bits output from the Turbo coding are input into block 1, the second block (N-K)/4 bits are input into block 2, the third block (N-K)/4 bits are input into block 3, and the fourth block (N-K)/4 bits are input into block 4, which can be regarded as a matrix storing the parity bits into (N-K)/4 rows and 4 columns, wherein column 1 represents block 1, column 2 represents block 2, column 3 represents block 3, and column 4 represents block 4. Subsequently, for different interleaving types, for interleaving type 1, the reading method of parity bits is similar to that of information bits, except that the first reading of parity bits is started from a row defined by a parity offset parameter offset, and a step size parameter is also StepSize, we define that T is (N-K)/4, the sequence of rows read in the first round is (offset, (offset + StepSize) mod T, (offset +2 StepSize) mod T, …), then the first row in the second round is added with 1, and the StepSize-1 round is repeated, and finally, T/StepSize row data are read out in each round and T row data are read in total through the StepSize round. For interleave type 2, the row pointer is not initialized every read cycle, but the read continues from the beginning (offset + StepSize) mod T, (offset +2 StepSize) mod T, …) until the T row read is completed. The specific interleaving parameters may be referenced in table 6/7.

TABLE 6 control of specific interleaving parameters for FC segments

table 7: specific interleaving parameters for Payload segments of a data Payload

Step four, nibble shift: the nibble shift is performed in units of 4 bits, and the order is adjusted every two nibbles regardless of information bits or check bits, and the rule is as shown in table 8. Where b0 indicates that the bits are from chunk 1 of information or parity bits, and so on, b1 indicates that t is from chunk 2, b2 indicates from chunk 3, and b3 indicates from chunk 4. When the bits are serially output, the leftmost bit of the 4 bits is output first, from left to right.

TABLE 8 nibble Shift

the present invention also proposes a decoding method, as shown in fig. 6.

Aiming at a signal generated by the coding of the text by a coding method I, after a log-likelihood ratio sequence of a bit stream to be decoded is obtained at a receiving end through signal processing steps of synchronization, equalization, constellation de-mapping and the like, the log-likelihood ratio sequence of the bit stream is directly sent to a fixed code rate decoder for decoding; after decoding, the check bits are deleted and the valid information bits are recovered.

For the signal generated by the coding method II, after the receiving end obtains the log-likelihood ratio sequence of the bit stream to be decoded through the signal processing steps of synchronization, equalization, constellation de-mapping and the like, the log-likelihood ratio sequence of the information bit stream is filled with the log-likelihood ratio of the known filling sequence according to the corresponding filling position generated during coding, and then the filled log-likelihood ratio sequence is sent to a decoder for decoding; after decoding, the check bits and the padding information bits are deleted, and the effective information bits are recovered.

For the signal generated by the coding method III, after the log-likelihood ratio sequence of the bit stream to be decoded is obtained at the receiving end through signal processing steps such as synchronization, equalization, constellation de-mapping and the like, the log-likelihood ratio sequence of the check bit stream is filled with the log-likelihood ratio information of corresponding bits according to corresponding punching positions during coding generation, and then the filled log-likelihood ratio sequence is sent to a decoder for decoding; after decoding, the check bits are deleted and the valid information bits are recovered.

For example, for the received signal subjected to 1/3 rate coding by the second coding method, the information bit soft value is filled llr (pad _ b) and the check bit soft value is sent to the decoder; corresponding to the received signal which is subjected to code rate coding of 1/2 by the second coding method, the soft values of the information bit and the check bit are directly sent to a decoder; for the received signals after being coded by 2/3, 3/4, 6/7 and other code rates by the coding method three, the soft values of the check bits are filled with zero at the punching positions and then are sent to a decoder together with the soft values of the information bits. Llr (pad _ b) generates according to the originating pad _ b: llr ═ C (pad _ b-0.5), C is a fixed constant.

It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

It is noted and understood that various changes and modifications can be made to the invention described in detail above without departing from the spirit and scope of the invention as claimed in the preceding claims. Accordingly, the scope of the claimed subject matter is not limited by any of the specific exemplary teachings provided.

Claims

1. A physical layer channel coding method, comprising one or more of the following three methods in combination: the first method is that the information bit to be transmitted is directly coded with a certain fixed code rate; filling information bits to be transmitted, then coding at a certain fixed code rate, and removing the previous filling bits from the coded output information bits to realize a code rate lower than the fixed code rate; and thirdly, coding the information bit to be transmitted with a certain fixed code rate, and punching the output check bit to realize a code rate higher than the fixed code rate.

2. The channel coding method of claim 1, comprising a second method of padding information bits to be transmitted, then coding with a fixed code rate, and removing the previous padding bits from the output information bits to achieve a code rate lower than the fixed code rate.

3. the channel coding method of claim 1, wherein the coding is performed using a Turbo code.

4. The channel coding method of claim 1, comprising channel coding a frame control FC segment and/or a Payload segment.

5. the channel coding method of claim 3, wherein the channel coding of the frame control FC segment adopts method one and/or method two.

6. The channel coding method of claim 3, wherein methods one, two and three are used for channel coding of Payload segments.

7. The channel coding method of claim 1, wherein the information bits to be transmitted are padded in an alternate insertion manner in the second method.

8. The channel coding method of claim 1, wherein a pseudo random sequence PRBS is used when padding the information bits to be transmitted in the second method.

9. the channel coding method of claim 5, wherein the channel coding method of the frame control FC segment firstly fills information bits to be transmitted, then performs Turbo coding with a code rate of 1/2, and then removes the previous filling bits from the information bits of the coded output to realize a code rate of 1/3.

10. the channel coding method of claim 6, wherein the data Payload section implements coding with different code rates according to service requirements, and implements the code rate of 1/3 according to method one, the code rate of 1/2 according to method two, and the code rate higher than 1/2 according to method three.

11. The channel coding method of claim 9, wherein the mother code encoder of the frame control FC segment has a code rate of 1/2, the mother code has a length of 512 bits, the frame control information bit has a length of 128 bits, the check bit has a length of 256 bits, and the frame control encoded code has a length of 384 bits.

12. The channel coding method of claim 10, wherein the data Payload section implements coding at different code rates according to service requirements: 1/3, 1/2, 2/3, 3/4 and 6/7.

13. The channel coding method of claim 4, wherein bit interleaving is further performed after the coding, data is maintained in order before the coding after the Turbo coding, information bits are in front, and parity bits are in back, wherein K represents the number of information bits, N represents an actual code length after the coding, N-K represents the number of parity bits, the K information bits are divided into 4 sub-blocks, each sub-block has a size of K/4 bits, the N-K parity bits are divided into 4 sub-blocks, and each sub-block has a size of (N-K)/4 bits. Bit interleaving takes four steps:

Step three, interleaving between the information code and the check code: then for code rate 1/3, the first 4 bits are output as information codes, followed by 2 4-bit check codes.

14. The channel coding method of claim 4, wherein bit interleaving is further performed after the coding, data is maintained in order before the coding after the Turbo coding, information bits are in front, and parity bits are in back, wherein K represents the number of information bits, N represents an actual code length after the coding, N-K represents the number of parity bits, the K information bits are divided into 4 sub-blocks, each sub-block has a size of K/4 bits, the N-K parity bits are divided into 4 sub-blocks, and each sub-block has a size of (N-K)/4 bits. Bit interleaving takes four steps:

In this step, the specific interleaving parameters of the Payload section are as follows:

15. a physical layer channel decoding method, comprising one or more of the following three methods in combination:

The decoding method comprises the steps of obtaining a log-likelihood ratio sequence of a bit stream to be decoded at a receiving end through signal processing steps of synchronization, equalization, constellation de-mapping and the like, and then directly sending the log-likelihood ratio sequence of the bit stream to a fixed code rate decoder for decoding; after decoding, the check bits are deleted and the valid information bits are recovered.

The signal to be received at the receiving end is characterized in that the signal to be received at the receiving end is generated, and the information bit to be transmitted is directly coded with a certain fixed code rate;

After a receiving end obtains a log-likelihood ratio sequence of a bit stream to be decoded through signal processing steps of synchronization, equalization, constellation de-mapping and the like, filling a log-likelihood ratio of a known filling sequence on the log-likelihood ratio sequence of the bit stream of the information bit according to a corresponding filling position generated during coding, and then sending the filled log-likelihood ratio sequence to a decoder for decoding; after decoding, the check bits and the padding information bits are deleted, and the effective information bits are recovered.

The method is characterized in that when a signal to be received at a receiving end is generated, information bits to be transmitted are filled, then coding with a certain fixed code rate is carried out, and then the filling bits before the coded output information bits are removed, so that the code rate lower than the fixed code rate is realized;

after a log-likelihood ratio sequence of a bit stream to be decoded is obtained at a receiving end through signal processing steps of synchronization, equalization, constellation de-mapping and the like, firstly, filling log-likelihood ratio information of corresponding bits on the log-likelihood ratio sequence of the check bit stream according to corresponding punching positions generated during coding, and then sending the filled log-likelihood ratio sequence to a decoder for decoding; after decoding, the check bits are deleted and the valid information bits are recovered.

When a signal to be received by a receiving end is generated, the signal to be received is characterized in that the information bit to be transmitted is coded with a certain fixed code rate, and then the output check bit is punched so as to realize a code rate higher than the fixed code rate.

16. The channel decoding method of claim 15,

After a receiving end obtains a log-likelihood ratio sequence of a bit stream to be decoded through signal processing steps of synchronization, equalization, constellation de-mapping and the like, filling corresponding positions with log-likelihood ratios of known filling sequences when the information bit stream is generated according to coding on the log-likelihood ratio sequence, and then sending the filled log-likelihood ratio sequence to a mother code decoder for Turbo decoding with 1/2 code rates; after decoding, the check bits and the padding information bits are deleted, and the effective information bits are recovered.

When a signal to be received by a receiving end is generated, the signal to be received is firstly filled with information bits to be transmitted, then Turbo coding with 1/2 code rates is carried out, and then the previous filling bits are removed from the output information bits of the coding, so that 1/3 code rates are realized.