CN107306166A - A kind of data communications method based on OFDM and dual binary turbo code - Google Patents

Abstract

The invention discloses a kind of data communications method based on OFDM and dual binary turbo code.The transmitting terminal of data communication carries out dual binary turbo convolutional encoding, scrambling and channel interleaving to input data, into constellation point, then by fast discrete inverse Fourier transform (IFFT), takes real part to be transmitted；The receiving terminal of data communication carries out Fast Fourier Transform (FFT) (FFT) to the data that receive and enters constellation point inverse mapping, then is deinterleaved by channel, goes to disturb and recover initial data with dual binary turbo folding coding, realizes high-speed data communication.The present invention uses OFDM and dual binary turbo coding techniques, with reference to scrambling and channel interleaving technology, data communication is had high, the anti-interference availability of frequency spectrum, anti-multipath time delay, anti-channel fading, the features such as error correcting capability is strong；The present invention can stablize by carrying out above-mentioned steps processing to data and effectively and reliably transmit data, and primary signal can be recovered exactly when carrying out error-correcting decoding.

Description

A kind of data communications method based on OFDM and dual binary turbo code

Technical field

It is more particularly to a kind of to be based on OFDM and double binary the present invention relates to digital coding and communication technical field The data communications method of Turbo code.

Background technology

Power line and wireless channel are with low cost as a kind of widely distributed communication media, easy to connect, each Individual field has advantageous advantage and immeasurable market potential；Signal can be by each during transmission Kind of interference and the intrinsic multidiameter delay of channel and frequency selectivity is weak all can carry out detrimental effect to signal transmission belt, It is always the emphasis and focus in data communication to solve these problems.

It is relatively low that high speed transmission data is decomposed into several transmission rates by OFDM (OFDM) technology Sub- bit stream, reuse these data and remove to modulate several carrier waves to realize multi-carrier transmission.OFDM technology has The advantages of anti-multipath time delay, anti-channel fading, the availability of frequency spectrum are high, hardware realizes simple, in mobile data communication With extensive research and application have been obtained in power line carrier, PLC.

Not only performance is very excellent under the conditions of the white Gaussian noise compared with low signal-to-noise ratio for Turbo code, and because symbol is handed over The introducing of device is knitted, the ability for making it be also equipped with stronger anti-interference and anti-channel deep fading, in channel circumstance more Possess very wide application space and prospect in severe wireless communication system.Double-binary convolutional Turbo code (DB-CTC) it is channel coding pattern that multiple wireless communication standards and broadband power line network standard are selected, is carrying The handling capacity of high channel error correcting capability and whole system has extremely important effect.

OFDM technology and dual binary turbo code are united and applied in data communication, high bit error can be efficiently solved The traffic rate occurred in channel in data communication process is low and the problems such as the high bit error rate, while data communication can be lifted Stability, validity and reliability.

The content of the invention

It is an object of the invention to propose a kind of stabilization effectively reliable high bit error channel (such as power line channel and wireless Channel) high-speed data communication method.The transmitting terminal of data communication carries out dual binary turbo convolution volume to input data Code, scrambling and channel interleaving, into constellation point, then by fast discrete inverse Fourier transform (IFFT), Real part is taken to be transmitted；The receiving terminal of data communication carries out Fast Fourier Transform (FFT) (FFT) to the data received and entered Enter constellation point inverse mapping, then deinterleaved by channel, go to disturb and recover original number with dual binary turbo folding coding According to realizing complete data communication process.

To achieve these goals, it is logical the invention provides a kind of data based on OFDM and dual binary turbo code Letter method, methods described includes transmitting terminal and receiving terminal, and receiving terminal is the inverse process of transmitting terminal, and receiving terminal is not done It is described in detail, transmitting terminal includes：

Step S1), coding parameter is set, including coded block size and code check size, wherein code block size are PB16 (128bits), PB136 (1088bits) and PB520 (4160bits), code check size are 1/2 and 16/18；

Step S2), every time read in coded block size input data In, carry out dual binary turbo convolutional encoding, By the sequence after coding by information bit preceding, the posterior mode of check bit is exported, and obtains Turbo convolutional encoded sequences；

Step S3), by step S2) coded sequence scrambled, obtain scrambler sequence；

Step S4), by step S3) obtained scrambler sequence carries out channel interleaving, obtains channel interleaving sequence；

Step S5), by step S4) obtained channel interleaving sequence carries out in QPSK (QPSK) mode Constellation point and N × 1024 (N=0,1,2...) point IFFT computings, obtain a series of sequence of complex numbers C；

Step S6), by step S5) obtained sequence of complex numbers C takes real part, obtain sending sequence；

In above-mentioned technical proposal, the step S2) specifically include：

Step S2-1), every time read in coded block size data In=(i₀, i₁..., i_k..., i_2N-1), by sequence of parity point Into two group information sequence U₀=(u₀₀, u₀₁..., u_0k..., u_0N-1) and U₁=(u₁₀, u₁₁..., u_1k..., u_1N-1)；

Step S2-2), by step S2-1) obtained two group information sequence U₀、U₁Carry out precoding, register by Original state S0=[S_0,1, S_0,2, S_0,3] become state SN=[S after precoding_{N, 1}, S_{N, 2}, S_{N, 3}]；

Step S2-3), by step S2-2) obtained buffer status SN tabled look-up rising when formally encoding Beginning buffer status S '₀, using buffer status to two group information sequence U₀、U₁Carry out dual binary turbo convolution volume Code, obtains one group of check code X₀=(x₀₀, x₀₁..., x_0k..., x_0N-1)；

Step S2-4), by step S2-1) obtained two group information sequences carry out by searching Turbo intertextures mapping table Turbo interweaves, the information sequence U ' after being interweaved₀With U '₁；

Step S2-5) by step S2-4) information sequence U ' after obtained two groups of intertextures₀、U′₁Precoding is carried out, is posted Storage is by original state S0 '=[S '_0,1, S '_0,2, S '_0,3] become state SN '=[S ' after precoding_{N, 1}, S '_{N, 2}, S '_{N, 3}]；

Step S2-6), by step S2-5) obtained buffer status SN ' tabled look-up rising when formally encoding Beginning buffer status S "₀, using buffer status to the information sequence U ' after two groups of intertextures₀With U '₁Carry out double binary Turbo convolutional encodings, obtain another set check code X₁=(x₁₀, x₁₁..., x_1k..., x_1N-1)；

Step S2-7), by step S2-3), step S2-6) two groups of check code X₀、X₁Entered according to code check parameter Row punching is handled, two groups of check code X ' after being punched₀、X′₁；

Step S2-8), by step S2-1), step S2-3), step S2-7) two group information sequence U₀、U₁With Two groups of check code X '₀、X′₁According to U₀、U₁、X′₀、X′₁Sequential output, obtains Turbo convolutional encoded sequences；

In above-mentioned technical proposal, the step S3) specifically include：

Step S3-1), initialization one by 10 grades of shift registersThe motor synchronizing of composition Scrambler, initial register state is all 1；

Step S3-2), by step S2-8) Turbo convolution sequences 1 bit of input is added to scrambler every time Disturb, the sequence after being scrambled；

In above-mentioned technical proposal, the step S3-2) specifically include：

Step S3-2-1), often input 1 bit, shift register moves to left one, and lowest order is by the 10th of register Position and the 3rd XOR are obtained；

Step S3-2-2), by step S3-2-1) obtained register lowest order and 1 bit of input carry out XOR 1 bit after being scrambled；

In above-mentioned technical proposal, the step S4) specifically include：

Step S4-1), by step S3-2) obtained scrambler sequence is divided into two groups of sequence Inc according to information bit and check bit And Chc, its sequence length is respectively lc₁And lc₂；

Step S4-2), by step S4-1) obtained information sequence Inc carries out information bit intertexture, after being interweaved Information sequence Inc '；

In above-mentioned technical proposal, the step S4-2) specifically include：

Step S4-2-1), information sequence column major order is written to 4 row lc₁In the matrix memory space of/4 rows；

Step S4-2-2), by step S4-2-1) obtain the data in matrix memory space and exported by row, obtain Information sequence Inc ' after intertexture；

Step S4-3), by step S4-1) obtained verification sequence Chc carries out check bit intertexture, after being interweaved Verification sequence Chc '；

In above-mentioned technical proposal, the step S4-3) specifically include：

Step S4-3-1), verification sequence column major order is written to 4 row lc₂In the matrix memory space of/4 rows；

Step S4-3-2), by step S4-3-1) obtain the data in matrix memory space and exported by row, obtain Verification sequence Chc ' after intertexture；

Step S4-4), by step S4-2), step S4-3) information sequence Inc ' after obtained intertexture and Chc ' enter Row joint interweaves；For 1/2 code check, preceding 4 bit of output is information bit, and then 4 bits are check bit, with this Analogize；It is 3 4bits information bit first for 16/18 code check, followed by 4bits check bit, it is finally 5 4bits information bit, repeats this pattern；Obtain the sequence after joint interweaves；

Step S4-5), by step S4-4) obtained joint interleaved sequence carries out nibble displacement, using 4bits for singly Position is shifted, using 10 units as a cycle.For the 1st and the 2nd two unit, without displacement；It is right In the 3rd and the 4th two unit, the left cyclic shift of progress 1；For the 5th and the 6th two unit, 2 are carried out The left cyclic shift of position；For the 7th and the 8th two unit, the left cyclic shift of progress 3；For the 9th He 10th two unit, the left cyclic shift of progress 4；Obtain the ultimate sequence after channel interleaving；

In above-mentioned technical proposal, the step S5) specifically include：

Step S5-1), by step S4-5) obtained every two of channel interleaving sequence is one group and carried out in QPSK modes Constellation point, obtains a series of sequence of complex numbers；

Step S5-2), by step S5-1) obtained sequence of complex numbers carries out power normalization, obtain after power normalization Sequence of complex numbers；

Step S5-3), by step S5-2) obtained every 511 plural numbers of sequence of complex numbers are unit, utilize progress of tabling look-up Phase shift, obtains the sequence of complex numbers after phase shift；

Step S5-4), by step S5-3) obtained review sequence carries out in units of 511 plural numbers N × 1024 (N=0,1,2...) point IFFT computings, obtain sequence of complex numbers C；

The method advantage of the present invention is：

1st, the present invention uses OFDM and dual binary turbo coding techniques, with reference to scrambling and channel interleaving technology, makes Data communication has high, the anti-interference availability of frequency spectrum, anti-multipath time delay, anti-channel fading, and error correcting capability waits by force special Point；

2nd, the present invention can stablize by carrying out above-mentioned steps processing to data and effectively and reliably transmit data, carry out Primary signal can be recovered during error-correcting decoding exactly.

Brief description of the drawings

Fig. 1 is general frame figure of the invention；

Fig. 2 is channel interleaving flow chart of the invention.

Embodiment

In conjunction with the drawings and specific embodiments, the present invention will be further described.

As shown in figure 1, a kind of data communications method based on OFDM and dual binary turbo code, methods described bag Include：

Step S1), coding parameter is set, including coded block size and code check size, wherein code block size are PB16 (128bits), PB136 (1088bits) and PB520 (4160bits), code check size are 1/2 and 16/18；

Step S2), every time read in coded block size input data In, carry out dual binary turbo convolutional encoding, By the sequence after coding by information bit preceding, the posterior mode of check bit is exported, and obtains Turbo convolutional encoded sequences； Specifically include：

Step S2-1), every time read in coded block size data In=(i₀, i₁..., i_k..., i_2N-1), by sequence of parity point Into two group information sequence U₀=(u₀₀, u₀₁..., u_0k..., u_0N-1) and U₁=(u₁₀, u₁₁..., u_1k..., u_1N-1)；u_0kAnd u_1kMeter Calculate as follows：

Step S2-2), by step S2-1) obtained two group information sequence U₀、U₁Carry out precoding, register by Original state S0=[S_0,1, S_0,2, S_0,3] become state SN=[S after precoding_{N, 1}, S_{N, 2}, S_{N, 3}]；In precoding process K time register state SK are calculated by following formula and obtained：

Step S2-3), by step S2-2) obtained buffer status SN tabled look-up rising when formally encoding Beginning buffer status S '₀, using buffer status to two group information sequence U₀、U₁Carry out dual binary turbo convolution volume Code, obtains one group of check code X₀=(x₀₀, x₀₁..., x_0k..., x_0N-1)；Check code calculation formula is as follows：

Wherein, k=0,1 ... N-1, s '_K-1,3Represent the state of the 3rd register at the moment of kth -1 during formal coding.

Step S2-4), by step S2-1) obtained two group information sequences carry out by searching Turbo intertextures mapping table Turbo interweaves, the information sequence U ' after being interweaved₀With U '₁；

Step S2-5), by step S2-4) information sequence U ' after obtained two groups of intertextures₀、U′₁Carry out precoding, Register is by original state S0 '=[S '₀₁, S '₀₂, S '₀₃] become state SN '=[S ' after precoding_N1, S '_N2, S '_N3]；Computational methods With step S2-2)；

Step S2-6), by step S2-5) obtained buffer status SN ' tabled look-up rising when formally encoding Beginning buffer status S "₀, using buffer status to the information sequence U ' after two groups of intertextures₀With U '₁Carry out double binary Turbo convolutional encodings, obtain another set check code X₁=(x₁₀, x₁₁..., x_1k..., x_1N-1)；The same step of computational methods S2-3)；

Step S2-7), by step S2-3), step S2-6) two groups of check code X₀、X₁Entered according to code check parameter Row punching is handled；If code check is 1/2, handled without punching；If code check is 16/18；Then by two groups of schools Test a yard X₀、X₁All punched by a unit of 8 bits, retain the 1st bit in each unit, its 7 bits of remaininging are deleted, two after being punched group check code X '₀、X′₁；

Step S2-8), by step S2-1), step S2-3), step S2-7) two group information sequence U₀、U₁With Two groups of check code X '₀、X′₁According to U₀、U₁、X′₀、X′₁Sequential output, obtains Turbo convolutional encoded sequences；

Step S3), by step S2-8) coded sequence scrambled, obtain scrambler sequence；Specifically include：

Step S3-1), initialization one by 10 grades of shift registersThe motor synchronizing of composition Scrambler, initial register state is all 1；

Step S3-2), by step S2-8) Turbo convolution sequences 1 bit of input is added to scrambler every time Disturb, the sequence after being scrambled；Specifically include：

Step S3-2-1), often input 1 bit, shift register moves to left one, and lowest order is by the 10th of register Position and the 3rd XOR are obtained；State S (the X of kth time scrambler_k) be calculated as follows：

Step S3-2-2), by step S3-2-1) obtained register lowest order and 1 bit of input carry out XOR 1 bit after being scrambled；

Step S4), to step S3-2) obtained scrambler sequence carries out channel interleaving, obtains channel interleaving sequence, Channel interleaving is as shown in Figure 2；Specifically include：

Step S4-1), by step S3-2) obtained scrambler sequence is divided into two groups of sequence Inc according to information bit and check bit And Chc, its sequence length is respectively lc₁And lc₂；

Step S4-2), by step S4-1) obtained information sequence Inc carries out information bit intertexture, after being interweaved Information sequence Inc '；Specifically include：

In above-mentioned technical proposal, the step S4-2) specifically include：

Step S4-2-1), information sequence column major order is written to 4 row lc₁In the matrix memory space of/4 rows；I.e. One is classified as the 1st to lc in information sequence Inc₁/ 4 bits, second is classified as the lc in information sequence Inc₁/ 4+1 is arrived lc₁/ 2 bits, the 3rd is classified as the lc in information sequence Inc₁/ 2+1 to 3 × lc₁/ 4 bits, the 3rd is classified as information 3 × lc in sequence Inc₁/ 4+1 to lc₁Individual bits；

Step S4-2-2), by step S4-2-1) obtain the data in matrix memory space and exported by row, obtain Information sequence Inc ' after intertexture；Reading manner is：Since the 1st row, row when for the second time starting to read every time Location adds step-length StepSize1, passes throughAfter secondary reading, the first round runs through；Then next round is read, from second Row starts, and row address adds step-length StepSize1 when reading every time；The like, after being taken turns by StepSize1 Whole rows are all read；Wherein StepSize1 is tabled look-up according to code block size and code check size；

Step S4-3), by step S4-1) obtained verification sequence Chc carries out check bit intertexture, after being interweaved Verification sequence Chc '；Specifically include：

Step S4-3-1), verification sequence column major order is written to 4 row lc₂In the matrix memory space of/4 rows；I.e. One is classified as the 1st to lc in verification sequence Chc₂/ 4 bits, second is classified as the lc in information sequence Chc₂/4+1 To lc₂/ 2 bits, the 3rd is classified as the lc in information sequence Chc₂/ 2+1 to 3 × lc₂/ 4 bits, the 3rd is classified as 3 × lc in information sequence Chc₂/ 4+1 to lc₂Individual bits；

Step S4-3-2), by step S4-3-1) obtain the data in matrix memory space and exported by row, obtain Verification sequence Chc ' after intertexture；When being 1/2 for code check, since offset rows, start reading every time for the second time When row address plus step-length StepSize2 and to lc₂Modulus, i.e., second row address be (offset+StepSize2)modlc₂, pass throughAfter secondary reading, the first round runs through；Then next round is read, from Offset+1 rows start, and row address adds step-length StepSize2 when reading every time, the like, pass through Whole rows are all read after StepSize2 wheels；When being 16/18 for code check, since offset rows, open for the second time Row address is plus step-length StepSize2 and to lc when beginning to read every time₂Modulus, i.e., second row address be (offset+StepSize2)modlc₂, read lc₂After secondary, whole rows are all read；Wherein offset and StepSize2 roots Tabled look-up according to code block size and code check size；

Step S4-4), by step S4-2), step S4-3) information sequence Inc ' after obtained intertexture and Chc ' enter Row joint interweaves；For 1/2 code check, preceding 4 bit of output is information bit, and then 4 bits are check bit, with this Analogize；It is 3 4bits information bit first for 16/18 code check, followed by 4bits check bit, it is finally 5 4bits information bit, repeats this pattern；Obtain the sequence after joint interweaves；

Step S4-5) by step S4-4) obtained joint interleaved sequence carries out nibble displacement, in units of 4bits Shifted, using 10 units as a cycle.For the 1st and the 2nd two unit, without displacement；For 3rd and the 4th two unit, the left cyclic shift of progress 1；For the 5th and the 6th two unit, 2 are carried out The left cyclic shift of position；For the 7th and the 8th two unit, the left cyclic shift of progress 3；For the 9th He 10th two unit, the left cyclic shift of progress 4；Obtain the ultimate sequence after channel interleaving；

Step S5), to step S4) obtained channel interleaving sequence carries out in QPSK (QPSK) mode Constellation point and 1024 point IFFT computings, obtain a series of sequence of complex numbers C；Specifically include：

Step S5-1), by step S4-5) obtained every two of channel interleaving sequence is one group and carried out in QPSK modes Constellation point, obtains a series of sequence of complex numbers；Mapping ruler is：(0,0) is mapped as 1+j, (0,1) mapping For 1-j, (1,0) is mapped as -1+j, and (1,1) is mapped as -1-j；

Step S5-2), by step S5-1) obtained sequence of complex numbers carries out power normalization, obtain after power normalization Sequence of complex numbers；I.e. to each CM with normalization factor

Step S5-3), by step S5-2) obtained every 511 plural numbers of sequence of complex numbers are unit, utilize progress of tabling look-up Phase shift, obtains the sequence of complex numbers after phase shift；I.e. each CM is with corresponding twiddle factor Cos (phase_map [i] * PI/4)+sin (phase_map [i] * PI/4), wherein phase_map [i] represent i-th Individual twiddle factor parameter, i=0,1 ... 510；

Step S5-4), by step S5-3) obtained review sequence carries out in units of 511 plural numbers N × 1024 (N=0,1,2...) point IFFT computings, obtain sequence of complex numbers C；

Step S6), to step S5) obtained sequence of complex numbers C takes real part, obtain sending sequence.

It should be noted last that, the above embodiments are merely illustrative of the technical solutions of the present invention and it is unrestricted.Although The present invention is described in detail with reference to embodiment, it will be understood by those within the art that, to the present invention Technical scheme modify or equivalent substitution, without departure from the spirit and scope of technical solution of the present invention, its is equal It should cover among scope of the presently claimed invention.

Claims (8)

1. a kind of data communications method based on OFDM and dual binary turbo code, it is characterised in that including following Step：

Step S1), coding parameter is set, described coding parameter includes coded block size and code check size；Wherein code Block size is PB16, PB136 and PB520；Code check size is 1/2 and 16/18；

Step S2), every time read in coded block size input data In, carry out dual binary turbo convolutional encoding, By the sequence after coding by information bit preceding, the posterior mode of check bit is exported, and obtains Turbo convolutional encoded sequences；

Step S3), by step S2) coded sequence scrambled, obtain scrambler sequence；

Step S4), by step S3) obtained scrambler sequence carries out channel interleaving, obtains channel interleaving sequence；

Step S5), by step S4) obtained channel interleaving sequence carries out constellation point in QPSK mode and reflects Penetrate with N × 1024 (N=0,1,2...) point IFFT computings, obtain a series of sequence of complex numbers C；

Step S6), by step S5) obtained sequence of complex numbers C takes real part, obtain sending sequence.

2. the data communications method according to claim 1 based on OFDM and dual binary turbo code, it is special Levy and be, the step S2) specifically include：

Step S2-1), every time read in coded block size data In=(i₀, i₁..., i_k..., i_2N-1), by sequence of parity point Into two group information sequence U₀=(u₀₀, u₀₁..., u_0k..., u_0N-1) and U₁=(u₁₀, u₁₁..., u_1k..., u_1N-1)；u_0kAnd u_1kMeter Calculate as follows：

<mrow> <mtable> <mtr> <mtd> <mrow> <msub> <mi>u</mi> <mrow> <mn>0</mn> <mi>k</mi> </mrow> </msub> <mo>=</mo> <msub> <mi>i</mi> <mrow> <mn>2</mn> <mi>k</mi> </mrow> </msub> </mrow> </mtd> </mtr> <mtr> <mtd> <mrow> <msub> <mi>u</mi> <mrow> <mn>1</mn> <mi>k</mi> </mrow> </msub> <mo>=</mo> <msub> <mi>i</mi> <mrow> <mn>2</mn> <mi>k</mi> <mo>+</mo> <mn>1</mn> </mrow> </msub> </mrow> </mtd> </mtr> </mtable> <mo>,</mo> <mi>k</mi> <mo>=</mo> <mn>0</mn> <mo>,</mo> <mn>1</mn> <mo>,</mo> <mo>...</mo> <mo>,</mo> <mi>N</mi> <mo>-</mo> <mn>1</mn> <mo>;</mo> </mrow>

Step S2-2), by step S2-1) obtained two group information sequence U₀、U₁Carry out precoding, register by Original state S0=[S_0,1, S_0,2, 8_0,3] become state SN=[S after precoding_{N, 1}, S_{N, 2}, S_{N, 3}]；In precoding process K time register state SK are calculated by following formula and obtained：

<mrow> <mtable> <mtr> <mtd> <mrow> <mi>S</mi> <mi>K</mi> <mo>=</mo> <mo>&amp;lsqb;</mo> <msub> <mi>S</mi> <mrow> <mi>K</mi> <mo>,</mo> <mn>1</mn> </mrow> </msub> <mo>,</mo> <msub> <mi>S</mi> <mrow> <mi>K</mi> <mo>,</mo> <mn>2</mn> </mrow> </msub> <mo>,</mo> <msub> <mi>S</mi> <mrow> <mi>K</mi> <mo>,</mo> <mn>3</mn> </mrow> </msub> <mo>&amp;rsqb;</mo> </mrow> </mtd> </mtr> <mtr> <mtd> <mrow> <mo>=</mo> <mo>&amp;lsqb;</mo> <mtable> <mtr> <mtd> <msub> <mi>S</mi> <mrow> <mi>K</mi> <mo>-</mo> <mn>1</mn> <mo>,</mo> <mn>1</mn> </mrow> </msub> </mtd> <mtd> <msub> <mi>S</mi> <mrow> <mi>K</mi> <mo>-</mo> <mn>1</mn> <mo>,</mo> <mn>2</mn> </mrow> </msub> </mtd> <mtd> <msub> <mi>S</mi> <mrow> <mi>K</mi> <mo>-</mo> <mn>1</mn> <mo>,</mo> <mn>3</mn> </mrow> </msub> </mtd> </mtr> </mtable> <mo>&amp;rsqb;</mo> <mfenced open = "[" close = "]"> <mtable> <mtr> <mtd> <mn>0</mn> </mtd> <mtd> <mn>1</mn> </mtd> <mtd> <mn>0</mn> </mtd> </mtr> <mtr> <mtd> <mn>0</mn> </mtd> <mtd> <mn>0</mn> </mtd> <mtd> <mn>1</mn> </mtd> </mtr> <mtr> <mtd> <mn>1</mn> </mtd> <mtd> <mn>0</mn> </mtd> <mtd> <mn>1</mn> </mtd> </mtr> </mtable> </mfenced> <mo>+</mo> <mo>&amp;lsqb;</mo> <mtable> <mtr> <mtd> <msub> <mi>u</mi> <mrow> <mn>0</mn> <mi>k</mi> </mrow> </msub> </mtd> <mtd> <msub> <mi>u</mi> <mrow> <mn>1</mn> <mi>k</mi> </mrow> </msub> </mtd> </mtr> </mtable> <mo>&amp;rsqb;</mo> <mfenced open = "[" close = "]"> <mtable> <mtr> <mtd> <mn>0</mn> </mtd> <mtd> <mn>1</mn> </mtd> <mtd> <mn>1</mn> </mtd> </mtr> <mtr> <mtd> <mn>0</mn> </mtd> <mtd> <mn>1</mn> </mtd> <mtd> <mn>0</mn> </mtd> </mtr> </mtable> </mfenced> </mrow> </mtd> </mtr> </mtable> <mo>;</mo> </mrow>

Step S2-3), by step S2-2) obtained buffer status SN tabled look-up rising when formally encoding Beginning buffer status S '₀, using buffer status to two group information sequence U₀、U₁Carry out dual binary turbo convolution volume Code, obtains one group of check code X₀=(x₀₀, x₀₁..., x_0k..., x_0N-1)；Check code calculation formula is as follows：

<mrow> <msub> <mi>x</mi> <mrow> <mn>0</mn> <mi>k</mi> </mrow> </msub> <mo>=</mo> <msub> <mi>x</mi> <mrow> <mn>0</mn> <mi>k</mi> </mrow> </msub> <mo>&amp;CirclePlus;</mo> <msub> <mi>x</mi> <mrow> <mn>1</mn> <mi>k</mi> </mrow> </msub> <mo>&amp;CirclePlus;</mo> <msubsup> <mi>s</mi> <mrow> <mi>k</mi> <mo>-</mo> <mn>1</mn> <mo>,</mo> <mn>3</mn> </mrow> <mo>&amp;prime;</mo> </msubsup> </mrow>

Wherein, k=0,1 ... N-1, s '_K-1,3Represent the state of the 3rd register at the moment of kth -1 during formal coding.

Step S2-4), by step S2-1) obtained two group information sequences carry out by searching Turbo intertextures mapping table Turbo interweaves, the information sequence U ' after being interweaved₀With U '₁；

Step S2-5), by step S2-4) information sequence U ' after obtained two groups of intertextures₀、U′₁Carry out precoding, Register is by original state S0 '=[S '₀₁, S '₀₂, S '₀₃] become state SN '=[S ' after precoding_N1, S '_N2, S '_N3]；Computational methods With step S2-2)；

Step S2-6), by step S2-5) obtained buffer status SN ' tabled look-up rising when formally encoding Beginning buffer status S "₀, using buffer status to the information sequence U ' after two groups of intertextures₀With U '₁Carry out double binary Turbo convolutional encodings, obtain another set check code X₁=(x₁₀, x₁₁..., x_1k..., x_1N-1)；The same step of computational methods S2-3)；

Step S2-7), by step S2-3), step S2-6) two groups of check code X₀、X₁Entered according to code check parameter Row punching is handled；If code check is 1/2, handled without punching；If code check is 16/18；Then by two groups of schools Test a yard X₀、X₁All punched by a unit of 8 bits, retain the 1st bit in each unit, its 7 bits of remaininging are deleted, two after being punched group check code X '₀、X′₁；

Step S2-8), by step S2-1), step S2-3), step S2-7) two group information sequence U₀、U₁With Two groups of check code X '₀、X′₁According to U₀、U₁、X′₀、X′₁Sequential output, obtains Turbo convolutional encoded sequences.

3. the data communications method according to claim 1 based on OFDM and dual binary turbo code, it is special Levy and be, the step S3) specifically include：

Step S3-1), initialization one by 10 grades of shift registersThe motor synchronizing of composition Scrambler, initial register state is all 1；

Step S3-2), by step S2-8) Turbo convolution sequences 1 bit of input is added to scrambler every time Disturb, the sequence after being scrambled.

4. the data communications method according to claim 3 based on OFDM and dual binary turbo code, it is special Levy and be, the step S3-2) specifically include：

Step S3-2-1), often input 1 bit, shift register moves to left one, and lowest order is by the 10th of register Position and the 3rd XOR are obtained；State S (the X of kth time scrambler_k) be calculated as follows：

<mrow> <mtable> <mtr> <mtd> <mrow> <mi>S</mi> <mrow> <mo>(</mo> <msub> <mi>X</mi> <mi>k</mi> </msub> <mo>)</mo> </mrow> <mo>=</mo> <mrow> <mo>(</mo> <msubsup> <mi>X</mi> <mrow> <mi>k</mi> <mo>-</mo> <mn>1</mn> </mrow> <mn>9</mn> </msubsup> <msubsup> <mi>X</mi> <mrow> <mi>k</mi> <mo>-</mo> <mn>1</mn> </mrow> <mn>8</mn> </msubsup> <mn>...</mn> <msubsup> <mi>X</mi> <mrow> <mi>k</mi> <mo>-</mo> <mn>1</mn> </mrow> <mn>0</mn> </msubsup> <msubsup> <mi>X</mi> <mi>k</mi> <mn>1</mn> </msubsup> <mo>)</mo> </mrow> </mrow> </mtd> </mtr> <mtr> <mtd> <mrow> <msubsup> <mi>X</mi> <mi>k</mi> <mn>1</mn> </msubsup> <mo>=</mo> <msubsup> <mi>X</mi> <mrow> <mi>k</mi> <mo>-</mo> <mn>1</mn> </mrow> <mn>9</mn> </msubsup> <mo>&amp;CirclePlus;</mo> <msubsup> <mi>X</mi> <mrow> <mi>k</mi> <mo>-</mo> <mn>1</mn> </mrow> <mn>2</mn> </msubsup> </mrow> </mtd> </mtr> </mtable> <mo>;</mo> </mrow>

Step S3-2-2), by step S3-2-1) 1 bit of obtained register lowest order and input carries out XOR and obtains 1 bit after to scrambling.

5. the data communications method according to claim 1 based on OFDM and dual binary turbo code, it is special Levy and be, the step S4) specifically include：

Step S4-1), by step S3-2) obtained scrambler sequence is divided into two groups of sequence Inc according to information bit and check bit And Chc, its sequence length is respectively lc₁And lc₂；

Step S4-2), by step S4-1) obtained information sequence Inc carries out information bit intertexture, after being interweaved Information sequence Inc '；；

Step S4-3), by step S4-1) obtained verification sequence Chc carries out check bit intertexture, after being interweaved Verification sequence Chc '；

Step S4-4), by step S4-2), step S4-3) information sequence Inc ' after obtained intertexture and Chc ' enter Row joint interweaves；For 1/2 code check, preceding 4 bit of output is information bit, and then 4 bits are check bit, with this Analogize；It is 3 4bits information bit first for 16/18 code check, followed by 4bits check bit, it is finally 5 4bits information bit, repeats this pattern；Obtain the sequence after joint interweaves；

Step S4-5), by step S4-4) obtained joint interleaved sequence carries out nibble displacement, using 4bits for singly Position is shifted, using 10 units as a cycle.For the 1st and the 2nd two unit, without displacement；It is right In the 3rd and the 4th two unit, the left cyclic shift of progress 1；For the 5th and the 6th two unit, 2 are carried out The left cyclic shift of position；For the 7th and the 8th two unit, the left cyclic shift of progress 3；For the 9th He 10th two unit, the left cyclic shift of progress 4；Obtain the ultimate sequence after channel interleaving.

6. the data communications method according to claim 5 based on OFDM and dual binary turbo code, it is special Levy and be, the step S4-2) specifically include：

Step S4-2-1), information sequence column major order is written to 4 row lc₁In the matrix memory space of/4 rows；I.e. One is classified as the 1st to lc in information sequence Inc₁/ 4 bits, second is classified as the lc in information sequence Inc₁/ 4+1 is arrived lc₁/ 2 bits, the 3rd is classified as the lc in information sequence Inc₁/ 2+1 to 3 × lc₁/ 4 bits, the 3rd is classified as information 3 × lc in sequence Inc₁/ 4+1 to lc₁Individual bits；

Step S4-2-2), by step S4-2-1) obtain the data in matrix memory space and exported by row, obtain Information sequence Inc ' after intertexture；Reading manner is：Since the 1st row, row when for the second time starting to read every time Location adds step-length StepSize1, passes throughAfter secondary reading, the first round runs through；Then next round is read, from second Row starts, and row address adds step-length StepSize1 when reading every time；The like, after being taken turns by StepSize1 Whole rows are all read；Wherein StepSize1 is tabled look-up according to code block size and code check size.

7. the data communications method according to claim 5 based on OFDM and dual binary turbo code, it is special Levy and be, the step S4-3) specifically include：

Step S4-3-1) verification sequence column major order is written to 4 row lc₂In the matrix memory space of/4 rows；I.e. One is classified as the 1st to lc in verification sequence Chc₂/ 4 bits, second is classified as the lc in information sequence Chc₂/4+1 To lc₂/ 2 bits, the 3rd is classified as the lc in information sequence Chc₂/ 2+1 to 3 × lc₂/ 4 bits, the 3rd is classified as 3 × lc in information sequence Chc₂/ 4+1 to lc₂Individual bits；

Step S4-3-2) by step S4-3-1) obtain the data in matrix memory space and exported by row, obtain Verification sequence Chc ' after intertexture；When being 1/2 for code check, since offset rows, start reading every time for the second time When row address plus step-length StepSize2 and to lc₂Modulus, i.e., second row address be (offset+StepSize2)mod lc₂, pass throughAfter secondary reading, the first round runs through；Then next round is read, from Offset+1 rows start, and row address adds step-length StepSize2 when reading every time, the like, pass through Whole rows are all read after StepSize2 wheels；When being 16/18 for code check, since offset rows, open for the second time Row address is plus step-length StepSize2 and to lc when beginning to read every time₂Modulus, i.e., second row address be (offset+StepSize2)mod lc₂, read lc₂After secondary, whole rows are all read；Wherein offset and StepSize2 roots Tabled look-up according to code block size and code check size.

8. the data communications method according to claim 1 based on OFDM and dual binary turbo code, it is special Levy and be, the step S5) specifically include：

Step S5-1), by step S4-5) obtained every two of channel interleaving sequence is one group and carried out in QPSK modes Constellation point, obtains a series of sequence of complex numbers；Mapping ruler is：(0,0) is mapped as 1+j, (0,1) mapping For 1-j, (1,0) is mapped as -1+j, and (1,1) is mapped as -1-j；

Step S5-2), by step S5-1) obtained sequence of complex numbers carries out power normalization, obtain after power normalization Sequence of complex numbers；I.e. to each CM with normalization factor

Step S5-3), by step S5-2) obtained every 511 plural numbers of sequence of complex numbers are unit, utilize progress of tabling look-up Phase shift, obtains the sequence of complex numbers after phase shift；I.e. each CM is with corresponding twiddle factor Cos (phase_map [i] * PI/4)+sin (phase_map [i] * PI/4), wherein phase_map [i] represent i-th Individual twiddle factor parameter, i=0,1 ... 510；

Step S5-4), by step S5-3) obtained review sequence carries out in units of 511 plural numbers N × 1024 (N=0,1,2...) point IFFT computings, obtain sequence of complex numbers C.