CN110535625A - A kind of three element chaos signal generators based on memristor - Google Patents

A kind of three element chaos signal generators based on memristor Download PDF

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Publication number
CN110535625A
CN110535625A CN201910878614.2A CN201910878614A CN110535625A CN 110535625 A CN110535625 A CN 110535625A CN 201910878614 A CN201910878614 A CN 201910878614A CN 110535625 A CN110535625 A CN 110535625A
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memristor
circuit
capacitor
operational amplifier
resistance
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徐权
谭啸
包伯成
武花干
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Changzhou University
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Changzhou University
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/001Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using chaotic signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12Details relating to cryptographic hardware or logic circuitry

Abstract

The invention proposes a kind of novel three elements chaos signal generators being made of two memristors and a capacitor parallel connection, the circuit of the signal generator, which is realized, has simple topological structure, but can produce chaotic behavior i.e. circuit and can run on chaos state generation chaotic signal.Hardware circuit prototype is made according to circuit diagram, and the chaotic behavior generated to circuit has carried out experiment measurement verifying.The result shows that a kind of three element chaos signal generators based on memristor proposed have simple topological structure, which can be applied in the engineering field based on chaos.

Description

A kind of three element chaos signal generators based on memristor
Technical field
The present invention proposes a kind of three element chaos signal generators based on memristor, the realization circuit of the chaos signal source by Two memristors and a capacitor are formed in parallel, and can regard two memristor oscillating units with shared capacitor as.The invention belongs to In Theory and New Technology of Electrical Engineering and chaos applications field.
Background technique
Due to potential application of the chaos in terms of weather forecast, aircraft control and secure communication, it has been caused quite Big concern.In addition, nonlinear circuit provides strong experiment and analysis and research for people, exist in order to which people understand chaos Application in engineering.The relationship of magnetic flux and charge illustrates the feature that memristor has non-linear and non-volatile memory, Show the great potential of memristor.Especially in the circuit or system of building chaos or hyperchaos.In addition, being based on memristor Chaos circuit cause the extensive pass of people in many chaos fields such as cryptographic system, secure communication of network, signal processing Note.But since nanotechnology cost is excessively high and technological deficiency, the memristor used in these memory circuits is frequently with operational amplifier And analog multiplier and diode bridge cascade RL, LC or RLC filter equivalent implementation.Memristor is as the 4th kind of basic circuit Element is that the development of Circuit theory is filled with new blood.
Building is that one or more is had to different nonlinear memristors based on the most important experience of memristor chaos circuit Introduce existing linearly or nonlinearly electronic circuit.The relatively simple memristor chaos of some topological structures or hyperchaotic circuit are that have Cai's circuit develops.They are with different memristor circuitry instead nonlinear resistance or Cai Shi diode.In addition, by that will recall Resistance, which introduces classical linear osccilation circuit or filter circuit, realizes some novel memristor chaos or hyperchaotic circuit.Existing text It offers in the memristor chaos circuit of report, is mostly in the presence of series connection and mixed connection topological structure in parallel, i.e. topological structure is complex. In addition, these memristor chaos circuits are the autonomous memristor circuit comprising at least five basic circuit elements or include at least three bases The Non-Self-Governing memristor circuit of this circuit element and an extrinsic motivated.From the perspective of engineer application, simple topology is constructed Structure, the feasible chaos circuit of hardware realization are significantly to the engineering based on chaos is promoted.The present invention constructs one It is a to contain only three basic circuit elements, and only include the simple topology structure of parallel relationship.
Summary of the invention
The technical problems to be solved by the present invention are: in order to overcome the shortcomings in the prior art, the present invention provides a kind of base In three element chaos signal generators of memristor.
The present invention solves its technical problem technical solution to be taken: a kind of three element chaotic signals based on memristor Generator, including a capacitor C1, the passive broad sense memristor M of a second order1With the active memristor M of a single order2, the capacitor C1, two The passive broad sense memristor M of rank1With the active memristor M of single order2Three elements is are connected in parallel, and the passive broad sense memristor M of second order1The end A with Capacitor C1Positive terminal C connection, the passive broad sense memristor M of second order1The end B and capacitor C1Negative pole end D connection;The active memristor of single order Memristor M2The end E and capacitor C1Positive terminal C connection, the active memristor memristor M of single order2The end F and capacitor C1Negative pole end D connection; Capacitor C1Cathode terminate " ground ".
Further, the passive broad sense memristor M of the second order1Equivalent-circuit model include diode bridge rectifier circuit, electricity Hold C and inductance L, is cascaded again with diode bridge rectifier circuit after capacitor C and inductance L parallel connection, and diode bridge rectifier circuit Positive input as M1The end A, the negative input of diode bridge rectifier circuit is as M1The end B.
The passive broad sense memristor M of second order1Mathematical model may be expressed as:
Wherein, ρ=1/ (2nVT), IS、n、VTRespectively indicate the reverse saturation current, emission ratio and thermal voltage of diode.
Further, the active memristor memristor M of the single order2Equivalent-circuit model include operational amplifier U1, operational amplifier U2, resistance R1, resistance R2, resistance-R3, capacitor C0, multiplier U3With multiplier U4, operational amplifier U1Positive input conduct Memristor M2The end E, operational amplifier U1Reverse input end connect operational amplifier U1Output end;Resistance R1One termination operation Amplifier U1Output end, resistance R1Another termination operational amplifier U2Inverting input terminal;Resistance R2One termination operation amplifier Device U2Inverting input terminal, resistance R2Another termination operational amplifier U2Output end;Capacitor C0It is connected in parallel on resistance R2Both ends;Electricity Resistance-R3One termination multiplier U4Output end;Multiplier U3Two input termination operational amplifier U2Output end;Multiplier U4Two Input terminal is separately connected operational amplifier U1Non-inverting input terminal and multiplier U3Output end.
The active memristor memristor M of single order2Mathematical model may be expressed as:
Wherein, v1And i2Respectively memristor M2Input terminal voltage and current, v0It is C0On voltage, g is U3And U4Two The overall gain of a multiplier;
Using Kirchhoff's law and formula (1) and formula (2) are combined, obtains the mathematical model of memristor circuit are as follows:
Wherein, linear circuit element parameter is R1、R2、R3、C0=C1=C, L and g, the parameter of diode are IS、n、VT, i.e., ISFor reversed saturated circuit, n is emission ratio, VTFor temperature voltage.
Using transformation relation:
Wherein, ρ is diode voltage coefficient, and x, y, z, w are respectively voltage v1, v0, normalized parameter of the v and electric current i to ρ; τ is the time to time of integration normalization coefficient;A, b, c, d, e are respectively normalization system parameter relevant to circuit parameter.
Formula (3) can be rewritten are as follows:
Wherein, each symbolic significance is identical as formula (4).
Selecting circuit parameter is C1=20nF, L=40mH, R=Ra=Rb=2k Ω, A=2V, f=6kHz.In addition, choosing 1N4148 diode, parameter IS=5.84nA, n=1.94, VT=26mV.
According to formula (4), it can be calculated and change coefficient a, b, c to one, d is respectively as follows:
A=4/3, b=9.409 × 10-4, c=2.4082 × 10-4, d=0.5, e=1.88 (6)
The beneficial effects of the present invention are: a kind of three element chaos signal generators based on memristor provided by the invention, by The simple three elements memristor chaos circuit that two memristors and a capacitor parallel connection are constituted.Has memristor chaos electricity reported in the literature Lu Zhong is mostly in the presence of series connection and mixed connection topological structure in parallel, i.e. topological structure is complex.In addition, these memristor chaos Circuit is the autonomous memristor circuit comprising at least five basic circuit elements or includes at least three basic circuit elements and one The Non-Self-Governing memristor circuit of extrinsic motivated.The angle analysis realized from circuit, existing memristor chaos circuit mainly pass through linear Or Non-linear coupling two linearly or nonlinearly coupling unit realize;And the present invention uses the concept of " shared ", i.e., by two Memristor shares that same capacitor constitutes two oscillating units and two oscillating unit direct-couplings realize the mixing of oscillating unit, To can produce chaotic signal output.
Detailed description of the invention
In order to understand the contents of the present invention more easily clearly, below according to specific embodiment, and in conjunction with attached drawing, The present invention will be described in further detail, in which:
A kind of Fig. 1: three element chaos signal generators realization circuit based on memristor.
Fig. 2: the passive broad sense memristor M of second order1Equivalent implementation circuit.
Fig. 3: the active memristor M of single order2Equivalent implementation circuit.
Fig. 4: when the double scroll chaos that d=0.5 and e=1.88 circuit generates.
Fig. 5: the three element memristor chaos circuit prototypes and test device realized using discrete circuit element.
Fig. 6: in the double scroll chaos of v1-v0 plane experiment capture.
Specific embodiment
Presently in connection with attached drawing, the present invention is described in detail.This figure is simplified schematic diagram, is only illustrated in a schematic way Basic structure of the invention, therefore it only shows the composition relevant to the invention.
As shown in Figure 1, a kind of three element chaos signal generators based on memristor of the invention, including a capacitor C1, The passive broad sense memristor M of one second order1With the active memristor M of a single order2, the capacitor C1, the passive broad sense memristor M of second order1And single order Active memristor M2Three elements is are connected in parallel, and the passive broad sense memristor M of second order1The end A and capacitor C1Positive terminal C connection, two The passive broad sense memristor M of rank1The end B and capacitor C1Negative pole end D connection;The active memristor memristor M of single order2The end E and capacitor C1Just Extreme C connection, the active memristor memristor M of single order2The end F and capacitor C1Negative pole end D connection;Capacitor C1Cathode terminate " ground ".
As shown in Fig. 2, the passive broad sense memristor M of second order1Equivalent-circuit model include diode bridge rectifier circuit, It is cascaded again with diode bridge rectifier circuit after capacitor C and inductance L, capacitor C and inductance L are in parallel, and diode bridge rectified current The positive input on road is as M1The end A, the negative input of diode bridge rectifier circuit is as M1The end B.
Mathematical modeling: the passive broad sense memristor M of second order1As shown in Fig. 2, its mathematical model is represented by
Wherein, ρ=1/ (2nVT), IS、n、VTThe reverse saturation current, emission ratio and thermal voltage of diode are respectively indicated, The memristor simulator used herein is made of the diode of four 1N4148 models, and the parameter of diode is IS=5.84nA, n =1.94, VT=25mV.
As shown in figure 3, the active memristor memristor M of single order2Equivalent-circuit model include operational amplifier U1, operation puts Big device U2, resistance R1, resistance R2, resistance-R3, capacitor C0, multiplier U3With multiplier U4, operational amplifier U1Positive input As memristor M2The end E, operational amplifier U1Reverse input end connect operational amplifier U1Output end;Resistance R1One termination Operational amplifier U1Output end, resistance R1Another termination operational amplifier U2Inverting input terminal;Resistance R2One termination operation Amplifier U2Inverting input terminal, resistance R2Another termination operational amplifier U2Output end;Capacitor C0It is connected in parallel on resistance R2Both ends; Resistance-R3One termination multiplier U4Output end;Multiplier U3Two input termination operational amplifier U2Output end;Multiplier U4's Two input terminals are separately connected operational amplifier U1Non-inverting input terminal and multiplier U3Output end.
The active memristor M of single order shown in Fig. 32Mathematical model may be expressed as:
Wherein v1And i2Respectively memristor M2Input terminal voltage and current, V0It is C0On voltage, g is U3, U4Two The overall gain of multiplier.
Using Kirchhoff's law and convolution (1) (2), the mathematical model for obtaining memristor circuit is
Linear circuit element parameter is R1=2k Ω, R2=4k Ω, R3=1.5k Ω, C0=C1=C=4.7nF, L=10mH And g=0.1, the diode of four 1N4148 models of diode bridge form, the parameter of diode is IS=5.84nA, n= 1.94、VT=25mV.These parameters are hereinafter collectively referred to as typical circuit parameter.Using transformation relation:
Formula (3) can be rewritten are as follows:
Selecting circuit parameter is C1=20nF, L=40mH, R=Ra=Rb=2k Ω, A=2V, f=6kHz.In addition, choosing 1N4148 diode, parameter IS=5.84nA, n=1.94, VT=26mV.
Normalization coefficient can be obtained according to the circuit parameter convolution (4) chosen are as follows:
A=4/3, b=9.409 × 10-4, c=2.4082 × 10-4, d=0.5, e=1.88 (6)
Phase rail figure under numerical simulation canonical parameter:
Using MATLAB ODE23 algorithm, time step 0.1 is taken, numerical simulation obtains working as d=0.5, when e=1.88, such as Fig. 4 show binary vortices chaos attractor, wherein LE1=0.1339, LE2=0.0001, LE3=-0.4610, LE4=- 8.6482, provable circuit runs on chaos state.
Experimental verification:
Using commercial discrete element by hardware experiments circuit manual welding on experimental plate, and capture circuit on this basis Oscillation track verifies MATLAB numerical simulation.Hardware experiments circuit use five potentiometers, a manual winding inductance, three Monolithic capacitor, four 1N4148 diodes, three operational amplifiers TL082CP, two multipliers AD633, bipolar ± 15V are electric Source, as shown in Figure 5.Typical circuit parameter is used in hard ware measure.In addition, with four-way digital oscilloscope in XY mode Lower capture experimental circuit running track.
In experimental circuit, all component parameters take typical circuit parameter value, and Fig. 6 show the circuit fortune of experiment capture Row track can determine whether that circuit can produce chaotic signal according to running track, double scroll chaos be presented as in phase plane.
Comparing result can illustrate: the phase rail figure and simulation result observed in experimental circuit is completed to coincide, and can verify The correctness of theory analysis and numerical analysis.Therefore the memristor chaos circuit that the present invention constructs has the theoretical foundation and object of science Realizability in reason plays positive impetus to memristor circuit studies.
These results indicate that a kind of three element chaos signal generators based on memristor proposed are in actual chaos work There is very big application potential in journey.In addition, speculate according to the work done, in following research, this novel three element Memristor chaos circuit still has some unknown features to remain to be discovered.
Taking the above-mentioned ideal embodiment according to the present invention as inspiration, through the above description, relevant staff Various changes and amendments can be carried out without departing from the scope of the present invention completely.The technical scope of this invention is not The content being confined on specification, it is necessary to which the technical scope thereof is determined according to the scope of the claim.

Claims (5)

1. a kind of three element chaos signal generators based on memristor, it is characterised in that: including a capacitor C1, a second order without Source broad sense memristor M1With the active memristor M of a single order2, the capacitor C1, the passive broad sense memristor M of second order1With the active memristor M of single order2 Three elements is are connected in parallel, and the passive broad sense memristor M of second order1The end A and capacitor C1Positive terminal C connection, the passive broad sense of second order Memristor M1The end B and capacitor C1Negative pole end D connection;The active memristor memristor M of single order2The end E and capacitor C1Positive terminal C connection, The active memristor memristor M of single order2The end F and capacitor C1Negative pole end D connection;Capacitor C1Cathode terminate " ground ".
2. the three element chaos signal generators based on memristor as described in claim 1, it is characterised in that: the second order is passive Broad sense memristor M1Equivalent-circuit model include diode bridge rectifier circuit, capacitor C and inductance L, capacitor C and inductance L are in parallel It is cascaded again with diode bridge rectifier circuit afterwards, and the positive input of diode bridge rectifier circuit is as M1The end A, two poles The negative input of pipe bridge rectifier is as M1The end B.
3. the three element chaos signal generators based on memristor as claimed in claim 2, it is characterised in that: the passive broad sense of second order Memristor M1Mathematical model may be expressed as:
Wherein, ρ=1/ (2nVT), IS、n、VTRespectively indicate the reverse saturation current, emission ratio and thermal voltage of diode.
4. the three element chaos signal generators based on memristor as claimed in claim 3, it is characterised in that: the single order is active Memristor memristor M2Equivalent-circuit model include operational amplifier U1, operational amplifier U2, resistance R1, resistance R2, resistance-R3, electricity Hold C0, multiplier U3With multiplier U4, operational amplifier U1Positive input as memristor M2The end E, operational amplifier U1's Reverse input end connects operational amplifier U1Output end;Resistance R1One termination operational amplifier U1Output end, resistance R1It is another One termination operational amplifier U2Inverting input terminal;Resistance R2One termination operational amplifier U2Inverting input terminal, resistance R2It is another Terminate operational amplifier U2Output end;Capacitor C0It is connected in parallel on resistance R2Both ends;Resistance-R3One termination multiplier U4Output end; Multiplier U3Two input termination operational amplifier U2Output end;Multiplier U4Two input terminals be separately connected operational amplifier U1 Non-inverting input terminal and multiplier U3Output end.
5. the three element chaos signal generators based on memristor as claimed in claim 4, it is characterised in that: the single order is active Memristor memristor M2Mathematical model may be expressed as:
Wherein, v1And i2Respectively memristor M2Input terminal voltage and current, v0It is C0On voltage, g is U3And U4Two multiplication The overall gain of device;
Using Kirchhoff's law and formula (1) and formula (2) are combined, obtains the mathematical model of memristor circuit are as follows:
Wherein, ρ=1/ (2nVT) it is diode voltage system, number linear circuit element parameter is R1、R2、R3、C0=C1=C, L and g, The parameter of diode is IS、n、VT, i.e. ISFor reversed saturated circuit, n is emission ratio, VTFor temperature voltage;
Using transformation relation:
Wherein, ρ is diode voltage coefficient, and x, y, z, w are respectively voltage v1, v0, normalized parameter of the v and electric current i to ρ;τ is Time is to time of integration normalization coefficient;A, b, c, d, e are respectively normalization system parameter relevant to circuit parameter;
Formula (3) can be rewritten are as follows:
Wherein, formula (4) each symbolic significance is identical as formula (4);
According to formula (4), it can be calculated and change coefficient a, b, c, d to one.
CN201910878614.2A 2019-09-18 2019-09-18 A kind of three element chaos signal generators based on memristor Pending CN110535625A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112073170A (en) * 2020-05-25 2020-12-11 湘潭大学 Segmented smooth multi-attractor coexisting memristor chaotic circuit
CN116011536A (en) * 2022-12-06 2023-04-25 常州大学 Nerve morphology circuit based on local active memristor

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105577355A (en) * 2015-12-12 2016-05-11 常州大学 Voltage controlled memristor chaotic circuit based on second-order active band-pass filter
CN106130713A (en) * 2016-07-14 2016-11-16 郑州轻工业学院 A kind of the simplest four-dimensional self-governing chaos system with double memristor and realize circuit
CN107093985A (en) * 2017-04-11 2017-08-25 常州大学 A kind of quadravalence memristor chaos circuit realized based on active band-pass filter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105577355A (en) * 2015-12-12 2016-05-11 常州大学 Voltage controlled memristor chaotic circuit based on second-order active band-pass filter
CN106130713A (en) * 2016-07-14 2016-11-16 郑州轻工业学院 A kind of the simplest four-dimensional self-governing chaos system with double memristor and realize circuit
CN107093985A (en) * 2017-04-11 2017-08-25 常州大学 A kind of quadravalence memristor chaos circuit realized based on active band-pass filter

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112073170A (en) * 2020-05-25 2020-12-11 湘潭大学 Segmented smooth multi-attractor coexisting memristor chaotic circuit
CN112073170B (en) * 2020-05-25 2023-07-18 湘潭大学 Sectional smooth multi-attractor coexistence memristor chaotic circuit
CN116011536A (en) * 2022-12-06 2023-04-25 常州大学 Nerve morphology circuit based on local active memristor
CN116011536B (en) * 2022-12-06 2024-01-23 常州大学 Nerve morphology circuit based on local active memristor

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Application publication date: 20191203