CN110535478B - Dual-input Turbo-like code closed set identification method in DVB-RCS2 protocol - Google Patents
Dual-input Turbo-like code closed set identification method in DVB-RCS2 protocol Download PDFInfo
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- H—ELECTRICITY
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
- H03M13/296—Particular turbo code structure
- H03M13/2972—Serial concatenation using convolutional component codes
Abstract
The invention belongs to the technical field of Turbo code blind identification, and particularly relates to a dual-input Turbo code closed set identification method in a DVB-RCS2 protocol. The invention obtains the equivalent encoder structure with the same encoding output as the original encoder and known parameters by estimating the structure of the equivalent encoder based on the equivalent structure of the encoding structure of the dual-input turbo code. Therefore, the parameter identification of the Turbo code is realized.
Description
Technical Field
The invention belongs to the technical field of Turbo code blind identification, and particularly relates to a double-input Turbo code closed set identification method in a DVB-RCS2 protocol.
Background
The blind identification of channel coding is a very important technology in the non-cooperative field, and mainly comprises the open set identification of parameters which can be arbitrarily selected and the closed set identification of limited values of the parameters. Wherein closed set identification is widely adopted in code identification of part of common communication protocols. In many communication protocols, such as CCSDS, DVB-RCS2, LTE, etc., turbo codes are used as coding schemes. The protocols have different coding structures, wherein the DVB-RCS2 protocol adopts a dual-input code word structure which is different from a classical parallel cascade code-like coding structure.
The turbo code under DVB-RCS protocol and DVB-RCS2 protocol is a dual-input code word, a cyclic recursive systematic convolutional code (CRSC) is used as a subcode, the interleaving depth is half of that of a classical turbo code, and two-stage interleaving is adopted. And has higher coding efficiency and error correction performance compared with the classical turbo code. Unlike a general parallel concatenated turbo-like code. When not deleted, the dual-input code word 1/3 code rate dual-input information code word pair is (x) a ,x b ) Output is (x) a ,x b ,y 1 ,w 1 ,y 2 ,w 2 )。y 1 ,w 1 For coded output, y 2 ,w 2 Is output for interleaving encoding.
The code rate of the DVB-RCS protocol is only 1/3,2/3,1/2,2/5,4/5,6/7, 3/4. The deleting mode corresponding to each code rate with deletion and the output mode thereof are as follows:
in the erasure pattern matrix, 1 indicates a strobe and 0 indicates erasure. Under the condition of known code block length n and information bit length k, the output mode can be used for extracting and obtaining information bit code word sequences A and B in one code block length:
A i+1 =x a (i+1),B i+1 =x b (i+1),i=0,1,...,n/6-1
and check bit codeword sequence Y, W:
this type of encoder differs from a parallel-like concatenated RSC encoder in that two information bits are input at a time to participate in encoding and x b It will directly participate in the state transition of the partial register. Compared with the common RSC encoder, the encoder structure is more difficult to solve, and information bits (x) need to be separated out firstly a ,x b ) And respectively solving the check Y and the check W. Since the deletion exists, there is also an evaluation of the deletion pattern. In addition, interleaving identification is required. But due toDue to the influence of double inputs, separate solving is difficult to realize.
Disclosure of Invention
The invention provides a closed set identification scheme of a dual-input Turbo-like code under a DVB-RCS2 protocol, and aims to perform parameter identification on the Turbo code with a dual-input structure. The scheme can well identify the dual-input turbo codes with different code rates and different deletion modes. Has good error code resistance.
The technical scheme of the invention is as follows: based on the equivalent structure of the dual-input turbo code coding structure, the equivalent encoder structure with the same coding output as the original encoder and known parameters is obtained by estimating the structure of the equivalent encoder. Thereby realizing the parameter identification of the Turbo code; the invention mainly comprises the following steps:
s1, the known receiving sequence is r 1 r 2 …r N N is the length of the received sequence, the code block length N and the information bit length k are estimated by a matrix transformation method to obtain a code rate k/N, a code word sequence output mode is obtained according to the code rate, and then the information bit code words A and B and the check bit code word Y are extracted by the output mode 1 ,Y 2 ,W 1 ;
S2, if the code rate is one of 1/3,2/3,1/2 and 2/5, the S21 is entered, and Y is processed 1 Or W 1 Carrying out check bit identification to obtain core encoder parameters, and entering S3 if the code rate is not any one of 1/3,2/3,1/2 and 2/5;
s21, the structural output is [ AB Y]2/3 code rate convolutional code equivalent encoder, wherein Y represents Y 1 、W 1 One of them; the equivalent encoder checks to satisfyG YA 、G YB Respectively representing the generator polynomial matrices of two equivalent component encoders. The two-component code of the equivalent encoder is CRSC convolutional code, and the system feedback polynomials are made consistent and recorded as h f The generator polynomials of the two equivalent component encoders areh 1 ,h 2 Respectively representing the sub-generator polynomials of a two-component encoder.
S22, solving check matrix H of equivalent encoder by adopting matrix transformation method Y =[h 1 h 2 h f ]And obtaining a generator polynomial matrix G of the equivalent encoder by utilizing the corresponding relation between the check matrix and the generator matrix Y (ii) a Entering step S5;
s3, judging whether the code rate is one of 4/5,6/7 and 3/4, if so, entering S31 to identify the deletion convolutional code; if not, entering S6;
s31, utilizing the information bit code words A and B and the check bit code word Y according to the output mode corresponding to the code rate 1 ,W 1 Constructing a convolutional code with a code rate of 2T/2T +1, wherein T is a deleting period;
s32, utilizing a matrix transformation method to solve a check matrix of the 2T/2T +1 convolutional code equivalent encoder
H Y =[h 1 h 2 h 3 h 4 … h 2T h 2T+1 ]
For an equivalent encoder with erasures, the check satisfiesP is a deletion mode, the two subcodes are deletion convolutional codes obtained by deleting 1/2 code rate convolutional codes, and respective check matrixes are as follows:
H YA =[h 1 h 3 h 4 … h 2T ]
H YB =[h 2 h 3 h 5 … h 2T+1 ]
s33, making the deletion convolutional code check matrix needing to be identified asThen H (x) is taken as H YA 、H YB ,n 0 Is H YA 、H YB The number of neutron generating polynomials. The maximum polynomial degree of the check matrix isThe upper limit of the degree of the source generator polynomial is k = (n) 0 -1) (d + 1) -1, setting the 1/2 code rate source code generating polynomial asα i ,λ i To generate coefficients of a polynomial. Construct a code rate of (n) 0 -1)/2(n 0 -1) generating a polynomial matrix G' (x):
A set of possible deletion patterns is constructed,is a binary finite field 2n 0 -2-dimensional space.
S34, selecting one generation mode P from S in sequence, and constructing and deleting the convolutional code C P The generator polynomial matrix of (a) is:
G P (x)=[G′(x)] αP
wherein alpha is P =(α P (1),α P (2),...,α P (i),...,α P (n 0 ) A position vector representing the deletion pattern P, α P (i) The ith 1 in the P is shown to be positioned at the position of the P column according to the check relation G P (x)H T (x) =0, yielding the system of linear equations G (α) 0 ,α 1 ,...,α κ ,λ 0 ,λ 1 ,...,λ κ ) T =0, wherein G is one on F ((n-1) × 2 (k + 1)) ) a matrix;
s35, solving the equation system obtained by the S34 to obtain a non-zero basic solution system omega, and expressing elements in omega asWhereinRepresenting a binary finite field k-dimensional space,F k (x) Representing a set of k-th order polynomials. And rememberThe same process is also performed to select the corresponding in omegaRecording and storing the solution with the minimum order and the order thereof;
s36, checking S, and if all possible P in S is calculated, entering step S37; otherwise, returning to the step S34 to continue the calculation;
s37, selecting the solution with the minimum order number in all the deletion modes P as an estimation, wherein the deletion mode corresponding to the solution is the deletion mode P corresponding to the encoder A 、P B To obtain a corresponding erasure code generator polynomial matrix G YA 、G YB ;
S38, from P A Or P B Is checked for an even bit of the erasure pattern P Y From G YA 、G YB Combining to obtain an equivalent encoder generator polynomial matrix G Y ;
S39, knowing that the input information is X, generating a polynomial matrix of the equivalent encoder subcode is G, wherein X is one of A and B, and G is corresponding G YA 、G YB One, then obtain the cyclic status of CRSC subcode as
I is a unit matrix, and the process goes to step S5;
s4, judging whether the code rate is 2/5 or 3/4, if not, finishing the identification of all parameters of the encoder, and entering the step S5; if yes, the interleaving check output is Y 2 Adopting a decoding error correction identification method to carry out interweaving identification, and if the identification is successful, obtaining an equivalent check generator polynomial matrixDeleting the mode P and the inter-symbol interleaving relation pi; entering step S5; if not, the step S6 is carried out;
s5, outputting coding parameters: the length n of code block, the length k of information bit, the code rate is k/n, the equivalent check generates a polynomial matrix G Y 、(existing when the code rate is 2/5), the erasure pattern P, and the inter-symbol interleaving relation pi (existing when the code rate is 2/5 and 3/4).
And S6, outputting the non-identification result.
The invention carries out equivalent identification on the encoder structure of the double-input Turbo-like code in the DVB-RCS2 protocol by a method for constructing an equivalent encoder. And respectively identifying each branch of the equivalent encoder, and combining the identification results to obtain the encoder equivalent to the original dual-input encoder. And the equivalent encoder can well realize the independent identification of each branch component encoder.
Drawings
FIG. 1 is a schematic diagram of a dual-input Turbo code encoder requiring identification according to the present invention
FIG. 2 is a schematic diagram of an equivalent encoder without deletion according to the present invention
FIG. 3 is a schematic diagram of an equivalent encoder with erasures according to the present invention
FIG. 4 is a flow chart of the parity bit equivalent encoder parameter identification under the condition of no deletion in the present invention
FIG. 5 is a flow chart of parity bit equivalent encoder parameter identification under erasure condition according to the present invention
FIG. 6 is a graph of the check recognition accuracy varying with the bit error rate under the no-erasure condition in accordance with the present invention
Detailed Description
The invention is described in detail below with reference to the figures and examples
FIG. 1 is a schematic diagram of the structure of the encoder to be identified, the Turbo code encoder of the type consists of an interleaving module, a core encoding module and a check deleting module, the information bit input is A and B, the check output is Y and W, the type 1 check is obtained by directly encoding and deleting the information bit input A and B by the core encoder, and is represented as Y 1 、W 1 The type 2 check is obtained by inputting data of information bits A and B after intra-symbol interleaving and inter-symbol interleaving and deleting the data by the same code as the type 1 check, and is represented as Y 2 、W 2 。
Example 1
This embodiment takes an encoder with 1/3 code rate under the DVB-RCS protocol as an example, and illustrates the effectiveness of an equivalent encoder under the condition of no deletion. As shown in fig. 2, which is a schematic diagram of an equivalent encoder under the condition of no deletion, the check output satisfies the following equation:
the respective input and output of the two encoders can form a systematic code, and the feedback polynomials of the two systematic codes are consistent and are recorded as h f The generator polynomial matrix of the two encoders can therefore be written:
G YA =[1,h 1 /h f ]
G YB =[1,h 2 /h f ]
the generator polynomial matrix of the equivalent encoder is therefore:
then there is the coding equation:
[A(x) B(π)]G Y (x)=[A(x) B(x) Y(x)]
the check polynomial matrix of the check bits obtained by the matrix transformation method is H = [ H = [ ] 1 h 2 h f ]As shown in fig. 4, it is a flowchart of the equivalent encoder parity parameter identification without erasure, i.e. the process represented by steps S21 to S22. For a 1/3 code rate encoder under a DVB-RCS protocol, a check polynomial matrix is obtained by a matrix transformation methodWherein Y is 1 ,W 1 Representing a non-interleaved parity bit output. The corresponding generator polynomial matrix is:
example 3
This embodiment takes the encoder with 3/4 code rate in the DVB-RCS2 conference as an example to illustrate the effectiveness of the equivalent encoder in the case of deletion. Fig. 3 is a schematic diagram of an equivalent encoder structure in the case of deletion. Whose check output satisfiesFor check Y 1 Obtaining an overall check polynomial matrix by a matrix transformation method as
The component code check polynomial matrix is:
as shown in fig. 5, the flow chart of identifying parity parameters of an equivalent encoder in the case of erasure, the generator polynomial matrix of the component code and the generator polynomial matrix of the entire encoder obtained through the erasure convolutional code identification process represented by steps S33 to S38 are respectively:
the deleting modes corresponding to the even number bits of each component code deleting mode are as follows:
P=[1 0 0]
this is in complete agreement with the deletion pattern and the generator polynomial matrix specified in the protocol.
Example 4
The purpose of this embodiment is to simulate the verification recognition accuracy under the conditions of different code lengths and different bit errors without deletion. Selecting a turbo code of a DVB-RCS protocol, respectively generating a plurality of groups of data according to the frame lengths 220 and 752, and performing Monte Carlo simulation on the data with the error rate of 0-5% and the step length of 1% to obtain an identification result, as shown in FIG. 6. It can be seen that the algorithm can achieve recognition well when the error code is less than 1%.
Claims (1)
1. A method for identifying a dual-input Turbo-like code closed set in a DVB-RCS2 protocol is disclosed, wherein the code rate of the DVB-RCS protocol comprises 1/3,2/3,1/2,2/5,4/5,6/7 and 3/4, and the method is characterized by comprising the following steps:
s1, known receiving sequence is r 1 r 2 …r N N is the length of the received sequence, the length N of the code block and the length k of the information bit are estimated by a matrix transformation method to obtain the code rate of k/N, the code word sequence output mode is obtained according to the code rate, and then the information bit code words A and B and the check bit code word Y are extracted by the output mode 1 ,Y 2 ,W 1 ;
S2, if the code rate is one of 1/3,2/3,1/2 and 2/5, the process goes to S21, and Y is processed 1 Or W 1 Performing check bit identification to obtain the parameters of the core encoder, and entering S3 if the code rate is not any one of 1/3,2/3,1/2 and 2/5;
s21, structural output is [ AB Y]2/3 code rate convolutional code equivalent coder, wherein Y represents Y 1 、W 1 One of them; equivalent encoder checks that Y = AG is satisfied YA ⊕BG YB ,G YA 、G YB Respectively representing generating polynomial matrixes of two equivalent component encoders; the two-component code of the equivalent encoder is CRSC convolutional code, and the system feedback polynomials are made consistent and recorded as h f The generator polynomials of the two equivalent component encoders areh 1 ,h 2 Respectively representing sub-generator polynomials of the two-component encoder; the generator matrix of the equivalent encoder is
S22, solving check matrix H of equivalent encoder by adopting matrix transformation method Y =[h 1 h 2 h f ]And obtaining a generator polynomial matrix G of the equivalent encoder by utilizing the corresponding relation between the check matrix and the generator matrix Y Step S5 is entered;
s3, judging whether the code rate is one of 4/5,6/7 and 3/4, if so, entering S31 to identify the deletion convolutional code; if not, entering S6;
s31, using information bit code words A and B and check bit code word Y according to output mode corresponding to code rate 1 ,W 1 Constructing a convolutional code with a code rate of 2T/2T +1, wherein T is a deleting period;
s32, utilizing a matrix transformation method to solve a check matrix of the 2T/2T +1 convolutional code equivalent encoder
H Y =[h 1 h 2 h 3 h 4 …h 2T h 2T+1 ]
For an equivalent encoder with erasures, the check satisfies Y = AG YA P⊕BG YB And P is a deletion mode, the two sub-codes are deletion convolutional codes obtained by deleting 1/2 code rate convolutional codes, and respective check matrixes are respectively as follows:
H YA =[h 1 h 3 h 4 …h 2T ]
H YB =[h 2 h 3 h 5 …h 2T+1 ]
s33, making the deletion convolutional code check matrix needing to be identified asThen H (x) is taken as H YA 、H YB ,n 0 Is H YA 、H YB The number of neutron generating polynomials and the maximum number of the check matrix polynomials ofThe upper limit of the degree of the source generator polynomial is k = (n) 0 -1) (d + 1) -1, setting the 1/2 code rate source code generating polynomial asα i ,λ i To generate coefficients of a polynomial; construct a code rate of (n) 0 -1)/2(n 0 -1) generating a polynomial matrix G' (x):
a set of possible deletion patterns is constructed, is a binary finite field 2n 0 -a 2-dimensional space;
s34, selecting from S in sequenceAn erasure pattern P is selected to construct an erasure convolutional code C P The generator polynomial matrix of (a) is:
wherein alpha is P =(α P (1),α P (2),...,α P (i),...,α P (n 0 ) A position vector representing the deletion pattern P, α P (i) The ith 1 in the P is shown to be positioned at the position of the P column according to the check relation G P (x)H T (x) =0, yielding the system of linear equations G (α) 0 ,α 1 ,...,α κ ,λ 0 ,λ 1 ,...,λ κ ) T =0, where G is one ((n-1) × 2 (k + 1)) matrix on F;
s35, solving the equation system obtained by the S34 to obtain a non-zero basic solution system omega, and expressing elements in omega asWherein Representing a binary finite field k-dimensional space,F k (x) Representing a k-th order polynomial set; memo The same process is also performed to select the corresponding in ΩRecording and storing the solution with the minimum order and the order thereof;
s36, checking S, and if all possible P in S is calculated, entering step S37; otherwise, returning to the step S34 to continue the calculation;
s37, selecting the solution with the minimum order number in all the deletion modes P as an estimation, wherein the deletion mode corresponding to the solution is the deletion mode P corresponding to the encoder A 、P B To obtain a corresponding erasure code generator polynomial matrix G YA 、G YB ;
S38, from P A Or P B Is checked for an even bit of the erasure pattern P Y From G by YA 、G YB Combining to obtain an equivalent encoder generator polynomial matrix G Y ;
S39, knowing that the input information is X, generating a polynomial matrix of the equivalent encoder subcode is G, wherein X is one of A and B, and G is corresponding G YA 、G YB One, then obtain the cyclic status of CRSC subcode as
If I is the identity matrix, go to step S5;
s4, judging whether the code rate is 2/5 or 3/4, if not, finishing the identification of all parameters of the encoder, and entering the step S5; if yes, the interleaving check output is Y 2 Adopting a decoding error correction identification method to carry out interweaving identification, and if the identification is successful, obtaining an equivalent check generator polynomial matrixDeleting the mode P and the inter-symbol interleaving relation pi; entering step S5; if not, the step S6 is carried out;
s5, outputting coding parameters: the code block length n, the information bit length k and the code rate k/n, and the equivalent check generates a polynomial matrix G Y 、Deleting the mode P and the inter-symbol interleaving relation pi;
and S6, outputting the non-identification result.
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101083512A (en) * | 2006-06-02 | 2007-12-05 | 中兴通讯股份有限公司 | Dual-binary system tailbaiting Turbo code coding method and apparatus |
CN105391455A (en) * | 2015-10-31 | 2016-03-09 | 电子科技大学 | Return-to-zero Turbo code starting point and depth blind identification method |
CN107370566A (en) * | 2017-07-28 | 2017-11-21 | 西安电子科技大学 | A kind of punctured Turbo codes blind-identification method under the conditions of error code |
Family Cites Families (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2000044121A1 (en) * | 1999-01-22 | 2000-07-27 | Hughes Electronics Corporation | Forward error correction scheme for data channels using universal turbo codes |
CA2298919C (en) * | 1999-02-19 | 2006-04-18 | Ntt Mobile Communications Network Inc. | Interleaving and turbo encoding using prime number permutations |
CN1271791C (en) * | 2001-01-18 | 2006-08-23 | 深圳市中兴集成电路设计有限责任公司 | Turbo decoder and its implementing method |
US20020108090A1 (en) * | 2001-02-05 | 2002-08-08 | Cute Ltd. | Blind transport format detection of turbo-coded data |
US7100101B1 (en) * | 2002-11-08 | 2006-08-29 | Xilinx, Inc. | Method and apparatus for concatenated and interleaved turbo product code encoding and decoding |
CN100364301C (en) * | 2003-03-17 | 2008-01-23 | 西南交通大学 | Parallel Turbo coding-decoding method based on block processing for error control of digital communication |
JP4411401B2 (en) * | 2004-06-25 | 2010-02-10 | 学校法人早稲田大学 | Code order conversion method and apparatus, code order conversion table creation apparatus, turbo code encoder and decoder |
US20080016425A1 (en) * | 2006-04-04 | 2008-01-17 | Qualcomm Incorporated | Turbo decoder with symmetric and non-symmetric decoding rates |
CN100488059C (en) * | 2006-04-25 | 2009-05-13 | 华为技术有限公司 | Component coder and coding method, double-output Turbo coder and coding method |
US8385451B2 (en) * | 2006-06-08 | 2013-02-26 | Interdigital Technology Corporation | Method and apparatus for improved spatial temporal turbo channel coding (STTCC) using eigen-beamforming |
CN101154957B (en) * | 2006-09-30 | 2011-02-02 | 华为技术有限公司 | Turbo code interweaver and interweaved address transmission method |
US20080256424A1 (en) * | 2007-04-13 | 2008-10-16 | Broadcom Corporation | Information bit puncturing for turbo coding with parameter selectable rate matching tailored to lower eb/no without degrading bler (block error rate) performance |
CN101237239B (en) * | 2008-03-03 | 2011-11-30 | 黄知涛 | A blind recognition method for deleting cirrocumulus code of (n-1)/n code rate |
CN101753154B (en) * | 2008-12-10 | 2013-03-13 | 电信科学技术研究院 | Turbo code encoder, decoder, encoding method and decoding method |
US8726137B2 (en) * | 2009-02-02 | 2014-05-13 | Telefonaktiebolaget L M Ericsson (Publ) | Encoding and decoding methods for expurgated convolutional codes and convolutional turbo codes |
CN102244553B (en) * | 2010-05-11 | 2014-09-17 | 中国电子科技集团公司第三十六研究所 | Non-return-to-zero Turbo code encoding parameter blind identification method |
CN104009826B (en) * | 2014-06-18 | 2017-04-19 | 西安电子科技大学 | Frequency hopping anti-interference method based on error correction and erasure correction RS-Turbo concatenated codes |
CN104683072A (en) * | 2015-03-26 | 2015-06-03 | 山东大学 | Parameter blind identification method of puncturing turbo code component coder |
CN106059712B (en) * | 2016-06-28 | 2020-02-14 | 西安电子科技大学 | High-error-code arbitrary-code-rate convolutional code coding parameter blind identification method |
EP3301814A1 (en) * | 2016-09-29 | 2018-04-04 | Intel IP Corporation | Message passing decoder for decoding ldpc codes jointly with convolutional or turbo codes |
CN106452678B (en) * | 2016-10-21 | 2017-07-21 | 郑州大学西亚斯国际学院 | A kind of Turbo code puncturing method being distributed based on bit error rate |
CN108933606B (en) * | 2018-08-15 | 2021-07-27 | 电子科技大学 | System convolutional code blind identification method of error-tolerant code |
CN109660265B (en) * | 2018-12-14 | 2021-08-31 | 山东大学 | Self-adaptive dual-binary Turbo code encoding and decoding method based on DVB-RCS standard |
CN110098839B (en) * | 2019-03-18 | 2022-04-22 | 西安电子科技大学 | Blind identification method for non-systematic convolutional code coding parameters under high error code |
-
2019
- 2019-09-27 CN CN201910921587.2A patent/CN110535478B/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101083512A (en) * | 2006-06-02 | 2007-12-05 | 中兴通讯股份有限公司 | Dual-binary system tailbaiting Turbo code coding method and apparatus |
CN105391455A (en) * | 2015-10-31 | 2016-03-09 | 电子科技大学 | Return-to-zero Turbo code starting point and depth blind identification method |
CN107370566A (en) * | 2017-07-28 | 2017-11-21 | 西安电子科技大学 | A kind of punctured Turbo codes blind-identification method under the conditions of error code |
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