CN110534584A - A kind of high efficiency rectifier and its manufacturing method - Google Patents
A kind of high efficiency rectifier and its manufacturing method Download PDFInfo
- Publication number
- CN110534584A CN110534584A CN201910712156.5A CN201910712156A CN110534584A CN 110534584 A CN110534584 A CN 110534584A CN 201910712156 A CN201910712156 A CN 201910712156A CN 110534584 A CN110534584 A CN 110534584A
- Authority
- CN
- China
- Prior art keywords
- area
- trench gate
- layer
- high efficiency
- electrode layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 33
- 230000004888 barrier function Effects 0.000 claims abstract description 48
- 239000000758 substrate Substances 0.000 claims abstract description 37
- 125000006850 spacer group Chemical group 0.000 claims abstract description 22
- 239000000463 material Substances 0.000 claims description 33
- 239000012535 impurity Substances 0.000 claims description 16
- 239000002210 silicon-based material Substances 0.000 claims description 16
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 14
- 238000002955 isolation Methods 0.000 claims description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 8
- 238000002347 injection Methods 0.000 claims description 8
- 239000007924 injection Substances 0.000 claims description 8
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- 238000000137 annealing Methods 0.000 claims description 7
- 229910000676 Si alloy Inorganic materials 0.000 claims description 6
- UGACIEPFGXRWCH-UHFFFAOYSA-N [Si].[Ti] Chemical compound [Si].[Ti] UGACIEPFGXRWCH-UHFFFAOYSA-N 0.000 claims description 5
- 229920005591 polysilicon Polymers 0.000 claims description 5
- 229910021332 silicide Inorganic materials 0.000 claims description 5
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 5
- 239000004065 semiconductor Substances 0.000 claims description 4
- XRZCZVQJHOCRCR-UHFFFAOYSA-N [Si].[Pt] Chemical compound [Si].[Pt] XRZCZVQJHOCRCR-UHFFFAOYSA-N 0.000 claims description 3
- FQNKXXHWTIMQJM-UHFFFAOYSA-N [Si].[Pt].[Ni] Chemical compound [Si].[Pt].[Ni] FQNKXXHWTIMQJM-UHFFFAOYSA-N 0.000 claims description 3
- 239000000796 flavoring agent Substances 0.000 claims description 3
- 235000019634 flavors Nutrition 0.000 claims description 3
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 3
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 3
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 3
- 238000011084 recovery Methods 0.000 abstract description 9
- 238000005516 engineering process Methods 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 9
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 8
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 8
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 6
- 229910052698 phosphorus Inorganic materials 0.000 description 6
- 239000011574 phosphorus Substances 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 229910052785 arsenic Inorganic materials 0.000 description 3
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 3
- 238000011946 reduction process Methods 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 238000012938 design process Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000005457 optimization Methods 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66143—Schottky diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
- H01L29/8725—Schottky diodes of the trench MOS barrier type [TMBS]
Abstract
The invention discloses a kind of high efficiency rectifier and its manufacturing method, high efficiency rectifier includes lower electrode layer, the first conductivity type substrate of heavy doping floor, the first conduction type drift layer, trench gate dielectric area, trench gate fill area, Schottky Barrier Contact area, spacer medium area and upper electrode layer.Manufacturing method step are as follows: 1) prepare the first conductivity type substrate of heavy doping layer；2) the first conduction type drift layer is formed；3) go out groove profile in the first conduction type drift layer surface etch；4) trench gate dielectric area is formed；5) trench gate fill area is formed；6) spacer medium area is formed；7) Schottky Barrier Contact area is formed；8) upper electrode layer is formed；9) lower electrode layer is formed.It is short that the present invention obtains reverse recovery time on the basis of not increasing manufacturing technology steps and manufacturing cost, the small performance of switching loss.
Description
Technical field
The present invention relates to field of semiconductor devices, specifically a kind of high efficiency rectifier and its manufacturing method.
Background technique
Schottky barrier diode (SBD) is the normal power rectifier of mesolow application field, but due to image charge
Caused potential barrier reduces effect, and the levels of leakage of SBD is significantly increased with backward voltage asymptotic breakdown voltage.Trench schottky
Barrier diode, also referred to as trench MOS barrier Schottky (TMBS) rectifier, due to introducing the electric field pinch off of trench MOS structure
Effect makes reverse leakage level be significantly reduced, while extension drift layer electric field is enhanced, to make forward conduction voltage drop
Also it is significantly reduced.But in existing TMBS structure, due to the presence of trench MOS structure, significantly increase barrier capacitance, from
And the reverse recovery time of existing TMBS is longer, switching loss is larger.
Summary of the invention
Present invention aim to address problems of the prior art.
To realize the present invention purpose and the technical solution adopted is that a kind of such, high efficiency rectifier, mainly include lower electricity
Pole layer, the first conductivity type substrate of heavy doping layer, the first conduction type drift layer, trench gate dielectric area, trench gate fill area, Xiao
Te Ji barrier contact area, spacer medium area and upper electrode layer.
The first conductivity type substrate of heavy doping layer is covered on lower electrode layer.
The first conduction type drift layer is covered on heavy doping the first conductivity type substrate layer.
The trench gate dielectric area is U-type groove.
The trench gate dielectric area is covered on the part of the surface on the first conduction type drift layer.
Further, the trench gate dielectric area is made of one or more structural units for repeating and not being connected.
The trench gate fill area is filled in trench gate dielectric area.
Further, the trench gate fill area and upper electrode layer do not contact.
The Schottky Barrier Contact area is covered on the part of the surface on the first conduction type drift layer.
The Schottky Barrier Contact area and trench gate dielectric area are spaced apart.
Further, the Schottky Barrier Contact area is made of one or more structural units for repeating and not being connected.
The medium isolation is completely covered on trench gate fill area.
The upper electrode layer is covered on Schottky Barrier Contact area and medium isolation.
Preferably, the part of the surface in the medium isolation covering groove gate medium area.The upper electrode layer also covers ditch
The part of the surface in slot gate medium area.
Preferably, the medium isolation is completely covered on trench gate dielectric area.
A kind of manufacturing method of high efficiency rectifier, mainly comprises the steps that
1) prepare the first conductivity type substrate of heavy doping layer.
2) the first conduction type drift layer is formed.
Heavy doping the first conductivity type substrate layer and the first conduction type drift layer use semiconductor material, main to wrap
Include silicon and silicon carbide.
3) go out groove profile in the first conduction type drift layer surface etch.
4) trench gate dielectric area is formed.
The material of the trench gate dielectric area is earth silicon material, silicon oxynitride or hafnium oxide.
5) trench gate fill area is formed.
The material of the trench gate fill area is polysilicon.The polycrystalline silicon material passes through original flavor doping way or impurity
The mode of injection after annealing is completed to adulterate.
6) spacer medium area is formed.
7) Schottky Barrier Contact area is formed.
The material in the Schottky Barrier Contact area is Schottky barrier metal or advanced silicide.The advanced silicide
Including titanium silicon, platinum silicon alloy and nickel platinum silicon alloy.
8) upper electrode layer is formed.
9) lower electrode layer is formed.
The solution have the advantages that unquestionable.It is longer for device reverse recovery time, switching loss is larger etc.
Problem, the present invention pass through the optimization of device new structural design and manufacturing process, reach and do not increasing manufacturing technology steps and system
Cause acquisition reverse recovery time on the basis of this short, the small performance of switching loss.(also referred to as with existing trench schottky diode
TMBS) rectifier is compared, and the present invention passes through the optimization of device new structural design and manufacturing process, is reached and is not being increased manufacture work
Acquisition reverse recovery time is short on the basis of skill step and manufacturing cost, the small performance of switching loss.
Detailed description of the invention
Fig. 1 is a kind of 5 structural schematic diagram of embodiment of high efficiency rectifier provided by the invention；
Fig. 2 is a kind of 6 structural schematic diagram of embodiment of high efficiency rectifier provided by the invention；
Fig. 3 is a kind of 7 structural schematic diagram of embodiment of high efficiency rectifier manufacturing method provided by the invention；
Fig. 4 is a kind of 7 structural schematic diagram of embodiment of high efficiency rectifier manufacturing method provided by the invention；
Fig. 5 is a kind of 7 structural schematic diagram of embodiment of high efficiency rectifier manufacturing method provided by the invention；
Fig. 6 is a kind of 7 structural schematic diagram of embodiment of high efficiency rectifier manufacturing method provided by the invention；
Fig. 7 is a kind of 7 structural schematic diagram of embodiment of high efficiency rectifier manufacturing method provided by the invention；
Fig. 8 is a kind of 7 structural schematic diagram of embodiment of high efficiency rectifier manufacturing method provided by the invention；
Fig. 9 is a kind of 7 structural schematic diagram of embodiment of high efficiency rectifier manufacturing method provided by the invention；
In figure: including lower electrode layer 1, the first conductivity type substrate of heavy doping layer 2, the first conduction type drift layer 3, groove
Gate medium area 4, trench gate fill area 5, Schottky Barrier Contact area 6, spacer medium area 7 and upper electrode layer 8.
Specific embodiment
Below with reference to embodiment, the invention will be further described, but should not be construed the above-mentioned subject area of the present invention only
It is limited to following embodiments.Without departing from the idea case in the present invention described above, according to ordinary skill knowledge and used
With means, various replacements and change are made, should all include within the scope of the present invention.
Embodiment 1:
A kind of high efficiency rectifier mainly includes lower electrode layer 1, the first conductivity type substrate of heavy doping layer 2, the first conductive-type
Type drift layer 3, trench gate dielectric area 4, trench gate fill area 5, Schottky Barrier Contact area 6, spacer medium area 7 and upper electrode layer
8。
The first conductivity type substrate of heavy doping layer 2 is covered on lower electrode layer 1.
The first conduction type drift layer 3 is covered on the first conductivity type substrate of heavy doping layer 2.
The trench gate dielectric area 4 is U-type groove.
The trench gate dielectric area 4 is covered on the part of the surface on the first conduction type drift layer 3.
Further, the trench gate dielectric area 4 is made of one or more structural units for repeating and not being connected.
The trench gate fill area 5 is filled in trench gate dielectric area 4.
Further, the trench gate fill area 5 and upper electrode layer 8 do not contact.
The Schottky Barrier Contact area 6 is covered on the part of the surface on the first conduction type drift layer 3.
The Schottky Barrier Contact area 6 and trench gate dielectric area 4 are spaced apart.
Further, the Schottky Barrier Contact area 6 is made of one or more structural units for repeating and not being connected.
The medium isolation 7 is completely covered on trench gate fill area 5.
Further, the part of the surface in the 7 covering groove gate medium area 4 of medium isolation.
The upper electrode layer 8 be covered on the part of the surface of trench gate dielectric area 4, Schottky Barrier Contact area 6 and medium every
On area 7.The upper electrode layer 8 goes back the part of the surface in covering groove gate medium area 4.
Embodiment 2:
A kind of high efficiency rectifier mainly includes lower electrode layer 1, the first conductivity type substrate of heavy doping layer 2, the first conductive-type
Type drift layer 3, trench gate dielectric area 4, trench gate fill area 5, Schottky Barrier Contact area 6, spacer medium area 7 and upper electrode layer
8。
The first conductivity type substrate of heavy doping layer 2 is covered on lower electrode layer 1.
The first conduction type drift layer 3 is covered on the first conductivity type substrate of heavy doping layer 2.
The trench gate dielectric area 4 is U-type groove.
The trench gate dielectric area 4 is covered on the part of the surface on the first conduction type drift layer 3.
Further, the trench gate dielectric area 4 is made of one or more structural units for repeating and not being connected.
The trench gate fill area 5 is filled in trench gate dielectric area 4.
Further, the trench gate fill area 5 and upper electrode layer 8 do not contact.
The Schottky Barrier Contact area 6 is covered on the part of the surface on the first conduction type drift layer 3.
The Schottky Barrier Contact area 6 and trench gate dielectric area 4 are spaced apart.
Further, the Schottky Barrier Contact area 6 is made of one or more structural units for repeating and not being connected.
The medium isolation 7 is completely covered on trench gate fill area 5.
Further, the medium isolation 7 is completely covered on trench gate dielectric area 4.
The upper electrode layer 8 is covered on Schottky Barrier Contact area 6 and medium isolation 7.
Embodiment 3:
A kind of manufacturing method of high efficiency rectifier, mainly comprises the steps that
1) prepare the first conductivity type substrate of heavy doping layer 2.
2) the first conduction type drift layer 3 is formed.
The first conductivity type substrate of heavy doping layer 2 and the first conduction type drift layer 3 use semiconductor material, mainly
Including silicon and silicon carbide.
3) go out groove profile in 3 surface etch of the first conduction type drift layer.
4) trench gate dielectric area 4 is formed.
The material of the trench gate dielectric area 4 is earth silicon material, silicon oxynitride or hafnium oxide.
5) trench gate fill area 5 is formed.
The material of the trench gate fill area 5 is polysilicon.The polycrystalline silicon material passes through original flavor doping way or miscellaneous
The mode of matter injection after annealing is completed to adulterate.
6) spacer medium area 7 is formed.
7) Schottky Barrier Contact area 6 is formed.
The material in the Schottky Barrier Contact area 6 is Schottky barrier metal or advanced silicide.The advanced silication
Object includes titanium silicon, platinum silicon alloy and nickel platinum silicon alloy.
8) upper electrode layer 8 is formed.
9) lower electrode layer 1 is formed.
Embodiment 4:
A kind of production method of high efficiency rectifier, comprising the following steps:
1) choosing the first conduction type is N-type；
2) prepare heavily doped N-type substrate layer 2, heavily doped N-type substrate layer material therefor is selected as monocrystalline silicon；
3) N-type drift layer 3 is formed, N-type drift layer material therefor is selected as monocrystalline silicon；
4) go out groove profile in 3 surface etch of N-type drift layer；
5) U-shaped trench gate dielectric area 4 is formed, gate medium area material selects earth silicon material；
6) trench gate fill area 5 is formed, trench gate fill area material selects polycrystalline silicon material, and polycrystalline silicon material passes through impurity
The mode of injection after annealing is completed to adulterate；
7) spacer medium area 7 is formed, 7 material of spacer medium selects TEOS medium；
8) Schottky Barrier Contact area 6 is formed, Schottky Barrier Contact area material selects titanium silicon；
9) upper electrode layer 8 is formed；
10) lower electrode layer 1 is formed.
A kind of production method for high efficiency rectifier that the present embodiment provides, is not increasing manufacturing technology steps and manufacturing cost
On the basis of can obtain that reverse recovery time is short, the high efficiency rectifier of the small performance of switching loss.
Embodiment 5:
Select the first conduction type for N-type, a kind of high efficiency rectification manufactured using manufacturing method given by embodiment 4
Device, as shown in Figure 1, being filled out including lower electrode layer 1, heavily doped N-type substrate layer 2, N-type drift layer 3, trench gate dielectric area 4, trench gate
Fill area 5, Schottky Barrier Contact area 6, spacer medium area 7 and upper electrode layer 8；
The heavily doped N-type substrate layer 2 is located on lower electrode layer 1, and heavily doped N-type substrate material selects monocrystalline silicon, miscellaneous
Matter selects arsenic, and doping concentration selects about 20 powers, and thickness selects 400-600 microns；
The N-type drift layer 3 is located on heavily doped N-type substrate layer 2, and N-type drift layer selects monocrystalline silicon, impurity selection
Phosphorus, doping concentration select about 15 powers, and thickness selects 4-8 microns；
The U-shaped slot structure in the trench gate dielectric area 4, on the partial region of N-type drift layer 3, gate medium area material
Material selects silica, and the thickness of earth silicon material selects 0.2-0.6 microns in U-type groove structure；
The trench gate fill area 5 is located inside the U-type groove of trench gate dielectric area 4, and the selection of trench gate fill area material is more
Crystal silicon, polycrystalline silicon material complete impurity injection condition in such a way that impurity injects after annealing and select phosphorus impurities and injectant
Measure about 15 powers；
The Schottky Barrier Contact area 6 is located on the partial region of the first conduction type drift layer 3；Schottky barrier
Contact zone 6 is intervally arranged with trench gate dielectric area 4；
The spacer medium area 7 is located on trench gate fill area 5 and trench gate dielectric area 4, the selection of spacer medium material
TEOS medium；
The upper electrode layer 8 is located on Schottky Barrier Contact area 6 and spacer medium area 7；The trench gate fill area 5
It is not contacted with upper electrode layer 8.
The lower electrode layer 1 also needs to carry out reduction process processing to heavily doped N-type substrate layer 2 before formation.
A kind of high efficiency rectifier that the present embodiment provides, can obtain that reverse recovery time is short, the small performance of switching loss.
Embodiment 6:
Select the first conduction type for N-type, a kind of high efficiency rectification manufactured using manufacturing method given by embodiment 4
Device, as shown in Fig. 2, being filled out including lower electrode layer 1, heavily doped N-type substrate layer 2, N-type drift layer 3, trench gate dielectric area 4, trench gate
Fill area 5, Schottky Barrier Contact area 6, spacer medium area 7 and upper electrode layer 8；
The heavily doped N-type substrate layer 2 is located on lower electrode layer 1, and heavily doped N-type substrate material selects monocrystalline silicon, miscellaneous
Matter selects arsenic, and doping concentration selects about 20 powers, and thickness selects 400-600 microns；
The N-type drift layer 3 is located on heavily doped N-type substrate layer 2, and N-type drift layer selects monocrystalline silicon, impurity selection
Phosphorus, doping concentration select about 15 powers, and thickness selects 4-8 microns；
The U-shaped slot structure in the trench gate dielectric area 4, on the partial region of N-type drift layer 3, gate medium area material
Material selects silica, and the thickness of earth silicon material selects 0.2-0.6 microns in U-type groove structure；
The trench gate fill area 5 is located inside the U-type groove of trench gate dielectric area 4, and the selection of trench gate fill area material is more
Crystal silicon, polycrystalline silicon material complete impurity injection condition in such a way that impurity injects after annealing and select phosphorus impurities and injectant
Measure about 15 powers；
The Schottky Barrier Contact area 6 is located on the partial region of the first conduction type drift layer 3；Schottky barrier
Contact zone 6 is intervally arranged with trench gate dielectric area 4；
The spacer medium area 7 is located on trench gate fill area 5 and part of trench gate medium area 4, spacer medium material
Select TEOS medium；
The upper electrode layer 8 be located at Schottky Barrier Contact area 6, spacer medium area 7 and part of trench gate medium area 4 it
On；The trench gate fill area 5 and upper electrode layer 8 do not contact.
The lower electrode layer 1 also needs to carry out reduction process processing to heavily doped N-type substrate layer 2 before formation.
A kind of high efficiency rectifier that the present embodiment provides, can obtain that reverse recovery time is short, the small performance of switching loss.
Embodiment 7:
A kind of production method of high efficiency rectifier, comprising the following steps:
1) select the first conduction type for N-type.
2) prepare heavily doped N-type substrate layer 2, heavily doped N-type substrate material selects monocrystalline silicon, and impurity selects arsenic, adulterates dense
Degree about 20 powers of selection, thickness select 600 microns；
3) as shown in figure 3, forming N-type drift layer 3 on heavily doped N-type substrate layer 2, N-type drift layer selects monocrystalline silicon,
Impurity selects phosphorus, and doping concentration selects about 15 powers, and thickness selects 6 microns；
4) go out multiple groove profiles in 3 surface etch of N-type drift layer, etching depth selects about 3 microns, and groove profile width is divided into two
Class, one type select about 1.5 microns, another kind of about 10 microns of selection or more；
5) U-shaped trench gate dielectric area 4 is formed, gate medium area material selects earth silicon material, thickness selection about 0.45
Micron；
6) trench gate fill area 5 is formed, trench gate fill area material selects polycrystalline silicon material, and polycrystalline silicon material passes through impurity
The mode of injection after annealing completes impurity injection condition selection phosphorus impurities and about 15 power of implantation dosage；As shown in figure 4, this
When relatively narrow a kind of trench fill area be doped polysilicon and fill up, and wider a kind of trench fill area only has side wall to have part to mix
Miscellaneous polysilicon；
7) spacer medium area 7 is formed.7 material of spacer medium selects TEOS medium, and formation process is first to carry out the shallow lake TEOS
Product, thickness about 0.3-1.2um, as shown in Figure 5；It is arranged later according to domain and carries out TEOS etching technics, only wider a kind of ditch
The formation routine TMBS structure of residue TEOS medium on slot (ending groove as the terminal of high efficiency rectifier at this time), such as Fig. 6 institute
Show, also a kind of high efficiency rectifier structure given by formation the invention patent of residue TEOS medium on relatively narrow one kind groove, such as
Shown in Fig. 7.
8) Schottky Barrier Contact area 6 is formed, Schottky Barrier Contact area material selects titanium silicon；
9) upper electrode layer 8 is formed；
10) lower electrode layer 1 is formed.Lower electrode layer 1 also needs to carry out reduction process to heavily doped N-type substrate layer 2 before formation
Processing.
Finally formed a kind of routine TMBS structure including active area and terminal structure is as shown in figure 8, this hair formed
Bright high efficiency rectifier structure is as shown in Figure 9.
A kind of production method for high efficiency rectifier that the present embodiment provides, is not increasing manufacturing technology steps and manufacturing cost
On the basis of can obtain that reverse recovery time is short, the high efficiency rectifier of the small performance of switching loss.
Claims (8)
1. a kind of high efficiency rectifier, which is characterized in that mainly include lower electrode layer (1), heavy doping the first conductivity type substrate layer
(2), the first conduction type drift layer (3), trench gate dielectric area (4), trench gate fill area (5), Schottky Barrier Contact area
(6), spacer medium area (7) and upper electrode layer (8)；
The first conductivity type substrate of heavy doping layer (2) is covered on lower electrode layer (1)；
The first conduction type drift layer (3) is covered on heavy doping the first conductivity type substrate layer (2).
The trench gate dielectric area (4) is U-type groove；
The trench gate dielectric area (4) is covered on the part of the surface on the first conduction type drift layer (3)；
The trench gate fill area (5) is filled in trench gate dielectric area (4)；
The Schottky Barrier Contact area (6) is covered on the part of the surface on the first conduction type drift layer (3)；
The Schottky Barrier Contact area (6) and trench gate dielectric area (4) are spaced apart；
The medium isolation (7) is completely covered on trench gate fill area (5)；
The upper electrode layer (8) is covered on Schottky Barrier Contact area (6) and medium isolation (7).
2. a kind of high efficiency rectifier according to claim 1, it is characterised in that: the trench gate fill area (5) and power on
Pole layer (8) does not contact.
3. a kind of high efficiency rectifier according to claim 1 or 2, it is characterised in that: the medium isolation (7) covers ditch
The part of the surface in slot gate medium area (4)；The upper electrode layer (8) goes back the part of the surface in covering groove gate medium area (4).
4. a kind of high efficiency rectifier according to claim 1, it is characterised in that: the medium isolation (7) is completely covered
On trench gate dielectric area (4).
5. a kind of high efficiency rectifier according to claim 1, it is characterised in that: the trench gate dielectric area (4) is by one
Or multiple repetitions and the structural unit not being connected are constituted.
6. a kind of high efficiency rectifier according to claim 1, it is characterised in that: the Schottky Barrier Contact area (6) by
One or more repeats and the structural unit not being connected is constituted.
7. a kind of manufacturing method of claim 1 to 6 high efficiency rectifier, which is characterized in that mainly comprise the steps that
1) prepare the first conductivity type substrate of heavy doping layer (2)；
2) the first conduction type drift layer (3) is formed；
3) go out groove profile in first conduction type drift layer (3) surface etch；
4) trench gate dielectric area (4) are formed；
5) trench gate fill area (5) are formed；
6) spacer medium area (7) are formed；
7) Schottky Barrier Contact area (6) are formed；
8) upper electrode layer (8) are formed；
9) lower electrode layer (1) is formed.
8. a kind of manufacturing method of high efficiency rectifier according to claim 7, it is characterised in that: the heavy doping first is led
Electric type substrates layer (2) and the first conduction type drift layer (3) use semiconductor material, mainly include silicon and silicon carbide.
The material of the trench gate dielectric area (4) is earth silicon material, silicon oxynitride or hafnium oxide；
The material of the trench gate fill area (5) is polysilicon；The polycrystalline silicon material passes through original flavor doping way or impurity
The mode of injection after annealing is completed to adulterate；
The material of the Schottky Barrier Contact area (6) is Schottky barrier metal or advanced silicide；The advanced silicide
Including titanium silicon, platinum silicon alloy and nickel platinum silicon alloy.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910712156.5A CN110534584A (en) | 2019-08-02 | 2019-08-02 | A kind of high efficiency rectifier and its manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910712156.5A CN110534584A (en) | 2019-08-02 | 2019-08-02 | A kind of high efficiency rectifier and its manufacturing method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110534584A true CN110534584A (en) | 2019-12-03 |
Family
ID=68661350
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910712156.5A Pending CN110534584A (en) | 2019-08-02 | 2019-08-02 | A kind of high efficiency rectifier and its manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110534584A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050191809A1 (en) * | 2004-02-09 | 2005-09-01 | International Rectifier Corp. | Common MOSFET process for plural devices |
| CN209029379U (en) * | 2018-12-10 | 2019-06-25 | 西安电子科技大学 | A kind of novel broad stopband power semiconductor |
-
2019
- 2019-08-02 CN CN201910712156.5A patent/CN110534584A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050191809A1 (en) * | 2004-02-09 | 2005-09-01 | International Rectifier Corp. | Common MOSFET process for plural devices |
| CN209029379U (en) * | 2018-12-10 | 2019-06-25 | 西安电子科技大学 | A kind of novel broad stopband power semiconductor |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6710418B1 (en) | Schottky rectifier with insulation-filled trenches and method of forming the same | |
| JP2004521480A (en) | Trench schottky rectifier | |
| CN103035721B (en) | Super junction device and manufacturing method thereof | |
| CN103035720B (en) | Super junction device and manufacturing method thereof | |
| CN105810754B (en) | A kind of metal-oxide-semiconductor diode with accumulation layer | |
| CN106024894A (en) | Groove gate power MOSFET structure and manufacturing method thereof | |
| CN103474465B (en) | A kind of super-junction MOSFET device and manufacture method thereof | |
| CN104393056B (en) | Accumulating diode | |
| CN203300654U (en) | Oblique-trench Schottky barrier rectifying device | |
| CN103137688B (en) | Semiconductor device with ditch groove metal oxide semiconductor (MOS) structure and manufacture method thereof | |
| CN104518006A (en) | Depletion channel super-barrier rectifier and manufacturing method thereof | |
| CN113066865A (en) | Semiconductor device for reducing switching loss and manufacturing method thereof | |
| CN109037071A (en) | A kind of preparation method of shield grid power device | |
| CN102157377B (en) | Super-junction VDMOS (Vertical Double-diffused Metal Oxide Semiconductor) device and manufacturing method thereof | |
| CN103199119A (en) | Groove schottky semiconductor device with super junction structure and manufacturing method thereof | |
| CN103137689B (en) | A kind of semiconductor device and its manufacture method with superjunction trench MOS structure | |
| CN107818920B (en) | Gate oxide layer structure of shielded gate trench MOSFET and manufacturing method thereof | |
| CN103325846B (en) | A kind of manufacture method of valley gutter Schottky barrier rectification element | |
| CN110534584A (en) | A kind of high efficiency rectifier and its manufacturing method | |
| CN109192780A (en) | A kind of lateral MOSFET device and preparation method thereof | |
| CN114068678A (en) | Super junction trench gate MOSFET device and manufacturing method thereof | |
| CN110610996A (en) | Groove schottky rectifier | |
| CN107204336A (en) | A kind of high efficiency rectifier and its manufacture method | |
| CN106229342A (en) | A kind of metal-oxide-semiconductor diode of many accumulation layers | |
| CN201629337U (en) | Groove type semiconductor rectifier |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20191203 |
|
| WD01 | Invention patent application deemed withdrawn after publication |