CN110534535A - The wiring layer and preparation method thereof for preventing steam from spreading - Google Patents
The wiring layer and preparation method thereof for preventing steam from spreading Download PDFInfo
- Publication number
- CN110534535A CN110534535A CN201910707310.XA CN201910707310A CN110534535A CN 110534535 A CN110534535 A CN 110534535A CN 201910707310 A CN201910707310 A CN 201910707310A CN 110534535 A CN110534535 A CN 110534535A
- Authority
- CN
- China
- Prior art keywords
- via hole
- groove
- functional areas
- wiring layer
- nonfunctional area
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000003892 spreading Methods 0.000 title claims abstract description 19
- 230000007480 spreading Effects 0.000 title claims abstract description 19
- 238000002360 preparation method Methods 0.000 title claims abstract description 15
- 239000000758 substrate Substances 0.000 claims abstract description 50
- 238000000034 method Methods 0.000 claims description 15
- 238000005530 etching Methods 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 6
- 230000008901 benefit Effects 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 10
- 230000008569 process Effects 0.000 description 5
- 238000009826 distribution Methods 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14632—Wafer-level processed structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14687—Wafer level processing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14689—MOS based technologies
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Element Separation (AREA)
Abstract
The present invention provides a kind of wiring layer and preparation method thereof for preventing steam from spreading, the wiring layer for preventing steam from spreading includes an at least functional areas and an at least nonfunctional area, insulating substrate extends to the nonfunctional area from the functional areas, in the nonfunctional area, an at least isolating bar is provided in the insulating substrate, the isolating bar isolatable functional zone nand function area, diffuses to functional areas to avoid the steam of nonfunctional area.The advantage of the invention is that, isolating bar is formed in nonfunctional area, the isolating bar can stop the steam for remaining in nonfunctional area during making wiring layer, make it that can not diffuse to functional areas from nonfunctional area, to avoid the components such as the conducting wire of moisture attacks functional areas, the performance of wiring layer is improved.
Description
Technical field
The present invention relates to integrated circuit fields more particularly to a kind of wiring layers and preparation method thereof for preventing steam from spreading.
Background technique
For imaging sensor etc. has the device of wiring layer, wiring layer generally includes functional areas and non-functional
Area, the function distinguishing are furnished with intensive conducting wire, and the nonfunctional area is then blank area, non-distribution wires or wire density
It is lower.
Figure 1A is the existing side structure schematic diagram for filling the wiring layer before conducting wire, and Figure 1B is existing filling conducting wire
The side structure schematic diagram of wiring layer later.Figure 1A and Figure 1B is please referred to, the wiring layer includes functional areas A and nonfunctional area
B.Insulating substrate 10 extends to the nonfunctional area B from the functional areas A.In the functional areas A, in the insulating substrate 10
It is provided with multiple via holes 11 and groove 12, conducting wire 13 is filled in the via hole 11 and the groove 12；Described non-functional
Area B, in the insulating substrate 10 and not set via hole and groove.
As shown in Figure 1A, when making wiring layer, it is necessary first to etch the formation of insulating substrate 10 in the functional areas A
The via hole 11 and the groove 12, and cleaned.The steam 14 generated in etching technics and cleaning process can enter institute
It states in insulating substrate 10.In the functional areas A, steam 14 can be discharged from the via hole 11 and the groove 12, and described non-
Functional areas B, and the not set via hole 11 and groove 12, then the steam 14 at this can not be discharged, but be left in
In the insulating substrate 10.It please refers to shown in Figure 1B, it is described non-after filling conducting wire 13 in the via hole 11 and the groove 12
Steam 14 at the B of functional areas can be migrated to (as shown in dotted arrow in Figure 1B), and making at the conducting wire 13 of the functional areas A
It is etched at conducting wire 13, influences the performance of wiring layer, and then influence the performance with the device of the wiring layer.
Summary of the invention
The technical problem to be solved by the invention is to provide a kind of wiring layer and preparation method thereof for preventing steam from spreading,
It can be avoided steam and diffuses to functional areas from nonfunctional area, to avoid the components such as the conducting wire of functional areas by moisture attacks, mention
The performance of high wiring layer.
To solve the above-mentioned problems, the present invention provides a kind of wiring layer for preventing steam from spreading, the wiring layer includes
An at least functional areas and at least a nonfunctional area, insulating substrate extend to the nonfunctional area from the functional areas, described non-
Functional areas are provided with an at least isolating bar, the isolating bar isolatable functional zone nand function area, to keep away in the insulating substrate
The steam for exempting from nonfunctional area diffuses to functional areas.
Further, the isolating bar is annular, around the nonfunctional area.
Further, at least a via hole and/or groove are provided in the insulating substrate, isolated material is in the via hole
And/or it is deposited in groove and forms the isolating bar.
Further, in the functional areas, at least a via hole and/or groove are provided in the insulating substrate, described
Conducting wire is provided in via hole and/or groove.
Further, the depth of the groove of the functional areas is identical as the depth of the groove of the nonfunctional area.
Further, positioned at the functional areas the via hole longitudinal cross-section shape be located at nonfunctional area the mistake
The shape of the longitudinal cross-section in hole is identical.
Further, the via hole includes through hole section and slot section, and the diameter of the slot section is greater than the diameter of the through hole section.
The present invention also provides a kind of preparation methods of above-mentioned wiring layer comprising following steps: providing insulating substrate, institute
Stating insulating substrate includes an at least functional areas and an at least nonfunctional area；The graphical insulating substrate, in the nonfunctional area
Form at least a via hole and/or groove；Isolating bar is formed in the via hole and/or groove.
Further, in the graphical insulating substrate the step of, an at least via hole and/or recessed is formed in the functional areas
Slot, in the via hole and/or groove of the nonfunctional area formed isolating bar the step of in, the functional areas via hole and/or
Conducting wire is formed in groove.
Further, include the following steps: the graphical insulation in the method that the nonfunctional area forms an at least via hole
Substrate forms an at least groove in the nonfunctional area；The bottom of the groove is performed etching, the via hole is formed.
It is an advantage of the current invention that forming isolating bar in nonfunctional area, the isolating bar can stop to prepare wiring layer
The steam for remaining in the nonfunctional area in the process makes it that can not diffuse to the functional areas from the nonfunctional area, thus
The components such as the conducting wire of moisture attacks functional areas are avoided, the performance of wiring layer is improved.
Detailed description of the invention
Figure 1A is the existing side structure schematic diagram for filling the wiring layer before conducting wire；
Figure 1B is the side structure schematic diagram of the wiring layer after existing filling conducting wire；
Fig. 2 is the side structure schematic diagram of a specific embodiment of the wiring layer that the present invention prevents steam from spreading；
Fig. 3 is the overlooking structure diagram of the wiring layer for preventing steam from spreading of the embodiment of the invention；
Fig. 4 is the step schematic diagram of a specific embodiment of the preparation method of wiring layer of the present invention；
Fig. 5 A~Fig. 5 D is the process flow chart of a specific embodiment of the preparation method of wiring layer of the present invention.
Specific embodiment
With reference to the accompanying drawing to the specific implementation of the wiring layer provided by the invention for preventing steam from spreading and preparation method thereof
Mode elaborates.
Fig. 2 is the side structure schematic diagram of a specific embodiment of the wiring layer that the present invention prevents steam from spreading, and Fig. 3 is
The overlooking structure diagram of one specific embodiment of the wiring layer that the present invention prevents steam from spreading.Please refer to figs. 2 and 3, institute
Stating wiring layer includes an an at least functional areas A and at least nonfunctional area B.The functional areas A refers to the region with conducting wire, institute
It states nonfunctional area B and refers to the not region of conducting wire or the very small region of wire density.
In this embodiment, it is only painted a functional areas A and nonfunctional area B, the nonfunctional area B does not have
There is conducting wire.In other of the invention specific embodiments, the wiring layer may include two or more functional areas A, two and with
Upper nonfunctional area B, the functional areas A and the nonfunctional area B can the arranged in a crossed manner or nonfunctional area B by the function
Area A is surrounded or the functional areas A is surrounded by the nonfunctional area B, can have density is lower to lead in the nonfunctional area B
Line.
Insulating substrate 20 extends to the nonfunctional area B from the functional areas A.In the nonfunctional area B, in the insulation
An at least isolating bar 21, the 21 isolatable functional zone A nand function area B of isolating bar, to avoid insulation lining are provided in substrate 20
The steam of the nonfunctional area B at bottom 20 diffuses to functional areas A.Enter at the nonfunctional area B during preparing the wiring layer
The insulating substrate 20 in steam 30 stopped by the isolating bar 21 and functional areas A cannot be diffused to, to will not corrode
The conducting wire of functional areas.In this embodiment, the isolating bar 21 is annular shape, around the nonfunctional area B.It is excellent
Selection of land, the isolating bar 21 along the nonfunctional area B edge ring around the nonfunctional area B.21 energy of isolating bar of annular shape
It is enough that the steam at the B of nonfunctional area is avoided to diffuse to functional areas A from the nonfunctional area B to the maximum extent.
Further, at least a via hole and/or groove are provided in the insulating substrate 20, isolated material is in the via hole
And/or it is deposited in groove and forms the isolating bar 21.In this embodiment, it is provided in the insulating substrate 20
The via hole 22 of one annular, isolated material deposit in the via hole of the annular and form the isolating bar 21.In other tools of the present invention
In body embodiment, groove or via hole can also be formed and be formed simultaneously with groove, to enhance the effect of isolation steam.
In the functional areas A, at least a via hole and/or groove are provided in the insulating substrate 20, it is specific real at this
It applies in mode, via hole 24 had both been set in the functional areas A, has been also provided with groove 25.It is provided in the via hole 24 and groove 25
Conducting wire 23.In order to clearly illustrate technical solution of the present invention, it is only symbolically painted position and the distribution of conducting wire 23 in the accompanying drawings,
In practice, the conducting wire 23 can be distributed according to demand.
Further, the via hole 22 of the via hole 24 of the functional areas A and groove 25 and the nonfunctional area B is walked in same technique
It is formed in rapid.Further, since the via hole 24 and the via hole 22 are formed in same processing step, then it is located at the function
The shape phase of the shape of the longitudinal cross-section of the via hole 24 of area A and the longitudinal cross-section of the via hole 22 positioned at nonfunctional area B
Together.
Further, in this embodiment, the via hole 22 includes through hole section 22A and slot section 22B, the slot section
22B is located on the through hole section 22A.The diameter of the slot section 22B is greater than the diameter of the through hole section 22A.
Isolating bar 21 is arranged in nonfunctional area B in the wiring layer that the present invention prevents steam from spreading, and isolating bar 21 can stop institute
The steam diffusion in the B of nonfunctional area is stated, avoids those steam from entering the functional areas A from the nonfunctional area B, so as to keep away
The conducting wire for exempting from the functional areas A is etched.
The present invention also provides a kind of specific embodiments of the preparation method of above-mentioned wiring layer.Fig. 4 is wiring of the present invention
The step schematic diagram of one specific embodiment of the preparation method of layer, Fig. 5 A~Fig. 5 D is the preparation method of wiring layer of the present invention
The process flow chart of one specific embodiment.
Step S40 and Fig. 5 A is please referred to, insulating substrate 500 is provided, the insulating substrate 500 includes an at least functional areas A
An and at least nonfunctional area B.In this embodiment, the insulating substrate 500 includes a functional areas A and a NOT function
It can area B.In other specific embodiments of the invention, the insulating substrate 500 may include two or more functional areas A, two
And the above nonfunctional area B.
Please refer to step S41, the graphical insulating substrate 500, the nonfunctional area B formed an at least via hole and/
Or groove.In this embodiment, the via hole 501 of an annular is formed in the nonfunctional area B.Form the via hole of annular
501 method can are as follows: please refers to Fig. 5 B, the graphical insulating substrate 500 forms at least one annular in the nonfunctional area B
Groove 510, patterned method can be photoetching and etching；Fig. 5 C is please referred to, the bottom of the groove 510 is performed etching,
Form the via hole 501.
Preferably, in this step, at least a via hole and/or groove are formed in the functional areas A.Corresponding wiring layer and
Speech, functional areas A have to form via hole and/or groove, then the present invention is while functional areas A forms via hole and/or groove, In
Nonfunctional area B forms at least a via hole and/or groove, i.e., the via hole of the via hole of functional areas A and/or groove nand function area B and/
Or groove is formed in same processing step.It the advantage is that, in the case where not additional process step, in nonfunctional area
B forms at least a via hole and/or groove.In this embodiment, Fig. 5 B is please referred to, the graphical insulating substrate 500
When, three grooves 511 are also formed in the functional areas A, patterned method can be photoetching and etching；Fig. 5 C is please referred to, to non-
When the bottom of the groove 510 of functional areas B performs etching, also a groove of the functional areas A is performed etching, described
Functional areas A forms via hole 512.
During A forms via hole and/or groove in functional areas, has steam 540 and enter in the insulating substrate 500；
In forming the cleaning process after the via hole and/or groove, also has steam 540 and enter in the insulating substrate 500.Due to
The distribution density of the via hole and groove in insulating substrate 500 at the functional areas A is big, then the insulating substrate 500 at the A of functional areas
In steam 540 can be completely exhausted out from the via hole and groove.Compared to the prior art, the present invention is in the nonfunctional area B
It is also equipped with via hole and/or groove in the insulating substrate 500 at place, steam can also be discharged, can be reduced exhausted at the B of nonfunctional area
Steam 540 in edge substrate 500, but the density of via hole and/or groove in the insulating substrate 500 at the nonfunctional area B
It is small, the steam in insulating substrate 500 can not be completely exhausted out, it is also residual in the insulating substrate 500 at the nonfunctional area B
Stay part steam 540.
Step S42 and Fig. 5 D is please referred to, forms isolating bar 520 and conducting wire 530 in the via hole and/or groove.At this
In specific embodiment, isolating bar 520 is formed in the via hole 501 of the nonfunctional area B, in the via hole 512 of the functional areas A
With formation conducting wire 530 in groove 511.Wherein, the material of the isolating bar 520 can be identical as the material of the conducting wire 530.It is described
Steam remaining in insulating substrate 500 can be isolated in nonfunctional area B by isolating bar 520, i.e., the described isolating bar 520 can stop
Remaining steam 540 in insulating substrate 500, so that it can not diffuse to functional areas A from nonfunctional area B, to avoid function
Conducting wire 530 in area A is by moisture attacks.
In this embodiment, by the conducting wire 530 of the isolating bar 520 of nonfunctional area B and functional areas A in same technique
It is formed in step, in the case where not additional process step, steam is avoided to diffuse to functional areas A from nonfunctional area B.
The above is only a preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art
Member, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications also should be regarded as
Protection scope of the present invention.
Claims (10)
1. a kind of wiring layer for preventing steam from spreading, which is characterized in that the wiring layer includes an at least functional areas and at least one
Nonfunctional area, insulating substrate extend to the nonfunctional area from the functional areas, in the nonfunctional area, in the insulating substrate
It is inside provided with an at least isolating bar, the isolating bar isolatable functional zone nand function area spreads to avoid the steam of nonfunctional area
To functional areas.
2. the wiring layer according to claim 1 for preventing steam from spreading, which is characterized in that the isolating bar is annular,
Around the nonfunctional area.
3. the wiring layer according to claim 1 for preventing steam from spreading, which is characterized in that be arranged in the insulating substrate
There are at least a via hole and/or groove, isolated material deposits in the via hole and/or groove and forms the isolating bar.
4. the wiring layer according to any one of claims 1 to 3 for preventing steam from spreading, which is characterized in that in the function
Energy area, at least a via hole and/or groove are provided in the insulating substrate, is provided with and leads in the via hole and/or groove
Line.
5. the wiring layer according to claim 4 for preventing steam from spreading, which is characterized in that the depth of the groove of the functional areas
It spends identical as the depth of the groove of the nonfunctional area.
6. the wiring layer according to claim 4 for preventing steam from spreading, which is characterized in that described in the functional areas
The shape of the longitudinal cross-section of via hole is identical as the shape of longitudinal cross-section of the via hole of nonfunctional area is located at.
7. it is according to claim 3 prevent steam spread wiring layer, which is characterized in that the via hole include through hole section and
Slot section, the diameter of the slot section are greater than the diameter of the through hole section.
8. a kind of preparation method of the wiring layer as described in claim 1~7 any one, which is characterized in that including walking as follows
It is rapid:
Insulating substrate is provided, the insulating substrate includes an at least functional areas and an at least nonfunctional area；
The graphical insulating substrate forms at least a via hole and/or groove in the nonfunctional area；
Isolating bar is formed in the via hole and/or groove.
9. preparation method according to claim 8, which is characterized in that in the graphical insulating substrate the step of, In
The functional areas form at least a via hole and/or groove, and isolating bar is formed in the via hole and/or groove of the nonfunctional area
In step, conducting wire is formed in the via hole and/or groove of the functional areas.
10. preparation method according to claim 8, which is characterized in that form an at least via hole in the nonfunctional area
Method includes the following steps:
The graphical insulating substrate forms an at least groove in the nonfunctional area；
The bottom of the groove is performed etching, the via hole is formed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910707310.XA CN110534535A (en) | 2019-08-01 | 2019-08-01 | The wiring layer and preparation method thereof for preventing steam from spreading |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910707310.XA CN110534535A (en) | 2019-08-01 | 2019-08-01 | The wiring layer and preparation method thereof for preventing steam from spreading |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110534535A true CN110534535A (en) | 2019-12-03 |
Family
ID=68661649
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910707310.XA Pending CN110534535A (en) | 2019-08-01 | 2019-08-01 | The wiring layer and preparation method thereof for preventing steam from spreading |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110534535A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012099742A (en) * | 2010-11-04 | 2012-05-24 | Sharp Corp | Semiconductor device, method for manufacturing the same, and electronic information device using the same |
| US8987648B2 (en) * | 2010-06-30 | 2015-03-24 | Canon Kabushiki Kaisha | Solid-state imaging apparatus having a sealing portion to reduce water invasion into the plurality of pixels and the peripheral circuit in a first member and a second member and method for manufacturing the solid-state imaging apparatus |
| CN106898580A (en) * | 2015-12-18 | 2017-06-27 | 中芯国际集成电路制造(上海)有限公司 | Chip protection ring, semiconductor chip, semiconductor crystal wafer and method for packing |
-
2019
- 2019-08-01 CN CN201910707310.XA patent/CN110534535A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8987648B2 (en) * | 2010-06-30 | 2015-03-24 | Canon Kabushiki Kaisha | Solid-state imaging apparatus having a sealing portion to reduce water invasion into the plurality of pixels and the peripheral circuit in a first member and a second member and method for manufacturing the solid-state imaging apparatus |
| JP2012099742A (en) * | 2010-11-04 | 2012-05-24 | Sharp Corp | Semiconductor device, method for manufacturing the same, and electronic information device using the same |
| CN106898580A (en) * | 2015-12-18 | 2017-06-27 | 中芯国际集成电路制造(上海)有限公司 | Chip protection ring, semiconductor chip, semiconductor crystal wafer and method for packing |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE112010005236B4 (en) | Backside pseudo plug for 3D integration | |
| CN101930965B (en) | Structure of power grid for semiconductor devices and method of making the same | |
| JP5360648B2 (en) | Method for manufacturing and filling conductive vias and conductive vias so formed | |
| DE102006035645B4 (en) | Method for forming an electrically conductive line in an integrated circuit | |
| CN114078954B (en) | Memory structure and forming method thereof | |
| CN105870069A (en) | Protection structure for chip in cutting process | |
| JP2007251105A (en) | Semiconductor device and its manufacturing method | |
| JP2018032757A (en) | Semiconductor device and manufacturing method for the same | |
| CN110534535A (en) | The wiring layer and preparation method thereof for preventing steam from spreading | |
| JPH0669362A (en) | Semiconductor device | |
| JPH05109708A (en) | Semiconductor device and its manufacture | |
| JP2007294783A (en) | Manufacturing method for semiconductor device, and design supporting system for semiconductor device | |
| US20090098729A1 (en) | Method for manufacturing a semiconductor device | |
| CN1316592C (en) | Method for manufacturing semiconductor device | |
| KR101159692B1 (en) | Semiconductor device and method for forming the same | |
| CN112510004B (en) | Semiconductor packaging structure and manufacturing method thereof | |
| KR100771549B1 (en) | Method for forming metal contact in semiconductor device | |
| US7338899B2 (en) | Method of forming contact plug in semiconductor device | |
| KR101860250B1 (en) | Method for creating contacts in semiconductor substrates | |
| KR100373346B1 (en) | Method for bonding pad in semiconductor device | |
| US20060249775A1 (en) | Semiconductor device with contact and method of fabricating the same | |
| KR100591175B1 (en) | Manufacturing method for metal interconnection structure in semiconductor device | |
| KR100632042B1 (en) | Method for forming metal layer of semiconductor device | |
| JP2004186228A (en) | Method for manufacturing semiconductor device | |
| KR100741587B1 (en) | Dummy pattern placing method for copper metallization |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20191203 |
|
| WD01 | Invention patent application deemed withdrawn after publication |