CN110518013B - Composite diode structure with recovery characteristic and manufacturing method thereof - Google Patents
Composite diode structure with recovery characteristic and manufacturing method thereof Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
- H01L27/0744—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common without components of the field effect type
- H01L27/0788—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common without components of the field effect type comprising combinations of diodes or capacitors or resistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/30—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface
- H01L29/32—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface the imperfections being within the semiconductor body
Abstract
The invention discloses a composite diode structure with ultra-fast recovery characteristic and a manufacturing method thereof, wherein the diode comprises an N + substrate, a metallized cathode positioned on the back surface of the N + substrate and an N-type epitaxial layer positioned on the front surface of the N + substrate; a group of P regions extending into the N-type epitaxial layer are arranged on the N-type epitaxial layer, and the P regions are uniformly distributed on the N-type epitaxial layer of the silicon wafer active region; a defect layer formed in a plasma bombardment mode is arranged on the surface of the N-type epitaxial layer between the adjacent P regions, a layer of Schottky barrier metal is arranged on the P regions and the defect layer, and a metalized anode is arranged on the Schottky barrier metal. The device structure and the manufacturing method thereof are simple and easy to realize, can obtain faster recovery time, reduce the switching power consumption of the device, and can be used for manufacturing the composite diode (MPS) field with the ultra-fast recovery characteristic.
Description
Technical Field
The invention relates to the field of power semiconductor devices, in particular to a composite diode structure with recovery characteristics and a manufacturing method thereof.
Background
In a diode family, a PN junction diode formed by a P-type semiconductor and an N-type semiconductor in contact or a fast recovery diode extending from the P-type semiconductor and a schottky barrier diode formed by a metal and a semiconductor in contact are provided, generally, the PN junction diode can obtain higher withstand voltage with the increase of the thickness of a drift region, but the voltage drop is higher when the device is in forward conduction, and the recovery time of the device in turn-off is longer, so that the device has higher conduction power consumption and switching power consumption. The recovery time of the PN junction diode device can be shortened by introducing the platinum and gold into the deep-level recombination center, but the production line is difficult to be compatible with a heavy metal process, and the manufacturing process becomes complicated. The schottky diode has faster switching speed and lower forward voltage drop, thus having lower conduction power consumption and switching power consumption, but the device withstand voltage is difficult to improve due to the limitation of schottky barrier, and the withstand voltage of the schottky diode does not exceed 200V generally.
Disclosure of Invention
One of the objectives of the present invention is to provide a composite diode structure with recovery characteristics, which solves the problems of the existing device, such as high withstand voltage, further shortened recovery time, increased switching speed, and reduced switching power consumption. This patent said after forming the contact hole, with the contact hole in the P district with adjacent P district between the surface layer silicon of N type epitaxial layer by dry etching remove, still there is the P district of certain degree of depth remaining, form the contact hole of being carved of surface defect layer, later form barrier metal, this kind of structure can further reduce the recovery time of device to further promote switching speed, reduce switch power consumption.
Another object of the present invention is to provide a composite diode structure with recovery characteristics and a method for manufacturing the same, which is compatible with the existing process while realizing the device structure of the present invention.
The technical scheme adopted by the invention for solving the technical problems is as follows:
a composite diode structure with recovery characteristics comprises an N + substrate, a metallized cathode positioned on the back surface of the N + substrate and an N-type epitaxial layer positioned on the front surface of the N + substrate; a group of P regions extending into the N-type epitaxial layer are arranged on the N-type epitaxial layer, and the P regions are uniformly distributed on the N-type epitaxial layer; a defect layer formed in a plasma bombardment mode is arranged on the surface of the N-type epitaxial layer between the adjacent P regions, a layer of Schottky barrier metal is arranged on the P regions and the defect layer, a Schottky barrier junction is arranged between the Schottky barrier metal and the defect layer on the N-type epitaxial layer, and a metalized anode is arranged on the Schottky barrier metal.
Further, the composite diode structure with the recovery characteristic comprises an active region in the middle and terminals located on the periphery of the active region, and the P region is arranged in the active region.
In order to facilitate processing, the surface of the P area is also provided with a defect layer formed by adopting a plasma bombardment mode.
The Schottky barrier metal is made of aluminum, nickel or nickel-platinum alloy, and the metalized anode can be made of the same metal as the Schottky barrier metal or other metals.
The invention also discloses a manufacturing method of the composite diode with the recovery characteristic,
the method comprises the following steps:
1) forming an insulating medium layer on the surface of the N-type epitaxial layer through a thermal oxidation or chemical vapor deposition process;
2) selectively etching a group of doping windows which are uniformly distributed and are mutually spaced on the insulating medium layer of the active region by photoetching and wet etching processes;
3) carrying out P-type impurity doping through a doping window by adopting an ion implantation process, and then carrying out treatment by adopting a heat treatment process, so that a group of P regions extending towards the N-type epitaxial layer are formed on the N-type epitaxial layer, and meanwhile, a P region insulating medium layer which is the same as or different from the insulating medium layer is grown on the surface of the P region by the heat treatment process;
4) removing the P region insulating medium layer on the P region in the active region and the insulating medium layer on the N type epitaxial layer between the adjacent P regions through photoetching and wet etching processes, thereby forming a metal contact hole on the chip;
5) etching a contact hole by adopting a plasma bombardment mode, and simultaneously forming a defect layer on the surface of the N-type epitaxial layer between the P region of the active region and the adjacent P region; or forming a defect layer on the surface of the N-type epitaxial layer between the adjacent P regions of the active region;
6) depositing a layer of aluminum, nickel or nickel-platinum alloy on the defect layer through a sputtering or evaporation process to be used as Schottky barrier metal, and enabling the Schottky barrier metal to be alloyed with the upper side part of the defect layer above the N-type epitaxial layer through heat treatment to form a Schottky barrier junction, wherein a part of the defect layer is reserved on the lower side of the Schottky barrier junction;
7) depositing or evaporating aluminum, titanium, nickel or silver metal on the surface of the chip to form a metallized anode; the metallized anode can be the same metal as the Schottky barrier metal or can be different;
8) and sputtering or evaporating titanium-nickel-silver, nickel-silver or titanium-nickel-vanadium-silver metal on the other surface of the N + substrate opposite to the N-type epitaxial layer to form a metalized cathode.
The invention has the beneficial effects that: after the contact hole is formed, the defect layer is formed on the N-type epitaxial layer between the P region and the adjacent P region in a plasma bombardment mode, and the effect of introducing the defect layer under the Schottky barrier junction is achieved, so that the carrier capture rate of the device during turn-off can be enhanced, the effect of the recovery time of the device is shortened, the recovery speed is improved, the switching speed is further improved, and the power consumption of the switch is reduced. Meanwhile, better depth and distance of the P region can be obtained through depth adjustment to a certain degree, so that the area ratio of the PN junction diode to the Schottky diode is optimized to a certain degree, and shorter recovery time is obtained. For processing convenience, defects can be introduced on the N-type epitaxial layer between the P regions, and simultaneously, a defect layer is also introduced on the P regions. The process method is simple and easy to realize, is compatible with the common MPS diode processing process, and has the advantages of less equipment change and low processing cost.
The invention will be explained in more detail below with reference to the drawings and examples.
Drawings
FIG. 1 is a top view of the present invention.
FIG. 2 is a schematic diagram of processing an insulating dielectric layer on the surface of an N-type epitaxial layer according to the present invention.
Fig. 3 is a schematic diagram of forming a doping window on an insulating dielectric layer according to the present invention.
Fig. 4 is a schematic diagram of forming a P region in an active region according to the present invention.
Fig. 5 is a schematic diagram of the invention after the formation of the etched contact holes.
FIG. 6a is a schematic diagram of forming a surface defect layer on the N-type epitaxial layer between the adjacent P regions of the contact hole according to the present invention.
FIG. 6b is a schematic diagram of a contact hole to be etched having a surface defect layer formed on the contact hole P region and the N-type epitaxial layer between adjacent P regions in the present invention.
Fig. 7a is a schematic view of fig. 6a showing the formation of schottky barrier metal over the etched contact hole.
Fig. 7b is a schematic view of fig. 6b forming a schottky barrier metal over the etched contact hole.
Fig. 7c is an enlarged view of a portion of a in fig. 7 a.
Fig. 7d is a partially enlarged schematic view of B in fig. 7B.
Fig. 8a is a schematic diagram of fig. 7a showing the formation of a metalized anode on the chip surface.
Fig. 8b is a schematic diagram of fig. 7b forming a metalized anode on the chip surface.
Fig. 9a is a schematic diagram of fig. 8a showing the formation of a metallized cathode on the back surface of the chip.
Fig. 9b is a schematic diagram of fig. 8b forming a metalized cathode on the back side of the chip.
Detailed Description
Example 1:
the invention relates to a composite diode structure with recovery characteristics, which is shown in figure 1 and comprises an active region 1 positioned in the middle area of the composite diode structure with recovery characteristics and a terminal region 2 positioned on the periphery of the active region 1.
The specific structure of the composite diode structure with recovery characteristics, as shown in fig. 9a, includes an N + substrate 109, a metallized cathode 108 located on the back side of the N + substrate 109, and an N-type epitaxial layer 100 located on the front side of the N + substrate 109; a group of P regions 103 extending into the N-type epitaxial layer 100 are arranged on the N-type epitaxial layer 100 in the active region 1, and the P regions 103 are uniformly distributed on the N-type epitaxial layer 100; a defect layer 105 formed in a plasma bombardment mode is arranged on the surface of the N-type epitaxial layer 100 between the adjacent P regions 103, a layer of Schottky barrier metal 106 is arranged on the P regions 103 and the defect layer 105, a Schottky barrier junction 111 is arranged between the Schottky barrier metal 106 and the defect layer 105 on the N-type epitaxial layer 100, and a metalized anode 107 is arranged on the Schottky barrier metal 106. The schottky barrier metal 106 is made of aluminum, nickel or nickel-platinum, and the metallization anode 107 may be made of the same metal as the schottky barrier metal 106, or may be made of other metals.
The thickness of the insulating medium layer 101 is 0.2-2.0um, the diameter of each doping window 102 in the active area 1 is 3-30um, the center distance between every two adjacent doping windows 102 in the active area 1 is 8-100um, the diffusion depth of the P area 103 is 2.0-60 um, the etching amount of silicon in an etched contact hole with a surface defect layer is 0.005-5 um, and the thickness of the defect layer 105 is 0.005-5 um; the thickness of the Schottky barrier metal 106 is 0.005-0.5 um, the thickness of the front metallized anode is 3.0-10.0 um, and the thickness of the back metallized cathode is 0.5-3.0 um.
The manufacturing method of the composite diode structure with the recovery characteristic comprises the following steps:
1) forming an insulating medium layer 101, such as silicon oxide, with a thickness of 0.2-2.0um on the surface of the N-type epitaxial layer 100 by thermal oxidation or chemical vapor deposition, as shown in fig. 2;
2) through photoetching and wet etching processes, a group of doping windows 102 which are uniformly distributed and are mutually spaced are selectively etched on an insulating medium layer 101 of an active region 1, the diameter of each doping window 102 is 3-30um, and the center distance between every two adjacent doping windows 102 is 8-100um, as shown in fig. 3; the photoetching and wet etching are common hole-opening technical means in the field, and the general process comprises the following steps of firstly carrying out photoetching treatment, namely coating a layer of photoresist on the insulating medium layer 101, removing the unnecessary photoresist through exposure and development under the shielding of a photoetching plate, then carrying out corrosion removal on the insulating medium layer 101 with the photoresist removed part through a wet etching process and a chemical reagent, thereby forming a group of doping windows 102 on the insulating medium layer 101, and then removing the photoresist on the surface through the chemical reagent, thereby forming the graph shown in figure 3.
3) Carrying out P-type impurity doping through a doping window 102 by adopting an ion implantation process, forming a group of P regions 103 extending into the N-type epitaxial layer 100 on the N-type epitaxial layer 100 by adopting a heat treatment process, wherein the diffusion depth of the P regions 103 is 2.0-60 mu m, and simultaneously introducing gas reacting with silicon in the heat treatment process, so that a P region insulating medium layer 110 which is the same as or different from the insulating medium layer 101 is grown on the surface of the P region 103, and the thickness of the P region insulating medium layer is 0.2-2.0 mu m, for example, a silicon oxide insulating layer is grown on the surface of the P region 103 by adopting dry oxidation or wet oxidation. As shown in fig. 4;
4) removing the P region insulating medium layer 110 on the P region 103 in the active region 1 and the insulating medium layer 101 on the N-type epitaxial layer 100 between the adjacent P regions 103 through photoetching and wet etching processes, thereby forming a metal contact hole 104 on the chip; as shown in fig. 5; the photoetching and wet etching processes are the same as the step 2, and are not repeated again.
5) Shielding the region 103, etching a contact hole 104 by adopting a dry etching process or a similar process in a plasma bombardment mode, and forming a defect layer 105 on the surface of the N-type epitaxial layer 100 between the adjacent P regions 103 in the active region 1; the etching amount of silicon on the surface of the N-type epitaxial layer 100 is 0.005-5 um, that is, the thickness of the defect layer 105 is 0.005-5 um, as shown in FIG. 6 a;
6) a layer of aluminum, nickel or nickel-platinum alloy is deposited on the defect layer 105 through a sputtering or evaporation process to be used as Schottky barrier metal 106, the Schottky barrier metal 106 is alloyed with the upper side part of the defect layer 105 above the N-type epitaxial layer 100 through heat treatment to form a Schottky barrier junction 111, a part of the defect layer 105 is reserved on the lower side of the Schottky barrier junction 111, and the thickness of the Schottky barrier metal 106 is 0.005-0.5 um. As shown in fig. 7a, 7 c.
7) Depositing or evaporating aluminum, titanium, nickel or silver metal on the surface of the chip to form a metallized anode 107; the metallization anode 107 may be the same metal as the schottky barrier metal 106 or may be different; the thickness of the front metallized anode is 3.0-10.0 um, as shown in FIG. 8 a;
8) a metallized cathode 108 is formed on the other side of the N + substrate 109 opposite the N-type epitaxial layer 100 by sputtering or evaporating a metal such as titanium nickel silver, or titanium nickel vanadium silver. The back side metallization cathode thickness is 0.5-3.0 um, as shown in FIG. 9 a.
Example 2:
a composite diode structure with recovery characteristics, as shown in fig. 9b, comprises an N + substrate 109, a metallized cathode 108 on the back side of the N + substrate 109, and an N-type epitaxial layer 100 on the front side of the N + substrate 109; a group of P regions 103 extending into the N-type epitaxial layer 100 are arranged on the N-type epitaxial layer 100 in the active region 1, and the P regions 103 are uniformly distributed on the N-type epitaxial layer 100; a defect layer 105 formed by adopting a plasma bombardment mode is arranged on the lower side of a Schottky barrier junction 111 on the surface of the N-type epitaxial layer 100 between the P region and the adjacent P region 103, a layer of Schottky barrier metal 106 is arranged on the defect layer 105, and a metalized anode 107 is arranged on the Schottky barrier metal 106. The schottky barrier metal 106 is made of aluminum, nickel or nickel-platinum, and the metallization anode 107 may be made of the same metal as the schottky barrier metal 106, or may be made of other metals.
Insulating medium layer 101 thickness is 0.2 ~ 2.0um, and the diameter of doping window 102 is 3 ~ 30um in active area 1, and the interaxial distance of two adjacent doping windows 102 is 8 ~ 100um in the active area 1, and the diffusion depth in P district 103 is 2.0 ~ 60um, and the thickness of defective layer 105 is 0.005 ~ 5um, schottky barrier metal 106 thickness be 0.005 ~ 0.5um, and positive metallized anode thickness is 3.0 ~ 10.0um, and back metallized cathode thickness is 0.5 ~ 3.0 um. The rest is the same as example 1.
The manufacturing method of the composite diode structure with the recovery characteristic comprises the following steps:
1) forming an insulating medium layer 101, such as silicon oxide, with a thickness of 0.2-2.0um on the surface of the N-type epitaxial layer 100 by thermal oxidation or chemical vapor deposition, as shown in fig. 2;
2) through photoetching and wet etching processes, a group of doping windows 102 which are uniformly distributed and are mutually spaced are selectively etched on an insulating medium layer 101 of an active region 1, the diameter of each doping window 102 is 3-30um, and the center distance between every two adjacent doping windows 102 is 8-100um, as shown in fig. 3; the photoetching and wet etching are common hole-opening technical means in the field, and the general process comprises the following steps of firstly carrying out photoetching treatment, namely coating a layer of photoresist on the insulating medium layer 101, removing the unnecessary photoresist through exposure and development under the shielding of a photoetching plate, then carrying out corrosion removal on the insulating medium layer 101 with the photoresist removed part through a wet etching process and a chemical reagent, thereby forming a group of doping windows 102 on the insulating medium layer 101, and then removing the photoresist on the surface through the chemical reagent, thereby forming the graph shown in figure 3.
3) Carrying out P-type impurity doping through a doping window 102 by adopting an ion implantation process, forming a group of P regions 103 extending into the N-type epitaxial layer 100 on the N-type epitaxial layer 100 by adopting a heat treatment process, wherein the diffusion depth of the P regions 103 is 2.0-60 mu m, and simultaneously introducing gas reacting with silicon in the heat treatment process, so that a P region insulating medium layer 110 which is the same as or different from the insulating medium layer 101 is grown on the surface of the P region 103, and the thickness of the P region insulating medium layer is 0.2-2.0 mu m, for example, a silicon oxide insulating layer is grown on the surface of the P region 103 by adopting dry oxidation or wet oxidation. As shown in fig. 4;
4) removing the P region insulating medium layer 110 on the P region 103 in the active region 1 and the insulating medium layer 101 on the N-type epitaxial layer 100 between the adjacent P regions 103 through photoetching and wet etching processes, thereby forming a metal contact hole 104 on the chip; as shown in fig. 5; the photoetching and wet etching processes are the same as the step 2, and are not repeated again.
5) Etching the contact hole 104 by adopting a dry etching process or a similar process in a plasma bombardment mode, and forming a defect layer 105 on the P region 103 of the active region 1 and the surface of the N-type epitaxial layer 100 between the adjacent P regions 103; the etching amount of the silicon on the surface of the N-type epitaxial layer 100 and the surface of the P region 103 is 0.005-5 um, that is, the thickness of the defect layer 105 is 0.005-5 um, as shown in FIG. 6 b;
6) a layer of aluminum, nickel or nickel-platinum alloy is deposited on the defect layer 105 through a sputtering or evaporation process to be used as Schottky barrier metal 106, the Schottky barrier metal 106 is alloyed with the upper side part of the defect layer 105 above the N-type epitaxial layer 100 through heat treatment to form a Schottky barrier junction 111, a part of the defect layer 105 is reserved on the lower side of the Schottky barrier junction, and the thickness of the Schottky barrier metal 106 is 0.005-0.5 um. As shown in fig. 7b, 7 d.
7) Depositing or evaporating aluminum, titanium, nickel or silver metal on the surface of the chip to form a metallized anode 107; the metallization anode 107 may be the same metal as the schottky barrier metal 106 or may be different; the thickness of the front metallized anode is 3.0-10.0 um, as shown in FIG. 8 b;
8) a metallized cathode 108 is formed on the other side of the N + substrate 109 opposite the N-type epitaxial layer 100 by sputtering or evaporating a metal such as titanium nickel silver, or titanium nickel vanadium silver. The back side metallization cathode thickness is 0.5-3.0 um, as shown in FIG. 9 b.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (5)
1. A composite diode structure with recovery characteristics comprising an N + substrate (109), a metallized cathode (108) on the back side of the N + substrate (109) and an N-type epitaxial layer (100) on the front side of the N + substrate (109); the method is characterized in that: a group of P regions (103) extending into the N-type epitaxial layer (100) are arranged on the N-type epitaxial layer (100), and the P regions (103) are uniformly distributed on the N-type epitaxial layer (100); a defect layer (105) formed in a plasma bombardment mode is arranged on the surface of the N-type epitaxial layer (100) between the adjacent P regions (103), a layer of Schottky barrier metal (106) is arranged on the P regions (103) and the defect layer (105), a Schottky barrier junction (111) is arranged between the Schottky barrier metal (106) and the defect layer (105) on the N-type epitaxial layer (100), and a metalized anode (107) is arranged on the Schottky barrier metal (106).
2. A composite diode structure with recovery characteristics according to claim 1, wherein: the composite diode structure with the recovery characteristic comprises an active region (1) in the middle and a terminal region (2) located on the periphery of the active region (1), wherein a P region (103) is arranged in the active region (1).
3. A composite diode structure with recovery characteristics according to claim 1, wherein: the surface of the P area (103) is also provided with a defect layer (105) formed by adopting a plasma bombardment mode.
4. A composite diode structure with recovery characteristics according to claim 1, wherein: the Schottky barrier metal (106) is made of aluminum, nickel or nickel platinum, and the metalized anode (107) can be made of the same metal as the Schottky barrier metal (106) or can be made of other metals.
5. A method for manufacturing a composite diode with recovery characteristics is characterized in that:
the method comprises the following steps: 1) forming an insulating medium layer (101) on the surface of the N-type epitaxial layer (100) through a thermal oxidation or chemical vapor deposition process;
2) selectively etching a group of doping windows (102) which are uniformly distributed and are mutually spaced on the insulating medium layer (101) of the active region (1) by photoetching and wet etching processes;
3) carrying out P-type impurity doping through a doping window (102) by adopting an ion implantation process, and then carrying out treatment through a heat treatment process, thereby forming a group of P regions (103) extending into the N-type epitaxial layer (100) on the N-type epitaxial layer (100), and simultaneously, growing a P region insulating medium layer (110) which is the same as or different from the insulating medium layer (101) on the surface of the P region (103) by adopting the heat treatment process;
4) removing a P region insulating medium layer (110) on a P region (103) in an active region (1) and an insulating medium layer (101) on an N-type epitaxial layer (100) between adjacent P regions (103) through photoetching and wet etching processes, and forming a metal contact hole (104) on a chip;
5) etching the contact hole (104) by adopting a plasma bombardment mode, and forming a defect layer (105) on the surface of the N-type epitaxial layer (100) between the P region (103) of the active region (1) and the adjacent P region (103); or forming a defect layer (105) on the surface of the N-type epitaxial layer (100) between the adjacent P regions (103) of the active region (1);
6) depositing a layer of aluminum, nickel or nickel-platinum alloy as Schottky barrier metal (106) on the defect layer (105) through a sputtering or evaporation process, and alloying the Schottky barrier metal (106) with the upper part of the defect layer (105) above the N-type epitaxial layer (100) through heat treatment to form a Schottky barrier junction (111), wherein a part of the defect layer (105) is reserved on the lower side of the Schottky barrier junction;
7) evaporating aluminum, titanium, nickel or silver metal on the surface of the chip to form a metalized anode (107);
8) and forming a metalized cathode (108) on the other side of the N + substrate (109) opposite to the N-type epitaxial layer (100) by sputtering or evaporating titanium-nickel-silver, nickel-silver or titanium-nickel-vanadium-silver metal.
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