CN110517644A - Capable of suppressing electromagnetic interference display device and display driver circuit - Google Patents
Capable of suppressing electromagnetic interference display device and display driver circuit Download PDFInfo
- Publication number
- CN110517644A CN110517644A CN201810496008.XA CN201810496008A CN110517644A CN 110517644 A CN110517644 A CN 110517644A CN 201810496008 A CN201810496008 A CN 201810496008A CN 110517644 A CN110517644 A CN 110517644A
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- tft
- film transistor
- thin film
- sequence data
- clock signal
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/3433—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices
- G09G3/344—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices based on particles moving in a fluid or in a gas, e.g. electrophoretic devices
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- Engineering & Computer Science (AREA)
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- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The present invention relates to a kind of capable of suppressing electromagnetic interference display device and display driver circuits.Display device includes that substrate, active array, display driver and thin film transistor (TFT) (Thin-Film Transistor, TFT) adjust circuit.Active array is set on substrate, and including multiple data lines, a plurality of gate line and multiple pixels, wherein for data line in a crisscross manner in gate line, pixel is coupled to the staggered place of data line and gate line.Display driver is set on substrate, is generated to sequence data clock signal after responding adjusting to driving data line and/or the signal of gate line.Thin film transistor (TFT) adjusts circuit and is set on substrate and couples display driver.It includes one or more thin film transistor (TFT)s that thin film transistor (TFT), which adjusts circuit, it is to respond default gate bias decaying sequence data clock signal (Serial Data Clock, SDCLK amplitude), to sequence data clock signal after display driver offer adjusting.
Description
Technical field
The present invention relates to field of display devices, and can inhibit electromagnetic interference (Electromagnetic especially with regard to one kind
Interference, EMI) display device and display driver circuit.
Background technique
Electromagnetic interference (Electromagnetic Interference, EMI) refers to the electromagnetic energy pair of electronic signal
Arround element, the influence that generates of device, equipment and biological tissue.Serious electromagnetic interference may cause electronic device event
Barrier, or even endanger the health of user.The electromagnetic interference phenomenon of electronic product is increasingly paid attention in the world at present, and requires
Electronic product must meet certain electromagnetism interference standard before listing.
By taking display device as an example, display device must can just be listed marketing by Electromagnetic Interference Test.However, as display fills
The resolution requirements set are higher and higher, and the transmission rate of display driver transmission data-signal and scanning signal also must be mentioned and then
It rises, the electromagnetic interference phenomenon of display device is caused more to become serious.In view of this, the display technology in need for proposing a kind of improvement,
To reduce the electromagnetic interference of display device.
Summary of the invention
It in order to solve the above-mentioned technical problem, can it is an object of that present invention to provide a kind of display device and display driver circuit
The sequence data clock signal (Serial DataClock, SDCLK) of display driver is supplied to by suitably decaying, effectively
The electromagnetic interference for reducing display device, allows display device that can pass through Electromagnetic Interference Test.
Specifically, the invention discloses a kind of display device, including:
Substrate；
Active array is set on the substrate, which includes multiple data lines, a plurality of gate line and multiple pictures
Element, those data lines in a crisscross manner in those gate lines, those pixels be coupled to those data lines and those gate lines staggeredly
Place；
Display driver is set on the substrate, the display driver to respond adjust after sequence data clock signal,
Generate the signal to drive those data lines and/or those gate lines；And
Thin film transistor (TFT) adjusts circuit, is set on the substrate and couples the display driver, which is adjusted
Circuit includes at least one thin film transistor (TFT), and the amplitude to respond default gate bias decaying sequence data clock signal,
To provide sequence data clock signal after the adjusting to the display driver.
The display device, it includes multiple thin film transistor (TFT)s being arranged in parallel that wherein the thin film transistor (TFT), which adjusts circuit, respectively should
Thin film transistor (TFT) is connected to after the sequence data clock signal and the adjusting between sequence data clock signal, and it is pre- to be controlled by this
If gate bias.
The display device, it includes multiple thin film transistor (TFT)s being arranged in series to be formed that wherein the thin film transistor (TFT), which adjusts circuit,
Thin film transistor (TFT) string, the thin film transistor (TFT) are serially connected with sequence data clock signal after the sequence data clock signal and the adjusting
Between, and it is controlled by the default gate bias.
The display device, wherein the thin film transistor (TFT) adjusts circuit by single thin film transistor (TFT) realization, and the film is brilliant
Body pipe is connected to after the sequence data clock signal and the adjusting between sequence data clock signal, and is controlled by the default gate
Bias.
The display device, wherein further include:
Printed circuit board couples the thin film transistor (TFT) and adjusts circuit, and the printed circuit board is to the thin film transistor (TFT) tune
Economize on electricity road provides the sequence data clock signal.
The display device, wherein further include:
Electronic ink layer is laminated on the active array.
The invention also discloses a kind of display driver circuits, for driving the active array of display device, including:
Display driver is set on substrate, the display driver to respond adjust after sequence data clock signal, produce
Give birth to the signal to drive the active array；And
Thin film transistor (TFT) adjusts circuit, is set on the substrate and couples the display driver, which is adjusted
Circuit includes at least one thin film transistor (TFT), and the amplitude to respond default gate bias decaying sequence data clock signal,
To provide sequence data clock signal after the adjusting to the display driver.
The display driver circuit, it includes multiple thin film transistor (TFT)s being arranged in parallel that wherein the thin film transistor (TFT), which adjusts circuit,
Respectively the thin film transistor (TFT) is connected to after the sequence data clock signal and the adjusting between sequence data clock signal, and is controlled by
The default gate bias.
The display driver circuit, wherein the thin film transistor (TFT) adjust circuit include multiple thin film transistor (TFT)s being arranged in series with
Thin film transistor (TFT) string is formed, which is serially connected with sequence data clock pulse after the sequence data clock signal and the adjusting
Between signal, and it is controlled by the default gate bias.
The display driver circuit, wherein the thin film transistor (TFT) adjusts circuit by single thin film transistor (TFT) realization, this is thin
Film transistor is connected to after the sequence data clock signal and the adjusting between sequence data clock signal, and it is default to be controlled by this
Gate bias.
Detailed description of the invention
Fig. 1 is the block diagram according to the display device of one embodiment of the invention；
Fig. 2 is that the thin film transistor (TFT) of an embodiment according to the present invention adjusts the circuit diagram of circuit；
Fig. 3 is that the thin film transistor (TFT) of another embodiment according to the present invention adjusts the circuit diagram of circuit；
Fig. 4 is that the thin film transistor (TFT) of another embodiment according to the present invention adjusts the circuit diagram of circuit；
Fig. 5 is the sectional view according to the display device of one embodiment of the invention.
Symbol description:
100,500: display device；102: substrate；
104: active array；106: display driver；
108,200,300,400: thin film transistor (TFT) adjusts circuit；110: data line；
112: gate line；114: pixel；
116: printed circuit board；JS: sequence data clock signal；
JS ': sequence data clock signal after adjusting；202,302,402: thin film transistor (TFT)；
PVB: default gate bias；502: electronic ink layer；
506: electric ink unit.
Specific embodiment
To allow features described above and effect of the invention that can illustrate more clearly understandable, special embodiment below, and cooperate
Bright book attached drawing is described in detail below.
Fig. 1 is the block diagram according to the display device 100 of one embodiment of the invention.Display device 100 can be any type
Display, mainly include substrate 102, active array 104, display driver 106 and thin film transistor (TFT) (Thin-Film
Transistor, TFT) circuit 108 is adjusted, display device 100 may also include printed circuit board 116.
Active array 104 is set on substrate 102, and including multiple data lines 110, a plurality of gate line 112 and multiple
Pixel 114.Data line 110 is in a crisscross manner in gate line 112, and wherein pixel 114 is coupled to data line 110 and gate line 112
Staggered place, to form the pixel array for the viewing area for being configured at substrate 102.
Display driver 106 is set on substrate 102, is generated to sequence data clock signal JS ' after responding adjusting
To driving data line 110 and/or the signal of gate line 112.Display driver 106 can be a data driver (data
Driver), the combination of gate pole driver (gate driver), or both.Although Fig. 1 is painted display driver 106 and couples number
According to line 110 as data driver, but should be noted that display driver 106 can also couple gate line 112 and as gate drive
Device, or data line 110 and gate line 112 are coupled simultaneously and the driver common as the two.Compared to active array
104, non-display area shielded on substrate 102 is arranged in display driver 106.
Sequence data clock signal JS ' is sequence data clock signal (Serial Data Clock, SDCLK) after adjusting
Result after JS decaying.Sequence data clock signal JS ' can pass through thin film transistor (TFT) and adjust circuit 108 to generate after adjusting.Such as
Shown in 1st figure, thin film transistor (TFT) adjusts circuit 108 and is set on substrate 102 and couples display driver 106, such as is set to
Non-display area on substrate 102.Thin film transistor (TFT) adjust circuit 108 may include be controlled by default gate bias one or more are thin
Film transistor.Thin film transistor (TFT) adjusts the amplitude work that circuit 108 can respond default gate bias to sequence data clock signal JS
Decaying, to sequence data clock signal JS ' after the offer adjusting of display driver 106.Thin film transistor (TFT) is adjusted in circuit 108
Thin film transistor (TFT) can for example complete in same processing procedure with active array 104.Circuit 108 is adjusted about thin film transistor (TFT)
Circuit details will cooperate the 2nd, 3,4 figures are described.
Sequence data clock signal JS '/sequence data clock signal JS determines the work of display driver 106 after adjusting
Clock pulse.Display driver 106 can generate the data to driving data line 110 according to sequence data clock signal JS ' after adjusting
Signal and/or the gate signal to drive gate line 112.
Through above-mentioned configuration, the electromagnetic interference effect in display device 100 can be effectively suppressed.Furtherly, research is found
Sequence data clock signal JS from display source signal (not being illustrated in figure) is often a high-frequency signal (for example, frequency is about
In 50MHz), if being supplied directly to display driver 106 as work time pulse, sequence data clock signal JS will become electricity
One of main source of magnetic disturbance.Since the amplitude and frequency of electromagnetic interference and electronic signal have the positive correlation of height, thus it is logical
The amplitude for the sequence data clock signal JS that suitably decays is crossed, then by the result after decaying (that is, sequence data clock pulse is believed after adjusting
Number JS ') it is supplied to display driver 106 and uses, it can effectively reduce the electromagnetic interference of display device 100.
According to an aspect of the present invention, display driver 106 and thin film transistor (TFT) adjusting circuit 108 can be considered and be set to
A display driver circuit on the substrate 102 of display device 100.In one embodiment, display driver 106 can be a core
Piece, and thin film transistor (TFT) adjusts circuit 108 and may be coupled in display driver 106 originally to receive sequence data clock signal
The chip pin position of JS.
Printed circuit board 116 couples thin film transistor (TFT) and adjusts circuit 108.Printed circuit board 116 can be to thin film transistor (TFT) tune
Economize on electricity the offer of road 108 sequence data clock signal JS.Printed circuit board can be a flexible print circuit (flexible
Printed circuit, FPC) plate, is transmitted as the signal between electronic component on substrate 102 and external display source signal
Interface.
According to embodiments of the present invention, thin film transistor (TFT) adjusts circuit 108 and can be realized by one or more thin film transistor (TFT)s.Institute
The gate for one or more thin film transistor (TFT)s stated can respond a default gate bias and a conducting resistance (RON) is presented, and thus will
The sequence data clock signal JS received suitably decays to sequence data clock signal JS ' after adjusting.
Illustrate that thin film transistor (TFT) adjusts the different embodiments of circuit below in conjunction with the 2nd, 3,4 figures.But it should be noted that this etc. is real
The not exhaustive property or restrictive of example is applied, in some applications, allows the embodiments such as suitably to modify and/or combine this.
Fig. 2 is that the thin film transistor (TFT) of an embodiment according to the present invention adjusts the circuit diagram of circuit 200.In this embodiment,
It includes single a thin film transistor (TFT) 202 that thin film transistor (TFT), which adjusts circuit 200,.Thin film transistor (TFT) 202 is connected to sequence data clock pulse letter
Number JS and after adjusting between sequence data clock signal JS ', and it is controlled by default gate bias PVB.For example, film is brilliant
One end (such as drain/source) of body pipe 202 may be coupled to printed circuit board 116 to receive sequence data clock signal JS, another
Display driver 106 is coupled to if end (such as source/drain) to provide it sequence data clock signal JS ' after adjusting.
The size of default gate bias PVB can be formulated for allowing thin film transistor (TFT) 202 that a conducting resistance is presented.Therefore,
Compared to sequence data clock signal JS, the amplitude of sequence data clock signal JS ' will be attenuated after adjusting.Sequence number after adjusting
Voltage is determined according to the chip that the amplitude attenuation degree of clock signal JS ' may depend on display driver 106.For example, it adjusts
The amplitude attenuation degree of sequence data clock signal JS ' can be required can to make declining for sequence data clock signal JS ' after adjusting afterwards
The identification of driver 106 can be shown by subtracting rear level still, and the sequence data clock signal JS before level transform characteristics and adjusting is still
Remain consistent.In other words, thin film transistor (TFT), which adjusts circuit 200, can't change the display operation feature of display driver 106.
The thin film transistor (TFT) that Fig. 3 is painted another embodiment according to the present invention adjusts the circuit diagram of circuit 300.In this embodiment
In, it includes multiple thin film transistor (TFT)s 302 being arranged in parallel that thin film transistor (TFT), which adjusts circuit 300, and each thin film transistor (TFT) 302 can
After being connected to sequence data clock signal JS and adjusting between sequence data clock signal JS ', and it is controlled by default gate bias
PVB。
For example, wherein one end (such as drain/source) of each thin film transistor (TFT) 302 may be coupled to printed circuit board
116 to receive sequence data clock signal JS, and display driver 106 is coupled to if the other end (such as source/drain) to aobvious
Show that driver 106 provides sequence data clock signal JS ' after adjusting.Default gate bias PVB is applied to the grade thin film transistor (TFT)s
302 control terminal (such as gate), to control the equivalent conducting resistance that thin film transistor (TFT) adjusts circuit 300.
Fig. 4 is that the thin film transistor (TFT) of another embodiment according to the present invention adjusts the circuit diagram of circuit 400.In this embodiment
In, it includes multiple thin film transistor (TFT)s 402 that thin film transistor (TFT), which adjusts circuit 400, which is to be arranged in series with shape
At thin film transistor (TFT) string 404.Sequence data clock pulse after thin film transistor (TFT) string 404 is connected to sequence data clock signal JS and adjusts
Between signal JS ', and it is controlled by default gate bias PVB.
For example, two thin film transistor (TFT)s 402 of the initial and end in thin film transistor (TFT) string 404 can be respectively coupled to printing electricity
Road plate 116 and display driver 106 to receive sequence data clock signal JS from printed circuit board 116, and drive display
Sequence data clock signal JS ' after the output of device 106 is adjusted.Default gate bias PVB can be applied to the grade thin film transistor (TFT)s 402
Control terminal (such as gate), to control the equivalent conducting resistance of thin film transistor (TFT) string 404.
The sectional view of Fig. 5 display device 500 according to an embodiment of the invention.The configuration of display device 500 is such as the 1st figure
In display device 100, but further include electronic ink layer 502 using as an electric paper display.Electronic ink layer 502 can be laminated on
On active array 104.Electronic ink layer 502 includes multiple electric ink units 506.Each electric ink unit 506 can have
There is bistable state/multistable step response, so that image can continue to retain after write.For example, electric ink unit 506 can be by
Liquid with charged particle is realized.Apply electric field through to electric ink unit 506, charged particle can be made to move in a liquid
It is dynamic.Charged particle can have different colors, such as black and white.Therefore, by driving active array 104 in electrode with
Controlling, there is the charged particle of color to be shown to float, and electronic ink layer 502 can be made to show the image to be presented.
According to embodiments of the present invention, it is proposed that a kind of capable of suppressing electromagnetic interference display device and display driver circuit.It grinds
Study carefully discovery, the conventionally used sequence data clock signal in display device is to form one of main source of electromagnetic interference.
Therefore, it is supplied to the sequence data clock signal of display driver by suitably decaying, electromagnetic interference can be effectively reduced, allow
Display device can pass through Electromagnetic Interference Test.In addition, in embodiments of the present invention, the decaying of sequence data clock signal is to penetrate
Thin-film transistor element is realized.Thin film transistor (TFT) may be disposed on the substrate of display device and as variable resistance to weaken sequence
The intensity of column data clock signal.Through this mode, when display device can not will be not required to weight by Electromagnetic Interference Test, developer
New design circuit board, and the default gate bias for being provided to thin film transistor (TFT) need to be only adjusted, electromagnetic interference problem can be improved.And
Because the signal strength of sequence data clock signal is appropriately attenuated, power consumption when display device operation also can reduce.
Claims (10)
1. a kind of display device characterized by comprising
Substrate；
Active array is set on the substrate, which includes multiple data lines, a plurality of gate line and multiple pixels,
For those data lines in a crisscross manner in those gate lines, those pixels are coupled to the staggered place of those data lines Yu those gate lines；
Display driver is set on the substrate, the display driver to respond adjust after sequence data clock signal, generate
To drive the signal of those data lines and/or those gate lines；And
Thin film transistor (TFT) adjusts circuit, is set on the substrate and couples the display driver, which adjusts circuit
Including at least one thin film transistor (TFT), and the amplitude to respond default gate bias decaying sequence data clock signal, with right
The display driver provides sequence data clock signal after the adjusting.
2. display device as described in claim 1, which is characterized in that it includes that multiple parallel connections are set that the thin film transistor (TFT), which adjusts circuit,
The thin film transistor (TFT) set, sequence data clock pulse is believed after respectively the thin film transistor (TFT) is connected to the sequence data clock signal and the adjusting
Between number, and it is controlled by the default gate bias.
3. display device as described in claim 1, which is characterized in that it includes that multiple series connection are set that the thin film transistor (TFT), which adjusts circuit,
For the thin film transistor (TFT) set to form thin film transistor (TFT) string, which is serially connected with the sequence data clock signal and the tune
After section between sequence data clock signal, and it is controlled by the default gate bias.
4. display device as described in claim 1, which is characterized in that the thin film transistor (TFT) adjusts circuit by the single film
Transistor realizes, the thin film transistor (TFT) be connected to after the sequence data clock signal and the adjusting sequence data clock signal it
Between, and it is controlled by the default gate bias.
5. display device as described in claim 1, which is characterized in that further include:
Printed circuit board couples the thin film transistor (TFT) and adjusts circuit, and the printed circuit board is to adjust electricity to the thin film transistor (TFT)
Road provides the sequence data clock signal.
6. display device as described in claim 1, which is characterized in that further include:
Electronic ink layer is laminated on the active array.
7. a kind of display driver circuit, for driving the active array of display device characterized by comprising
Display driver is set on substrate, the display driver to respond adjust after sequence data clock signal, generate use
To drive the signal of the active array；And
Thin film transistor (TFT) adjusts circuit, is set on the substrate and couples the display driver, which adjusts circuit
Including at least one thin film transistor (TFT), and the amplitude to respond default gate bias decaying sequence data clock signal, with right
The display driver provides sequence data clock signal after the adjusting.
8. display driver circuit as claimed in claim 7, which is characterized in that the thin film transistor (TFT) adjust circuit include it is multiple simultaneously
Join the thin film transistor (TFT) of setting, when respectively the thin film transistor (TFT) is connected to sequence data after the sequence data clock signal and the adjusting
Between arteries and veins signal, and it is controlled by the default gate bias.
9. display driver circuit as claimed in claim 7, which is characterized in that it includes multiple strings that the thin film transistor (TFT), which adjusts circuit,
Join setting thin film transistor (TFT) to form thin film transistor (TFT) string, the thin film transistor (TFT) be serially connected with the sequence data clock signal and
After the adjusting between sequence data clock signal, and it is controlled by the default gate bias.
10. display driver circuit as claimed in claim 7, which is characterized in that the thin film transistor (TFT) adjusts circuit by single
The thin film transistor (TFT) realizes that sequence data clock pulse is believed after the thin film transistor (TFT) is connected to the sequence data clock signal and the adjusting
Between number, and it is controlled by the default gate bias.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810496008.XA CN110517644B (en) | 2018-05-22 | 2018-05-22 | Display device capable of suppressing electromagnetic interference and display driving circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810496008.XA CN110517644B (en) | 2018-05-22 | 2018-05-22 | Display device capable of suppressing electromagnetic interference and display driving circuit |
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| CN110517644A true CN110517644A (en) | 2019-11-29 |
| CN110517644B CN110517644B (en) | 2021-01-26 |
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| CN201810496008.XA Active CN110517644B (en) | 2018-05-22 | 2018-05-22 | Display device capable of suppressing electromagnetic interference and display driving circuit |
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Cited By (1)
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| CN114420064A (en) * | 2022-02-17 | 2022-04-29 | 北京京东方光电科技有限公司 | Electronic paper driving circuit, method, electronic paper display panel and electronic paper display |
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| Publication number | Publication date |
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| CN110517644B (en) | 2021-01-26 |
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