CN110517642A - A kind of array substrate and display panel - Google Patents
A kind of array substrate and display panel Download PDFInfo
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- CN110517642A CN110517642A CN201910750836.6A CN201910750836A CN110517642A CN 110517642 A CN110517642 A CN 110517642A CN 201910750836 A CN201910750836 A CN 201910750836A CN 110517642 A CN110517642 A CN 110517642A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3266—Details of drivers for scan electrodes
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- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
The application provides a kind of array substrate and display panel, pixel circuit, first grid driving circuit and second grid driving circuit are prepared in array substrate, by the way that voltage holding circuit is arranged in pixel circuit, scanning signal for exporting in first grid driving circuit maintains the low potential of the scanning signal constant when being low potential, the oscillation for eliminating scanning signal, to reduce the electric current and luminance oscillations of light-emitting component.
Description
Technical field
This application involves field of display technology more particularly to a kind of array substrate and display panels.
Background technique
The driving of the horizontal scanning line of AMOLED display panel at present is realized by external integrated circuit, external integrated
Circuit can control the unlatching step by step of horizontal scanning lines at different levels, and use GOA (Gate Driver on Array) method, can incite somebody to action
Line-scanning drive circuit is integrated in panel substrate, can reduce the quantity of external IC, to reduce display panel
Production cost, and can be realized the narrow frame of display device.
When as shown in Figure 1 and Figure 2, using GOA mode driving panel, due to the thin film transistor (TFT) T3 of output end in GOA circuit
Size is larger, the source electrode incoming clock signal CK of the thin film transistor (TFT) T3, when the current potential of the clock signal CK is by low potential
When being upgraded to high potential, it will cause the lifting of Q point current potential, the thin film transistor (TFT) T3 caused accidentally to open, the scanning letter of GOA circuit output
Number WR (n) is accidentally upgraded to high potential, so that the scanning signal WR (n) generates voltage oscillation.Again due to the scanning signal
WR (n) is connected to the switching thin-film transistor T1 of pixel circuit, and the voltage oscillation of the scanning signal WR (n) will lead to described
The grid of the driving thin film transistor (TFT) T2 of pixel circuit causes connection (feed through) effect, i.e., causes to go here and there to G point voltage
It disturbs, thus the electric current of the driving thin film transistor (TFT) T2 can generate moment oscillation, since light-emitting element E is by the driving film
Transistor T2 current source is driven, therefore the electric current of the light-emitting element E and brightness can also be vibrated, such as X in Fig. 2
Shown in region.
Therefore, the prior art is defective, needs to improve.
Summary of the invention
The application provides a kind of array substrate and display panel, can alleviate the member that shines caused by even being eliminated clock signal
Oscillation problem occurs for the electric current of part and brightness.
To solve the above problems, technical solution provided by the present application is as follows:
The application provides a kind of array substrate, pixel circuit and the corresponding non-display area including corresponding viewing area
The first scan drive circuit and the second scan drive circuit being arranged, the pixel circuit include switching circuit, voltage maintenance electricity
Road, driving element and light-emitting component；
First scan drive circuit includes output circuit, and the output circuit is coupled to first node and incoming clock
Signal, first segment point control signal and the clock signal for being exported according to the first node export scanning signal；Institute
The second scan drive circuit is stated for exporting LED control signal；
The switching circuit incoming data signal, and connect with the output circuit of first scan drive circuit
It connects, for controlling the input of the data-signal according to the scanning signal；
The driving element is connect with the switching circuit, and accesses high voltage signal, for according to the scanning signal
The light-emitting component is driven to shine with the data-signal；Wherein,
The voltage holding circuit accesses constant pressure low potential, and is connected in parallel the switching circuit and the first scanning drive
Dynamic circuit, the input terminal of the voltage holding circuit are connected to the output end of second scan drive circuit, the voltage dimension
Circuit is held for maintaining the low potential of the scanning signal when the scanning signal that the output circuit exports is low potential
It is constant.
In the array substrate of the application, the switching circuit includes first film transistor, the first film crystal
The grid of pipe is connect with the output end of the output circuit, and the source electrode of the first film transistor accesses the data-signal,
The drain electrode of the first film transistor is connect with the driving element.
In the array substrate of the application, the driving element includes the second thin film transistor (TFT), second film crystal
The grid of pipe is connect with the drain electrode of the first film transistor, and the source electrode of second thin film transistor (TFT) accesses the high voltage
The drain electrode of signal, second thin film transistor (TFT) is connect with the first electrode of the light-emitting component, and the second of the light-emitting component
Electrode accesses common ground signal.
In the array substrate of the application, the pixel circuit further includes storage capacitance, the first pole of the storage capacitance
The gate connected in parallel of plate and second thin film transistor (TFT) is connected to the drain electrode of the first film transistor, the storage capacitance
The drain electrode of second pole plate and second thin film transistor (TFT) is connected in parallel to the first electrode of the light-emitting component.
In the array substrate of the application, the voltage holding circuit includes third thin film transistor (TFT), the third film
The grid of transistor connects the output end of second scan drive circuit, described in the source electrode access of the third thin film transistor (TFT)
Constant pressure low potential, the drain electrode of the third thin film transistor (TFT) are connected in parallel the output end of the output circuit and described first thin
The grid of film transistor.
In the array substrate of the application, the output circuit includes the 4th thin film transistor (TFT), the 4th film crystal
The grid of pipe is coupled to the first node, and the source electrode of the 4th thin film transistor (TFT) is electrically connected at the clock signal, institute
The drain electrode for stating the 4th thin film transistor (TFT) is connected to the output end of the output circuit.
It is described when the scanning signal of output circuit output is high potential in the array substrate of the application
The LED control signal of second scan drive circuit output is low potential, and the voltage holding circuit is closed, the switch
Circuit conducting, the data-signal are input to the driving element；
When the scanning signal of output circuit output is low potential, the second scan drive circuit output
The LED control signal rises to high potential, the voltage holding circuit conducting, and the switching circuit is closed, and the voltage maintains
Circuit is for maintaining the low potential of the scanning signal constant.
In the array substrate of the application, the pulse width of the LED control signal is greater than the pulse of the scanning signal
Width.
In the array substrate of the application, the pixel circuit further includes compensation circuit, the input terminal of the compensation circuit
The output end of second scan drive circuit is accessed, the output end of the compensation circuit is connected to the driving element, described
LED control signal is for controlling the compensation circuit.
The application also provides a kind of display panel, including array substrate as described above, and is prepared in the array base
Organic luminous layer on plate.
The application's has the beneficial effect that compared to existing display panel, array substrate provided by the present application and display surface
Plate even is eliminated the electricity that clock signal causes light-emitting component to alleviate by the way that voltage holding circuit is arranged in pixel circuit
Oscillation problem occurs for stream and brightness.That is, will cause the lift of Q point current potential when the current potential of clock signal is upgraded to high potential by low potential
It rises, and the thin film transistor (TFT) T4 of output circuit is caused accidentally to open, and the scanning signal of gate driving circuit output at this time needs to maintain
In low potential, the application can guarantee that gate driving circuit is defeated by voltage holding circuit and its constant pressure low-potential signal of access
Scanning signal out does not vibrate when being low potential, therefore can be avoided clock signal and cause crosstalk to pixel circuit G point.
Detailed description of the invention
It, below will be to embodiment or the prior art in order to illustrate more clearly of embodiment or technical solution in the prior art
Attached drawing needed in description is briefly described, it should be apparent that, the accompanying drawings in the following description is only some of application
Embodiment for those of ordinary skill in the art without creative efforts, can also be attached according to these
Figure obtains other attached drawings.
Fig. 1 is the scan drive circuit of the array substrate of the prior art and the partial circuit diagram of pixel circuit；
Fig. 2 is the scan drive circuit of the array substrate of the prior art and the timing diagram of pixel circuit；
Fig. 3 is the structural schematic diagram of array substrate provided by the embodiments of the present application；
Fig. 4 is the scan drive circuit of array substrate provided by the embodiments of the present application and the partial circuit diagram of pixel circuit；
Fig. 5 is the scan drive circuit of array substrate provided by the embodiments of the present application and the timing diagram of pixel circuit.
Specific embodiment
The explanation of following embodiment is referred to the additional illustration, the particular implementation that can be used to implement to illustrate the application
Example.The direction term that the application is previously mentioned, such as [on], [under], [preceding], [rear], [left side], [right side], [interior], [outer], [side]
Deng being only the direction with reference to annexed drawings.Therefore, the direction term used be to illustrate and understand the application, rather than to
Limit the application.The similar unit of structure is with being given the same reference numerals in the figure.
The application is directed to existing display panel, and there are the electric currents of light-emitting component caused by clock signal and brightness to shake
The technical issues of swinging, the present embodiment are able to solve the defect.
Whether the pixel circuit in OLED display generally uses matrix driving mode, draw according in each pixel unit
Enter switching component and is divided into active matrix (Active Matrix) driving and passive matrix (Passive Matrix) driving.
AMOLED is integrated with a cluster film transistor and storage capacitance in the pixel circuit of each pixel, by film crystal
The drive control of pipe and storage capacitance realizes the control to the electric current for flowing through OLED, so that OLED be made to shine as needed.
As shown in figure 3, being the structural schematic diagram of array substrate provided by the embodiments of the present application.The array substrate includes pair
The pixel circuit of viewing area 10, and the scan drive circuit 11 of 10 periphery setting of the corresponding viewing area are answered, is located at described aobvious
Show that the side in area 10 is provided with multiple binding terminals 12, the scan drive circuit 11 is connect with the binding terminal 12.It is described
Array substrate further includes the multi-strip scanning line 13 for connecting the pixel circuit Yu the scan drive circuit 11.The display
Include the pixel region 101 of array distribution in area 10, is correspondingly arranged the pixel circuit in each pixel region 101.
In the present embodiment, the scan drive circuit 11 includes the first scan drive circuit 111 and the second turntable driving
Circuit 112, and first scan drive circuit 111 and second scan drive circuit 112 are respectively arranged at the display
The two sides in area 10, wherein further include in the pixel circuit compensation circuit (not shown), first scan drive circuit 111
For providing scanning signal, the letter of light emitting control needed for second scan drive circuit 112 is used to provide the described compensation circuit
Number.
As shown in figure 4, for the scan drive circuit of array substrate provided by the embodiments of the present application and the part of pixel circuit
Circuit diagram.Wherein, it is illustrated by taking n-th grade of gate driving circuit as an example.First scan drive circuit 111 includes output electricity
Road 30, the output circuit 30 are coupled to first node Q and incoming clock signal CK, for being exported according to the first node Q
First segment point control signal and the clock signal CK output scanning signal WR (n)；First scan drive circuit 111 is also
Including other custom circuits, details are not described herein again.
The pixel circuit P includes switching circuit 20, voltage holding circuit 21, driving element 22 and light-emitting component 23.
The 20 incoming data signal D of switching circuit, and the switching circuit 20 and first scan drive circuit 111 is described
The output end M connection of output circuit 30, for controlling the input of the data-signal D according to the scanning signal WR (n).
Specifically, the switching circuit 20 includes first film transistor T1, the grid of the first film transistor T1
It is connect with the output end M of the output circuit 30, the source electrode of the first film transistor T1 accesses the data-signal D, institute
The drain electrode for stating first film transistor T1 is connect with the driving element 22.
The driving element 22 is connect with the switching circuit 20, and accesses high voltage signal VDD, for sweeping according to
Retouching signal WR (n) and the data-signal D drives the light-emitting component 23 to shine.
Specifically, the driving element 22 includes the second thin film transistor (TFT) T2, the grid of the second thin film transistor (TFT) T2
It is connect with the drain electrode of the first film transistor T 1, the source electrode of the second thin film transistor (TFT) T2 accesses the high voltage letter
Number VDD, the drain electrode of the second thin film transistor (TFT) T2 are connect with the first electrode of the light-emitting component 23, the light-emitting component 23
Second electrode access common ground signal VSS.Wherein, the light-emitting component 23 can be Organic Light Emitting Diode E, described the
One electrode can be anode, and the second electrode can be cathode.
The voltage holding circuit 21 accesses constant pressure low potential VGL, and is connected in parallel the switching circuit 20 and described the
One scan drive circuit 111, the input terminal of the voltage holding circuit 21 are connected to the defeated of second scan drive circuit 112
Outlet M ', second scan drive circuit 112 are used for exporting LED control signal EM (n), the voltage holding circuit 21
The low of the scanning signal WR (n) is maintained when the scanning signal WR (n) exported in the output circuit 30 is low potential
Current potential is constant.
Specifically, the voltage holding circuit 21 includes third thin film transistor (TFT) T3, the third thin film transistor (TFT) T3's
Grid connects described in the source electrode access of the output end M ', the third thin film transistor (TFT) T3 of second scan drive circuit 112
The drain electrode of constant pressure low potential VGL, the third thin film transistor (TFT) T3 are connected in parallel output end M and the institute of the output circuit 30
State the grid of first film transistor T1.
The pixel circuit P further includes storage capacitance C, and the first pole plate of the storage capacitance C and second film are brilliant
The gate connected in parallel of body pipe T2 is connected to the drain electrode of the first film transistor T1, the second pole plate of the storage capacitance C and institute
The drain electrode for stating the second thin film transistor (TFT) T2 is connected in parallel to the first electrode of the light-emitting component 23.
The output circuit 30 includes the 4th thin film transistor (TFT) T4, and the grid of the 4th thin film transistor (TFT) T4 is coupled to institute
First node Q is stated, the source electrode of the 4th thin film transistor (TFT) T4 is electrically connected at the clock signal CK, and the 4th film is brilliant
The drain electrode of body pipe T4 is connected to the output end M of the output circuit 30.
Wherein, the scanning signal WR (n) is the luminous control as caused by first scan drive circuit 111
Signal EM (n) processed is while the pixel circuit provided by the present application as caused by second scan drive circuit 112
Suitable for being provided with the array substrate of compensation circuit, the input terminal access of the compensation circuit (not shown) second scanning is driven
The output end M ' of dynamic circuit 112, the output end of the compensation circuit are connected to the driving element 22, the LED control signal
EM (n) is also signal required for the compensation circuit, and the LED control signal EM (n) is for controlling the compensation circuit.
As shown in connection with fig. 5, for array substrate provided by the embodiments of the present application scan drive circuit and pixel circuit when
Sequence figure.When the scanning signal WR (n) of the output circuit 30 output is high potential VGH, the second turntable driving electricity
The LED control signal EM (n) that road 112 exports is low potential VGL, and the voltage holding circuit 21 is closed, the switch electricity
Road 20 is connected, and the data-signal D is input to the driving element 22；When the scanning signal of the output circuit 30 output
When WR (n) is low potential VGL, the LED control signal EM (n) that second scan drive circuit 112 exports rises to high electricity
Position VGH, the voltage holding circuit 21 are connected, and the switching circuit 20 is closed, and the voltage holding circuit 21 accesses described
Constant pressure low potential VGL is for maintaining the low potential of the scanning signal WR (n) constant, so that next clock signal
When CK is increased to high potential VGH by low potential VGL, the electric current of the Organic Light Emitting Diode E and brightness are not shaken, such as
In Fig. 5 shown in the region X.
Specifically, it is illustrated by taking single pixel area 101 as an example, in 1 stage of S, described in the output circuit 30
In the open state, the clock signal CK is high potential VGH, the scanning signal WR of output to 4th thin film transistor (TFT) T4
It (n) is high potential VGH, the LED control signal EM (n) is low potential VGL, and the third thin film transistor (TFT) T3 is closed, at this time
The second thin film transistor (TFT) T2 is opened, the data-signal D write-in, so that the Organic Light Emitting Diode E forms electric current.
In the S2 stage, the clock signal CK is down to low potential VGL, while the scanning signal WR (n) exported is also dropped
It is closed for low potential VGL, the second thin film transistor (TFT) T2, the LED control signal EM (n) is still in low potential at this time
VGL, the third thin film transistor (TFT) T3 are also switched off, and the Organic Light Emitting Diode E shines.
In the S3 stage, the 4th thin film transistor (TFT) T4 is closed, and the clock signal CK is described still in low potential VGL
Scanning signal WR (n) maintains low potential VGL, and the LED control signal EM (n) is upgraded to high potential VGH at this time, and the third is thin
Film transistor T3 is opened, and the constant pressure low potential VGL that the voltage holding circuit 21 accesses is for maintaining the scanning signal
The low potential of WR (n) is constant.That is, will cause when the clock signal CK rises to high potential VGH by low potential VGL
The current potential of the first node Q is lifted, and can accidentally be opened the 4th thin film transistor (TFT) T4, to cause the scanning signal WR
(n) current potential moment increases, and then generates crosstalk to G point, and uses this circuit design, and the scanning signal WR (n) can pass through
The third thin film transistor (TFT) T3 of each pixel circuit maintains low potential, so that crosstalk will not be generated to G point, reduces and even disappears
Except the voltage oscillation of the scanning signal WR (n), and then decrease or even eliminate electric current and the brightness of the Organic Light Emitting Diode E
Oscillation.
Wherein, the pulse width of the LED control signal EM (n) is greater than the pulse width of the scanning signal WR (n).
Assuming that panel resolution is FHD, refresh rate 60HZ, in a frame time, the pulse width of the scanning signal WR (n) is
The pulse width of 15us, the LED control signal EM (n) are greater than 16ms.When data-signal D write-in, the luminous control
Signal EM (n) processed is low potential, and the third thin film transistor (TFT) T3 is closed, and the scanning signal WR (n) is high potential, described the
Three thin film transistor (TFT) T3 do not influence the write-in of the data-signal D.When the LED control signal EM (n) is high potential, institute
It is in the open state to state third thin film transistor (TFT) T3, in a frame time, can be greater than in the 16ms time, maintain the scanning letter
The stability of number WR (n), eliminates the oscillation of the scanning signal WR (n), even is eliminated the organic light-emitting diodes to reduce
The electric current and luminance oscillations of pipe E.
In addition, including the constant pressure in first scan drive circuit 111 and second scan drive circuit 112
Low potential VGL signal, the constant pressure low potential VGL that the voltage holding circuit 21 accesses can be by the first turntable driving electricity
Road 111 or second scan drive circuit 112 itself provide.
The application also provides a kind of display panel, including array substrate as described above, and is prepared in the array base
Organic luminous layer on plate.
In conclusion array substrate provided by the present application and display panel, are maintained by the way that voltage is arranged in pixel circuit
Circuit causes the electric current of light-emitting component and brightness that oscillation problem occurs to alleviate and even be eliminated clock signal.That is, when clock is believed
Number current potential when being upgraded to high potential by low potential, will cause the lifting of Q point current potential, and the thin film transistor (TFT) T4 of output circuit is caused to miss
Open, and the scanning signal of gate driving circuit output at this time need to maintain low potential, the application by voltage holding circuit and
Its constant pressure low-potential signal accessed can guarantee not vibrate when the scanning signal of gate driving circuit output is low potential,
Therefore can be avoided clock signal causes crosstalk to pixel circuit G point.
Although above preferred embodiment is not to limit in conclusion the application is disclosed above with preferred embodiment
The application processed, those skilled in the art are not departing from spirit and scope, can make various changes and profit
Decorations, therefore the protection scope of the application subjects to the scope of the claims.
Claims (10)
1. a kind of array substrate, which is characterized in that pixel circuit and the corresponding non-display area including corresponding viewing area
The first scan drive circuit and the second scan drive circuit being arranged, the pixel circuit include switching circuit, voltage maintenance electricity
Road, driving element and light-emitting component；
First scan drive circuit includes output circuit, and the output circuit is coupled to first node and incoming clock letter
Number, first segment point control signal and the clock signal for being exported according to the first node export scanning signal；It is described
Second scan drive circuit is for exporting LED control signal；
The switching circuit incoming data signal, and connect with the output circuit of first scan drive circuit, it uses
In the input for controlling the data-signal according to the scanning signal；
The driving element is connect with the switching circuit, and accesses high voltage signal, for according to the scanning signal and institute
Stating data-signal drives the light-emitting component to shine；Wherein,
The voltage holding circuit accesses constant pressure low potential, and is connected in parallel the switching circuit and first turntable driving electricity
Road, the input terminal of the voltage holding circuit are connected to the output end of second scan drive circuit, and the voltage maintains electricity
Road is used to maintain the low potential of the scanning signal constant when the scanning signal that the output circuit exports is low potential.
2. array substrate according to claim 1, which is characterized in that the switching circuit includes first film transistor,
The grid of the first film transistor is connect with the output end of the output circuit, and the source electrode of the first film transistor connects
Enter the data-signal, the drain electrode of the first film transistor is connect with the driving element.
3. array substrate according to claim 2, which is characterized in that the driving element includes the second thin film transistor (TFT),
The grid of second thin film transistor (TFT) is connect with the drain electrode of the first film transistor, the source of second thin film transistor (TFT)
The high voltage signal is accessed in pole, and the drain electrode of second thin film transistor (TFT) is connect with the first electrode of the light-emitting component, institute
State the second electrode access common ground signal of light-emitting component.
4. array substrate according to claim 3, which is characterized in that the pixel circuit further includes storage capacitance, described
The gate connected in parallel of first pole plate of storage capacitance and second thin film transistor (TFT) is connected to the leakage of the first film transistor
The drain electrode of pole, the second pole plate of the storage capacitance and second thin film transistor (TFT) is connected in parallel to the institute of the light-emitting component
State first electrode.
5. array substrate according to claim 2, which is characterized in that the voltage holding circuit includes third film crystal
Pipe, the grid of the third thin film transistor (TFT) connect the output end of second scan drive circuit, the third film crystal
The source electrode of pipe accesses the constant pressure low potential, and the drain electrode of the third thin film transistor (TFT) is connected in parallel the output of the output circuit
The grid of end and the first film transistor.
6. array substrate according to claim 1, which is characterized in that the output circuit includes the 4th thin film transistor (TFT),
The grid of 4th thin film transistor (TFT) is coupled to the first node, and the source electrode of the 4th thin film transistor (TFT) is electrically connected at
The drain electrode of the clock signal, the 4th thin film transistor (TFT) is connected to the output end of the output circuit.
7. array substrate according to claim 1, which is characterized in that when the scanning signal of output circuit output
When for high potential, the LED control signal of the second scan drive circuit output is low potential, and the voltage maintains electricity
Road is closed, and the switching circuit conducting, the data-signal is input to the driving element；
When the scanning signal of output circuit output is low potential, second scan drive circuit is exported described
LED control signal rises to high potential, the voltage holding circuit conducting, and the switching circuit is closed, the voltage holding circuit
For maintaining the low potential of the scanning signal constant.
8. array substrate according to claim 7, which is characterized in that the pulse width of the LED control signal is greater than institute
State the pulse width of scanning signal.
9. array substrate according to claim 1, which is characterized in that the pixel circuit further includes compensation circuit, described
The input terminal of compensation circuit accesses the output end of second scan drive circuit, and the output end of the compensation circuit is connected to institute
Driving element is stated, the LED control signal is for controlling the compensation circuit.
10. a kind of display panel, which is characterized in that including the array substrate as described in claim 1~9 any claim,
And it is prepared in the organic luminous layer in the array substrate.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910750836.6A CN110517642A (en) | 2019-08-14 | 2019-08-14 | A kind of array substrate and display panel |
| PCT/CN2019/113087 WO2021027068A1 (en) | 2019-08-14 | 2019-10-24 | Array substrate and display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910750836.6A CN110517642A (en) | 2019-08-14 | 2019-08-14 | A kind of array substrate and display panel |
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| CN110517642A true CN110517642A (en) | 2019-11-29 |
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| CN201910750836.6A Pending CN110517642A (en) | 2019-08-14 | 2019-08-14 | A kind of array substrate and display panel |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112863448A (en) * | 2021-01-11 | 2021-05-28 | 武汉华星光电半导体显示技术有限公司 | Display panel and display device |
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| CN112863448A (en) * | 2021-01-11 | 2021-05-28 | 武汉华星光电半导体显示技术有限公司 | Display panel and display device |
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| Publication number | Publication date |
|---|---|
| WO2021027068A1 (en) | 2021-02-18 |
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