CN110491975A - A kind of LED epitaxial wafer and preparation method thereof and semiconductor devices - Google Patents
A kind of LED epitaxial wafer and preparation method thereof and semiconductor devices Download PDFInfo
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- CN110491975A CN110491975A CN201910831715.4A CN201910831715A CN110491975A CN 110491975 A CN110491975 A CN 110491975A CN 201910831715 A CN201910831715 A CN 201910831715A CN 110491975 A CN110491975 A CN 110491975A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 157
- 238000002360 preparation method Methods 0.000 title abstract description 9
- 230000004888 barrier function Effects 0.000 claims abstract description 55
- 239000000758 substrate Substances 0.000 claims description 28
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 13
- 229910000077 silane Inorganic materials 0.000 claims description 12
- 238000004519 manufacturing process Methods 0.000 claims description 8
- 230000026267 regulation of growth Effects 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 6
- 230000007423 decrease Effects 0.000 claims description 2
- 239000007787 solid Substances 0.000 claims 1
- 238000002347 injection Methods 0.000 abstract description 6
- 239000007924 injection Substances 0.000 abstract description 6
- 230000005684 electric field Effects 0.000 abstract description 5
- 230000002411 adverse Effects 0.000 abstract description 4
- 238000009826 distribution Methods 0.000 abstract description 4
- 230000000694 effects Effects 0.000 abstract description 4
- 239000000243 solution Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 230000003139 buffering effect Effects 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 230000003760 hair shine Effects 0.000 description 2
- 238000005286 illumination Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 241001062009 Indigofera Species 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- XKMRRTOUMJRJIA-UHFFFAOYSA-N ammonia nh3 Chemical compound N.N XKMRRTOUMJRJIA-UHFFFAOYSA-N 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 239000011777 magnesium Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 1
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 1
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
- H01L33/145—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
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- Led Devices (AREA)
Abstract
The invention discloses a kind of LED epitaxial wafer and preparation method thereof and semiconductor devices, N-type electronic barrier layer is embedded between the first n type semiconductor layer and the second n type semiconductor layer, and N-type electronic barrier layer is N-type AlInGaN/GaN layers, since AlInGaN and GaN lattice mismatch is smaller in AlInGaN/GaN layers of N-type, pass through stress modulation, reduce the polarized electric field of quantum well region, and then it can reduce efficiency rapid drawdown bring adverse effect, LED epitaxial wafer lateral current extended capability is also added simultaneously, so that semiconductor devices has good current expansion ability.And, the LED epitaxial wafer that the present invention passes through removes P-type electron barrier layer, and then hole injection can be increased, and alleviate uneven distribution of the carrier in Quantum Well, multiple quantum well active layer is set to shine more uniform, the luminous efficiency of LED epitaxial wafer is improved, and improves the performance of semiconductor devices.
Description
Technical field
The present invention relates to semiconductor light emitting technical fields, more specifically, are related to a kind of LED (Light Emitting
Diode, light emitting diode) epitaxial wafer and preparation method thereof and semiconductor devices.
Background technique
Recent years, III-V nitride, since (forbidden bandwidth is big, breakdown electric field for its excellent physics and chemical characteristic
High, electronics saturation mobility height etc.), to be widely used in electronics, optical field.Wherein, using GaN base as the indigo plant of main material
Green light LED even more has significant progress in terms of illumination, display, number.However as current Micro/Min
The development of LED, the continuous diminution of chip size are inevitably brought under other problems, such as same current injection, small size
Chip belt is sent a telegram here the increase of current density, and electronics leakage is serious etc., simultaneously because also counteracting hole using P-type electron barrier layer
Further transmission, cause efficiency rapid drawdown obvious
Summary of the invention
In view of this, effectively being solved existing the present invention provides a kind of LED epitaxial wafer and preparation method thereof and semiconductor devices
The problem of with the presence of technology, improves the performance of semiconductor devices.
To achieve the above object, technical solution provided by the invention is as follows:
A kind of LED epitaxial wafer, comprising:
First n type semiconductor layer；
N-type electronic barrier layer positioned at first n type semiconductor layer side, the N-type electronic barrier layer are default life
Macrocyclic N-type AlInGaN/GaN layers；
Deviate from the second n type semiconductor layer of first n type semiconductor layer side positioned at the N-type electronic barrier layer；
Deviate from the multiple quantum well active layer of first n type semiconductor layer side positioned at second n type semiconductor layer；
Deviate from the p type semiconductor layer of first n type semiconductor layer side positioned at the multiple quantum well active layer；
And deviate from the p-type contact layer of first n type semiconductor layer side positioned at the p type semiconductor layer.
Optionally, Al component is fixed in described N-type AlInGaN/GaN layers.
Optionally, in described N-type AlInGaN/GaN layers Al component with the period increase be in first increases and then decreases trend.
Optionally, Al component increased in first reducing the trend increased afterwards with the period in described N-type AlInGaN/GaN layers.
Optionally, the default growth cycle is 5-20, including endpoint value.
Optionally, AlInGaN layers of thickness range is 1nm-3nm, including endpoint value in N-type AlInGaN/GaN layers.
Optionally, the thickness range of GaN layer is 1nm-3nm, including endpoint value in N-type AlInGaN/GaN layers.
Correspondingly, the semiconductor devices includes above-mentioned LED extension the present invention also provides a kind of semiconductor devices
Piece.
Optionally, the semiconductor devices is LED chip, wherein first n type semiconductor layer is electric towards the N-type
Sub- one side surface of barrier layer, which divides, first area and second area, and the N-type electronic barrier layer, the second n type semiconductor layer,
Multiple quantum well active layer, p type semiconductor layer and p-type contact layer are respectively positioned at the first area；
The LED chip further include: positioned at first n type semiconductor layer away from N-type electronic barrier layer side
Substrate；
And deviate from the P-type electrode of the one side of substrate positioned at the p-type contact layer, and partly lead positioned at first N-type
N-type electrode of the body layer at the second area of the one side of substrate.
Optionally, the LED chip further includes the buffering between the substrate and first n type semiconductor layer
Layer.
Correspondingly, the present invention also provides a kind of production methods of LED epitaxial wafer, comprising:
One n type semiconductor layer of growth regulation on the aufwuchsplate of substrate；
N-type electronic barrier layer, the N-type electronics resistance are grown away from the substrate side in first n type semiconductor layer
Barrier is AlInGaN/GaN layers of N-type of default growth cycle；
Deviate from first n type semiconductor layer side growth regulation, two n type semiconductor layer in the N-type electronic barrier layer；
Multiple quantum well active layer is grown away from first n type semiconductor layer side in second n type semiconductor layer；
Deviate from first n type semiconductor layer side growing P-type semiconductor layer in the multiple quantum well active layer；
Deviate from first n type semiconductor layer side growing P-type contact layer in the p type semiconductor layer.
Optionally, N-type AlInGaN/GaN layers of the growing method in any one period includes:
Under conditions of 900 DEG C -1000 DEG C, AlInGaN layers are grown by the source Al, the source In, the source Ga, the source N and silane；
The source Al and the source In are closed, GaN layer is grown by the source Ga, the source N and silane.
Compared to the prior art, technical solution provided by the invention has at least the following advantages:
The present invention provides a kind of LED epitaxial wafer and preparation method thereof and semiconductor devices, LED epitaxial wafer includes first
N type semiconductor layer；N-type electronic barrier layer positioned at first n type semiconductor layer side, the N-type electronic barrier layer is pre-
If AlInGaN/GaN layers of the N-type of growth cycle；Deviate from first n type semiconductor layer side positioned at the N-type electronic barrier layer
The second n type semiconductor layer；Deviate from the Multiple-quantum of first n type semiconductor layer side positioned at second n type semiconductor layer
Trap active layer；Deviate from the p type semiconductor layer of first n type semiconductor layer side positioned at the multiple quantum well active layer；And
Deviate from the p-type contact layer of first n type semiconductor layer side positioned at the p type semiconductor layer.
As shown in the above, technical solution provided by the invention, in the first n type semiconductor layer and the second N-type semiconductor
N-type electronic barrier layer is embedded between layer, and N-type electronic barrier layer is N-type AlInGaN/GaN layers, due to N-type AlInGaN/
AlInGaN and GaN lattice mismatch is smaller in GaN layer, by stress modulation, reduces the polarized electric field of quantum well region, in turn
It can reduce efficiency rapid drawdown bring adverse effect, while also adding LED epitaxial wafer lateral current extended capability, so that partly leading
Body device has good current expansion ability.And the LED epitaxial wafer that the present invention passes through removes P-type electron barrier layer, into
And hole injection can be increased, and alleviate uneven distribution of the carrier in Quantum Well, so that multiple quantum well active layer is shone
It is more uniform, the luminous efficiency of LED epitaxial wafer is improved, and improve the performance of semiconductor devices.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
The embodiment of invention for those of ordinary skill in the art without creative efforts, can also basis
The attached drawing of offer obtains other attached drawings.
Fig. 1 is a kind of structural schematic diagram of LED epitaxial wafer provided by the embodiments of the present application；
Fig. 2 is a kind of flow chart of the production method of LED epitaxial wafer provided by the embodiments of the present application；
Fig. 3 a- Fig. 3 f is each corresponding structural schematic diagram of step in Fig. 2；
Fig. 4 is a kind of structural schematic diagram of LED chip provided by the embodiments of the present application.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
As described in background, recent years, III-V nitride, due to its excellent physics and chemical characteristic (forbidden band
Width is big, breakdown electric field is high, electronics is saturated mobility height etc.), to be widely used in electronics, optical field.Wherein, with GaN
Base is the blue-green light LED of main material, even more has significant progress in terms of illumination, display, number.However with
The development of Micro/Min LED at present, the continuous diminution of chip size inevitably bring other problems, such as identical
Under electric current injection, small-size chips bring the increase of current density, and electronics leakage is serious etc., simultaneously because being hindered using p-type electronics
Barrier also counteracts the further transmission in hole, causes efficiency rapid drawdown obvious
Based on this, the embodiment of the present application provides a kind of LED epitaxial wafer and preparation method thereof and semiconductor devices, effectively solves
Problem certainly of the existing technology, improves the performance of semiconductor devices.To achieve the above object, provided by the embodiments of the present application
Technical solution is as follows, specifically combines Fig. 1 to Fig. 4 that technical solution provided by the embodiments of the present application is described in detail.
Refering to what is shown in Fig. 1, being a kind of structural schematic diagram of LED epitaxial wafer provided by the embodiments of the present application, wherein outside LED
Prolonging piece includes:
First n type semiconductor layer 100；
N-type electronic barrier layer 200 positioned at 100 side of the first n type semiconductor layer, the N-type electronic barrier layer 200
For AlInGaN/GaN layers of N-type for presetting growth cycle；
Deviate from the second N-type semiconductor of 100 side of the first n type semiconductor layer positioned at the N-type electronic barrier layer 200
Layer 300；
Multiple quantum wells positioned at second n type semiconductor layer 300 away from 100 side of the first n type semiconductor layer has
Active layer 400；
Deviate from the p type semiconductor layer of 100 side of the first n type semiconductor layer positioned at the multiple quantum well active layer 400
500；
And deviate from the p-type contact layer of 100 side of the first n type semiconductor layer positioned at the p type semiconductor layer 500
600。
It should be understood that technical solution provided by the embodiments of the present application, partly leads in the first n type semiconductor layer and the second N-type
N-type electronic barrier layer is embedded between body layer, and N-type electronic barrier layer is N-type AlInGaN/GaN layers, due to N-type AlInGaN/
AlInGaN and GaN lattice mismatch is smaller in GaN layer, by stress modulation, reduces the polarized electric field of quantum well region, in turn
It can reduce efficiency rapid drawdown bring adverse effect, while also adding LED epitaxial wafer lateral current extended capability, so that partly leading
Body device has good current expansion ability.And the LED epitaxial wafer that the embodiment of the present application passes through removes the resistance of p-type electronics
Barrier, and then hole injection can be increased, and alleviate uneven distribution of the carrier in Quantum Well, keep multiple quantum wells active
Layer shines more uniform, improves the luminous efficiency of LED epitaxial wafer, and improve the performance of semiconductor devices.
LED epitaxial wafer provided by the embodiments of the present application is described in more detail below with reference to production method.In conjunction with figure
Shown in 2- Fig. 3 f, Fig. 2 is a kind of flow chart of the production method of LED epitaxial wafer provided by the embodiments of the present application, and Fig. 3 a- Fig. 3 f is
Each corresponding structural schematic diagram of step in Fig. 2.It should be noted that production method provided by the embodiments of the present application can use
Equipment is MOCVD device, and with trimethyl gallium TMGa is the source Ga, take trimethyl aluminium TMAl as the source Al, with trimethyl indium TMIn is
The source In, take ammonia NH3 as the source N, using N2 and H2 as carrier gas, n-type doping source be silane SiH4 and p-type doped source is two luxuriant magnesium
CP2Mg makes LED epitaxial wafer.Wherein, the production method of LED epitaxial wafer includes:
S1, one n type semiconductor layer of growth regulation on the aufwuchsplate of substrate.
It further, can first grown buffer layer in substrate before one n type semiconductor layer of growth regulation.Wherein, buffer layer can
Think GaN buffer layer, and the first n type semiconductor layer can be the first N-type GaN layer.As shown in Figure 3a, corresponding step S1, by base
Bottom is put into the reaction chamber of MOCVD device, is controlled technological temperature in reaction chamber and is reached 1100 DEG C or so and be passed through high-purity hydrogen Hization
5min-10min (including endpoint value, be specifically as follows 6min, 8min, 9min etc.), be then cooled to 900 DEG C -1100 DEG C (including
Endpoint value is specifically as follows 950 DEG C, 1000 DEG C, 1050 DEG C etc.) it is passed through the source Ga and the source N in reaction chamber is grown in the life of substrate
The undoped GaN buffering of 20nm-50nm (including endpoint value, be specifically as follows 30nm, 40nm, 45nm etc.) thickness is grown in long face
Layer (not shown).
Then, continue to be passed through the source Ga, the source N and silane in the reaction chamber, (including endpoint value, specifically can be with for 2 μm -4 μm of growth
It is 2.5 μm, 3 μm, 3.5 μm etc.) the first N-type GaN layer 100 of the Si of thickness doping is used as current extending, and doping concentration can
Think 1-10x1018cm-3。
S2, N-type electronic barrier layer, the N-type electronics are grown away from the substrate side in first n type semiconductor layer
Barrier layer is AlInGaN/GaN layers of N-type of default growth cycle.
As shown in Figure 3b, corresponding step S2, is located on the first n type semiconductor layer 100 and grows N-type electronic barrier layer 200.Its
In, N-type AlInGaN/GaN layers of the growing method in any one period provided by the embodiments of the present application includes:
After growth finishes the first n type semiconductor layer, reaction room temperature is reduced, under conditions of 900 DEG C -1000 DEG C,
It is passed through the source Al, the source In, the source Ga, the source N and silane in reaction chamber, and then passes through the source Al, the source In, the source Ga, the source N and silane growth
AlInGaN layers；
The source Al and the source In are then closed, the source Ga, the source N and silane are passed through in reaction chamber, it is raw by the source Ga, the source N and silane
Long GaN layer grows AlxInyGa1-x-yN/GaN layers of N-type (0 < x <, 1,0 < of default growth cycle by above-mentioned growing method
Y < 1).
In one embodiment of the application, the default growth cycle provided by the present application is 5-20, including endpoint value, specifically
Growth cycle can be 6,8,10,13,15,18 etc., be not specifically limited to this application.
And AlInGaN layers of thickness range is 1nm- in N-type AlInGaN/GaN layers provided by the embodiments of the present application
3nm, including endpoint value are specifically as follows 1.5nm, 2nm, 2.5nm etc..And in AlInGaN/GaN layers of N-type GaN layer thickness model
It encloses for 1nm-3nm, including endpoint value, is specifically as follows 1.5nm, 2nm, 2.5nm etc..
In one embodiment of the application, Al component is fixed in described N-type AlInGaN/GaN layers provided by the present application.
Alternatively, Al component increased in first increasing with the period in described N-type AlInGaN/GaN layers provided by the embodiments of the present application
The trend reduced after big, i.e., after reaching a certain figure of merit with growth cycle increase Al component, again with the increase of growth cycle
Reduce.
Alternatively, Al component increased in first subtracting with the period in described N-type AlInGaN/GaN layers provided by the embodiments of the present application
The trend increased after small.
It should be noted that Al component increases and reduces trend in N-type AlInGaN/GaN layers provided by the embodiments of the present application
It can be gradual change, this application is not specifically limited.And the embodiment of the present application is for Al in AlInGaN/GaN layers of N-type
The specific value of component is specifically designed according to practical application without limitation, to this needs.
S3, deviate from first n type semiconductor layer side growth regulation, two n type semiconductor layer in the N-type electronic barrier layer.
As shown in Figure 3c, corresponding step S3, two n type semiconductor layer 300 of growth regulation on N-type electronic barrier layer 200, second
N type semiconductor layer 300 can be the second N-type GaN layer.Specifically after growth finishes N-type electronic barrier layer, it is passed through in the reaction chamber
The source Ga, the source N and silane grow 0.2 μm -1 μm (including endpoint value, be specifically as follows 0.5 μm, 0.8 μm, 0.9 μm etc.) thickness
Second N-type GaN layer of Si doping.
S4, second n type semiconductor layer away from first n type semiconductor layer side growth multiple quantum wells it is active
Layer.
As shown in Figure 3d, corresponding step S4, grows multiple quantum well active layer 400 on the second n type semiconductor layer 300.Tool
Body, the source In, the source Ga, the source N and silane growth 10nm-12nm are passed through in reaction chamber, and (including endpoint value is specifically as follows
10.5nm, 11nm, 11.5nm etc.) thickness InxGa1-xN (0 < x < 1) quantum barrier layer, doping concentration 1-5x1018cm-3；3nm-5nm (including endpoint value, be specifically as follows 3.5nm, 4nm, 4.5nm etc.) thickness is then grown on quantum barrier layer
InyGa1-yN (0 < y < 1, and the quantum well layer In component ratio quantum barrier layer high 0.05-0.1 of In component, including endpoint value) quantum
Well layer；It repeating the above steps, grows the multiple quantum well active layer of 4-10 growth cycle, growth technique temperature is 700 DEG C -800 DEG C,
Including endpoint value, it is specifically as follows 720 DEG C, 750 DEG C, 780 DEG C etc..
S5, deviate from first n type semiconductor layer side growing P-type semiconductor layer in the multiple quantum well active layer.
As shown in Figure 3 e, corresponding step S5, the growing P-type semiconductor layer 500 in multiple quantum well active layer 400, p-type is partly led
Body layer 500 can be low temperature p-type GaN cap.Specifically, growth finish multiple quantum well active layer after, reduce temperature to 700 DEG C-
800 DEG C (including endpoint value, be specifically as follows 720 DEG C, 750 DEG C, 180 DEG C etc.), growth 30nm-100nm (including endpoint value, tool
Body can be for 50nm, 70nm, 90nm etc.) the low temperature p-type GaN cap of thickness, doping concentration 1-10x1019cm-3, Jin Erneng
The crystal quality for enough maintaining quantum well layer avoids subsequent high temperature growth from damaging quantum well layer component, structure.
S6, deviate from first n type semiconductor layer side growing P-type contact layer in the p type semiconductor layer.
As illustrated in figure 3f, corresponding step S6, the growing P-type contact layer 600 on p type semiconductor layer 500, p-type contact layer 600
It can be p-type GaN layer.Specifically, growing 100nm-200nm on p type semiconductor layer, (including endpoint value is specifically as follows
130nm, 150nm, 180nm etc.) thickness p-type GaN layer as contact layer, doping concentration 1-10x1019cm-3, and in N2
Anneal 20min-30min under environment and 800 DEG C -900 DEG C (including endpoint value, be specifically as follows 830 DEG C, 850 DEG C, 880 DEG C etc.)
(including endpoint value, be specifically as follows 23min, 25min, 28min etc.).
In one embodiment of the application, the pressure of above-mentioned reaction growth course can be (including the end 200torr-500torr
Point value is specifically as follows 300torr, 400torr, 450torr etc.).
Correspondingly, the semiconductor devices includes above-mentioned any the embodiment of the present application also provides a kind of semiconductor devices
The LED epitaxial wafer that one embodiment provides.
In one embodiment of the application, the semiconductor devices provided by the present application can be LED chip or other types
Device is not specifically limited this application.When the semiconductor devices provided by the embodiments of the present application is LED chip, LED
Chip includes the LED chip that above-mentioned any one embodiment provides, and first n type semiconductor layer is hindered towards the N-type electronics
One side surface of barrier, which divides, first area and second area, and the N-type electronic barrier layer, the second n type semiconductor layer, volume
Sub- trap active layer, p type semiconductor layer and p-type contact layer are respectively positioned at the first area；
The LED chip further include: positioned at first n type semiconductor layer away from N-type electronic barrier layer side
Substrate；
And deviate from the P-type electrode of the one side of substrate positioned at the p-type contact layer, and partly lead positioned at first N-type
N-type electrode of the body layer at the second area of the one side of substrate.
It should be noted that the application for first area and second area concrete shape without limitation, root is needed to this
It is specifically designed according to semiconductor device type and parameters.
Specifically combine Fig. 4 that LED chip structure provided by the embodiments of the present application is described.Fig. 4 is the embodiment of the present application
The structural schematic diagram of a kind of LED chip provided, wherein LED chip provided by the embodiments of the present application includes:
Substrate 110, wherein substrate 110 can be c surface sapphire substrate, be not specifically limited to this application；
The first n type semiconductor layer 100 positioned at the 110 aufwuchsplate side of substrate, the first n type semiconductor layer 100 deviate from
110 1 side surface of substrate, which divides, first area 101 and second area 102；
N-type electronic barrier layer 200 at the first area 101 of 100 side of the first n type semiconductor layer, the N
Type electronic barrier layer 200 is AlInGaN/GaN layers of N-type of default growth cycle；
Deviate from the second N-type semiconductor of 100 side of the first n type semiconductor layer positioned at the N-type electronic barrier layer 200
Layer 300；
Multiple quantum wells positioned at second n type semiconductor layer 300 away from 100 side of the first n type semiconductor layer has
Active layer 400；
Deviate from the p type semiconductor layer of 100 side of the first n type semiconductor layer positioned at the multiple quantum well active layer 400
500；
Deviate from the p-type contact layer 600 of 100 side of the first n type semiconductor layer positioned at the p type semiconductor layer 500；
And deviate from the P-type electrode 700 of 110 side of substrate positioned at the p-type contact layer 600, and be located at described the
N-type electrode 800 of one n type semiconductor layer 100 at the second area 102 of 110 side of substrate.
Further, the LED chip provided by the embodiments of the present application further includes being located at the substrate 110 and described first
Buffer layer 120 between n type semiconductor layer 100, wherein buffer layer 120 provided by the embodiments of the present application can be undoped
Buffer layer is identical between substrate and the first n type semiconductor layer in GaN layer, and above-described embodiment, and it is extra not do to this application
It repeats.
The embodiment of the present application provides a kind of LED epitaxial wafer and preparation method thereof and semiconductor devices, LED epitaxial wafer include
There is the first n type semiconductor layer；N-type electronic barrier layer positioned at first n type semiconductor layer side, the N-type electronic blocking
Layer is AlInGaN/GaN layers of N-type of default growth cycle；Deviate from first N-type semiconductor positioned at the N-type electronic barrier layer
Second n type semiconductor layer of layer side；Positioned at second n type semiconductor layer away from first n type semiconductor layer side
Multiple quantum well active layer；Deviate from the P-type semiconductor of first n type semiconductor layer side positioned at the multiple quantum well active layer
Layer；And deviate from the p-type contact layer of first n type semiconductor layer side positioned at the p type semiconductor layer.
As shown in the above, technical solution provided by the embodiments of the present application, in the first n type semiconductor layer and the second N-type
N-type electronic barrier layer is embedded between semiconductor layer, and N-type electronic barrier layer is N-type AlInGaN/GaN layers, due to N-type
AlInGaN and GaN lattice mismatch is smaller in AlInGaN/GaN layers, by stress modulation, reduces the polarization electricity of quantum well region
, and then can reduce efficiency rapid drawdown bring adverse effect, while also adding LED epitaxial wafer lateral current extended capability,
So that semiconductor devices has good current expansion ability.And the LED epitaxial wafer that the embodiment of the present application passes through removes P
Type electronic barrier layer, and then hole injection can be increased, and alleviate uneven distribution of the carrier in Quantum Well, make volume
Sub- trap active layer shines more uniform, improves the luminous efficiency of LED epitaxial wafer, and improve the performance of semiconductor devices.And
And LED epitaxial wafer provided by the embodiments of the present application is more applicable for the small sizes semiconductor chip such as Micro/Min LED.
The foregoing description of the disclosed embodiments enables those skilled in the art to implement or use the present invention.
Various modifications to these embodiments will be readily apparent to those skilled in the art, as defined herein
General Principle can be realized in other embodiments without departing from the spirit or scope of the present invention.Therefore, of the invention
It is not intended to be limited to the embodiments shown herein, and is to fit to and principles disclosed herein and novelty, creation
The consistent widest scope of property.
Claims (12)
1. a kind of LED epitaxial wafer characterized by comprising
First n type semiconductor layer；
N-type electronic barrier layer positioned at first n type semiconductor layer side, the N-type electronic barrier layer are default growth week
AlInGaN/GaN layers of the N-type of phase；
Deviate from the second n type semiconductor layer of first n type semiconductor layer side positioned at the N-type electronic barrier layer；
Deviate from the multiple quantum well active layer of first n type semiconductor layer side positioned at second n type semiconductor layer；
Deviate from the p type semiconductor layer of first n type semiconductor layer side positioned at the multiple quantum well active layer；
And deviate from the p-type contact layer of first n type semiconductor layer side positioned at the p type semiconductor layer.
2. LED epitaxial wafer according to claim 1, which is characterized in that Al component is solid in described N-type AlInGaN/GaN layers
It is fixed.
3. LED epitaxial wafer according to claim 1, which is characterized in that in described N-type AlInGaN/GaN layers Al component with
The period increase be in first increases and then decreases trend.
4. LED extension according to claim 1, which is characterized in that in described N-type AlInGaN/GaN layers Al component with
It is in first to reduce the trend increased afterwards that period, which increases,.
5. LED epitaxial wafer according to claim 1, which is characterized in that the default growth cycle is 5-20, including endpoint
Value.
6. LED epitaxial wafer according to claim 1, which is characterized in that AlInGaN layers of thickness in AlInGaN/GaN layers of N-type
Degree range is 1nm-3nm, including endpoint value.
7. LED epitaxial wafer according to claim 1, which is characterized in that the thickness model of GaN layer in AlInGaN/GaN layers of N-type
It encloses for 1nm-3nm, including endpoint value.
8. a kind of semiconductor devices, which is characterized in that the semiconductor devices includes as described in claim 1-7 any one
LED epitaxial wafer.
9. semiconductor devices according to claim 8, which is characterized in that the semiconductor devices is LED chip, wherein
First n type semiconductor layer is divided towards one side surface of N-type electronic barrier layer first area and second area, and institute
It states N-type electronic barrier layer, the second n type semiconductor layer, multiple quantum well active layer, p type semiconductor layer and p-type contact layer and is respectively positioned on institute
It states at first area；
The LED chip further include: deviate from the substrate of N-type electronic barrier layer side positioned at first n type semiconductor layer；
And deviate from the P-type electrode of the one side of substrate positioned at the p-type contact layer, and be located at first n type semiconductor layer
N-type electrode at the second area of the one side of substrate.
10. semiconductor devices according to claim 9, which is characterized in that the LED chip further includes being located at the substrate
With the buffer layer between first n type semiconductor layer.
11. a kind of production method of LED epitaxial wafer characterized by comprising
One n type semiconductor layer of growth regulation on the aufwuchsplate of substrate；
N-type electronic barrier layer, the N-type electronic barrier layer are grown away from the substrate side in first n type semiconductor layer
For AlInGaN/GaN layers of N-type for presetting growth cycle；
Deviate from first n type semiconductor layer side growth regulation, two n type semiconductor layer in the N-type electronic barrier layer；
Multiple quantum well active layer is grown away from first n type semiconductor layer side in second n type semiconductor layer；
Deviate from first n type semiconductor layer side growing P-type semiconductor layer in the multiple quantum well active layer；
Deviate from first n type semiconductor layer side growing P-type contact layer in the p type semiconductor layer.
12. the production method of according to claim 11 kind of LED epitaxial wafer, which is characterized in that the N in any one period
The growing method that AlInGaN/GaN layers of type includes:
Under conditions of 900 DEG C -1000 DEG C, AlInGaN layers are grown by the source Al, the source In, the source Ga, the source N and silane；
The source Al and the source In are closed, GaN layer is grown by the source Ga, the source N and silane.
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| CN112331750A (en) * | 2020-10-23 | 2021-02-05 | 华灿光电(苏州）有限公司 | Ultraviolet light-emitting diode epitaxial wafer and manufacturing method thereof |
| CN114613890A (en) * | 2022-03-24 | 2022-06-10 | 淮安澳洋顺昌光电技术有限公司 | Light-emitting diode epitaxial structure with N-type current expansion layer |
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