CN110476200A - Tft基板、tft基板的制造方法、显示装置 - Google Patents
Tft基板、tft基板的制造方法、显示装置 Download PDFInfo
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- CN110476200A CN110476200A CN201880022560.3A CN201880022560A CN110476200A CN 110476200 A CN110476200 A CN 110476200A CN 201880022560 A CN201880022560 A CN 201880022560A CN 110476200 A CN110476200 A CN 110476200A
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- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 5
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- 238000004544 sputter deposition Methods 0.000 description 5
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- 239000003990 capacitor Substances 0.000 description 4
- 229910052733 gallium Inorganic materials 0.000 description 4
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- 239000010409 thin film Substances 0.000 description 4
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- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 3
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- 239000011521 glass Substances 0.000 description 1
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- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 1
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- 229910052749 magnesium Inorganic materials 0.000 description 1
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- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1251—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
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- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
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- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
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Abstract
在下层部和上层部分别包括半导体膜的TFT基板中,实现了下层部的导电体和上层部的导电体之间的稳定连接。在基板上包括作为TFT沟道的第一半导体膜(6)、与第一半导体膜相比靠上层的第一导电体(M1)、与第一导电体相比靠上层的层间绝缘膜(18)、与层间绝缘膜相比靠上层的第二半导体膜(26)、与第二半导体膜相比靠上层的第二导电体(J2)、与第二导电体相比靠上层的有机绝缘膜(32)、与有机绝缘膜相比靠上层的第三导电体(M3)、穿过有机绝缘膜的通孔(H32)以及层间绝缘膜的通孔(H18),且底面到达第一导电体的接触孔(CH),有机绝缘膜的通孔的开口表面大于层间绝缘膜的通孔的开口表面,第二导电体(J2)以及第三导电体(M3)以与接触孔的开口表面(K)重叠的方式形成,第三导电体(M3)与第一导电体(M1)以及第二导电体(J2)接触。
Description
技术领域
本发明关于一种含有TFT(薄膜晶体管)的基板。
背景技术
专利文献1公开了一种TFT基板,该TFT基板在下层部和上层部分别包括TFT。
现有技术文献
专利文献
专利文献1:日本国公开专利公报“2016-218452号公报(2016年12月22日公开)”
发明内容
本发明所要解决的技术问题
例如,在下层部和上层部分别包括TFT的TFT基板中,需要增加下层部和上层部之间的绝缘膜来抑制寄生电容,但是,这样,存在下层部的导电体和上层部的导电体难以稳定地连接的问题。
用于解决技术问题的技术方案
本发明一形态涉及的TFT基板构成为,在基板上包括作为TFT沟道的第一半导体膜、与所述第一半导体膜相比靠上层的第一导电体、与所述第一导电体相比靠上层的层间绝缘膜、与所述层间绝缘膜相比靠上层的第二半导体膜、与所述第二半导体膜相比靠上层的第二导电体、与所述第二导电体相比靠上层的有机绝缘膜、与所述有机绝缘膜相比靠上层的第三导电体、穿过所述有机绝缘膜的通孔以及所述层间绝缘膜的通孔,且底面到达所述第一导电体的接触孔,所述有机绝缘膜的通孔的开口表面大于所述层间绝缘膜的通孔的开口表面,所述第二导电体以及所述第三导电体以与所述接触孔的开口表面重叠的方式形成,所述第三导电体与所述第一导电体以及所述第二导电体接触。
有益效果
根据本发明的一形态,在下层部包括第一半导体膜,且上层部包括第二半导体膜的TFT基板中,即使在下层部和上层部之间的层间绝缘膜增厚的情况下,下层部的第一导电体和上层部的第二导电体能够稳定地连接。
附图说明
图1是表示本发明第一实施方式涉及的TFT基板的构成的截面图。
图2是表示本发明第一实施方式涉及的TFT基板的制造方法的流程图。
图3是表示本发明第二实施方式涉及的TFT基板的构成的截面图。
图4是表示本发明第三实施方式涉及的TFT基板的构成的截面图。
图5是表示本发明第四实施方式涉及的TFT基板的构成的截面图。
图6是表示本发明第五实施方式涉及的TFT基板的构成的截面图。
图7是表示本发明第一实施方式涉及的显示装置的其它构成的电路图(a)以及截面图(b)。
具体实施方式
以下记载了本发明的多个实施方式,但是这些实施方式仅仅是示例。
[第一实施方式]
图1的(a)及图1的(b)表示第一实施方式涉及的TFT基板的构成截面图,图1的(c)表示第一实施方式涉及的TFT基板的构成俯视图。
如图1的(a)至图1的(c)所示,在TFT基板50中,在基材2上以无机绝缘膜4、第一半导体膜6、第一栅极绝缘膜8、第一栅极10、无机绝缘膜12、漏极配线m1和源极配线M1(第一导电体)、无机绝缘膜16、层间绝缘膜18、无机绝缘膜20、第二栅极22、第二栅极绝缘膜24、第二半导体膜26、上层配线J2(第二导电体)以及漏极配线M2和源极配线m2、无机绝缘膜30、有机绝缘膜32、无机绝缘膜34和导电膜M3(第三导电体)的顺序层叠。
下层部3包括无机绝缘膜4、第一半导体膜6、第一栅极绝缘膜8、第一栅极10、无机绝缘膜12、源极配线M1、漏极配线m 1以及无机绝缘膜16,上层部5包括无机绝缘膜20、第二栅极22、第二栅极绝缘膜24、第二半导体膜26、上层配线J2、漏极配线M2、源极配线m2、无机绝缘膜30和有机绝缘膜32、无机绝缘膜34以及导电膜M3,并且在下层部3和上层部3之间形成有层间绝缘膜18。
包括在下层部3的晶体管TR1是包括第一半导体膜6、第一栅极10的顶栅型薄膜晶体管(TFT)。包括在上层部5中的晶体管TR2是包括第二栅极22、第二半导体膜26的底栅型薄膜晶体管(TFT)。
基材2例如是玻璃基板或树脂基板,也可以具有可弯曲性。
无机绝缘膜4、第一栅极绝缘膜8、无机绝缘膜12、无机绝缘膜16、无机绝缘膜20、无机绝缘膜30和无机绝缘膜34通过例如CVD法形成的,为氮化硅膜、氧化硅膜或它们的层叠膜。
层间绝缘膜18和有机绝缘膜32是通过例如涂布(旋涂法、喷墨法等)形成的有机树脂膜,比各无机绝缘膜厚。
第一半导体膜6例如是低温多晶硅(LTPS)膜,第二半导体膜26例如是氧化物半导体膜。
所述氧化物半导体膜例如也可以包含In、Ga以及Zn中的至少一种金属元素。例如,包含In-Ga-Zn-O类半导体(例如铟镓锌氧化物)。In-Ga-Zn-O类半导体是In(铟)、Ga(镓)和Zn(锌)的三元氧化物。In、Ga以及Zn的比例(组成比)不特别限定,但也可以是例如In:Ga:Zn=2:2:1、In:Ga:Zn=1:1:1、In:Ga:Zn=1:1:2等。
此外,所述氧化物半导体膜也可以包含In-Sn-Zn-O类半导体(例如In2O3-SnO2-ZnO;InSnZnO)。In-Sn-Zn-O类半导体为In(铟)、Sn(锡)以及Zn(锌)的三元氧化物。此外,沟道层也可以包含In-Al-Zn-O类半导体、In-Al-Sn-Zn-O类半导体、Zn-O类半导体、In-Zn-O类半导体、Zn-Ti-O类半导体、Cd-Ge-O类半导体、Cd-Pb-O类半导体、CdO(氧化镉)、Mg-Zn-O类半导体、In-Ga-Sn-O类半导体、In-Ga-O类半导体、Zr-In-Zn-O类半导体以及Hf-In-Zn-O类半导体等。此处,Al表示铝,Ti表示钛,Cd表示镉,Ge表示锗,Pb表示铅,Mg表示镁,Zr表示锆,Hf表示铪。
关于第一栅极10、漏极配线m1、源极配线M1、第二栅极22、上层配线J2、漏极配线M2、源极配线m2以及导电膜M3,可以通过溅射法将铝(Al)膜、钨(W)膜、钼(Mo)膜、钽(Ta)膜、铬(Cr)膜、钛(Ti)膜、铜(Cu)等金属或它们的合金形成为单层或多层,并通过图案化形成。另外,导电膜M3可以是使用例如ITO(Indium Tin Oxide,氧化铟锡)、IZO(Indium ZincumOxide,氧化铟锌)的透光性金属膜。
如图1的(a)和图1的(c)所示,在TFT基板50中,在无机绝缘膜16、层间绝缘膜18、无机绝缘膜20、无机绝缘膜30、有机绝缘膜32和无机绝缘膜34上形成通孔,形成有穿过无机绝缘膜34的通孔H34、有机绝缘膜的通孔H32、无机绝缘膜30的通孔H30、无机绝缘膜20的通孔H20、层间绝缘膜18的通孔H18、无机绝缘膜24的通孔H24、无机绝缘膜16的通孔H16,且底面到达源极配线M1的接触孔CH。
根据俯视图(沿基板的法线方向观察时),通孔H34的开口表面、通孔H32的开口表面和通孔H30的开口表面匹配,相互匹配的通孔H20的开口表面以及通孔H18的开口表面K18和通孔H16的开口表面K16位于通孔H32的开口表面内侧,通孔H24的开口表面K24位于通孔H18的开口表面K18内侧。
上层配线J2和导电膜M3形成为与接触孔CH的开口表面K重叠,并且通过导电膜M3与源极配线M1和上层配线J2接触,源极配线M1和上层配线J2电连接。
在第一实施方式中,接触孔CH穿过第二半导体膜26的通孔H26,第二半导体膜26的通孔H26位于层间绝缘膜18的通孔H18内。此外,第二半导体膜26的通孔H26的开口表面K26与通孔H24的开口表面K24和接触孔CH的底表面B匹配。
第二半导体膜26具有与接触孔CH的开口表面K重叠的重叠部26p,重叠部26p是包括位于与无机绝缘膜20相比靠上侧的部分和位于与无机绝缘膜20相比靠下侧的部分的的台阶形状(楼梯形状)。在重叠部26p中,位于与无机绝缘膜20相比靠上侧的部分以及位于下侧的部分分别与导电膜M3接触,进一步地,位于与无机绝缘膜20相比靠上侧的部分与上层配线J2接触。
在第一实施方式中,由于源极配线M1和上层配线J2可以经由接触孔CH内的导电膜M3连接,因此,即使在层间绝缘膜18变厚以抑制晶体管TR1和晶体管TR2之间的寄生电容的情况,两者(M1/J2)也能够稳定地连接。此外,由于导电膜M3在接触孔CH内与台阶形状的第二半导体膜26接触,例如,可以减少由溅射法形成的导电膜M3在接触孔CH内断开的可能性。
在图1中,(a)的上层配线J2和(b)的漏极配线M2也可以连接。
图2是第一实施方式的TFT基板的制造方法。如图2所示,在步骤S1中,在基板2上形成下层部5(包括晶体管TR2)。在步骤S2中,通过例如涂覆法形成层间绝缘膜18,通过例如CVD法形成无机绝缘膜20之后,将它们图案化。在步骤S3中,通过例如溅射法形成第二栅极22并将其图案化。在步骤S4中,通过例如CVD法形成无机绝缘膜24。在步骤S5中,通过例如溅射法形成第二半导体膜26之后图案化。在步骤S6中,通过例如溅射法形成上层配线J2之后图案化。在步骤S7中,通过例如CVD法形成无机绝缘膜30,通过例如涂覆法形成有机绝缘膜32,通过例如CVD法形成无机绝缘膜34。在步骤S8中,对无机绝缘膜34、有机绝缘膜32、无机绝缘膜30和无机绝缘膜24进行干蚀刻,以形成接触孔CH。在步骤S9中,通过例如溅射法形成导电膜M3之后图案化。
在步骤S2中,在平面图中的接触孔CH的预定开口区域内形成层间绝缘膜18的通孔H18。在步骤S5中,第二半导体膜26形成为包括平面图中接触孔CH的预定开口区域的岛状,其通孔Hb26形成在层间绝缘膜18的通孔H18内。在步骤S8中,使用在步骤S5中形成的台阶形状的第二半导体膜26作为蚀刻阻挡物而进行干蚀刻。在步骤S9中,在接触孔CH内形成导电膜M3。
图7是表示显示装置的显示区域的构成的电路图(a)和截面图(b)。在显示区域配置有多条数据线S(m)和与它们垂直的多条扫描信号线G(n)。此外,在显示区域以与多条扫描信号线一对一对应的方式配置有多条发光控制线EM(n)。进一步地,在显示区域以与多条数据线S(m)和多条扫描信号线G(n)的交叉点对应的方式设置有像素电路52。通过以这种方式设置像素电路52,在显示区域中形成多个像素矩阵。
在显示区域配设有各像素电路52共用的未图示的电源线。更详细地,配置有供给给用于驱动有机EL元件的高电平电源电压ELVDD的电源线(高电平电源线)、供给给用于驱动有机EL元件的低电平电源电压ELVSS的电源线(低电平电源线)以及供给初始化电压Vini的电源线(初始化电源线)。高电平电源电压ELVDD、低电平电源电压ELVSS。初始化电压Vini从未图示的电源电路被供给。
接着,说明显示部区域内的像素电路52的构成。图7的(a)是表示与m列n行对应的像素电路52的构成的电路图。另外,此处说明的像素电路52的构成仅为示例,可以采用其它已知的构成。图7的(a)所示的像素电路52包括一个有机EL元件OLED和六个晶体管Ta~Tf(驱动晶体管Ta、写入控制晶体管Tb、电源供给控制晶体管Tc、发光控制晶体管Td、阈值电压补偿晶体管Te、初始化晶体管Tf)和一个电容器C1。晶体管Ta是n沟道型的晶体管。Tb~Tf是p沟道型的晶体管。电容器C1是由两个电极(第一电极和第二电极)构成的电容元件。
关于驱动晶体管Ta,栅极端子连接到阈值电压补偿晶体管Te的源极端子、初始化晶体管Tf的漏极端子和电容器C1的第二电极,漏极端子连接到写入控制晶体管Tb的源极端子和电源供给控制晶体管Tc的源极端子,源极端子连接到发光控制晶体管Td的漏极端子和阈值电压补偿晶体管Te的漏极端子。关于写入控制晶体管Tb,栅极端子连接到第n行中的扫描信号线G(n),漏极端子连接到第m列中的数据线S(m),源极端子连接到驱动晶体管Ta的漏极端子和电源供给控制晶体管Tc的源极端子。关于电源供给控制晶体管Tc,栅极端子连接到第n行的发光控制线EM(n),漏极端子连接到高电平电源线和电容器C1的第一电极,源极端子连接到驱动晶体管Ta的漏极端子和写入控制晶体管Tb的源极端子。
晶体管Ta的沟道由氧化物半导体构成,晶体管Tb和晶体管Td的沟道由LTPS(低温多晶硅)构成,如图7的(b)所示,晶体管Ta的漏极配线M2与经由源极配线M1连接到晶体管Tb的源极6s,晶体管Ta的源极配线m2经由漏极配线M4连接到晶体管T4的漏极电极6D。
[第二实施方式]
在第一实施方式中,源极配线M1和上层配线J2经由导电膜M3连接,但是不限于此。如表示第二实施方式的图3所示,在与源极配线M1相比靠上层设置有与源极配线M1电连接的中继电极LE,且中继电极LE和上层配线J2可以经由导电膜M3连接。在图3中,(a)的上层配线J2和(b)的漏极配线M2也可以连接。
源极配线M1和中继电极LE可以通过贯通无机绝缘膜16的接触孔连接。中继电极LE可以是使用例如ITO(Indium Tin Oxide,氧化铟锡)、IZO(Indium Zincum Oxide,氧化铟锌)的透光性金属膜。
[第三实施方式]
如图4的(a)~图4的(c)所示,在TFT基板51中,在无机绝缘膜16、层间绝缘膜18、无机绝缘膜20、无机绝缘膜30、有机绝缘膜32以及无机绝缘膜34上形成有通孔,且形成有穿过无机绝缘膜34的通孔H34、有机绝缘膜的通孔H32、无机绝缘膜30的通孔H30、无机绝缘膜20的通孔H20、层间绝缘膜18的通孔H18、无机绝缘膜24的通孔H24、无机绝缘膜16的通孔H16而到达源极配线M1的接触孔CH。
根据俯视图(沿基板的法线方向观察时),通孔H34的开口表面、通孔H32的开口表面K32和通孔H30的开口表面匹配,相互匹配的通孔H20的开口表面以及通孔H18的开口表面K18位于通孔H32的开口表面内侧,通孔H24的开口表面K24以及通孔H16的开口表面K位于通孔H18的开口表面K18内侧。
上层配线J2和导电膜M3形成为与接触孔CH的开口表面K重叠,并且通过导电膜M3与源极配线M1和上层配线J2接触,源极配线M1和上层配线J2电连接。在图4中,(a)的上层配线J2和(b)的漏极配线M2也可以连接。
在第三实施方式中,由于源极配线M1和上层配线J2可以经由接触孔CH内的导电膜M3连接,因此,即使在层间绝缘膜18变厚以抑制晶体管TR1和晶体管TR2之间的寄生电容的情况,两者(M1/J2)也能够稳定地连接。
[第四实施方式]
图5是表示第四实施方式的显示装置的示意图。第四实施方式的显示装置100(OLED显示器)在第一实施方式~第三实施方式中示出的TFT基板50上包括OLED(有机发光二极管)层60、密封层70和功能层80。功能层80包括例如光学薄膜、触摸传感器薄膜和保护薄膜。
在显示装置100中,如图5的(a)所示,可以构成为包括第一半导体膜6(例如,LTPS)的下层部3用于驱动电路,包括第二半导体膜26(例如,氧化物半导体)的上层部5用于像素电路。
此外,如图5的(b)所示,可以构成为包括第一半导体膜6(例如,LTPS)的下层部3以及包括第二半导体膜26(例如,氧化物半导体)的上层部5各自用于像素电路。在这种情况下,可以构成为,在下层部3设置有像素电路的写入控制晶体管(例如,沟道是LTPS),且在上层部5设置有像素电路的驱动晶体管(例如,沟道是氧化物半导体)。
另外,可以构成为,在下层部3设置有像素电路的驱动晶体管(例如,沟道是氧化物半导体),且在上层部5设置有像素电路的写入控制晶体管(例如,沟道是LTPS)。
[第五实施方式]
图6是表示第五实施方式的显示装置的示意图。第五实施方式的显示装置101在第一实施方式~第三实施方式中示出的TFT基板50的下面侧包括背光40,上面侧包括光透射控制层和功能层80。
光透射控制层可以构成为包括如图6的(a)所示的液晶层65和彩色滤光片层75,也可以构成为包括如图6的(b)所示的MEMS(Micro Electro Mechanical Systems,微机电系统)快门层55。在这些情况下,可以构成为包括第一半导体膜6的下层部3用于驱动电路(例如,LTPS),包括第二半导体膜26(例如,氧化物半导体)的上层部5用于像素电路。
包括本实施方式涉及的显示装置的电气光学元件(亮度、透射率由电流控制的电气光学元件)不特别限定。作为本实施方式涉及的显示装置,可以例举例如,具备OLED(Organic Light Emitting Diode:有机发光二极管)作为电气光学元件的有机EL(ElectroLuminescence:电致发光)显示器、具备无机发光二极管作为电气光学元件的无机EL显示器、具备QLED(Quantum dot Light Emitting Diode:量子点发光二极管)作为电气光学元件的QLED显示器等。
〔总结〕
形态1:TFT基板构成为,在基板上包括作为TFT沟道的第一半导体膜、与所述第一半导体膜相比靠上层的第一导电体、与所述第一导电体相比靠上层的层间绝缘膜、与所述层间绝缘膜相比靠上层的第二半导体膜、与所述第二半导体膜相比靠上层的第二导电体、与所述第二导电体相比靠上层的有机绝缘膜、与所述有机绝缘膜相比靠上层的第三导电体、穿过所述有机绝缘膜的通孔以及所述层间绝缘膜的通孔,且底面到达所述第一导电体的接触孔,所述有机绝缘膜的通孔的开口表面大于所述层间绝缘膜的通孔的开口表面,所述第二导电体以及所述第三导电体以与所述接触孔的开口表面重叠的方式形成,所述第三导电体与所述第一导电体以及所述第二导电体接触。
形态2:根据形态1所述的TFT基板,所述接触孔穿过所述第二半导体膜的通孔。
形态3:据形态2述的TFT基板,所述第二半导体膜的通孔位于所述层间绝缘膜的通孔内。
形态4:据形态3述的TFT基板,所述第二半导体膜的通孔的开口表面与所述接触孔的底面匹配。
形态5:根据形态2~4中任一项所述的TFT基板,所述第二半导体膜为岛状,在俯视图中,所述层间绝缘膜的通孔的开口表面位于所述第二半导体膜的外缘的内侧,并且所述第二半导体膜的通孔的开口表面位于所述层间绝缘膜的通孔的开口表面的内侧。
形态6:根据形态2~5中任一项所述的TFT基板,所述第二半导体膜具有与所述接触孔的开口表面重叠的重叠部,所述重叠部与所述第三导电体接触。
形态7:根据形态6所述的TFT基板,所述重叠部为台阶形状。
形态8:根据形态6或7所述的TFT基板,所述重叠部与所述第二导电体接触。
形态9:根据形态1~8中任一项所述的TFT基板,构成所述第二半导体膜的物质与构成所述第一半导体膜的物质不同。
形态10:根据形态1~9中任一项所述的TFT基板,所述第一导电体与所述TFT的导通电极形成在同层。
形态11:根据形态1~9中任一项所述的TFT基板,所述第一导电体与所述TFT的导通电极相比形成在上层。
形态12:根据形态1~11中任一项所述的TFT基板,所述第一半导体膜由多晶硅构成,所述第二半导体膜由氧化物半导体构成。
形态13:TFT基板的制造方法,包括在基板上形成作为TFT沟道的第一半导体膜、与所述第一半导体膜相比靠上层的第一导电体、与所述第一导电体相比靠上层的层间绝缘膜、与所述层间绝缘膜相比靠上层的第二半导体膜、与所述第二半导体膜相比靠上层的第二导电体、与所述第二导电体相比靠上层的有机绝缘膜、与所述有机绝缘膜相比靠上层的第三导电体、穿过所述有机绝缘膜的通孔以及所述层间绝缘膜的通孔而到达所述第一导电体的接触孔的工序,在所述工序中,所述第二导电体以及所述第三导电体形成为与所述接触孔的开口表面重叠,所述第三导电体与所述第一导电体以及所述第二导电体接触。
形态14:根据形态13所述的TFT基板的制造方法,所述接触孔穿过所述第二半导体膜的通孔。
形态15:显示装置包括形态1~12中任一项所述的TFT基板。
形态16:根据形态15所述的显示装置,所述TFT基板上包括OLED层。
形态17:根据形态16所述的显示装置,包括所述第一半导体膜的下层部用于驱动电路,包括所述第二半导体膜的上层部用于像素电路。
形态18:根据形态16所述的显示装置,包括所述第一半导体膜的下层部以及包括所述第二半导体膜的上层部各自用于像素电路。
形态19:根据形态18所述的显示装置,各像素包括驱动晶体管、写入控制晶体管以及发光控制晶体管,所述写入控制晶体管以及所述发光控制晶体管的沟道由所述第一半导体膜构成,所述驱动晶体管的沟道由所述第二半导体膜构成。
形态20:根据形态19所述的显示装置,晶体管的导通电极与写入控制晶体管的导通电极电连接,所述驱动晶体管的导通电极与所述发光控制晶体管的导通电极电连接。
本发明不限于上述各实施方式,能在权利要求所示的范围中进行各种变更,将在不同的实施方式中分别公开的技术手段适当组合而得到的实施方式也包含于本发明的技术范围。进一步地,能够通过组合各实施方式分别公开的技术手段来形成新的技术特征。
附图标记说明
2…基板
3…下层部
5…上层部
6…第一半导体膜
18…层间绝缘膜
26…第二半导体膜
26p…重叠部
32…有机绝缘膜
50…TFT基板
100/101…显示装置
CH…接触孔
M1…源极配线(第一导电体)
J2…上层配线(第二导电体)
M3…导电膜(第三导电体)
H18…层间绝缘膜的通孔
H26…第二半导体膜的通孔
H32…有机绝缘膜的通孔
Claims (20)
1.一种TFT基板,其特征在于,在基板上包括作为TFT沟道的第一半导体膜、与所述第一半导体膜相比靠上层的第一导电体、与所述第一导电体相比靠上层的层间绝缘膜、与所述层间绝缘膜相比靠上层的第二半导体膜、与所述第二半导体膜相比靠上层的第二导电体、与所述第二导电体相比靠上层的有机绝缘膜、与所述有机绝缘膜相比靠上层的第三导电体、穿过所述有机绝缘膜的通孔以及所述层间绝缘膜的通孔,且底面到达所述第一导电体的接触孔,
所述有机绝缘膜的通孔的开口表面大于所述层间绝缘膜的通孔的开口表面,
所述第二导电体以及所述第三导电体以与所述接触孔的开口表面重叠的方式形成,所述第三导电体与所述第一导电体以及所述第二导电体接触。
2.根据权利要求1所述的TFT基板,其特征在于,
所述接触孔穿过所述第二半导体膜的通孔。
3.根据权利要求2所述的TFT基板,其特征在于,
所述第二半导体膜的通孔位于所述层间绝缘膜的通孔内。
4.根据权利要求3所述的TFT基板,其特征在于,
所述第二半导体膜的通孔的开口表面与所述接触孔的底面匹配。
5.根据权利要求2~4中任一项所述的TFT基板,其特征在于,
所述第二半导体膜为岛状,
在俯视图中,所述层间绝缘膜的通孔的开口表面位于所述第二半导体膜的外缘的内侧,并且所述第二半导体膜的通孔的开口表面位于所述层间绝缘膜的通孔的开口表面的内侧。
6.根据权利要求2~5中任一项所述的TFT基板,其特征在于,
所述第二半导体膜具有与所述接触孔的开口表面重叠的重叠部,所述重叠部与所述第三导电体接触。
7.根据权利要求6所述的TFT基板,其特征在于,
所述重叠部为台阶形状。
8.根据权利要求6或7所述的TFT基板,其特征在于,
所述重叠部与所述第二导电体接触。
9.根据权利要求1~8中任一项所述的TFT基板,其特征在于,
构成所述第二半导体膜的物质与构成所述第一半导体膜的物质不同。
10.根据权利要求1~9中任一项所述的TFT基板,其特征在于,
所述第一导电体与所述TFT的导通电极形成在同层。
11.根据权利要求1~9中任一项所述的TFT基板,其特征在于,
所述第一导电体与所述TFT的导通电极相比形成在上层。
12.根据权利要求1~11中任一项所述的TFT基板,其特征在于,
所述第一半导体膜由多晶硅构成,所述第二半导体膜由氧化物半导体构成。
13.一种TFT基板的制造方法,其特征在于,
所述TFT基板的制造方法包括:在基板上形成作为TFT沟道的第一半导体膜、与所述第一半导体膜相比靠上层的第一导电体、与所述第一导电体相比靠上层的层间绝缘膜、与所述层间绝缘膜相比靠上层的第二半导体膜、与所述第二半导体膜相比靠上层的第二导电体、与所述第二导电体相比靠上层的有机绝缘膜、与所述有机绝缘膜相比靠上层的第三导电体、穿过所述有机绝缘膜的通孔以及所述层间绝缘膜的通孔而到达所述第一导电体的接触孔的工序,
在所述工序中,所述第二导电体以及所述第三导电体形成为与所述接触孔的开口表面重叠,所述第三导电体与所述第一导电体以及所述第二导电体接触。
14.根据权利要求13所述的TFT基板的制造方法,其特征在于,
所述接触孔穿过所述第二半导体膜的通孔。
15.一种显示装置,其特征在于,
所述显示装置包括权利要求1~12中任一项所述的TFT基板。
16.根据权利要求15所述的显示装置,其特征在于,
所述TFT基板上包括OLED层。
17.根据权利要求16所述的显示装置,其特征在于,
包括所述第一半导体膜的下层部用于驱动电路,包括所述第二半导体膜的上层部用于像素电路。
18.根据权利要求16所述的显示装置,其特征在于,
包括所述第一半导体膜的下层部以及包括所述第二半导体膜的上层部各自用于像素电路。
19.根据权利要求18所述的显示装置,其特征在于,
各像素电路包括驱动晶体管、写入控制晶体管以及发光控制晶体管,
所述写入控制晶体管以及所述发光控制晶体管的沟道由所述第一半导体膜构成,所述驱动晶体管的沟道由所述第二半导体膜构成。
20.根据权利要求19所述的显示装置,其特征在于,
所述驱动晶体管的导通电极与所述写入控制晶体管的导通电极电连接,
所述驱动晶体管的导通电极与所述发光控制晶体管的导通电极电连接。
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CN103003744A (zh) * | 2011-07-19 | 2013-03-27 | 松下电器产业株式会社 | 液晶显示装置及其制造方法 |
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CN103456740A (zh) * | 2013-08-22 | 2013-12-18 | 京东方科技集团股份有限公司 | 像素单元及其制造方法、阵列基板和显示装置 |
JP2015103490A (ja) * | 2013-11-27 | 2015-06-04 | 株式会社ジャパンディスプレイ | 発光表示装置及び発光表示装置の製造方法 |
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WO2021082266A1 (zh) * | 2019-10-28 | 2021-05-06 | 武汉华星光电技术有限公司 | 一种阵列基板、其制备方法及其显示面板 |
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WO2018180842A1 (ja) | 2018-10-04 |
US20200381462A1 (en) | 2020-12-03 |
CN110476200B (zh) | 2021-11-16 |
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