CN110444125B

CN110444125B - Display screen and terminal

Info

Publication number: CN110444125B
Application number: CN201910557030.5A
Authority: CN
Inventors: 严斌; 毛春程; 尹帮实
Original assignee: Honor Device Co Ltd
Current assignee: Honor Device Co Ltd
Priority date: 2019-06-25
Filing date: 2019-06-25
Publication date: 2022-03-08
Anticipated expiration: 2039-06-25
Also published as: CN110444125A; WO2020259473A1

Abstract

The application provides a display screen and a terminal, relates to the technical field of display, and is used for solving the problem of how to improve the transmittance of an OLED display screen. The display screen comprises a substrate, and at least one high-density pixel group and at least one low-density pixel group which are arranged on the substrate; the high-density pixel group comprises a plurality of first pixels arranged in an array, and the low-density pixel group comprises a plurality of second pixels arranged in an array; the first pixel includes at least three first sub-pixels for respectively displaying three primary colors, the first sub-pixels including at least a first driving circuit and a first light emitting device electrically connected to the first driving circuit; the second pixel includes at least three second sub-pixels for respectively displaying three primary colors, the second sub-pixels including at least a second driving circuit and a second light emitting device electrically connected to the second driving circuit; the pixel density of the first display area where the first pixels arranged in the array are located is larger than the pixel density of the second display area where the second pixels arranged in the array are located.

Description

Display screen and terminal

Technical Field

The application relates to the technical field of display, in particular to a display screen and a terminal.

Background

With the development of display technology, high-screen-ratio terminal equipment becomes a product type which is favored by consumers. The optical device needs to collect light rays on the side where the display surface of the terminal device is located, and the optical device needs to occupy a certain area on the display surface of the terminal device, so that the optical device becomes a main influence factor for limiting full-screen display of the terminal device.

For a terminal device including an organic light-emitting diode (OLED) display, since the OLED display is not completely opaque, in order to simplify the structure, an optical device is often disposed on the back of the OLED display, and a light receiving surface of the optical device faces the back of the OLED display. However, since the OLED display has a transmittance of only about 3% to 5%, when the optical device is disposed on the back surface of the OLED display, the performance of the optical device is affected due to a small amount of light incident on the optical device.

Therefore, it is a technical problem to be solved by those skilled in the art how to improve the transmittance of the OLED display panel and thus the light receiving amount of the optical device when the optical device is disposed on the back surface of the OLED display panel.

Disclosure of Invention

The embodiment of the application provides a display screen and a terminal, which are used for solving the problem of how to improve the transmittance of an OLED display screen.

In order to achieve the above purpose, the following technical solutions are adopted in this embodiment:

in a first aspect, a display screen is provided, the display screen comprising a substrate and at least one high-density pixel group and at least one low-density pixel group disposed on the substrate; the high-density pixel group comprises a plurality of first pixels arranged in an array, and the low-density pixel group comprises a plurality of second pixels arranged in an array; the first pixel comprises at least three first sub-pixels for respectively displaying three primary colors, the first sub-pixels at least comprise a first driving circuit and a first light-emitting device electrically connected with the first driving circuit, and the first driving circuit is used for driving the first light-emitting device to emit light; the second pixel comprises at least three second sub-pixels for respectively displaying three primary colors, the second sub-pixels at least comprise a second driving circuit and a second light-emitting device electrically connected with the second driving circuit, and the second driving circuit is used for driving the second light-emitting device to emit light; the pixel density of the first display area where the first pixels arranged in the array are located is larger than the pixel density of the second display area where the second pixels arranged in the array are located. The display area is divided into a first display area and a second display area, and the pixel density of first pixels arranged in an array mode in the first display area is larger than that of second pixels arranged in an array mode in the second display area, so that the number of transistors in the second display area is smaller than that of the transistors in the first display area. The area of the light transmission area in the second display area is increased, the aperture opening ratio is increased, and the whole transmittance of the local area is improved, so that the ambient light transmittance of the second display area is greater than that of the first display area.

Optionally, the display screen further includes a pixel defining layer disposed on a side of the first driving circuit and the second driving circuit away from the substrate; the pixel definition layer comprises a plurality of cross retaining walls and a plurality of first openings which are surrounded by the plurality of cross retaining walls and are positioned in the first sub-pixels and the second sub-pixels; the second light-emitting device comprises a hole injection layer, a hole transport layer, an electron transport layer and an electron injection layer which are sequentially stacked along the direction far away from the substrate, wherein at least one of the hole injection layer, the hole transport layer, the electron transport layer and the electron injection layer is positioned in the first opening. Although the hole injection layer, the hole transport layer, the electron transport layer and the electron injection layer are all transparent film layers, they still have a certain influence on the transmittance. Therefore, at least one of the hole injection layer, the hole transport layer, the electron transport layer and the electron injection layer in the second light emitting device is only positioned in the first opening and does not extend into a blank area between adjacent second pixels, so that the influence of the film layers of the hole injection layer, the hole transport layer, the electron transport layer and the electron injection layer on the transmittance of the second display area can be avoided, and the transmittance of the second display area is further improved.

Optionally, the pixel defining layer further includes at least one second opening surrounded by a plurality of intersecting retaining walls; the second opening is located between the adjacent second pixels and used for separating the adjacent second pixels. The shielding of the retaining wall to the ambient light can be reduced.

Optionally, adjacent second openings are in communication. Further reducing the shielding of the retaining wall to the ambient light.

Optionally, the second driving circuit comprises a plurality of transistors; the transistors comprise a conductive layer and a first insulating layer which is arranged in a laminated mode with the conductive layer, and a plurality of transistors in the same second driving circuit share the same first insulating layer; the first insulating layers in the adjacent second driving circuits are arranged at intervals; the first insulating layer is a gate insulating layer or a passivation layer. Although the gate insulating layer and the passivation layer are both transparent film layers, the transmittance is still affected to a certain extent. Therefore, at least one of the gate insulating layer and the passivation layer is in a block structure and does not extend into the blank area between the adjacent second pixels, so that the influence of the film layers of the gate insulating layer and the passivation layer on the transmittance of the second display area can be avoided, and the transmittance of the second display area can be further improved.

Optionally, the display screen further includes a first light shielding layer, where the first light shielding layer includes a plurality of independently arranged light shielding blocks, and each of the second driving circuits corresponds to one of the light shielding blocks; the orthographic projection of the second driving circuit on the substrate is positioned in the orthographic projection of the shading block corresponding to the second driving circuit on the substrate. By arranging the shading block and enabling the shading block to cover the second driving circuit, a grating can be prevented from being formed among a grid electrode, a source drain electrode layer and a connecting wire among transistors in the second driving circuit, so that diffraction of ambient light is avoided, and accuracy of information acquisition of an optical device is guaranteed.

Optionally, the display screen further includes a padding layer, and the padding layer includes a plurality of padding blocks independently arranged; at least one part of the outline of the orthographic projection of the second drive circuit on the substrate is a broken line, and the orthographic projection of the filling block on the substrate is superposed with the area of the concave position of the broken line of the second drive circuit corresponding to the filling block; the filling layer is arranged on one side, close to the substrate, of the second driving circuit. By arranging the filling block, small features of the second driving circuit on the orthographic projection outline of the substrate are filled, the second driving circuit is prevented from forming a grating, and therefore the second driving circuit can be prevented from influencing the normal work of an optical device below the display screen.

Optionally, the display screen further includes a padding layer, and the padding layer includes a plurality of padding blocks independently arranged; at least one part of the outline of the orthographic projection of the second drive circuit on the substrate is a broken line, and the orthographic projection of the filling block on the substrate is superposed with the area of the concave position of the broken line of the second drive circuit corresponding to the filling block; the filling layer is arranged on one side, far away from the substrate, of the second driving circuit.

Optionally, the display screen further includes a padding layer, and the padding layer includes a plurality of padding blocks independently arranged; at least one part of the outline of the orthographic projection of the second drive circuit on the substrate is a broken line, and the orthographic projection of the filling block on the substrate is superposed with the area of the concave position of the broken line of the second drive circuit corresponding to the filling block; the filling layer and at least one conductive layer in the second driving circuit are made of the same material. The thickness of the display screen can be reduced.

Optionally, the display screen further includes a second signal line group for transmitting a driving signal to the second driving circuit, where the second signal line group includes a second data line and a plurality of second signal lines that are arranged in a crossing manner; the second data line is used for transmitting data voltage; the second signal line is used for transmitting the working voltage or providing a gating signal for the grid electrode of one transistor in the second driving circuit; the display screen also comprises a second shading layer, the second shading layer comprises a plurality of shading strips which are independently arranged, and each second signal line group corresponds to one shading strip; at least part of the orthographic projection of the second signal line group on the substrate is positioned in the orthographic projection of the shading strip on the substrate. The signal lines in the second signal line group are shielded by separately arranging a second light shielding layer, so that when external environment light enters, the area where the second signal line group is located is completely lightproof. The signal lines can be prevented from forming a grating, diffraction caused by the signal lines in the second signal line group is eliminated, and the performance of the optical device is ensured.

Optionally, the display screen further includes a second signal line group for transmitting a driving signal to the second driving circuit, where the second signal line group includes a plurality of second signal lines; the second signal line is used for transmitting the working voltage or providing a gating signal for the grid electrode of one transistor in the second driving circuit; among the plurality of second signal lines, a part of the plurality of second signal lines are used as first sub-signal lines, and a part of the plurality of second signal lines are used as second sub-signal lines; the display screen further comprises a second insulating layer positioned between the first sub signal line and the second sub signal line; the first sub-signal lines and the second sub-signal lines are alternately arranged, and the orthographic projections of the first sub-signal lines on the substrate are overlapped with the orthographic projections of the second sub-signal lines on the substrate, wherein the second sub-signal lines are positioned on two sides of the first sub-signal lines. The second signal line is divided into two parts arranged in different layers, and the signal lines in different layers are mutually shielded, so that a gap formed by the signal lines in the same layer can be shielded, namely the gap between the signal lines is eliminated, namely diffraction caused by the signal lines is eliminated. The manufacturing process can be simplified without adding a new film structure, and the display screen can be made light and thin.

Optionally, the display screen further includes a second signal line group for transmitting a driving signal to the second driving circuit, where the second signal line group includes a second data line and a plurality of second signal lines that are arranged in a crossing manner; the second data line is used for transmitting data voltage; the second signal line is used for transmitting the working voltage or providing a gating signal for the grid electrode of one transistor in the second driving circuit; the material constituting the second data line or the second signal line is a transparent conductive material. Through adopting transparent conducting material preparation with signal line in the second signal group, not only can avoid signal line formation grating in the second signal group, but also can avoid signal line shading in the second signal group. Thereby improving the light receiving effect and the light receiving amount of the optical device.

Optionally, the display screen further includes a first signal line group for transmitting a driving signal to the first driving circuit and a second signal line group for transmitting a driving signal to the second driving circuit; the first signal line group comprises a plurality of first signal lines; the first signal line is used for transmitting working voltage or providing gating signals for the grid electrode of one transistor in the first driving circuit; the second signal line group comprises a plurality of second signal lines; the second signal line is used for transmitting the working voltage or providing a gating signal for the grid electrode of one transistor in the second driving circuit; along the routing direction of the first signal line, the display screen comprises two high-density pixel groups which are respectively positioned at two sides of the low-density pixel group and are arranged side by side with the low-density pixel group; each row of the second pixels in the plurality of second pixels arranged in an array is arranged in the same row as one row of the first pixels in the plurality of first pixels arranged in an array; each row of first pixels comprises a plurality of first sub-pixels arranged in an array; each row of second pixels comprises a plurality of second sub-pixels arranged in an array; in the first pixels in each row, the first signal lines electrically connected with the first sub-pixels in the same row are shared with the second signal lines electrically connected with the second sub-pixels in the same row in the second pixels in each row. The first sub-pixels in the same row in the first high-density pixel group and the second high-density pixel group do not share the same first signal line, and the first signal line is not needed to be arranged at the position where the second pixel is not arranged in the second display area, so that the shielding of the first signal line on ambient light can be avoided, and the transmittance of the second display area is further improved.

Optionally, the display screen further includes a first signal line group for transmitting a driving signal to the first driving circuit and a second signal line group for transmitting a driving signal to the second driving circuit; the first signal line group comprises a first data line; the first data line is used for transmitting data voltage; the second signal line group comprises a second data line; the second data line is used for transmitting data voltage; along the routing direction of the first data line, the display screen comprises two high-density pixel groups which are respectively positioned at two sides of the low-density pixel group and are arranged side by side with the low-density pixel group; each column of second pixels in the plurality of second pixels arranged in an array is arranged in the same column as one column of first pixels in the plurality of first pixels arranged in an array; each column of first pixels comprises a plurality of first sub-pixels arranged in an array; each column of second pixels comprises a plurality of second sub-pixels arranged in an array; in each column of the first pixels, the first data lines electrically connected with the first sub-pixels in the same column are shared with the second data lines electrically connected with the second sub-pixels in the same column in each column of the second pixels; in the two high-density pixel groups, two first data lines electrically connected with the first sub-pixels in the same column are coupled through a connecting line, and the connecting line bypasses the second display area. The first data lines respectively connected with the first sub-pixels positioned in the same column in the third high-density pixel group and the fourth high-density pixel group are coupled through the connecting lines, and the connecting lines do not pass through the second display area but bypass the second display area. The first data line is not needed to be arranged at the position where the second pixel is not arranged in the second display area, so that the shielding of the first data line on the ambient light can be avoided, and the transmittance of the second display area is further improved.

Optionally, the display screen further includes a black matrix layer disposed on a side of the first driving circuit and the second driving circuit away from the substrate; the orthographic projection of the first driving circuit on the substrate, the orthographic projection of the first signal line group on the substrate, the orthographic projection of the second driving circuit on the substrate and the orthographic projection of the second signal line group on the substrate are all located in the orthographic projection of the black matrix layer on the substrate. The black matrix layer is arranged and covers the first driving circuit, the first signal line group, the second driving circuit and the second signal line group. Thus, on one hand, the first driving circuit, the first signal line group, the second driving circuit and the second signal line group can be prevented from being irradiated by ambient light. On the other hand, even if part of the ambient light is emitted from the first light emitting device and the second light emitting device to the first driving circuit, the first signal line group, the second driving circuit and the second signal line group, the black matrix layer can shield the ambient light reflected by the first driving circuit, the first signal line group, the second driving circuit and the second signal line group, and the interference of the reflected light to the display light can be reduced.

Optionally, the first light emitting device comprises a first cathode, and the second light emitting device comprises a second cathode; the thickness of the first cathode is greater than the thickness of the second cathode. By thinning the thickness of the second cathode in the second light emitting device in the second display region, the transmittance of the second cathode can be improved, so that the transmittance of the second display region can be improved.

Optionally, each second light emitting device comprises a second cathode; the adjacent second cathodes are arranged at intervals. By not arranging the second cathode in the blank area between the adjacent second pixels, the filtering effect of the second cathode on the ambient light can be eliminated, and the transmittance of the second display area is further improved.

Optionally, the display screen further includes a polarizing layer disposed on a side of the first driving circuit away from the substrate; the polarization layer is provided with a third opening, and the third opening is positioned in the second display area. The polarizing layer is disposed only in the first display region, and the polarizing layer is not disposed in the second display region. Therefore, the polarization layer does not have a filtering effect on the ambient light passing through the second display area, and the transmittance of the second display area can be improved.

Optionally, the display screen further comprises a plurality of third light emitting devices located between adjacent second pixels; and a row of third light-emitting devices positioned between two adjacent rows of the plurality of second pixels arranged in an array are arranged in the same row as a row of first light-emitting devices in the plurality of first pixels arranged in an array. Only the third light emitting device is disposed without a driving circuit by a blank region between adjacent second pixels. Since the third light emitting device is a light transmitting structure, the influence on the transmittance of the second display region is small. Therefore, the display screen provided by the example can save the cost without changing the existing process for preparing the electroluminescent layer on the basis of improving the transmittance of the second display area.

Optionally, the display screen further comprises a plurality of third light emitting devices located between adjacent second pixels; and a column of third light-emitting devices positioned between two adjacent columns of the plurality of second pixels arranged in an array are arranged in the same column as a column of first light-emitting devices in the plurality of first pixels arranged in an array.

Optionally, the display screen further includes a color filter layer disposed on a side of the first light emitting device and the second light emitting device away from the substrate; the color filter layer at least comprises three color filter patterns respectively corresponding to three primary colors; each first light-emitting device corresponds to a color filter pattern with the same light-emitting color as the first light-emitting device, and each second light-emitting device corresponds to a color filter pattern with the same light-emitting color as the second light-emitting device. The first light-emitting device and the second light-emitting device are far away from the color filter layer on one side of the substrate, so that reflected light can be emitted out of the display screen after passing through the color filter layer. Taking the red color filter pattern in the color filter layer as an example, when the reflected light is directed to the red color filter pattern, only the red light in the reflected light can pass through the red color filter pattern, and the green light and the blue light in the reflected light cannot pass through the red color filter pattern. This means that the red color filter pattern filters out at least two thirds of the reflected light. Similarly, only green light of the reflected light may pass through the green color filter pattern, and only blue light of the reflected light may pass through the blue color filter pattern. Therefore, the color filter layer in this example can perform a good filtering function on the reflected light, so that the display screen can have a good display effect even when the polarizing film is not arranged.

In a second aspect, a terminal is provided, comprising the display screen of any one of the first aspect; the terminal also comprises an optical device which is arranged on the back of the display screen, wherein the light receiving surface faces the display screen, and the orthographic projection of the optical device on the display screen is positioned in the second display area.

Optionally, the optical device includes a first camera; the focal length of the first camera is less than 4 mm. The focal length of the first camera is set to be smaller than 4mm, so that the influence of grating diffraction on the imaging of the first camera can be reduced.

Optionally, the optical device includes a first camera; the aperture of the first camera is larger than f/2.2, wherein f is the focal length of the first camera. By increasing the aperture of the first camera, the light incident amount of the first camera can be increased to some extent. The first camera of big light ring can compensate the influence of display screen transmissivity to the light inlet quantity to a certain extent, promotes the effect of shooing of first camera.

Optionally, the first camera includes an image sensor, and a pixel size of the image sensor is greater than 0.8 um. The first camera with the large pixel size can compensate the influence of the transmittance of the display screen on the light entering amount to a certain extent, and the photographing effect of the first camera is improved.

Optionally, the terminal further includes a processing unit; the optical device further comprises a second camera; the resolution of the second camera is greater than 8M; the first camera and the second camera are electrically connected with the processing unit; the first camera is used for transmitting the contrast data of the picture to the processing unit, and the second camera is used for transmitting the resolution data of the picture to the processing unit; the processing unit is used for processing the contrast data and the resolution data to generate a target image. The defect of low photographing quality of a single camera can be overcome.

Drawings

Fig. 1 is a schematic diagram of a framework of a terminal according to an embodiment of the present application;

fig. 2a is a schematic diagram illustrating a positional relationship between an optical device and a display screen according to an embodiment of the present disclosure;

fig. 2b is a schematic view of a sub-pixel arrangement of a display panel according to an embodiment of the present disclosure;

fig. 2c is a schematic structural diagram of a driving circuit according to an embodiment of the present disclosure;

fig. 2d is a schematic structural diagram of another driving circuit provided in the embodiment of the present application;

fig. 2e is a schematic structural diagram of a display screen according to an embodiment of the present disclosure;

FIG. 2f is a schematic structural diagram of a pixel defining layer according to an embodiment of the present disclosure;

fig. 3a is a schematic diagram illustrating an arrangement of a high-density pixel group and a low-density pixel group according to an embodiment of the present disclosure;

fig. 3b is a schematic diagram illustrating another arrangement of high-density pixel groups and low-density pixel groups according to an embodiment of the present disclosure;

fig. 3c is a schematic layout diagram of sub-pixels in a display panel according to an embodiment of the present disclosure;

fig. 3d is a schematic structural diagram of a first pixel according to an embodiment of the present disclosure;

fig. 3e is a schematic structural diagram of a second pixel according to an embodiment of the present disclosure;

fig. 4a to fig. 4d are schematic diagrams illustrating region division of a display screen according to an embodiment of the present application;

5 a-5 f are schematic diagrams of region division of another display screen provided in the embodiments of the present application;

fig. 6 is a schematic diagram illustrating transmission conditions of ambient light for a first display area and a second display area according to an embodiment of the present disclosure;

FIG. 7 is a schematic diagram illustrating an arrangement of sub-pixels in another display panel according to an embodiment of the present disclosure;

fig. 8 is a schematic view of an evaporation process according to an embodiment of the present disclosure;

fig. 9 is a schematic top view of a display screen according to an embodiment of the present application;

FIG. 10a is a schematic cross-sectional view taken along line A-A' of FIG. 9;

FIG. 10B is a schematic cross-sectional view taken along line B-B' of FIG. 9;

FIG. 10c is a schematic top view of another display panel provided in accordance with an embodiment of the present application;

FIG. 10d is a schematic top view of another display screen provided in the embodiments of the present application;

fig. 11a is a schematic top view of another display screen provided in the embodiment of the present application;

fig. 11b is a schematic top view of another display screen provided in the embodiment of the present application;

FIG. 12a is a schematic cross-sectional view taken along the line C-C' in FIG. 11 b;

FIG. 12b is another schematic cross-sectional view taken along the line C-C' in FIG. 11 b;

FIG. 12C is a schematic cross-sectional view taken along the line C-C' in FIG. 11 b;

FIG. 12d is a schematic cross-sectional view taken along the line C-C' in FIG. 11 b;

FIG. 13 is a schematic diagram of an ambient light diffraction process provided by an embodiment of the present application;

fig. 14a is a schematic top view of another display screen provided in the embodiment of the present application;

FIG. 14b is a schematic cross-sectional view taken along line D-D' of FIG. 14 a;

fig. 15a is a schematic top view of a second driving circuit according to an embodiment of the present disclosure;

fig. 15b is a schematic diagram illustrating a positional relationship between a padding block and a second driving circuit according to an embodiment of the present disclosure;

fig. 16a is a schematic view illustrating a positional relationship between a light-shielding strip and a second signal line according to an embodiment of the present disclosure;

fig. 16b is a schematic view illustrating a positional relationship between another light-shielding strip and a second signal line according to an embodiment of the present disclosure;

fig. 17a is a schematic diagram illustrating a positional relationship between a first sub-signal line and a second sub-signal line according to an embodiment of the present disclosure;

FIG. 17b is a schematic cross-sectional view taken along line E-E' of FIG. 17 a;

fig. 18a is a schematic structural diagram of a second signal line in a display screen according to an embodiment of the present disclosure;

fig. 18b is a schematic structural diagram of a conventional second signal line in a display screen according to an embodiment of the present application;

fig. 18c is a schematic diagram illustrating a connection relationship between a second signal line and a gate driving circuit according to an embodiment of the disclosure;

fig. 19a is a schematic structural diagram of a second data line in a display screen according to an embodiment of the present application;

fig. 19b is a schematic structural diagram of a conventional second data line in a display screen according to an embodiment of the present application;

fig. 20a is a schematic structural diagram of a black matrix layer in a display screen according to an embodiment of the present disclosure;

fig. 20b is a schematic structural diagram of another black matrix layer in a display screen according to an embodiment of the present application;

fig. 21 is a schematic structural diagram of a first cathode and a second cathode provided in an embodiment of the present application;

FIGS. 22 a-22 c are schematic views illustrating the preparation process of a first cathode and a second cathode according to the embodiments of the present disclosure;

fig. 23a is a schematic top view of another display screen provided in the embodiment of the present application;

FIG. 23b is a schematic cross-sectional view taken along line H-H' of FIG. 23 a;

fig. 24a is a schematic top view of another display screen provided in the embodiment of the present application;

FIG. 24b is a schematic cross-sectional view taken along line M-M' in FIG. 24 a;

fig. 25 is a schematic structural diagram of a display screen according to an embodiment of the present application;

fig. 26 is a schematic structural diagram of a terminal according to an embodiment of the present application;

fig. 27 is a schematic structural diagram of a first camera provided in an embodiment of the present application;

fig. 28 is a schematic optical path diagram of diffracted light received by a first camera according to an embodiment of the present disclosure;

fig. 29 is a schematic structural diagram of an image sensor according to an embodiment of the present disclosure;

fig. 30 is a schematic structural diagram of another terminal according to an embodiment of the present application.

Reference numerals:

01-a terminal; 10-a housing assembly; 20-a display screen; 21-a first pixel; 211-first sub-pixel; 212-a first drive circuit; 213-a first light emitting device; 214-a first signal line group; 2141-a first data line; 2142-a first signal line; 2143-connecting lines; 22-a second pixel; 221-a second subpixel; 222-a second drive circuit; 223-a second light emitting device; 224-a second signal line group; 2241-a second data line; 2242-a second signal line; 22421-a first sub-signal line; 22422-a second sub-signal line; 23-a substrate; 24-a third light emitting device; 241-a grid electrode; 242-a gate insulating layer; 243-active layer; 244-source drain electrode layer; 245-a passivation layer; 246-a planar layer; 25-a pixel defining layer; 251-a retaining wall; 252 — a first opening; 253-a second opening; 26-a second insulating layer; 27-a light shielding block; 28-filling and supplementing blocks; 29-shading strip; 30-an optical device; 31-a first camera; 311-line connection; 312-an image sensor; 3121-pixel blocks; 313-an infrared filter; 314-a focus motor; 315-lens group; 32-a second camera; 40-gate drive circuit. 50-a black matrix layer; 60-a first mask plate; 61-open area; 62-occlusion region; 70-a second mask plate; 71-an opening; 72-a shield; 80-a polarizing layer; 81-through holes; 90-color filter layer; 91-a color filter pattern; 100-processing unit.

Detailed Description

The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments.

In the following, the terms "first", "second", etc. are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first," "second," etc. may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless otherwise specified.

Further, in the present application, directional terms such as "upper" and "lower" are defined with respect to a schematically-disposed orientation of components in the drawings, and it is to be understood that these directional terms are relative concepts that are used for descriptive and clarity purposes and that will vary accordingly with respect to the orientation in which the components are disposed in the drawings.

In the present application, unless expressly stated or limited otherwise, the term "coupled" is to be construed broadly, e.g., "coupled" may be a fixed connection, a removable connection, or an integral part; may be directly connected or indirectly connected through an intermediate.

The embodiment of the application provides a terminal. The terminal can be a tablet personal computer, a mobile phone, an electronic reader, a remote controller, a Personal Computer (PC), a notebook computer, a Personal Digital Assistant (PDA), a vehicle-mounted device, a network television, a wearable device, a television and other products with a display interface, and intelligent display wearing products such as an intelligent watch and an intelligent bracelet. The embodiment of the present application does not specifically limit the specific form of the terminal. For convenience of description, the following embodiments are all exemplified by taking a terminal as a mobile phone.

As shown in fig. 1, the terminal 01 mainly includes a housing assembly 10 and a display 20.

The display screen 20 is used for displaying pictures, and the housing assembly 10 is used for carrying and protecting the display screen 20. A display screen 20 is located within the housing assembly 10.

Wherein the display screen 10 is capable of self-illumination. The display screen 10 may be an Organic Light Emitting Diode (OLED) display screen.

In addition, as shown in fig. 1, the terminal 01 further includes an optical device 30, the optical device 30 is disposed on the back surface a2 side of the display panel 20 opposite to the light exit surface a1, and a light receiving surface of the optical device 30 faces the display panel 20.

The optical device 30 is a component including a photosensor, among others. The optical device 30 may be, for example, a front camera, a fingerprint sensor, or the like.

As shown in fig. 2a, the display panel 20 defines a display area a and a peripheral area B located at the periphery of the display area a.

The relative position relationship and the shape of the display area a and the peripheral area B are not limited, and in the embodiment of the present application, the peripheral area B surrounds the display area a for a circle.

It will be appreciated that the terminal 01 includes optics 30 that perform a particular function by collecting ambient light directed to the optics 30 through the display screen 20. The display screen 20 is only transparent through the display area a, and therefore, as shown in fig. 2a, the orthographic projection of the optical device 30 on the display screen 20 is located in the display area a of the display screen 20.

As shown in fig. 2b, the display area a includes a plurality of sub-pixels P, each including at least three sub-pixels P for displaying three primary colors. For convenience of description, the plurality of sub-pixels P are described as an example in a matrix arrangement.

For example, each pixel includes at least one red sub-pixel P, one green sub-pixel P, and one blue sub-pixel P.

It should be understood that the shape and arrangement of the sub-pixels P illustrated in the present application are only illustrative and not limiting.

In addition, a driving circuit Q and an OLED electrically connected to the driving circuit Q are disposed in each sub-pixel P, and the driving circuit Q is used for controlling the OLED to perform display.

For example, in some embodiments, as shown in fig. 2c, the driving circuit Q includes a capacitor Cst and a plurality of switching transistors (M1, M2, M3, M5, M6, M7) and a driving transistor M4. Namely, the 7T1C configuration.

In some embodiments, as shown in fig. 2d, the driving circuit Q includes a capacitor Cst and one switching transistor M1 and one driving transistor M2. I.e., the 2T1C configuration.

Of course, the driving circuit Q may have other structures, and this embodiment of the present application is only an illustration.

Regarding the way in which the driving circuit Q and the light emitting device OLED are stacked in the display panel 20, as shown in fig. 2e, the display panel 20 includes a substrate 23 and sub-pixels P disposed on the substrate 23. In fig. 2e it is illustrated that two sub-pixels P are arranged on the substrate 23.

The driving circuit Q in the subpixel P includes a driving transistor M4 as shown in fig. 2 e. The other transistors in the drive circuit Q are formed in synchronization with the drive transistor M4 and are provided on the same layer.

As shown in fig. 2e, the light emitting device OLED in the subpixel P is disposed on the side of the driving transistor M4 away from the substrate 23. The OLED includes an anode a, an electroluminescent layer (EML), and a cathode c sequentially arranged in a direction away from the substrate 23.

The anode a is electrically connected to the second pole of the driving transistor M4 for receiving the driving current I generated by the driving transistor M4_sdThe electroluminescent layer EML is at a drive current I_sdIs driven to emit light.

A pixel defining layer 25 is disposed between the adjacent sub-pixels P, and the pixel defining layer 25 is used for preventing light emitted by the adjacent sub-pixels P from mixing.

As shown in fig. 2f, the pixel defining layer 25 includes a plurality of laterally and longitudinally intersecting walls 251 and a plurality of first openings 252 surrounded by the plurality of laterally and longitudinally intersecting walls 251. A first opening 252 is located at one subpixel P.

As shown in fig. 2e, the driving circuit Q is located on one side of the retaining wall 251 close to the substrate 23, and the OLED is located in the first opening 252.

On the basis, in order to improve the lighting effect of the optical device 30 and thus improve the detection accuracy of the optical device 30, the sub-pixels P in the display screen 20 are rearranged.

In some embodiments, as shown in FIG. 3a, display screen 20 includes at least one high density pixel group G and at least one low density pixel group D disposed on substrate 23; the high-density pixel group G includes a plurality of first pixels 21 arranged in an array and the low-density pixel group D includes a plurality of second pixels 22 arranged in an array.

In fig. 3a, the display panel 20 includes one low-density pixel group D and four high-density pixel groups G. Wherein, the upper, lower, left and right of the low-density pixel group D are respectively provided with a high-density pixel group G.

As shown in fig. 3a, pixels arranged in a row in the horizontal direction X are referred to as pixels in the same row. The pixels arranged in a line in the vertical direction Y are referred to as pixels of the same column.

In some embodiments, as shown in fig. 3a, the one-row second pixels 22 in the low-density pixel group D and the one-row first pixels 21 in the high-density pixel group G are located in the same row along the horizontal direction X. For example, the third row of the first pixels 21 in the high-density pixel group G and the first row of the second pixels 22 in the low-density pixel group D are located in the same row, and form the third row of pixels from top to bottom in the display panel 20.

In the vertical direction Y, a column of the second pixels 22 in the low-density pixel group D and a column of the first pixels 21 in the high-density pixel group G are located in the same column, for example, a fourth column of the first pixels 21 in the high-density pixel group G and the first column of the second pixels 22 in the low-density pixel group D are located in the same column, and form a fourth column of pixels from left to right in the display screen 20.

I.e. each row of second pixels 22, is arranged in the same row as one of the rows of first pixels 21. Each column of the second pixels 22 is disposed in the same column as one of the columns of the first pixels 21.

That is, the pitch between adjacent second pixels 22 is at least equal to the size of one second sub-pixel 221, and the pitch between adjacent second pixels 22 is an integer multiple of the size of the second sub-pixel 221, both in the row direction and in the column direction. It is also understood that the second sub-pixel 22 is not disposed at the position where the second sub-pixel 22 should be disposed, but is instead a blank area.

In some embodiments, as shown in fig. 3b, the one row of the second pixels 22 in the low-density pixel group D and the one row of the first pixels 21 in the high-density pixel group G are not located in the same row along the horizontal direction X.

In the vertical direction Y, a column of the second pixels 22 in the low-density pixel group D and a column of the first pixels 21 in the high-density pixel group G are not located in the same column.

For convenience of description, the following description will be given by taking an example in which the second pixels 22 in one row of the low-density pixel group D and the first pixels 21 in one row of the high-density pixel group G are located in the same row, and the second pixels 22 in one column of the low-density pixel group D and the first pixels 21 in one column of the high-density pixel group G are located in the same column.

As shown in fig. 3a, each of the first pixels 21 includes at least three first sub-pixels 211 for respectively displaying three primary colors.

It is understood that each of the first pixels 21 includes a plurality of first sub-pixels 211 including at least one red first sub-pixel R1, one green first sub-pixel G1, and one blue first sub-pixel B1. In fig. 3a, it is illustrated that one first pixel 21 includes four first sub-pixels 211, and the four first sub-pixels 211 are a red first sub-pixel R1, two green first sub-pixels G1, and a blue first sub-pixel B1, respectively.

As shown in fig. 3c, each of the first sub-pixels 211 at least includes a first driving circuit 212 and a first light emitting device 213 connected to the first driving circuit 212, and the first driving circuit 212 is used for driving the first light emitting device 213 to emit light.

In fig. 3c, one first pixel 21 comprising three first sub-pixels 211 is illustrated as an example.

As shown in fig. 3a, each of the second pixels 22 includes at least three second sub-pixels 221 for respectively displaying three primary colors.

It is understood that each of the second pixels 22 includes a plurality of second sub-pixels 221, including at least one red second sub-pixel R2, one green second sub-pixel G2, and one blue second sub-pixel B2. In fig. 3a, it is illustrated that one second pixel 22 includes four second sub-pixels 221, and the four second sub-pixels 221 are a red second sub-pixel R2, two green second sub-pixels G2, and a blue second sub-pixel B2, respectively.

As shown in fig. 3c, each of the second sub-pixels 221 at least includes a second driving circuit 222 and a second light emitting device 223 electrically connected to the second driving circuit 222, and the second driving circuit 222 is used for driving the second light emitting device 223 to emit light.

In fig. 3c, one second pixel 22 comprising three second sub-pixels 221 is illustrated as an example.

In some embodiments, as shown in fig. 3d, the first driving circuit 212 may be the same as the driving circuit Q shown in fig. 2 c. As shown in fig. 3e, the second driving circuit 222 may be, for example, the same as the driving circuit Q shown in fig. 2c described above. For example, all are 7T1C structures.

In some embodiments, the first driving circuit 212 and the second driving circuit may be, for example, the same as the driving circuit Q shown in fig. 2d described above. For example, all are 2T1C structures.

That is, in the embodiment of the present application, the first subpixel 211 displaying the same color light and the second subpixel 221 displaying the same color light may have the same structure.

The area where the plurality of first pixels 21 arranged in an array are located is a first display area a1, and the area where the plurality of second pixels 22 arranged in an array are located is a second display area a 2.

Based on this, as shown in fig. 4a, the display area a includes a first display area a1 and a second display area a 2. The relative positional relationship and shape of the first display area a1 and the second display area a2 are not limited.

The first display region a1 is filled with high-density pixel groups G, and the second display region a2 is filled with low-density pixel groups D.

In some embodiments, as shown in fig. 4 a-4 d, the second display region a2 is located at one side of the first display region a 1.

In some embodiments, as shown in fig. 5 a-5 f, the first display area a1 surrounds the second display area a 2.

Wherein, the second display area a2 can be an area as shown in fig. 5 a-5 d; or may be a plurality of regions as shown in fig. 5 e-5 f. In the case where the second display area a2 is a plurality of areas, one low-density pixel group D is provided in each area.

As shown in fig. 3a, the pixel density of the first display area a1 in which the plurality of first pixels 21 arranged in an array are located is greater than the pixel density of the second display area a2 in which the plurality of second pixels 22 arranged in an array are located.

Pixel density (PPI) refers to the number of pixels per inch of screen. The pixel density of the first display region a1 is greater than that of the second display region a2, and it can be understood that the distance between adjacent first pixels 21 in the first display region a1 is smaller than that between adjacent second pixels 22 in the second display region a2, as shown in fig. 3 a. That is, the number of the first pixels 110 disposed is greater than the number of the second pixels 120 within the same area.

Since the pixel density of the first display region a1 is greater than that of the second display region a2, as shown in fig. 3c, the density of the first driving circuits 112 of the first display region a1 is greater than that of the second driving circuits 122 of the second display region a2, so that the number of transistors of the first display region a1 is greater than that of the second display region a 2.

As shown in fig. 6, the optical device 30 is located on the back side a2 of the display panel 20, and since the transistors in the first driving circuit 212 and the second driving circuit 222 are light-shielding materials, the ambient light is shielded after being emitted to the first driving circuit 212 and the second driving circuit 222, so that the light cannot pass through and cannot be emitted to the optical device 30. Since a blank region where the second driving circuit 122 is not disposed exists in the second display region a2, the ambient light transmittance of the second display region a2 is greater than that of the first display region a 1.

In the embodiment of the present application, the number of transistors in the second display region a2 is smaller than that in the first display region a1 by dividing the display region a into the first display region a1 and the second display region a2 and making the pixel density of the first pixels 21 arrayed in the first display region a1 larger than that of the second pixels 22 arrayed in the second display region a 2. The area of the light-transmitting region in the second display region a2 is increased, the aperture ratio is increased, and the overall transmittance of the local region is increased, so that the ambient light transmittance of the second display region a2 is greater than the ambient light transmittance of the first display region a 1.

Based on this, in order to reduce the shielding of the second driving circuit 222 from the ambient light, the second driving circuit 222 is configured as the 2T1C shown in fig. 2d in this example. Compared to the 7T1C configuration as shown in fig. 2c, the number of transistors can be reduced, thereby reducing the footprint of the second driver circuit 222. Thereby reducing the light-shielding effect of the second driving circuit 222 and increasing the transmittance of the second display area a 2.

Based on this, when the optical device 30 is disposed in the second display area a2, the ambient light receiving rate of the optical device 30 can be further increased, thereby improving the performance of the optical device 30.

In order to further improve the performance of the optical device 30 in the terminal 01, the terminal 01 is further improved by the structure in the following example on the basis of the display screen 20 provided in the embodiment of the present application.

Example 1

In order to reduce the changes to the manufacturing process when manufacturing the display panel 20, the structure of the display panel 20 is improved.

In some embodiments, as shown in FIG. 7, the display screen 20 further includes a plurality of third light emitting devices 24 located between adjacent second pixels 221.

The third light emitting devices 24 in one row between two adjacent rows of the plurality of arrayed second pixels 22 are disposed in the same row as the first light emitting devices 213 in one row of the first sub-pixels 211 of the plurality of arrayed first pixels 21.

A column of the third light emitting devices 24 located between two adjacent columns of the plurality of arrayed second pixels 22 is disposed in the same column as the first light emitting devices 213 in a column of the first sub-pixels 211 of the plurality of arrayed first pixels 21.

That is, the arrangement rule of the plurality of third light emitting devices 24 is the same as the arrangement rule of the first light emitting devices 213 in the first sub-pixels 211 in the plurality of first pixels 21 arranged in an array.

Thus, as shown in fig. 7, the first light emitting devices 213, the second light emitting devices 223, and the third light emitting devices 24 in the display panel 20 are arranged in an array as a whole. Among the first, second, and third light emitting

devices

213, 223, and 24, the light emitting devices emitting the same color light have the same structure.

Therefore, the mask plate used for preparing the first light emitting device 213, the second light emitting device 223, and the third light emitting device 24 in the display panel 20 shown in fig. 7 and the light emitting device in the display panel 20 shown in fig. 2b may be the same without changing the preparation process.

Illustratively, the first light emitting device 213, the second light emitting device 223, and the third light emitting device 24 each include an EML, and the EML is prepared by an evaporation process.

As shown in fig. 8, in the preparation of EML by vapor deposition, a substrate 23 is fixed by an upper magnetic plate 41, and a Fine Metal Mask (FMM) 42 is positioned by a screen so as to be located below the substrate 23, and a crucible 43 used for vapor deposition is provided at the lowermost surface. An organic light emitting material is placed in the crucible 43, and after the crucible 43 is heated, the organic light emitting material is evaporated and sprayed to the FMM 42.

The shadow region 421 on the FMM42 will shadow the substrate 23, causing the organic light emitting material to adhere to the FMM. The open area 422 of the FMM42 does not block the substrate 23 and the organic light emitting material may be attached to the substrate 23 to form an EML.

It is understood that when the EML is formed, only the EML emitting light of one color is formed per evaporation.

Based on this, for example, when forming an EML emitting red light, the shielding region 421 on the FMM42 should shield the EML emitting blue light and the EML emitting green light at the same time, and the opening region 422 on the FMM42 should correspond to the EML emitting red light.

It can be understood from fig. 3c that the first driving circuit 212 in the first display region a1 and the second driving circuit 222 in the second display region a2 are arranged in different patterns, and the first light emitting device 213 in the first display region a1 and the second light emitting device 223 in the second display region a2 are arranged in different patterns. In the conventional process, as shown in fig. 2b, the driving circuit Q and the light emitting device OLED are arranged in the same manner in the whole display panel 20. Therefore, in order to not change the existing manufacturing process, the existing mask plate can still be continuously used.

Therefore, only the third light emitting device 24 is provided in the blank region between the adjacent second pixels 221 in this example, without providing a driving circuit. Since the third light emitting device 24 is a light transmitting structure, the influence on the transmittance of the second display region a2 is small. Thus, the display panel 20 provided by this example can save cost without changing the existing process for preparing the electroluminescent layer on the basis of improving the transmittance of the second display area a 2.

It is understood that the third light emitting device 24 is not present in the second display region a2 of fig. 3c, and there is a blank region between the adjacent second light emitting devices 223. Therefore, the structure of the FMM42 used to manufacture the display 20 shown in fig. 3c and the display 20 shown in fig. 7 is different, but the manufacturing process remains the same. The structure shown in FIG. 3c and the structure shown in FIG. 7 can be prepared by adjusting the shape of the masked regions 421 and the open regions 422 on FMM42, respectively.

Example two

In order to further increase the transmittance of the blank region, the structure of the second light emitting device 223 in the display panel 20 is improved.

As shown in fig. 9, the pixel defining layer 25 includes a plurality of intersecting walls 251 and a plurality of first openings 252 surrounded by the intersecting walls 251.

It will be appreciated that the pixel defining layer 25 is disposed on the side of the first and

second driver circuits

212, 222 remote from the substrate 23.

The plurality of first openings 252 are located in the first sub-pixel 211 and the second sub-pixel 221.

Illustratively, as shown in FIG. 10a, a first opening 252 is located in a first subpixel 211.

That is, each first sub-pixel 211 in the display screen 20 corresponds to one first opening 252, and the first opening 252 defines a light-transmitting range of the corresponding first sub-pixel 211. Each second sub-pixel 221 corresponds to one first opening 252, and the first opening 252 defines a light-transmitting range of the corresponding second sub-pixel 221.

Based on this, as shown in fig. 9, each of the first light emitting devices 213 and each of the second light emitting devices 223 corresponds to one of the first openings 252, and the second light emitting devices 223 are not disposed in the first openings 252 at the gaps between the adjacent second pixels 22.

As shown in fig. 10a, the first light emitting device 213 includes a Hole Injection Layer (HIL), a Hole Transport Layer (HTL), an electroluminescent layer EML, an Electron Transport Layer (ETL), and an Electron Injection Layer (EIL) sequentially stacked in a direction away from the substrate 23. Each of the HIL, HTL, ETL, and EIL in the plurality of first light emitting devices 213 is a unitary structure, and one EML is positioned in one first opening 252.

As shown in fig. 10b, the second light emitting device 223 includes a HIL, an HTL, an EML, an ETL, and an EIL sequentially stacked in a direction away from the substrate 23. At least one of the HIL, the HTL, the ETL, and the EIL in the second light emitting device 223 is only located in the first opening 252, and does not extend into a blank region between adjacent second pixels 22. An EML is positioned within a first opening 252.

In fig. 10b, the EIL in the plurality of second light emitting devices 223 is an integrated structure, and the HIL, the HTL, and the ETL are all independent block structures, for example.

In a top view, taking the HIL in the display panel 20 as an example, the HIL has a structure as shown in fig. 10c, the HIL in the second light emitting device 223 has a bulk structure, and the HILs in the plurality of first light emitting devices 213 have an integral structure.

The HIL can be prepared, for example, by the vapor deposition process illustrated in example one. The HIL is prepared by changing the pattern of the opening region 422 and the shielding region 421 in the FMM42 illustrated in fig. 8 such that the opening region 422 corresponds to a region where the HIL to be formed is located and the shielding region 421 corresponds to a region where the HIL does not need to be formed.

The HIL can be prepared, for example, by a patterning process. For example, the patterning process may include: first, a molybdenum oxide film is plated on the substrate 23 on which the second driver circuit 223 is formed. Secondly, the photoresist liquid (such as photoresist) with extremely strong photosensitivity is sprayed on the substrate entering the yellow light chamber. And then, a mask plate is sleeved to irradiate blue-violet light, and the photoresist liquid is exposed. And then, sending the molybdenum oxide film to a developing area to spray developing solution, removing the photoresist after illumination, keeping the photoresist which is not illuminated, protecting the molybdenum oxide film, and exposing the molybdenum oxide film in an area without the photoresist shielding area. Then, the molybdenum oxide film without the photoresist mask is etched. Finally, the remaining photoresist is removed. Thus, the remaining structure is the desired HIL.

It will be appreciated that the mask plate includes a shadow area and an open area, and that when the blue-violet exposure is performed, the mask plate is placed between the substrate 23 and the light source, and the molybdenum oxide film is sprayed with photoresist. The area of the photoresist, which is shielded by the shielding area of the mask plate, is not irradiated by blue-violet light, that is, no exposure is performed, and the photoresist corresponding to the opening area of the mask plate is irradiated by blue-violet light, that is, exposure is performed. The exposed photoresist is removed and the unexposed photoresist remains. The molybdenum oxide film without the photoresist mask is etched away, that is, the molybdenum oxide film corresponding to the mask region is retained to form the desired HIL. The molybdenum oxide film corresponding to the opening region is etched away.

Among them, the HIL in the first and second

light emitting devices

213 and 223 may be prepared through the same patterning process.

Based on this, the HTL, the ETL, and the EIL in the first and second

light emitting devices

213 and 223 may also be prepared through the above-described patterning process. Different patterns may be formed on the substrate 23 by changing the structure of the shielding region and the opening region in the mask plate to fabricate the first light emitting device 213 and the second light emitting device 223 described above.

Each of the plurality of second sub-pixels 221 in the same second pixel 22 includes one second light emitting device 223. In some embodiments, in order to simplify the patterning process, for the plurality of second light emitting devices 223 belonging to the same second pixel 22, as shown in fig. 10d, the HILs included in the plurality of second light emitting devices 223 are connected into a single structure.

Although all the HIL, HTL, ETL, and EIL are transparent films, they have a certain effect on transmittance. Therefore, by positioning at least one of the HIL, the HTL, the ETL, and the EIL in the second light emitting device 223 only in the first opening 252 and not extending into the empty area between the adjacent second pixels 22, the influence of the layers of the HIL, the HTL, the ETL, and the EIL on the transmittance of the second display region a2 can be avoided, and the transmittance of the second display region a2 can be further improved.

Example three

Example three differs from example two in that: the pixel defining layer 25 is different in structure.

As shown in fig. 11a, the pixel defining layer 25 further includes at least one second opening 253 surrounded by a plurality of intersecting barriers 251.

The second opening 253 is located between adjacent second pixels 22 in the plurality of second pixels 22 arranged in an array, and is used for spacing the adjacent second pixels 22.

That is, since the second sub-pixels 221 do not need to be disposed between the adjacent second pixels 22, it is not necessary to provide the structure of the first openings 252, but to provide the structure of the second openings 253 penetrating at least three second sub-pixels 221. Thus, compared to fig. 10b, the dam 251 is not disposed in the blank region between the adjacent second pixels 22. Since the retaining walls 251 are made of light-shielding materials, the transmittance of the second display region a2 can be further improved without the retaining walls 251. The second opening 253 has a different structure according to the arrangement of the second pixels 22. As shown in fig. 11a, when adjacent second pixels 22 are separated by only one row of sub-pixels, the second opening 253 only penetrates through one row of sub-pixels.

In some embodiments, to further reduce the shielding of the retaining wall 251 from the ambient light, as shown in fig. 11b, the adjacent second openings 253 are communicated.

That is, when the second pixels 22 are not disposed between the plurality of second openings 253, the plurality of second openings 253 communicate with each other.

That is, when the entire row of the second pixels 22 and the entire row of the second pixels 22 are disposed at intervals, the gap between the adjacent rows is penetrated. When the entire column of second pixels 22 and the entire column of second pixels 22 are arranged at intervals, the gaps between adjacent columns penetrate.

Example four

In order to further increase the transmittance of the blank area, the structure of the second driving circuit 222 in the display panel 20 is improved.

As shown in fig. 3e, the second driving circuit 222 includes a plurality of transistors.

Each transistor includes a conductive layer and a first insulating layer disposed in a stacked relation with the conductive layer.

Taking the driving transistor M4 in the second driving circuit 222 as an example, as shown in fig. 12a, the driving transistor M4 includes a gate electrode 241, a gate insulating layer 242, an active layer 243, a source-drain electrode layer 244, and a passivation layer 245, which are sequentially stacked on the substrate 23 in a direction away from the substrate 23.

The source-drain electrode layer 244 includes a first electrode and a second electrode, the first electrode may be a source electrode, for example, and the second electrode is a drain electrode.

The conductive layer may be, for example, the gate electrode 241 or the source/drain electrode layer 244. The first insulating layer may be the gate insulating layer 242 or the passivation layer 245.

For ease of fabrication, multiple transistors in the same second driving circuit 222 share the same first insulating layer.

On this basis, the first insulating layers in the adjacent second driving circuits 222 are spaced apart from each other.

That is, the first insulating layer in each of the second driving circuits 222 is a block structure, and the first insulating layers in the second driving circuits 222 are all independent structures with gaps therebetween. It is also understood that the first insulating layer does not extend into the empty areas between the second pixels 22.

For example, as shown in fig. 12a, the conductive layer is a source/drain electrode layer 244, and the first insulating layer is a passivation layer 245. The passivation layer 245 in each second driving circuit 222 is a block structure, and the passivation layers 245 in adjacent second driving circuits 222 are spaced apart by a gap, not a unitary structure.

It is understood that each film layer of the plurality of transistors in the second driving circuit 222 is disposed in the same layer, for example, the gates of the transistors M1, M2, M3, M4, M5, M6, and M7 shown in fig. 3e are prepared by the same patterning process.

For example, the patterning process may include: first, a metal thin film is plated on the substrate 23. Secondly, the photoresist liquid (such as photoresist) with extremely strong photosensitivity is sprayed on the substrate entering the yellow light chamber. And then, a mask plate is sleeved to irradiate blue-violet light, and the photoresist liquid is exposed. And then, sending the photoresist to a developing area to spray developing solution, removing the photoresist after illumination, reserving the photoresist which is not illuminated, protecting the metal film, and exposing the metal film without the photoresist shielding area. Then, the metal film without the photoresist mask is etched away. Finally, the remaining photoresist is removed. Thus, the remaining structure is the desired gate pattern.

It will be appreciated that the mask plate includes a mask area and an opening area, and when the blue-violet exposure is performed, the mask plate is placed between the substrate 23 and the light source, and the metal film is sprayed with the photoresist. The area of the photoresist, which is shielded by the shielding area of the mask plate, is not irradiated by blue-violet light, that is, no exposure is performed, and the photoresist corresponding to the opening area of the mask plate is irradiated by blue-violet light, that is, exposure is performed. The exposed photoresist is removed and the unexposed photoresist remains. The metal film without the photoresist mask is etched away, that is, the metal film corresponding to the mask region is retained to form the desired gate pattern. The metal film corresponding to the opening region is etched away.

Based on this, other layers in the transistor can also be prepared by the above-mentioned patterning process. Different patterns can be formed on the substrate 23 by changing the structure of the shielding region and the opening region in the mask plate to prepare the second driving circuit 222 described above.

It is understood that the first driver circuit 212 and the second driver circuit 222 in the display screen 20 may be formed simultaneously.

Since the transistors in the second driving circuit 222 are formed synchronously, the respective film layers in the second driving circuit 222 are illustrated by taking only the driving transistor M4 in the second driving circuit 222 as an example in this example.

In one case, the driving transistor M4 is a bottom gate type transistor.

As shown in fig. 12a, the driving transistor M4 includes a gate electrode 241, a gate insulating layer 242, an active layer 243, a source-drain electrode layer 244, and a passivation layer 245, which are sequentially stacked on the substrate 23 in a direction away from the substrate 23.

The conductive layer is a source/drain electrode layer 244, and the first insulating layer is a passivation layer 245. The passivation layer 245 in each second driving circuit 222 is a block structure, and the passivation layers 245 in adjacent second driving circuits 222 are spaced apart by a gap, not a unitary structure.

As shown in fig. 12b, the conductive layer is also a gate electrode 241, and the first insulating layer is also a gate insulating layer 242. The gate insulating layer 242 in each second driving circuit 222 is a block structure, and the gate insulating layers 242 in adjacent second driving circuits 222 are arranged by a gap interval, not an integral structure.

In another case, the driving transistor M4 is a top gate type transistor.

As shown in fig. 12c, the driving transistor M4 includes an active layer 243, a gate insulating layer 242, a gate electrode 241, a passivation layer 245, and a source-drain electrode layer 244, which are sequentially stacked on the substrate 23 in a direction away from the substrate 23.

The conductive layers are a gate electrode 241 and a source/drain electrode layer 244, and the first insulating layer is a gate insulating layer 242 and a passivation layer 245. The gate insulating layer 242 and the passivation layer 245 in each second driving circuit 222 are block structures, and the gate insulating layer 242 and the passivation layer 245 in the adjacent second driving circuit 222 are arranged by a gap interval, not integral structures.

Of course, it is understood that when another insulating film layer is required to be provided on the side of the driving transistor M4 away from the substrate 23 (for example, a planarization layer is provided), the insulating film layer may have the same structure as the gate insulating layer 242.

It is to be understood that, as shown in fig. 12c, the gate insulating layer 242 and the passivation layer 245 in each of the second driving circuits 222 are illustrated as extending to the region where the second light emitting device 223 is located in this example. The gate insulating layer 242 and the passivation layer 245 may not extend to the region where the second light emitting device 223 is located, and may be located only in the region where the second driving circuit 223 is located. In this case, the side of the second driver circuit 222 remote from the substrate 23 may be provided with a planarization layer 246 as needed.

Although the gate insulating layer 242 and the passivation layer 245 are both transparent films, they have a certain effect on transmittance. Therefore, by making at least one of the gate insulating layer 242 and the passivation layer 245 a block-shaped structure and not extending into the empty area between the adjacent second pixels 22, the influence of the film layers of the gate insulating layer 242 and the passivation layer 245 on the transmittance of the second display region a2 can be avoided, and the transmittance of the second display region a2 can be further improved.

In some embodiments, the material of the first insulating layer is a light shielding material. An orthographic projection of the first insulating layer on the substrate 23 is interleaved with an orthographic projection of the second light emitting device 223 on the substrate 23.

Since the first insulating layer is used to prevent short circuit between adjacent conductive layers, the orthographic projection of the conductive layer in the second driving circuit 222 on the substrate 23 is located within the orthographic projection of the first insulating layer on the substrate 23.

The orthographic projection of the first insulating layer on the substrate 23 is staggered with the orthographic projection of the second light emitting device 223 on the substrate 23, and it can be understood that the first insulating layer does not extend to the area where the second light emitting device 223 is located, and is only located in the area where the second driving circuit 222 is located.

As shown in fig. 12d, the first insulating layer is a passivation layer 245, the material of the passivation layer 245 is a light shielding material, and an orthographic projection of the passivation layer 245 on the substrate 23 does not overlap with an orthographic projection of the second light emitting device 223 on the substrate 23.

As shown in fig. 3e, the second driving circuit 222 includes a plurality of transistors connected by a connection line, and a gap exists between the connection line and the connection line. Since the line width of the connecting lines and the width of the gaps between the connecting lines are both in the order of micrometers, a grating is formed between the connecting lines. As shown in fig. 13, when ambient light passes through the grating formed by the connecting lines, diffraction occurs. The diffracted light has bright and dark stripes, which affect the accuracy of the information collected by the optical device 30.

Therefore, in this example, the material of the first insulating layer is selected to be the light-shielding material, and the first insulating layer covers the gap between the connecting lines, so that a grating can be prevented from being formed between the connecting lines, thereby preventing ambient light from being diffracted, and ensuring the accuracy of information acquisition by the optical device 30.

Example five

By providing the light shielding layer alone, the grating formed by the second driving circuit 222 is shielded.

As shown in fig. 14a, the display panel 20 further includes a first light shielding layer, the first light shielding layer includes a plurality of independently disposed light shielding blocks 27, and each of the second driving circuits 222 corresponds to one of the light shielding blocks 27.

Here, since the second driving circuit 222 is not disposed at the gap between the adjacent second pixels 22, the light shielding block 27 is not disposed at the corresponding position.

Note that, in order to illustrate the difference between the case where the light shielding block 27 is provided in the second sub-pixel 221 and the case where the light shielding block 27 is not provided, the light shielding block 27 is not illustrated in a part of the second sub-pixel 221 in fig. 14 a.

The first light shielding layer may be located on the side of the second driving circuit 222 close to the substrate 23, or may be located on the side of the second driving circuit 222 away from the substrate 23.

Since the light shielding block 27 is closer to the second driving circuit 222, the light shielding effect on the second driving circuit 222 is better. Therefore, in some embodiments, as shown in fig. 14b, the light shielding block 27 is located at a side of the second light emitting device 223 close to the substrate 23.

It is understood that when the material of the light shielding block 27 is a resin material, as shown in fig. 14b, the light shielding block 27 may be in direct contact with the conductive layer (taking the gate electrode 241 as an example) in the second driving circuit 222. When the material of the light shielding block 27 is a conductive material, an insulating layer should be disposed between the light shielding block 27 and the conductive layer in the second driving circuit 222.

The orthographic projection of the second drive circuit 222 on the substrate 23 is located within the orthographic projection of the light shielding block 27 corresponding to the second drive circuit 222 on the substrate 23. That is, the light shielding block 27 completely covers the second driving circuit 222.

It will be appreciated that the light block 27 does not block the display light and in some embodiments, as shown in fig. 14a, the orthographic projection of the light block 27 on the substrate 23 is interleaved with the orthographic projection of the second light emitting device 223 on the substrate 23.

That is, the light shielding block 27 does not extend to the area where the second light emitting device 223 is located.

In this example, by providing the light shielding block 27 and making the light shielding block 27 cover the second driving circuit 222, a grating can be prevented from being formed among the gate 21, the source/drain electrode layer 224 and a connecting line between the transistors in the second driving circuit 222, so that diffraction of ambient light is avoided, and accuracy of information acquisition by the optical device 30 is ensured.

In addition, since the transmittance of the region where the second driving circuit 222 is located is relatively low, the effect of providing the first light shielding layer on the transmittance is also relatively small, and the performance of the optical device 30 is not affected.

Example six

By smoothing the second drive circuit 222, the raster formed by the second drive circuit 222 is shielded.

As shown in fig. 15a, at least a part of the outline of the orthographic projection of the second driving circuit 222 on the substrate 23 is a polygonal line. Such as the portion in the dashed box in fig. 15 a.

On this basis, the display screen 20 further comprises a padding layer, which, as shown in fig. 15b, comprises a plurality of padding blocks 28 arranged independently.

As shown in fig. 15b, taking one second sub-pixel 221 as an example, the orthographic projection of the padding block 28 on the substrate 23 coincides with the area where the concave position of the fold line of the second driving circuit 222 corresponding to the padding block 28 is located.

It is understood that when the second driving circuit 222 includes a plurality of recess positions at the fold line, one filling block 28 corresponds to one recess position, and the shapes of the plurality of filling blocks 28 are not identical.

That is, the filling block 28 fills in the area where the edge position of the second driver circuit 222 is uneven, so that when the filling block 28 and the second driver circuit 222 are integrated, the orthographic projection of the integrated body on the substrate 23 is a convex polygon.

Here, the material of the patch 28 is not limited, and may be a conductive material or a non-conductive material. It should be understood that, when the material of the padding block 28 is a conductive material, the padding block 28 should not affect the performance of the gate electrode 241 and the source/drain electrode layer 244 in the second driving circuit 222.

In some embodiments, for convenience of preparation, the filling layer may be disposed on a side of the second driving circuit 222 away from the substrate 23, and the filling layer may also be disposed on a side of the second driving circuit 222 close to the substrate 23.

It is understood that when the material of the filling layer is a conductive material, at least one insulating layer is disposed between the filling layer and the second driving circuit 222.

In some embodiments, to reduce the thickness of the display panel 20, the fill-in layer is the same material as at least one conductive layer in the second driving circuit 222.

That is, the material of the filling layer is a conductive material, and when a conductive layer in the second driving circuit 222 is prepared through a patterning process, the filling layer is formed at the same time.

Here, it should be understood that, taking the same material as the filling layer and the gate 241 in the second driving circuit 222 as an example, although the filling layer and the gate 241 in the second driving circuit 222 are prepared by the same patterning process, if the filling layer and the gate 241 are electrically connected to affect the performance of the second driving circuit 222, the filling layer and the gate 241 should be of a discrete structure. If the performance of the second driving circuit 222 is not affected after the filling layer and the gate electrode 241 are electrically connected, the filling layer and the gate electrode 241 may be an integral structure.

The filling layer is not limited to a single-layer structure, and may be a combination of multiple layers. For example, the padding layer may include a first sub-padding layer and a second sub-padding layer. The first sub-fill layer may be the same layer of material as the gate electrode 221 in the second driving circuit 222, and the second sub-fill layer may be the same layer of material as the source/drain electrode layer 224 in the second driving circuit 222. The first sub filling layer and the second sub filling layer are spliced together to form the shape of the filling layer.

Due to the uneven and irregular shape of the edge of the second driving circuit 222, at least a part of the profile of the orthographic projection of the second driving circuit 222 on the substrate 23 is a broken line, that is, the profile of the orthographic projection of the second driving circuit 222 on the substrate 23 has many small features, and the size of the small features is in the micrometer range, which also can cause diffraction effect on light, thereby affecting the normal operation of the optical device 30 below the display screen 20.

Therefore, in this example, by providing the padding block 28, the small features of the orthographic projection of the second driving circuit 222 on the substrate 23 are padded, so as to prevent the second driving circuit 222 from forming a grating, and thus prevent the second driving circuit 222 from affecting the normal operation of the optical device 30 below the display screen 20.

Example seven

By separately providing the second light shielding layer, the grating formed by the signal lines on the display screen 20 is shielded.

The display panel 20, as shown in fig. 16a, further includes a second signal line group 224 for transmitting driving signals to the second driving circuit 222, the second signal line group 224 including a second data line 2241 and a plurality of second signal lines 2242 arranged to intersect; the second data line 2241 is used to transmit a data voltage; the second signal line 2242 is used to transmit an operating voltage or supply a gate signal to the gate 241 of one transistor in the second driving circuit 222.

The second signal line 2242 may include, for example, a plurality of second gate lines and a plurality of second voltage lines. One second gate line is used to provide a gate signal to the gate 241 of one transistor in the second driving circuit 222, and the gate signal refers to a signal for controlling the gate 241 of the transistor to be turned on or off. A second voltage line is used to provide a voltage signal to the first pole or the second pole of one transistor in the second driving circuit 222.

Taking the second driving circuit 222 shown in fig. 16a as an example, the operating voltages include an initial signal Vint, a high-level power voltage signal ELVDD, and a low-level power voltage signal ELVSS. The gate signal includes a first scan signal N-1, a second scan signal N, and an enable signal EM.

It is understood that, in general, as shown in fig. 16a, the same row of second sub-pixels 221 arranged along the routing direction of the second signal lines 2242 shares the second signal lines 2242 in the same second signal line group 224, but each second sub-pixel 221 in the row of second sub-pixels 221 is individually connected to one second data line 2241.

As shown in fig. 16a, the display panel 20 further includes a second light-shielding layer, the second light-shielding layer includes a plurality of independently disposed light-shielding bars 29, and each second signal line group 224 corresponds to one light-shielding bar 29.

It should be understood that whether one second signal line group 224 connects one second subpixel 221 or one row of second subpixels 221, the second signal group 224 corresponds to one light-shielding bar 29.

On this basis, as shown in fig. 16a, at least part of the orthographic projection of the second signal line group 224 on the substrate 23 is located within the orthographic projection of the light-shielding bar 29 on the substrate 23.

In some embodiments, as shown in fig. 16a, the orthographic projection of the second signal line 2242 in the second signal line group 224 on the substrate 23 is within the orthographic projection of the light-shielding strip 29 on the substrate 23, but the orthographic projection of the second data line 2241 in the second signal line group 224 on the substrate 23 is not within the orthographic projection of the light-shielding strip 29 on the substrate 23.

That is, the light-shielding bar 29 covers only the second signal lines 2242 in the second signal line group 224, and does not cover the second data lines 2241 in the second signal line group 224.

It should be understood that, as shown in fig. 16a, if a portion of the second signal line 2242 in the second signal line group 224 is located above the second sub-pixel 221 and a portion is located below the second sub-pixel 221, the light-shielding bars 29 may be divided into first sub-light-shielding bars and second sub-light-shielding bars.

In some embodiments, as shown in fig. 16b, the orthographic projection of the second data line 2241 in the second signal line group 224 on the substrate 23 is within the orthographic projection of the light-shielding strip 29 on the substrate 23, but the orthographic projection of the second signal line 2242 in the second signal line group 224 on the substrate 23 is not within the orthographic projection of the light-shielding strip 29 on the substrate 23.

That is, the light-shielding bar 29 covers only the second data lines 2241 in the second signal line group 224, and does not cover the second signal lines 2242 in the second signal line group 224.

It is understood that, as shown in fig. 16b, in general, the second data lines 241 in the same second signal line group 224 are shared by one column of the second sub-pixels 221 arranged along the trace direction of the second data lines 241, but each second sub-pixel 221 in one column of the second sub-pixels 221 is individually connected to the second signal line 2242 in one second signal line group 224.

On this basis, as shown in fig. 16b, in some embodiments, the second data lines 2242 connected by two columns of the second sub-pixels 221 are adjacent, instead of spacing one column of the second sub-pixels 221 as shown in fig. 16 a.

In this case, as shown in fig. 16b, two adjacent second data lines 2241 may share the same light shielding bar 29.

Here, the position where the second light-shielding layer is provided is not limited, and the second signal line group 224 may be provided on the side close to the substrate 23, or may be provided on the side far from the substrate 23 in the second signal line group 224. Of course, in the case where a plurality of signal lines in the second signal line group 224 are provided in different layers, the second light-shielding layer may also be provided between two adjacent signal lines.

In addition, the material of the second light-shielding layer is not limited, and may be a conductive material or a non-conductive material.

It is to be understood that, in the case where the material of the second light shielding layer is a conductive material, an insulating layer should be provided between the second light shielding layer and the signal lines in the second signal line group 224.

In the case where the material of the second light-shielding layer is a non-conductive material, if a plurality of signal lines in the second signal line group 224 are arranged in different layers, the second light-shielding layer can serve as an insulating layer between two adjacent signal lines, so that the number of film layers can be reduced.

Since the second signal line group 224 includes a plurality of signal lines, gaps exist between the signal lines, and since the line width (e.g., 2.5 μm) of the signal lines themselves and the width (e.g., 3 μm) of the gaps between the signal lines are both in the micrometer range, a grating is formed between the signal lines, and when ambient light passes through the grating, diffraction as shown in fig. 13 occurs, thereby affecting the normal operation of the optical device 30 below the display screen 20.

Therefore, in this example, the signal lines in the second signal line group 224 are shielded by separately providing a second light shielding layer, so that when external environment light is incident, the area where the second signal line group 224 is located is completely opaque. The formation of a grating by the signal lines can be avoided, diffraction caused by the signal lines in the second signal line group 224 can be eliminated, and the performance of the optical device 30 can be ensured.

In addition, since the transmittance of the area where the second signal line group 224 is located is relatively low, the second light shielding layer has a relatively small influence on the transmittance, and does not affect the performance of the optical device 30.

Example eight

By setting the arrangement of the signal lines in the second signal line group 224, the raster formed by the signal lines in the second signal line group 224 is eliminated.

Among the plurality of second signal lines 2242 of the second signal line group 224, a part is a first sub-signal line and a part is a second sub-signal line.

Illustratively, the initial signal Vint, the high-level power supply voltage signal ELVDD, and the low-level power supply voltage signal ELVSS in the second signal line 2242 serve as the first sub-signal lines. The first scan signal N-1, the second scan signal N, and the enable signal EM in the second signal line 2242 serve as second sub-signal lines.

As shown in fig. 17a, the first sub-signal line 22421 and the second sub-signal line 22422 extend in the same direction. The first sub-signal lines 22421 and the second sub-signal lines 22422 are alternately arranged in a direction perpendicular to the extending direction of the first sub-signal line 22421 and the second sub-signal line 22422, and an orthogonal projection of the first sub-signal line 22421 on the substrate 23 and an orthogonal projection of the second sub-signal line 22422 on the substrate 23 located on both sides of the first sub-signal line 22421 both overlap.

That is, the first sub-signal line 22421 and the second sub-signal lines 22422 located at both sides of the first sub-signal line 22421 overlap. Thus, the second sub-signal line 22422 and the first sub-signal lines 22421 located on both sides of the second sub-signal line 22422 are also overlapped.

As shown in fig. 17b, the display screen 20 further includes a second insulating layer 26 between the first and second

sub signal lines

22421 and 22422.

In a sectional view, to realize that the orthographic projection of the first sub-signal line 22421 on the substrate 23 and the orthographic projection of the second sub-signal lines 22422 located on both sides of the first sub-signal line 22421 on the substrate 23 are overlapped, a gap h1 between adjacent first sub-signal lines 22421 is smaller than a line width h2 of the second sub-signal line 22422, and a gap h3 between adjacent second sub-signal lines 22422 is smaller than a line width h4 of the first sub-signal line 22421.

Here, the first sub-signal line 22421 may be provided on the side of the second sub-signal line 22422 closer to the substrate 23, or the second sub-signal line 22422 may be provided on the side of the first sub-signal line 22421 closer to the substrate 23.

In this example, the second signal line 2242 is divided into two parts provided in different layers, and the signal lines in different layers are shielded from each other, so that a gap formed by the signal lines in the same layer can be shielded, which corresponds to elimination of a gap between the signal lines, that is, elimination of diffraction caused by the signal lines. The manufacturing process can be simplified without adding a new film structure, and the display screen 20 can be made light and thin.

Example nine

The grating formed by the signal lines in the second signal line group 224 is eliminated by selecting the material of the signal lines in the second signal line group 224 to be transparent.

In some embodiments, the material constituting the second data line 2241 is a transparent conductive material.

In some embodiments, the material comprising the second signal lines 2242 is a transparent conductive material.

The transparent conductive material may be at least one of Indium Zinc Oxide (IZO), Indium Tin Oxide (ITO), Aluminum Zinc Oxide (AZO), and Indium Fluorine Oxide (IFO), for example.

In this example, by making the signal lines in the second signal group 224 of transparent conductive material, not only the signal lines in the second signal group 224 can be prevented from forming a grating, but also the signal lines in the second signal group 224 can be prevented from being shaded. So that the light receiving effect and the light receiving amount of the optical device 30 can be improved.

Example ten

By adjusting the arrangement of the second signal lines 2242 in the second signal line group 224, the influence of the second signal lines 2242 on the transmittance of the second display area a2 is reduced.

As shown in fig. 18a, the display panel 20 further includes a first signal line group 214 for transmitting driving signals to the first driving circuit 212 and a second signal line group 224 for transmitting driving signals to the second driving circuit 222.

The first signal line group 214 includes a plurality of first signal lines 2142; the first signal line 2142 is used to transmit an operating voltage or supply a gate signal to a gate of one transistor in the first driver circuit 212.

The types of the operating voltage and the strobe signal can be referred to the related description in the seventh example.

The second signal line group 224 includes a plurality of second signal lines 2242; the second signal line 2242 is used to transmit an operating voltage or supply a gate signal to a gate of one transistor in the second driving circuit 222.

Along the routing direction of the first signal line 2142, the display panel 20 includes two high-density pixel groups G respectively located at two sides of the low-density pixel group D and arranged side by side with the low-density pixel group.

That is, the left side of the low-density pixel group D is provided with the first high-density pixel group G1, and the right side of the low-density pixel group D is provided with the second high-density pixel group G2.

Each row of the second pixels 22 in the plurality of second pixels 22 arranged in an array is arranged in the same row as a row of the first pixels 21 in the plurality of first pixels 21 arranged in an array.

It is to be understood that the first high-density pixel group G1 and the second high-density pixel group G2 are each provided with a plurality of first pixels 21 arranged in an array, and a plurality of rows of the first pixels 21 are distributed in the plurality of first pixels 21 arranged in an array, and fig. 18a illustrates that the first high-density pixel group G1 and the second high-density pixel group G2 each include three rows of the first pixels 21.

Each low-density pixel group D is provided with a plurality of second pixels 22 arranged in an array, at least one row of second pixels 22 is distributed in the plurality of second pixels 22 arranged in an array, and fig. 18a illustrates that each low-density pixel group D includes two rows of second pixels 22.

Each of the two rows of the second pixels 22 is disposed in the same row as one of the three rows of the first pixels 21 in the first high-density pixel group G1, and is disposed in the same row as one of the three rows of the first pixels 21 in the second high-density pixel group G2.

That is, as the first row of pixels (r) and the third row of pixels (c) illustrated in fig. 18a, one row of pixels is composed of one row of first pixels 21 in the first high-density pixel group G1, one row of second pixels 22 in the low-density pixel group D, and one row of first pixels 21 in the second high-density pixel group G2.

Alternatively, one row of pixels is composed of one row of first pixels 21 in the first high-density pixel group G1 and one row of first pixels 21 in the second high-density pixel group G2, as the second row of pixels (c) illustrated in fig. 18 a. Under this structure, the second display region a2 is spaced between one row of the first pixels 21 in the first high-density pixel group G1 and one row of the first pixels 21 in the second high-density pixel group G2.

Each row of the first pixels 21 includes a plurality of first sub-pixels 211 arranged in an array; each row of the second pixels 22 includes a plurality of second sub-pixels 221 arranged in an array.

Fig. 18a illustrates that each first pixel 21 includes four first sub-pixels 211, and each row of first pixels 21 includes two rows of first sub-pixels 211. It is exemplified that each second pixel 22 includes four second sub-pixels 221, and each row of second pixels 22 includes two rows of second sub-pixels 221.

That is, the first row of pixels (r) illustrated in fig. 18a includes two rows of sub-pixels, each row including both the first sub-pixel 211 and the second sub-pixel 221.

In the first pixel 21 in each row, the first signal line 2142 electrically connected to the first sub-pixel 211 in the same row is shared by the second signal line 2242 electrically connected to the second sub-pixel 221 in the same row in the second pixel 22 in each row.

Illustratively, in the first row of pixels (r) illustrated in fig. 18a, the second pixels (22) in one row and the first pixels (21) in one row are arranged in the same row. Under such a structure, the first row first sub-pixel 211 in the row first pixel 21, the first row second sub-pixel 221 in the row second pixel 22, and the first row first sub-pixel 211 in the row first pixel 21 in the second high-density pixel group G2 in the first high-density pixel group G1 share the same second signal line 2242, and the first signal line 2142 is not separately provided.

Similarly, the second row of the first sub-pixels 211 in the row of the first pixels 21 in the first high-density pixel group G1, the second row of the second sub-pixels 221 in the row of the second pixels 22, and the second row of the first sub-pixels 211 in the row of the first pixels 21 in the second high-density pixel group G2 share the same second signal line 2242, and the first signal line 2142 is not separately disposed.

In the second row of pixels (c) illustrated in fig. 18a, the second pixels 22 are not provided in the row, and only one row of first pixels 21 is included. With this structure, the first sub-pixels 211 in the first row of the first pixels 21 in the first high-density pixel group G1 share the same first signal line 2142, and the first sub-pixels 211 in the first row of the first pixels 21 in the second high-density pixel group G2 share the same first signal line 2142. But the first row first sub-pixels 211 in the row first pixels 21 in the two high-density pixel groups G do not share the same first signal line 2142.

That is, in the second row of pixels (c), the first row of first sub-pixels 211 in the first high-density pixel group G1 is connected to one first signal line 2142, the first row of first sub-pixels 211 in the second high-density pixel group G2 is connected to one first signal line 2142, and the two first signal lines 2142 are disconnected at the second display region a2 and are not connected to each other.

Similarly, the second row of the first sub-pixels 211 in the first high-density pixel group G1 is connected to one first signal line 2142, the second row of the first sub-pixels 211 in the second high-density pixel group G2 is connected to one first signal line 2142, and the two first signal lines 2142 are disconnected at the second display area a2 and are not connected to each other.

In the third row of pixels (c) illustrated in fig. 18a, the structure is the same as that in the first row of pixels (r).

That is, as shown in fig. 18a, if a row of first sub-pixels 211 in the first high-density pixel group G1 and the second high-density pixel group G2 is in the same row as a row of second sub-pixels 221 in the low-density pixel group D, the row of first sub-pixels shares the same second signal line 2242. If a row of first sub-pixels 211 in the first high-density pixel group G1 and the second high-density pixel group G2 is not in the same row as a row of second sub-pixels 221 in the low-density pixel group D, and a second display region a2 is spaced between the row of first sub-pixels 211 in the first high-density pixel group G1 and the second high-density pixel group G2, the row of first sub-pixels 211 in the first high-density pixel group G1 and the second high-density pixel group G2 are respectively and independently connected to a first signal line 2142.

Thus, comparing the conventional arrangement shown in fig. 18b, the first sub-pixels 211 in the same row in the first high-density pixel group G1 and the second high-density pixel group G2 share the same first signal line 2142, and the first signal line 2142 passes through the second display area a 2. In the structure illustrated in fig. 18a, the first sub-pixels 211 in the same row in the first high-density pixel group G1 and the second high-density pixel group G2 do not share the same first signal line 2142, and the first signal line 2142 is not disposed at the position where the second pixel 22 is not disposed in the second display area a2, so that the first signal line 2142 can avoid shielding ambient light, and the transmittance of the second display area a2 can be further improved.

In addition, since the number of signal lines in the second display area a2 is smaller, the diffraction phenomenon is weaker. Therefore, by not providing the first signal line 2142 at the position where the second pixel 22 is not provided in the second display area a2, the number of signal lines in the second display area a2 can be reduced, thereby reducing diffraction interference.

It can be understood that, as shown in fig. 18c, during the display process of the display panel 20, the first signal line 2142 coupled to the first sub-pixel 211 in the first high-density pixel array G1 and the first signal line 2142 coupled to the first sub-pixel 211 in the second high-density pixel array G2 are separately connected to one gate driving circuit 40, and are independently driven, in this case, the display panel 20 is a dual-edge driving display panel.

As for the second signal lines 2242 in the display panel 20, one gate driver circuit 40 may be connected separately as shown in fig. 18 c.

The gate driving circuit 40 may be a gate driver on array (GOA) circuit or an Integrated Circuit (IC).

Example eleven

By adjusting the arrangement of the second data lines 2241 in the second signal line group 224, the influence of the second data lines 2241 on the transmittance of the second display area a2 is reduced.

The display panel 20, as shown in fig. 19a, further includes a first signal line group 214 for transmitting a driving signal to the first driving circuit 212 and a second signal line group 224 for transmitting a driving signal to the second driving circuit 222.

The first signal line group 214 includes a first data line 2141; the first data line 2141 is used for transmitting a data voltage.

The second signal line group 224 includes a second data line 2241; the second data line 2241 is used to transmit a data voltage.

Along the routing direction of the first data line 2141, the display screen 20 includes two high-density pixel groups G respectively located at two sides of the low-density pixel group D and arranged side by side with the low-density pixel group D.

That is, the third and fourth high-density pixel groups G3 and G4 are disposed at the upper side of the low-density pixel group D.

Each column of the second pixels in the plurality of second pixels arranged in an array is arranged in the same column as one column of the first pixels in the plurality of first pixels arranged in an array.

It is to be understood that the third high-density pixel group G3 and the fourth high-density pixel group G4 are each provided with a plurality of first pixels 21 arranged in an array, and the plurality of first pixels 21 arranged in an array are distributed with a plurality of columns of first pixels 21, and fig. 19a illustrates that the third high-density pixel group G3 and the fourth high-density pixel group G4 each include five columns of first pixels 21.

Each low-density pixel group D is provided with a plurality of second pixels 22 arranged in an array, at least one column of the second pixels 22 is distributed in the plurality of second pixels 22 arranged in an array, and fig. 19a illustrates that each low-density pixel group D includes three columns of the second pixels 22.

Each of the three columns of the second pixels 22 is disposed in the same column as one of the five columns of the first pixels 21 in the third high-density pixel group G3, and is disposed in the same row as one of the five columns of the first pixels 21 in the fourth high-density pixel group G4.

That is, as illustrated in fig. 19a, the first column of pixels, the third column of pixels, and the fifth column of pixels are first pixels 21 in the third high-density pixel group G3, the second pixels 22 in the column in the low-density pixel group D, and the first pixels 21 in the column in the fourth high-density pixel group G4.

Alternatively, as illustrated in fig. 19a, the second and fourth rows of pixels may be composed of one row of first pixels 21 in the third high-density pixel group G3 and one row of first pixels 21 in the fourth high-density pixel group G4. Under this structure, a second display region a2 is spaced between one column of the first pixels 21 in the third high-density pixel group G3 and one column of the first pixels 21 in the fourth high-density pixel group G4.

Each column of the first pixels 21 includes a plurality of first sub-pixels 221 arranged in an array; each column of the second pixels 22 includes a plurality of second sub-pixels 221 arranged in an array.

In fig. 19a, each first pixel 21 includes four first sub-pixels 211, and each column of first pixels 21 includes two columns of first sub-pixels 211. It is exemplified that each second pixel 22 includes four second sub-pixels 221, and each column of second pixels 22 includes two columns of second sub-pixels 221.

That is, the first column of pixels illustrated in fig. 19a includes two columns of sub-pixels, each including both the first sub-pixel 211 and the second sub-pixel 221.

In each row of the first pixels 21, the first data lines 2141 electrically connected to the first sub-pixels 211 in the same row are shared by the second data lines 2241 electrically connected to the second sub-pixels 221 in the same row in each row of the second pixels 22.

In the two high-density pixel groups G, the two first data lines 2141 electrically connected to the first sub-pixels 21 in the same column are coupled by a connection line 2143, and the connection line 2143 bypasses the second display region a 2.

For example, of the first column of pixels, the third column of pixels, and the fifth column of pixels, the second column of pixels 22 and the first column of pixels 21 illustrated in fig. 19a are arranged in the same column. Under such a structure, the first column of first sub-pixels 211 in the column of first pixels 21 in the third high-density pixel group G3, the first column of second sub-pixels 221 in the column of second pixels 22, and the first column of first sub-pixels 211 in the column of first pixels 21 in the fourth high-density pixel group G4 share the same second data line 2241, and the first data line 2141 is not separately provided.

Similarly, the second row of the first sub-pixels 211 in the row of the first pixels 21 in the third high-density pixel group G3, the second row of the second sub-pixels 221 in the row of the second pixels 22, and the second row of the first sub-pixels 211 in the row of the first pixels 21 in the fourth high-density pixel group G4 share the same second data line 2241, and the first data line 2141 is not separately provided.

In the second and fourth rows of pixels illustrated in fig. 19a, the second pixels 22 are not provided in the row, and only the first pixels 21 are included in the row. In this structure, the first column of first sub-pixels 211 in the column of first pixels 21 in the third high-density pixel group G3 share the same first data line 2141, and the first column of first sub-pixels 211 in the column of first pixels 21 in the fourth high-density pixel group G4 share the same first data line 2141. The two first data lines 2141 connected to the first column first sub-pixels 211 in the column first pixels 21 in the two high-density pixel groups G are coupled by a connection line 2143.

The connecting wire 2143 bypasses from the periphery of the second display area a2, i.e., the connecting wire 2143 is located in the first display area a1 and does not enter the second display area a 2.

That is to say, in the second row of pixels, the second column of pixels, and the fourth column of pixels, the first column of first sub-pixels 211 in the third high-density pixel group G3 is connected to one first data line 2141, the first column of first sub-pixels 211 in the fourth high-density pixel group G4 is connected to one first data line 2141, and the two first data lines 2141 are coupled through the connection line 2143.

Similarly, the second row of the first sub-pixels 211 in the third high-density pixel group G3 is connected to a first data line 2141, the second row of the first sub-pixels 211 in the fourth high-density pixel group G4 is connected to a first data line 2141, and the two first data lines 2141 are coupled to each other by a connection line 2143.

That is, as shown in fig. 19a, if a column of first sub-pixels 211 in the third high-density pixel group G3 and the fourth high-density pixel group G4 is in the same column as a column of second sub-pixels 221 in the low-density pixel group D, the column of first sub-pixels 211 shares the same second data line 2241.

If a column of the first sub-pixels 211 in the third high-density pixel group G3 and the fourth high-density pixel group G4 is not in the same column as a column of the second sub-pixels 221 in the low-density pixel group D, and a second display region a2 is spaced between the column of the first sub-pixels 211 in the third high-density pixel group G3 and the fourth high-density pixel group G4, the column of the first sub-pixels 211 in the third high-density pixel group G3 and the fourth high-density pixel group G4 are respectively and independently connected to a first data line 2141, and the two first data lines 2141 are coupled through a connection line 2143.

Thus, comparing the conventional arrangement shown in fig. 19b, the first sub-pixels 211 in the same column in the third high-density pixel group G3 and the fourth high-density pixel group G4 share the same first data line 2141, and the first data line 2141 passes through the second display area a 2. In the structure illustrated in fig. 19a, the first data lines 2141 of the third high-density pixel group G3 and the fourth high-density pixel group G4, which are respectively connected to the first sub-pixels 211 in the same column, are coupled by the connection line 2143, and the connection line 2143 does not pass through the second display region a2 but bypasses the second display region a 2. The first data line 2141 is not required to be disposed at a position where the second pixel 22 is not disposed in the second display area a2, so that the first data line 2141 can avoid shielding ambient light, and the transmittance of the second display area a2 can be further improved.

In addition, since the number of signal lines in the second display area a2 is smaller, the diffraction phenomenon is weaker. Therefore, by coupling the two first data lines 2141 located in the same column through the connection line 2143, and the connection line 2143 does not pass through the second display region a2 but bypasses the second display region a2, the number of signal lines in the second display region a2 can be reduced, thereby reducing diffraction interference.

Example twelve

The display screen 20 is provided with a black matrix layer to prevent ambient light from being emitted to the first driving circuit 212, the first signal line group 214, the second driving circuit 222, and the second signal line group 224, so as to reduce the reflection of the ambient light at the first driving circuit 212, the first signal line group 214, the second driving circuit 222, and the second signal line group 224, and improve the display effect of the display screen 20.

As shown in fig. 20a, the display panel 20 further includes a black matrix layer 50 disposed on a side of the first and

second driving circuits

212 and 222 remote from the substrate 23.

For example, the black matrix layer 50 may be disposed between the first and

second driving circuits

212 and 222 and the first and second

light emitting devices

213 and 223, or may be disposed on the sides of the first and second

light emitting devices

213 and 223 away from the substrate 23.

The orthographic projection of the first driving circuit 212 on the substrate 23, the orthographic projection of the first signal line group 214 on the substrate 23, the orthographic projection of the second driving circuit 222 on the substrate 24, and the orthographic projection of the second signal line group 224 on the substrate 23 are all within the orthographic projection of the black matrix layer 50 on the substrate 23.

The first signal line group 214 may include at least one of a first data line 2141 and a first signal line 2142, and the second signal line group 224 may include at least one of a second data line 224 and a second signal line 2242.

The black matrix layer 50 may include a plurality of black matrix stripes, and a specific shape of the black matrix layer 50 is related to an arrangement manner of signal lines in the first signal line group 214 and the second signal line group 224.

As shown in fig. 20a, if the connection line 2143 shown in example eleven is provided in the display screen 20, the black matrix layer 50 may also cover the connection line 2143.

As shown in fig. 20b, if the connection line 2143 is not disposed in the display screen 20, and the first data line 2241 directly passes through the second display area a2, the black matrix layer 50 covers the first data line 2241 in the second display area a 2.

The pattern of the black matrix layer 50 shown in fig. 20b is different from the pattern of the black matrix layer 50 shown in fig. 20 a.

Since the first driving circuit 212, the first signal line group 214, the second driving circuit 222, and the second signal line group 224 in the display panel 20 reflect the ambient light after the ambient light is irradiated into the display panel 20, and the reflected light interferes with the display light.

In this example, the black matrix layer 50 is provided, and the black matrix layer 50 covers the first driving circuit 212, the first signal line group 214, the second driving circuit 222, and the second signal line group 224. In this way, on the one hand, the first driving circuit 212, the first signal line group 214, the second driving circuit 222, and the second signal line group 224 are prevented from being irradiated by the ambient light. On the other hand, even if a part of the ambient light is incident on the first driving circuit 212, the first signal line group 214, the second driving circuit 222, and the second signal line group 224 from the first light emitting device 213 and the second light emitting device 223, the black matrix layer 50 can block the ambient light reflected by the first driving circuit 212, the first signal line group 214, the second driving circuit 222, and the second signal line group 224, and can reduce interference of the reflected light with the display light.

Example thirteen

By making the second cathode in the cathode second light emitting device 223 thin, the filtering effect of the second cathode is reduced, and the transmittance of the second display region a2 is improved.

As shown in fig. 21, the first light emitting device 213 includes a first cathode c1, and the second light emitting device 223 includes a second cathode c 2. The thickness h5 of the first cathode c1 is greater than the thickness h6 of the second cathode c 2.

Hereinafter, the preparation methods of the first cathode c1 and the second cathode c2 will be illustrated.

The first cathode c1 and the second cathode c2 may be formed using, for example, an evaporation process.

First, the substrate 23 on which the electron injection layer EIL is formed is masked with a first mask plate 60 as shown in fig. 22a, and is deposited for a time of a × x%.

As shown in fig. 22a, the first mask plate 60 includes an opening region 61 and a shielding region 62, and the opening region 61 corresponds to the first display region a1 and the second display region a 2.

Where a is the time required to form the first cathode c 1. x is a set value, the value of x is related to the thickness of the second and c2, 0< x < 1.

After the first evaporation is completed, a cathode film c3 is formed, and a cathode film c3 covers the first display region a1 and the second display region a 2. At this time, as shown in fig. 22b, the thickness h6 of the cathode thin film c3 is equal to the thickness h6 of the second cathode c 1.

Next, the substrate 23 on which the cathode thin film c3 was formed was masked with a second mask 70 as shown in fig. 22c, and a (1-x%) was deposited for a while.

As shown in fig. 22c, the second mask plate 70 includes an opening 71 and a shielding portion 72, the opening 71 corresponds to only the first display area a1, and the shielding portion 72 shields the second display area a 2.

In other words, the second evaporation is performed only on the first display region a1, and is not performed on the second display region a2, so as to increase the thickness of the cathode film c3 in the first display region a1, thereby forming the first cathode c1 shown in fig. 21. The portion of the cathode film c3 located in the second display region a2 serves as a second cathode c2 shown in fig. 21.

It is understood that the thickness of the second cathode c2 is related to the deposition time, and the thinner the second cathode c2 is, the higher the transmittance is. Therefore, from the perspective of improving the transmittance of the second display area a2, the shorter the first evaporation time x, the better. However, on the other hand, the electrical properties such as resistivity of the second cathode c2 are also related to the thickness of the second cathode c2, and the thinner the second cathode c2 is, the poorer the electrical properties are, which affects the normal functions thereof.

In this example, by reducing the thickness of the second cathode c2 in the second light emitting device 223 in the second display region a2, the transmittance of the second cathode c2 may be increased, and thus the transmittance of the second display region a2 may be increased.

Example fourteen

The second cathode c2 in the second display area a2 is pattern-processed, and the second cathode c2 is not formed for the region where the second subpixel 221 is not disposed.

Each of the second light emitting devices 223 in the display panel 20 includes a second cathode c2, as shown in fig. 23a, spaced between adjacent second cathodes c 2.

That is, as shown in fig. 23b, the second cathode c2 is not formed in the region where the second subpixel 221 is not disposed.

The plurality of second cathodes c2 may or may not be electrically connected.

Here, as shown in fig. 23a, the first cathode c1 included in the plurality of first light emitting devices 211 in the first display region a1 may be a unitary structure.

The first cathode c1 and the second cathode c2 may be prepared, for example, by a patterning process.

The first cathode c1 and the second cathode c2 can also be prepared by an evaporation process, the area where the first cathode c1 and the second cathode c2 need to be evaporated corresponds to the opening area of the mask plate, and the area where the first cathode c1 and the second cathode c2 do not need to be evaporated corresponds to the shielding area of the mask plate.

The first cathode c1 and the second cathode c2 may also be prepared by a laser cutting process that removes the cathode material in the excess area.

The first cathode c1 and the second cathode c2 can also be prepared by a wet etching process, and the cathode material in the redundant area is etched away.

In this example, by not providing the second cathode c2 in the blank region between the adjacent second pixels 22, the filtering effect of the second cathode c2 on the ambient light can be eliminated, and the transmittance of the second display region a2 can be further improved.

Example fifteen

The display panel 20 has a polarizing layer provided therein, but the polarizing layer has a third opening at a position corresponding to the second display area a2, and the polarizing layer is located only in the first display area a 1.

As shown in fig. 24a, the display screen 20 further comprises a polarizing layer 80; the polarizing layer 80 is provided with a third opening, and the third opening is positioned in the second display area a 2.

As shown in fig. 24b, the polarizing layer 80 is disposed on the side of the first driving circuit 212 remote from the substrate 23.

The polarizing layer 80 may be a polarizing plate (polarizer). In this case, a polarizing plate may be attached to the surface of the light exit side of the display panel 20.

The polarizing plate mainly includes: a profiled film layer, a Pressure Sensitive Adhesive (PSA) layer, a polyvinyl alcohol (PVA) layer, a tri-acetate cellulose (TAC) layer, and a polyethylene terephthalate (PET) protective layer, which are sequentially stacked in a direction away from the substrate 23.

Wherein, what play the polarisation effect is the PVA layer, and the TAC layer is used for isolated water and air, and the protection PVA layer is not contacted by water and air, and the PSA layer is used for pasting the polaroid on the surface of the light-emitting side of display screen 20, and special-shaped film layer plays the effect on protection PSA layer, and the protective layer plays the effect of protection TAC.

Alternatively, the polarizing layer 80 may be a wire Grid Polarizer (GP). Illustratively, the wire grid polarizer layer may be integrated into the display panel 20 by sputtering, nanoimprinting, photolithography, etc. during the fabrication of the display panel 20.

The material comprising the wire grid polarizer layer may be a metal. Exemplary materials constituting the wire grid polarizing layer include, but are not limited to, aluminum (Al), copper (Cu), silver (Ag), gold (Au), chromium (Cr), and the like.

As for the preparation method of the polarizing layer 80, for example, a polarizing film layer covering the whole display area a may be prepared, and then the polarizing film layer located in the second display area a2 may be removed by laser cutting to prepare the polarizing layer 80 located only in the first display area a 1. Wherein the pattern of the removed portion of the polarizing film layer is the same as the pattern of the second display area a2, and the remaining pattern covers the first display area a 1.

The polarizing layer 80 may be prepared only at the first display region a1 and not at the second display region a2 during the preparation process, so that the cutting process is omitted.

When ambient light passes through the polarizing layer 80 towards the optical device 30 at the back of the display screen 20, the transmittance of the polarizing layer 80 is less than 50% regardless of whether the polarizing layer 80 is a polarizer or a wire grid polarizing layer, which greatly affects the transmittance of the second display area a 2. Based on this, in order to increase the transmittance of the second display region a2, the polarizing layer 80 is disposed only in the first display region a1, and the polarizing layer 80 is not disposed in the second display region a 2. Thus, the polarizing layer 80 does not filter the ambient light passing through the second display area a2, and the transmittance of the second display area a2 can be improved.

Example sixteen

The display screen 20 is further provided with a color filter layer for filtering the reflected light in the display screen 20 to reduce the interference of the reflected light to the display light.

As shown in fig. 25, the display panel 20 further includes a color filter layer 90 disposed on the side of the first light emitting device 213 and the second light emitting device 223 away from the substrate 23.

The color filter layer 90 includes at least three color filter patterns 91 corresponding to the three primary colors, respectively.

For example, the color filter layer 90 includes red, green, and blue color filter patterns.

Each of the first light emitting devices 213 corresponds to a color filter pattern 91 having the same color as the first light emitting device 213, and each of the second light emitting devices 223 corresponds to a color filter pattern 91 having the same color as the second light emitting device 223.

That is, one first light emitting device 213 corresponds to one color filter pattern, and one second light emitting device 223 corresponds to one color filter pattern.

For example, the first light emitting device 213 emitting red light corresponds to a red color filter pattern, the first light emitting device 213 emitting green light corresponds to a green color filter pattern, and the first light emitting device 213 emitting blue light corresponds to a blue color filter pattern.

The second light emitting device 223 emitting red light corresponds to the red color filter pattern, the second light emitting device 223 emitting green light corresponds to the green color filter pattern, and the second light emitting device 223 emitting blue light corresponds to the blue color filter pattern.

It can be understood that when the external ambient light enters the display panel 20, the reflective structures of the display panel 20, such as the first driving circuit 212, the first signal line group 214, the second driving circuit 222, and the second signal line group 224, reflect the ambient light, so that the reflected light interferes with the display light, and the display effect is affected. In this example, the reflected light is allowed to exit the display screen 20 after passing through the color filter layer 90 by the color filter layer 90 on the side of the first light emitting device 213 and the second light emitting device 223 away from the substrate 23. Taking the red color filter pattern 91 in the color filter layer 90 as an example, when the reflected light is directed to the red color filter pattern 91, only red light in the reflected light can pass through the red color filter pattern 91, and green light and blue light in the reflected light cannot pass through the red color filter pattern 91. This means that the red color filter pattern 91 filters out at least two thirds of the reflected light. Similarly, only green light of the reflected light may pass through the green color filter pattern 91, and only blue light of the reflected light may pass through the blue color filter pattern 91. Therefore, the color filter layer 90 in this example can perform a better filtering function on the reflected light, so that the display panel 20 can have a better display effect even when the polarizer is not provided.

In addition, since each of the first light emitting devices 213 corresponds to a color filter pattern 91 having the same light emitting color as the first light emitting device 213, each of the second light emitting devices 223 corresponds to a color filter pattern 91 having the same light emitting color as the second light emitting device 223. Accordingly, red light emitted from the first and second

light emitting devices

213 and 223 emitting red light is not blocked by the red color filter pattern 91, green light emitted from the first and second

light emitting devices

213 and 223 emitting green light is not blocked by the green color filter pattern 91, and blue light emitted from the first and second

light emitting devices

213 and 223 emitting blue light is not blocked by the blue color filter pattern 91. Accordingly, the color filter layer 90 does not filter out display light, and display brightness can be improved compared with a polarizing layer (which filters 50% of display light).

Example seventeen

The optical device 30 includes a camera, and the structure of the camera is improved to improve the shooting effect of the camera.

The terminal 01 includes any one of the above display screens 20.

On this basis, the orthographic projection of the optical device 30 on the display screen 20 is located in the second display area a2 of the display screen 20, and the light receiving surface of the optical device 30 faces the back surface of the display screen 20.

The optical device 30, as shown in fig. 26, includes a first camera 31.

It is understood that the light receiving surface of the first camera 31 faces the back surface of the display screen 20, which means that the lens group of the first camera 31 faces the back surface of the display screen 20.

On this basis, the focal length of the first camera 31 is less than 4 mm. For example, 3.8mm, 3.5mm, 3.3mm, 3.0mm, 2.5 mm.

As shown in fig. 27, the first camera 31 mainly includes a circuit connection board 311, an image sensor 312, an infrared filter 313, a focusing motor 314, and a lens group 315.

The ambient light passes through the lens assembly 315 and irradiates the infrared filter 313, so as to filter out the infrared light. The image sensor 312 converts the received light intensity into a current, and transmits the current to the circuit connection board 311, and the circuit connection board 311 performs image processing.

The distance from the lens group 315 to the image sensor 312 is called the focal length f.

Based on the structure of the terminal 01 in this example, due to the components of the first driving circuit 212, the first signal line group 214, the second driving circuit 222, the second signal line group 224, and the like in the display screen 20, some equivalent gratings are inevitably formed, and after ambient light passes through the equivalent gratings formed by the first driving circuit 212, the first signal line group 214, the second driving circuit 222, and the second signal line group 224, an image is formed on the first camera 31, and the structure of the whole imaging system is as shown in fig. 28.

As shown in fig. 28, since the equivalent grating is formed in the display screen 20, when the optical device 30 disposed below the display screen is used for imaging and a lens is included in the imaging system, for example, the optical device 30 is the first camera 31, and the lens group 315 includes a lens. The ambient light is imaged in the optics after passing through the second display area a2 and the entire process constitutes the grating diffraction system shown in figure 28.

The first driving circuit 212, the first signal line group 214, the second driving circuit 222, the second signal line group 224, and the like form an equivalent grating, and if the length of the transparent region of the equivalent grating is m and the length of the opaque region of the equivalent grating is n, the grating period d is equal to m + n.

And the distance y between the position of the j-stage main maximum in the grating diffraction and the central position is j f lambda/d. Wherein j is the order of the major pole, f is the focal length of the optical device, λ is the wavelength of the incident light, and d is the period of the grating. The diffraction phenomenon becomes more remarkable as the distance y from the center position to the position where the principal pole is large is larger. Therefore, to reduce the influence of diffraction on the first camera 31, the distance y of each stage principal maximum from the center position is reduced. When the wavelength λ of the incident light is the same as the grating period d, the distance y from the center of each main pole is proportional to the focal length f of the first camera 31. Therefore, selecting the first camera 31 with the small focal length f can reduce the influence of grating diffraction on the imaging of the first camera 31.

Therefore, in this example, by setting the focal length of the first camera 31 to be less than 4mm, the influence of the diffraction of the grating on the imaging of the first camera 31 can be reduced.

On this basis, the pixel size of the image sensor 312 is larger than 0.8 um. For example, 1.0um, 1.2um, 1.4um, 1.5um, 1.8um, 2.0 um.

As shown in fig. 29, the image sensor 312 includes a plurality of pixel blocks 3121 for sensing light, and each pixel block 3121 is a minimum resolution of imaging by the image sensor 312.

The pixel size of the image sensor 312 refers to the size of the pixel block 3121, i.e., the width of the pixel block 3121 in the arrangement direction thereof.

Each pixel block 3121 mainly includes a photodiode (photodiode), the photodiode can generate an output current after receiving light irradiation, and the intensity of the current corresponds to the intensity of the light irradiation, so as to realize image acquisition.

It can be understood that when the distance y between the position of the j-order principal maximum and the center in the grating diffraction is the same as jf λ/d, that is, on the image sensor 312 of the first camera 31, the offset distance of the j-order principal maximum generated by diffraction is the same.

Assuming that the size of the pixel block 3121 is s, and the distance y between the position of the j-level main maximum and the center is jf λ/d, the number N of the j-level main maximum deviation pixel blocks 3121 is y/s. Since the smaller the number of j-level main maximum-shift pixel blocks 3121, the less the influence on the imaging effect. Therefore, when the distance y of the j-level main maximum deviation from the center is constant, the larger the size s of the pixel block 3121 is, the smaller the number of the j-level main maximum deviation pixel blocks 3121 is, and the less the influence on the imaging effect is. Therefore, selecting the first camera 31 having a large pixel size in this example can reduce the influence of grating diffraction on the imaging of the first camera 31.

In addition, the larger the size s of the pixel block 3121 is, the stronger the light intensity that the pixel block 3121 can receive is, and therefore, the first camera 31 with a large pixel size can compensate for the influence of the transmittance of the display screen 20 on the amount of incoming light to some extent, and improve the photographing effect of the first camera 31.

On this basis, in some embodiments, the aperture of the first camera 31 is greater than f/2.2.

Due to the shooting effect of the first camera 31, the shooting effect is better not only in relation to the light intensity, but also in relation to the size of the aperture of the first camera 31, and the larger the aperture is, the larger the light entering amount of the first camera 31 is. Therefore, by increasing the aperture of the first camera 31, the amount of light entering the first camera 31 can be increased to some extent. The first camera 31 with the large aperture can compensate for the influence of the transmittance of the display screen 20 on the light entering amount to a certain extent, and the photographing effect of the first camera 31 is improved.

Example eighteen

Through setting up two cameras, promote the shooting effect.

As shown in fig. 30, the terminal 01 further includes a processing unit 100; the optics 30 further include a second camera 32; the resolution of the second camera 32 is greater than 8M.

The resolution of the second camera 32 is, for example, 16M.

That is, the projections of the first camera 31 and the second camera 32 on the display screen 20 are both located in the second display area a2 of the display screen 20.

The first camera 31 and the second camera 32 are both electrically connected to the processing unit 100.

It should be noted that, as shown in the seventeenth example, the first camera 31 includes a wiring connection board 311, and the second camera 32 may share the same wiring connection board 311 with the first camera 31.

The first camera 31 is used for transmitting contrast data of a picture to the processing unit 100, and the second camera 32 is used for transmitting resolution data of a picture to the processing unit 100.

That is, at the same time, the first camera 31 captures one picture, and the second camera 32 captures one picture. Due to the fact that the pixel size of the first camera 31 is large, the photographing brightness is high, and the contrast of the collected picture is high. Thus, the first camera 31 transmits contrast data of the picture to the processing unit 100. Because the second camera 32 has high resolution, the shooting fineness is good, and the resolution of the collected picture is high. Accordingly, the second camera 32 transmits the resolution data of the picture to the processing unit 100.

The processing unit 100 is configured to process the contrast data and the resolution data to generate a target image.

The processing unit 100 fuses the pictures collected by the first camera 31 and the pictures collected by the second camera 32 to generate pictures with high contrast and high resolution, i.e. to generate clear and fine high-quality pictures. Therefore, the defect of low photographing quality of a single camera can be overcome.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A display screen, comprising a substrate and at least one high density pixel group and at least one low density pixel group disposed on the substrate; the high-density pixel group comprises a plurality of first pixels arranged in an array, and the low-density pixel group comprises a plurality of second pixels arranged in an array;

the first pixel comprises at least three first sub-pixels for respectively displaying three primary colors, the first sub-pixels at least comprise a first driving circuit and a first light-emitting device electrically connected with the first driving circuit, and the first driving circuit is used for driving the first light-emitting device to emit light;

the second pixel comprises at least three second sub-pixels for respectively displaying three primary colors, the second sub-pixels at least comprise a second driving circuit and a second light-emitting device electrically connected with the second driving circuit, and the second driving circuit is used for driving the second light-emitting device to emit light;

the pixel density of a first display area where the first pixels arranged in the plurality of arrays are located is greater than the pixel density of a second display area where the second pixels arranged in the plurality of arrays are located;

the display screen further comprises a pixel defining layer arranged on one side of the first driving circuit and the second driving circuit away from the substrate;

the pixel defining layer comprises a plurality of cross retaining walls and a plurality of first openings which are surrounded by the plurality of cross retaining walls and are positioned in the first sub-pixels and the second sub-pixels;

the second light-emitting device comprises a hole injection layer, a hole transport layer, an electron transport layer and an electron injection layer which are sequentially stacked along the direction far away from the substrate, wherein at least one of the hole injection layer, the hole transport layer, the electron transport layer and the electron injection layer is only positioned in the first opening;

the display screen further comprises a first shading layer, the first shading layer comprises a plurality of shading blocks which are independently arranged, and each second driving circuit corresponds to one shading block;

the orthographic projection of the second driving circuit on the substrate is positioned in the orthographic projection of the light shielding block corresponding to the second driving circuit on the substrate;

the display screen further comprises a filling layer, and the filling layer comprises a plurality of filling blocks which are independently arranged;

at least a part of the outline of the orthographic projection of the second driving circuit on the substrate is a fold line, and the orthographic projection of the filling block on the substrate is overlapped with the area of the concave position of the fold line of the second driving circuit corresponding to the filling block;

the filling layer is arranged on one side, close to the substrate, of the second driving circuit;

or the filling layer is arranged on one side, far away from the substrate, of the second driving circuit;

or the filling layer and at least one conductive layer in the second driving circuit are made of the same material in the same layer.

2. The display screen of claim 1, wherein the pixel definition layer further comprises at least one second opening surrounded by the plurality of intersecting walls;

the second opening is located between the adjacent second pixels and used for separating the adjacent second pixels.

3. A display screen in accordance with claim 2, wherein adjacent second openings communicate.

4. The display panel according to claim 1, wherein the second driver circuit includes a plurality of transistors;

the transistors comprise a conductive layer and a first insulating layer which is arranged in a stacked mode with the conductive layer, and a plurality of transistors in the same second driving circuit share the same first insulating layer; the first insulating layers in the adjacent second driving circuits are arranged at intervals;

the first insulating layer is a gate insulating layer or a passivation layer.

5. The display panel according to claim 1, further comprising a second signal line group for transmitting a driving signal to the second driving circuit, the second signal line group including a second data line and a plurality of second signal lines arranged to intersect; the second data line is used for transmitting data voltage; the second signal line is used for transmitting working voltage or providing a gating signal for the grid electrode of one transistor in the second driving circuit;

the display screen further comprises a second light shielding layer, the second light shielding layer comprises a plurality of independently arranged light shielding strips, and each second signal line group corresponds to one light shielding strip;

at least part of the orthographic projection of the second signal line group on the substrate is positioned in the orthographic projection of the shading strip on the substrate.

6. The display panel according to claim 1, wherein the display panel further comprises a second signal line group for transmitting a driving signal to the second driving circuit, the second signal line group comprising a plurality of second signal lines; the second signal line is used for transmitting working voltage or providing a gating signal for the grid electrode of one transistor in the second driving circuit;

a plurality of second signal lines, wherein one part of the second signal lines is used as a first sub-signal line, and the other part of the second signal lines is used as a second sub-signal line;

the display screen further comprises a second insulating layer positioned between the first sub signal line and the second sub signal line;

the first sub-signal lines and the second sub-signal lines are alternately arranged, and the orthographic projections of the first sub-signal lines on the substrate are overlapped with the orthographic projections of the second sub-signal lines on the substrate, wherein the second sub-signal lines are positioned on two sides of the first sub-signal lines.

7. The display panel according to claim 1, further comprising a second signal line group for transmitting a driving signal to the second driving circuit, the second signal line group including a second data line and a plurality of second signal lines arranged to intersect; the second data line is used for transmitting data voltage; the second signal line is used for transmitting working voltage or providing a gating signal for the grid electrode of one transistor in the second driving circuit;

the second data line or the second signal line is made of a transparent conductive material.

8. The display panel according to claim 1, further comprising a first signal line group for transmitting a driving signal to the first driving circuit and a second signal line group for transmitting a driving signal to the second driving circuit;

the first signal line group comprises a plurality of first signal lines; the first signal line is used for transmitting working voltage or providing a gating signal for a grid electrode of one transistor in the first driving circuit;

the second signal line group comprises a plurality of second signal lines; the second signal line is used for transmitting working voltage or providing a gating signal for the grid electrode of one transistor in the second driving circuit;

along the routing direction of the first signal line, the display screen comprises two high-density pixel groups which are respectively positioned at two sides of the low-density pixel group and are arranged side by side with the low-density pixel group;

each row of the plurality of second pixels arranged in an array is arranged in the same row as one row of the plurality of first pixels arranged in an array;

each row of first pixels comprises a plurality of first sub-pixels arranged in an array; each row of second pixels comprises a plurality of second sub-pixels arranged in an array;

in the first pixels in each row, the first signal lines electrically connected with the first sub-pixels in the same row are shared with the second signal lines electrically connected with the second sub-pixels in each row in the second pixels in each row.

9. The display panel according to claim 1, further comprising a first signal line group for transmitting a driving signal to the first driving circuit and a second signal line group for transmitting a driving signal to the second driving circuit;

the first signal line group comprises a first data line; the first data line is used for transmitting data voltage;

the second signal line group comprises a second data line; the second data line is used for transmitting data voltage;

along the routing direction of the first data line, the display screen comprises two high-density pixel groups which are respectively positioned at two sides of the low-density pixel group and are arranged side by side with the low-density pixel group;

each column of the second pixels arranged in the plurality of arrays is arranged in the same column as one column of the first pixels arranged in the plurality of arrays;

each column of first pixels comprises a plurality of first sub-pixels arranged in an array; each column of second pixels comprises a plurality of second sub-pixels arranged in an array;

in each column of the first pixels, the first data lines electrically connected with the first sub-pixels in the same column are shared with the second data lines electrically connected with the second sub-pixels in the same column in each column of the second pixels;

in the two high-density pixel groups, the two first data lines electrically connected with the first sub-pixels in the same column are coupled through a connecting line, and the connecting line bypasses the second display area.

10. The display panel according to claim 8 or 9, wherein the display panel further comprises a black matrix layer disposed on a side of the first and second driver circuits away from the substrate;

the orthographic projection of the first driving circuit on the substrate, the orthographic projection of the first signal line group on the substrate, the orthographic projection of the second driving circuit on the substrate and the orthographic projection of the second signal line group on the substrate are all located in the orthographic projection of the black matrix layer on the substrate.

11. The display screen of claim 1, wherein the first light emitting device comprises a first cathode and the second light emitting device comprises a second cathode;

the thickness of the first cathode is greater than the thickness of the second cathode.

12. The display panel of claim 1, wherein each of the second light emitting devices includes a second cathode; and the adjacent second cathodes are arranged at intervals.

13. The display panel according to claim 1, further comprising a polarizing layer disposed on a side of the first driving circuit away from the substrate;

and a third opening is arranged on the polarization layer and is positioned in the second display area.

14. A display screen in accordance with claim 1, wherein the display screen further comprises a plurality of third light emitting devices located between adjacent second pixels;

a row of the third light emitting devices located between two adjacent rows of the plurality of arrayed second pixels is arranged in the same row as a row of the first light emitting devices of the plurality of arrayed first pixels;

alternatively, the first and second electrodes may be,

the third light emitting device in one column between two adjacent columns of the second pixels arranged in the plurality of arrays is arranged in the same column as the first light emitting device in one column of the first pixels arranged in the plurality of arrays.

15. The display screen of claim 1, further comprising a color filter layer disposed on a side of the first and second light emitting devices remote from the substrate;

the color filter layer at least comprises three color filter patterns respectively corresponding to three primary colors;

each first light emitting device corresponds to a color filter pattern with the same light emitting color as the first light emitting device, and each second light emitting device corresponds to a color filter pattern with the same light emitting color as the second light emitting device.

16. A terminal, characterized in that it comprises a display screen according to any one of claims 1 to 15;

the terminal further comprises an optical device which is arranged on the back of the display screen, wherein the light receiving surface faces the display screen, and the orthographic projection of the optical device on the display screen is located in the second display area.

17. The terminal of claim 16, wherein the optics comprise a first camera;

the focal length of the first camera is less than 4 mm;

alternatively, the first and second electrodes may be,

the aperture of the first camera is larger than f/2.2, wherein f is the focal length of the first camera.

18. The terminal of claim 16, wherein the optics comprise a first camera; the first camera comprises an image sensor, and the pixel size of the image sensor is larger than 0.8 um.

19. The terminal according to claim 18, characterized in that the terminal further comprises a processing unit; the optical device further comprises a second camera; the resolution of the second camera is greater than 8M;

the first camera and the second camera are both electrically connected with the processing unit;

the first camera is used for transmitting the contrast data of the picture to the processing unit, and the second camera is used for transmitting the resolution data of the picture to the processing unit;

the processing unit is used for processing the contrast data and the resolution data to generate a target image.