CN109712996A - A kind of array substrate, preparation method and display device - Google Patents
A kind of array substrate, preparation method and display device Download PDFInfo
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- CN109712996A CN109712996A CN201910121524.9A CN201910121524A CN109712996A CN 109712996 A CN109712996 A CN 109712996A CN 201910121524 A CN201910121524 A CN 201910121524A CN 109712996 A CN109712996 A CN 109712996A
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Abstract
The invention discloses a kind of array substrate, preparation method and display devices, since a plurality of metal routing of above-mentioned neighboring area is configured generally about transmission region, and since the wiring between each metal routing is closeer, reflection is easy to happen when carrying out illumination, and the coherent diffraction phenomenon of light is generated, cause the light and dark striped of neighboring area bad.Therefore, the present invention covers the first light shielding part of metal routing by the orthographic projection being arranged on underlay substrate between the metal routing and underlay substrate of above-mentioned neighboring area, first light shielding part can block light source and expose to each metal routing, so as to solve the problems, such as that it is bad that light and dark striped occurs in neighboring area, display effect is improved.
Description
Technical field
The present invention relates to field of display technology, espespecially a kind of array substrate, preparation method and display device.
Background technique
Currently, the display panel of the screen design welcome deeper and deeper for obtaining consumer comprehensively, screen is using surrounding ultra-narrow comprehensively
Frame design, in conjunction with the panel framework for placing camera design in display area borehole, screen is Display panel screen accounting comprehensively
Highest panel architectures.In array substrate, transmission region is formed digging hole location, so that camera can pass through the light transmission
Region carries out Image Acquisition.But when being shown, it has been found that it is undesirable that the neighboring area of transmission region will appear display
Phenomenon.
Summary of the invention
The embodiment of the present invention provides a kind of array substrate, preparation method and display device, to solve in the prior art
The neighboring area of transmission region occurs showing bad problem.
The embodiment of the invention provides a kind of array substrate, including display area, the display area is obtained with image
Region, it includes transmission region and the neighboring area for surrounding the transmission region that described image, which obtains region,；Wherein,
The neighboring area includes a plurality of metal routing on underlay substrate, and is located at the metal routing and institute
State the first light shielding part between underlay substrate；Orthographic projection of the metal routing on the underlay substrate is by first shading
Orthographic projection covering of the portion on the underlay substrate.
It optionally, in the specific implementation, further include positioned at described in above-mentioned array substrate provided in an embodiment of the present invention
Buffer layer between underlay substrate and the metal routing, first light shielding part are located at the underlay substrate and the buffer layer
Between.
Optionally, in the specific implementation, in above-mentioned array substrate provided in an embodiment of the present invention, in the display area
In, except other regions that described image obtains region include thin film transistor (TFT), and for blocking the thin film transistor (TFT)
Two light shielding parts；First light shielding part and the second light shielding part same layer are arranged.
Optionally, in the specific implementation, in above-mentioned array substrate provided in an embodiment of the present invention, in the display area
In, except other regions that described image obtains region include thin film transistor (TFT), first light shielding part and the thin film transistor (TFT)
Active layer same layer setting.
It optionally, in the specific implementation, further include positioned at described in above-mentioned array substrate provided in an embodiment of the present invention
Buffer layer between underlay substrate and the metal routing, first light shielding part include lamination setting the first sub- light shielding part and
Second sub- light shielding part, the first sub- light shielding part is between the underlay substrate and the buffer layer, the second sub- shading
Portion is between the buffer layer and the metal routing.
Optionally, in the specific implementation, in above-mentioned array substrate provided in an embodiment of the present invention, in the display area
In, except other regions that described image obtains region include thin film transistor (TFT), and for blocking the thin film transistor (TFT)
Two light shielding parts；The first sub- light shielding part and the second light shielding part same layer are arranged, the second sub- light shielding part and the film
The active layer same layer of transistor is arranged.
Optionally, in the specific implementation, in above-mentioned array substrate provided in an embodiment of the present invention, the transmission region is only
Including the buffer layer being located on the underlay substrate.
Correspondingly, the embodiment of the invention also provides a kind of liquid crystal display device, including it is provided in an embodiment of the present invention on
State array substrate.
Correspondingly, the embodiment of the invention also provides a kind of preparation sides of above-mentioned array substrate provided in an embodiment of the present invention
Method, comprising:
The first light shielding part is formed on the underlay substrate of neighboring area；
A plurality of metal routing is formed on the underlay substrate for being formed with first light shielding part；Wherein, the metal routing
It is covered in the orthographic projection on the underlay substrate by orthographic projection of first light shielding part on the underlay substrate.
Optionally, in the specific implementation, described a plurality of being formed in above-mentioned preparation method provided in an embodiment of the present invention
Before metal routing, further includes:
The active layer and insulating layer of buffer layer, thin film transistor (TFT) are formed in image-acquisition area；
By the removal of patterning processes be located at the thin film transistor (TFT) of the transmission region active layer and it is described absolutely
Edge layer, only to retain the buffer layer in the transmission region.
The present invention has the beneficial effect that:
A kind of array substrate, preparation method and display device provided in an embodiment of the present invention, the array substrate include aobvious
Show that region, display area have image-acquisition area, image-acquisition area includes transmission region and the periphery for surrounding transmission region
Region；Wherein, neighboring area includes a plurality of metal routing on underlay substrate, and is located at metal routing and underlay substrate
Between the first light shielding part；Orthographic projection of orthographic projection of the metal routing on underlay substrate by the first light shielding part on underlay substrate
Covering.Since a plurality of metal routing of above-mentioned neighboring area is configured generally about transmission region, and since each metal is walked
Wiring between line is closeer, is easy to happen reflection when carrying out illumination, and generates the coherent diffraction phenomenon of light, causes neighboring area
Light and dark striped it is bad.Therefore, the present invention between the metal routing and underlay substrate of above-mentioned neighboring area by setting
The first light shielding part of the orthographic projection covering metal routing on underlay substrate is set, which can block light source and expose to
Each metal routing improves display effect so as to solve the problems, such as that it is bad that light and dark striped occurs in neighboring area.
Detailed description of the invention
Figure 1A is the structural schematic diagram of display device in the related technology；
Figure 1B is the overlooking structure diagram of image-acquisition area in the related technology；
Fig. 1 C is a kind of schematic cross-section of the Figure 1A along A1-A2；
Fig. 2A is the structural schematic diagram of the display device in the embodiment of the present invention；
Fig. 2 B is a kind of schematic cross-section of the Fig. 2A along A1-A2；
Fig. 3 is another schematic cross-section of the Fig. 2A along A1-A2；
Fig. 4 is another schematic cross-section of the Fig. 2A along A1-A2；
Fig. 5 is another schematic cross-section of the Fig. 2A along A1-A2；
Fig. 6 is the overlooking structure diagram of the image-acquisition area in the embodiment of the present invention；
Fig. 7 is the flow chart of the preparation method of the array substrate in the embodiment of the present invention；
Fig. 8 A to Fig. 8 E is structural schematic diagram of the preparation method of array substrate shown in fig. 5 after executing each step.
Specific embodiment
In order to realize comprehensive screen design of liquid crystal display panel, as shown in Figure 1A, borehole is set in display area and carrys out shape
At transmission region aa, make transmission region aa setting corresponding with camera or other component, to realize corresponding function.Such as figure
Shown in 1B, Figure 1B is the schematic top plan view of the metal routing of Figure 1A corresponding transmission region aa and neighboring area bb, surrounds light transmission
Metal routing such as gate metal cabling Gate and source-drain electrode metal routing SD is generally arranged in the neighboring area bb of region aa；Such as Fig. 1 C
Shown, Fig. 1 C is the schematic diagram of the section structure of Figure 1A corresponding transmission region aa and neighboring area bb, including underlay substrate 100,
Buffer layer 110 on underlay substrate 100 is found, in order to improve the transmitance of transmission region aa only when in light transmission after tested
Its transmitance is maximum when region aa retains buffer layer 110, and neighboring area bb includes the gate insulating layer being cascading
120, gate metal cabling Gate, interlayer dielectric layer 130, source-drain electrode metal routing SD, planarization layer 140 and passivation layer 150；By
In when lighting display panel, the light of the backlight module of liquid crystal display panel can expose to metal routing, since gate metal is walked
Wiring between line Gate and source-drain electrode metal routing SD is closeer, is easy to happen reflection when carrying out illumination, and generate the phase of light
Dry diffraction phenomena, the problem for causing the light and dark striped of neighboring area bad.
For the neighboring area of the transmission region in the related technology, surrounding array substrate, there are above-mentioned light and dark stripeds
Bad problem, the embodiment of the invention provides a kind of array substrate, preparation method and display devices.It is of the invention in order to make
Purpose, technical solution and advantage are clearer, with reference to the accompanying drawing, to array substrate provided in an embodiment of the present invention, its preparation
The specific embodiment of method and display device is described in detail.It should be appreciated that preferred embodiment disclosed below is only
For instruction and explanation of the present invention, it is not intended to limit the present invention.And in the absence of conflict, the embodiment in the application
And the feature in embodiment can be combined with each other.
The shapes and sizes of each component do not react actual proportions in attached drawing, and purpose is schematically illustrate the content of present invention.
The present invention provides a kind of array substrates, and as shown in Figure 2 A, Fig. 2A is the display device where the array substrate
Structural schematic diagram, including display area C, display area C have image-acquisition area C1, and image-acquisition area C1 includes transparent area
The domain aa and neighboring area bb for surrounding transmission region aa；Wherein,
As shown in Figure 2 B, Fig. 2 B is that the cross-section structure of each film layer of Fig. 2A corresponding transmission region aa and neighboring area bb shows
It is intended to, neighboring area bb includes a plurality of metal routing 160 on underlay substrate 100, and metal routing 160 generally comprises grid
Metal routing Gate and source-drain electrode metal routing SD, including between 160 place film layer of metal routing and underlay substrate 100
First light shielding part 170 has insulating layer 180 between metal routing 160 and the first light shielding part 170；Metal routing 160 is in substrate base
Orthographic projection on plate 100 is covered by orthographic projection of first light shielding part 170 on underlay substrate 100, i.e., the first light shielding part 170 is serving as a contrast
Orthographic projection on substrate 100 will cover all gate metal cablings and source-drain electrode metal routing positioned at neighboring area bb.
Above-mentioned array substrate provided by the invention, since a plurality of metal routing of above-mentioned neighboring area is generally about transparent area
Domain is configured, and since the wiring between each metal routing is closeer, is easy to happen reflection when carrying out illumination, and generate light
Coherent diffraction phenomenon, cause the light and dark striped of neighboring area bad.Therefore, the present invention passes through in above-mentioned neighboring area
Metal routing and underlay substrate between the first light shielding part of orthographic projection covering metal routing on underlay substrate is set, this
One light shielding part can block light source and expose to each metal routing, light and dark striped occur not so as to solve neighboring area
Good problem improves display effect.
Further, in the specific implementation, in each film layer formed in array substrate, in order to prevent in photoetching process
It destroys underlay substrate and influences the transmitance of array substrate, in above-mentioned array substrate provided in an embodiment of the present invention, such as Fig. 3 institute
Show, further include the buffer layer 110 between underlay substrate 100 and metal routing 160, the first light shielding part 170 is located at substrate base
Between plate 100 and buffer layer 110.First light shielding part 170 can block light source and expose to each metal routing 160 in this way, thus
It can solve neighboring area and the bad problem of light and dark striped occur, improve display effect.
Specifically, metal routing 160 generally comprises gate metal cabling Gate and source-drain electrode metal routing SD, such as Fig. 3 institute
Show, array substrate further include: the gate insulating layer 120 above buffer layer 110, the grid above gate insulating layer 120
Pole metal routing Gate, the interlayer dielectric layer 130 above gate metal cabling Gate are located at 130 top of interlayer dielectric layer
Source-drain electrode metal routing SD, the planarization layer 140 above source-drain electrode metal routing SD, and be located at planarization layer 140
The passivation layer 150 of top.
Further, in the specific implementation, in above-mentioned array substrate provided in an embodiment of the present invention, as shown in figure 3,
In display area, except other regions of image-acquisition area include thin film transistor (TFT) (being not shown in Fig. 3), and it is thin for blocking
The second light shielding part (being not shown in Fig. 3) of film transistor；First light shielding part 170 and the second light shielding part same layer are arranged.In this way, only needing
To change original composition figure when forming the second light shielding part, the first light shielding part 170 can be formed by a patterning processes
With the figure of the second light shielding part, it is increased without the technique that the first light shielding part 170 is prepared separately, can simplify preparation process flow,
Production cost is saved, production efficiency is improved.
Further, in the specific implementation, in above-mentioned array substrate provided in an embodiment of the present invention, as shown in figure 4,
In display area, except other regions of image-acquisition area include thin film transistor (TFT) (being not shown in Fig. 4), the first light shielding part 170
Same layer setting (is not shown) in Fig. 4 with the active layer of thin film transistor (TFT).In this way, it is only necessary in the active layer for forming thin film transistor (TFT)
When change original composition figure, the active of the first light shielding part 170 and thin film transistor (TFT) can be formed by patterning processes
The figure of layer, is increased without the technique that the first light shielding part 170 is prepared separately, can simplify preparation process flow, saving is produced into
This, improves production efficiency.
Specifically, as shown in figure 4, metal routing 160 generally comprises gate metal cabling Gate and source-drain electrode metal routing
SD, array substrate include: underlay substrate 100, the buffer layer 110 above underlay substrate 100, are located at 110 top of buffer layer
The first light shielding part 170, the gate insulating layer 120 above the first light shielding part 170, above gate insulating layer 120
Gate metal cabling Gate, the interlayer dielectric layer 130 above gate metal cabling Gate are located on interlayer dielectric layer 130
The source-drain electrode metal routing SD of side, the planarization layer 140 above source-drain electrode metal routing SD, and it is located at planarization layer
The passivation layer 150 of 140 tops.First light shielding part 170 can block light source and expose to each metal routing 160 in this way, so as to
To solve the problems, such as that it is bad that light and dark striped occurs in neighboring area, display effect is improved.
Further, in the specific implementation, in above-mentioned array substrate provided in an embodiment of the present invention, such as Fig. 5 and Fig. 6 institute
Show, Fig. 5 is the section schematic cross-section of array substrate, and Fig. 6 is the schematic top plan view of the corresponding image-acquisition area of Fig. 5, is also wrapped
The buffer layer 110 between underlay substrate 100 and metal routing 160 is included, the first light shielding part 170 includes the first of lamination setting
Sub- light shielding part 01 and the second sub- light shielding part 02, the first sub- light shielding part 01 is between underlay substrate 100 and buffer layer 110, and second
Sub- light shielding part 02 is between buffer layer 110 and metal routing 160.
Specifically, as shown in figure 5, metal routing 160 includes gate metal cabling Gate and source-drain electrode metal routing SD, battle array
Column substrate includes: underlay substrate 100, the sub- light shielding part 01 of first above underlay substrate 100, is located at the first sub- light shielding part 01
The buffer layer 110 of top, the second sub- light shielding part 02 above buffer layer 110, the grid above the second sub- light shielding part 02
Pole insulating layer 120, the gate metal cabling Gate above gate insulating layer 120 are located above gate metal cabling Gate
Interlayer dielectric layer 130, the source-drain electrode metal routing SD above interlayer dielectric layer 130, be located at source-drain electrode metal routing SD
The planarization layer 140 of top, and the passivation layer 150 above planarization layer 140.Present invention array substrate shown in fig. 5
The first sub- light shielding part 01 and the second sub- light shielding part 02 including lamination setting use dual light-shielding structure, compared to Fig. 3 and figure
Array substrate shown in 4, which further improves, blocks light source and exposes to each metal routing 160, further solves neighboring area and goes out
The bad problem of existing light and dark striped, improves display effect.
Further, in the specific implementation, in above-mentioned array substrate provided in an embodiment of the present invention, as shown in figure 5,
In display area, except other regions of image-acquisition area include thin film transistor (TFT) (being not shown in Fig. 5), and it is thin for blocking
The second light shielding part (being not shown in Fig. 5) of film transistor；First sub- light shielding part 01 and the second light shielding part same layer are arranged, in this way, only
It needs to change original composition figure when forming the second light shielding part, the first sub- light shielding part can be formed by a patterning processes
01 and second light shielding part figure, be increased without the technique that the first sub- light shielding part 01 is prepared separately, can simplify preparation process stream
Journey saves production cost, improves production efficiency；The active layer (being not shown in Fig. 5) of second sub- light shielding part 02 and thin film transistor (TFT)
Same layer setting.In this way, it is only necessary to change original composition figure in the active layer of thin film transistor (TFT), a composition can be passed through
Technique forms the figure of the second sub- light shielding part 02 and the active layer of thin film transistor (TFT), is increased without and the second sub- light shielding part is prepared separately
02 technique can simplify preparation process flow, save production cost, improve production efficiency.
Further, in the specific implementation, since camera to be arranged in the behind of transmission region, in order to reduce film layer mistake
The influence of multipair camera shooting effect, to improve the transmitance of transmission region, in above-mentioned array provided in an embodiment of the present invention
In substrate, as shown in Figures 3 to 5, transmission region aa only includes the buffer layer 110 on underlay substrate 100.Specifically, only
The material of the buffer layer 110 of reservation is SiNx/SiOx, and corresponding thickness SiNx is 1000A, SiOx 3000A.
Based on the same inventive concept, the embodiment of the invention also provides a kind of above-mentioned array bases provided in an embodiment of the present invention
The preparation method of plate, as shown in fig. 7, comprises:
S701, the first light shielding part is formed on the underlay substrate of neighboring area；
S702, a plurality of metal routing is formed on the underlay substrate for being formed with the first light shielding part；Wherein, metal routing is serving as a contrast
Orthographic projection on substrate is covered by orthographic projection of first light shielding part on underlay substrate.
In the specific implementation, the shading principle of the first light shielding part of the preparation method of above-mentioned array substrate may refer to above-mentioned
The shading principle of first light shielding part described in array substrate, this will not be repeated here.
Further, in the specific implementation, in above-mentioned array substrate provided in an embodiment of the present invention, in order to reduce to slow
The photoetching number for rushing layer, improves the homogeneity of buffer-layer surface, with solve as buffer-layer surface it is inhomogenous caused by transparent area
Serious yellowing phenomenon occurs for the neighboring area in domain, before forming a plurality of metal routing, further includes:
The active layer and insulating layer of buffer layer, thin film transistor (TFT) are formed in image-acquisition area；
It is located at the active layer and insulating layer of the thin film transistor (TFT) of transmission region by a patterning processes removal, in light transmission
Region only retains buffer layer.
Specifically, in the related art, buffer layer is generally initially formed on the underlay substrate of array substrate, on the buffer layer
Active layer is formed, using the active layer of a photoetching process removal image-acquisition area, only to retain active layer in display area,
It is subsequent to form the insulating layers such as gate insulating layer, interlayer dielectric layer, planarization layer and passivation layer, then will using a photoetching process
Above-mentioned each insulating layer positioned at transmission region disposably removes, i.e., uses Twi-lithography technique in the related technology, will be to slow
The surface for rushing layer generates twice etching, and the film thickness of buffer layer is generally 4000A, and wherein twice etching causes 2000A's or so
Loss, seriously affect thickness, optical property and the homogeneity of buffer layer film layer so that the buffer layer of transmission region with to box substrate
Fluctuating when to box to box thickness, box thickness ununiformity one cause amount of liquid crystal inhomogenous, occur as soon as yellowing phenomenon in lighting.
And the preparation method is that sequentially forming buffer layer, active layer, gate insulating layer, layer on the underlay substrate of array substrate
Between the insulating layers such as dielectric layer, planarization layer and passivation layer, then only with a photoetching process by above-mentioned positioned at transmission region
Active layer and each insulating layer disposably remove, and retain the active layer for being located at the neighboring area of transmission region as the first light shielding part,
I.e. the present invention uses only a photoetching process, only generates primary etching to the surface of buffer layer, therefore, prepared by the present invention to have
Active layer both played it is light-blocking prevent light irradiation make positioned at transmission region neighboring area metal routing such as Gate and SD wiring it is closeer
There is the diffraction coherent phenomena of light, moreover it is possible to the photoetching number to the buffer layer of transmission region is reduced, so that the film layer of buffer layer is equal
One property is more preferable, so as to improve jaundice, improves the display effect of display area.
The preparation method of Fig. 5 of embodiment of the present invention array substrate provided is described in detail below, executes each step
Structural schematic diagram afterwards only schematic images obtain region film layer.
(1) the neighboring area bb on underlay substrate 100 forms the first sub- light shielding part 01, as shown in Figure 8 A；Wherein first
Sub- light shielding part 01 passes through with the second light shielding part for blocking thin film transistor (TFT) for being located at other regions except image-acquisition area
One time patterning processes are formed.
(2) buffer layer 110 is formed on the first sub- light shielding part 01, as shown in Figure 8 B；
(3) semiconductive thin film 200 is formed on buffer layer 110, as shown in Figure 8 C；Semiconductive thin film 200 is to be used to form
The material of active layer, and the present invention forms the second sub- light shielding part 01 using semiconductive thin film 200.
(4) sequentially formed on active layer 200 gate insulating layer 120, gate metal cabling Gate, interlayer dielectric layer 130,
Source-drain electrode metal routing SD, planarization layer 140 and passivation layer 150, as in fig. 8d；
(5) using patterning processes by it is above-mentioned positioned at the semiconductive thin film 200 of transmission region aa, gate insulating layer 120,
Interlayer dielectric layer 130, planarization layer 140 and passivation layer 150 disposably remove, only to retain buffer layer 110 in transmission region aa,
In neighboring area, bb forms the second sub- light shielding part 02, as illustrated in fig. 8e；Wherein the second sub- light shielding part 02 is obtained with positioned at except image
The active layer of the thin film transistor (TFT) in other regions in region is formed by a patterning processes.
Therefore, (1)-step (5) can prepare the array substrate of Fig. 5 of embodiment of the present invention offer through the above steps.
Specifically, in above-mentioned array substrate provided in an embodiment of the present invention, in order to realize screen design comprehensively, in viewing area
Transmission region is arranged in the position that domain surrounds, wherein transmission region can be located at any position that display area surrounds, the transparent area
Domain aa can be located at the upper left side of the display device where array substrate, such as shown in Fig. 2A, can also be located at other positions,
This is not especially limited.Also, in array substrate, the quantity of transmission region can be one, can also be according to actual needs
It is arranged multiple, is not specifically limited herein.The shape of transmission region also can be round, oval, rectangular etc. without limiting
Shape with specific reference to needing to be designed is illustrated so that transmission region is round in fig. 2.
Based on the same inventive concept, the embodiment of the invention also provides a kind of liquid crystal display devices, including the present invention to implement
Any of the above-described kind of array substrate that example provides.The display device can be with are as follows: mobile phone, tablet computer, television set, display, notes
Any products or components having a display function such as this computer, Digital Frame, navigator.Other for the display device must not
The component part that can lack is it will be apparent to an ordinarily skilled person in the art that having, and this will not be repeated here, also should not be used as
Limitation of the present invention.The implementation of the display device may refer to above-described embodiment, and overlaps will not be repeated.
Above-mentioned array substrate, preparation method and display device provided in an embodiment of the present invention, the array substrate include aobvious
Show that region, display area have image-acquisition area, image-acquisition area includes transmission region and the periphery for surrounding transmission region
Region；Wherein, neighboring area includes a plurality of metal routing on underlay substrate, and is located at metal routing and underlay substrate
Between the first light shielding part；Orthographic projection of orthographic projection of the metal routing on underlay substrate by the first light shielding part on underlay substrate
Covering.Since a plurality of metal routing of above-mentioned neighboring area is configured generally about transmission region, and since each metal is walked
Wiring between line is closeer, is easy to happen reflection when carrying out illumination, and generates the coherent diffraction phenomenon of light, causes neighboring area
Light and dark striped it is bad.Therefore, the present invention between the metal routing and underlay substrate of above-mentioned neighboring area by setting
The first light shielding part of the orthographic projection covering metal routing on underlay substrate is set, which can block light source and expose to
Each metal routing improves display effect so as to solve the problems, such as that it is bad that light and dark striped occurs in neighboring area.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art
Mind and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to include these modifications and variations.
Claims (10)
1. a kind of array substrate, which is characterized in that including display area, the display area has image-acquisition area, described
Image-acquisition area includes transmission region and the neighboring area for surrounding the transmission region；Wherein,
The neighboring area includes a plurality of metal routing on underlay substrate, and is located at the metal routing and the lining
The first light shielding part between substrate；Orthographic projection of the metal routing on the underlay substrate is existed by first light shielding part
Orthographic projection covering on the underlay substrate.
2. array substrate as described in claim 1, which is characterized in that further include being located at the underlay substrate to walk with the metal
Buffer layer between line, first light shielding part is between the underlay substrate and the buffer layer.
3. array substrate as claimed in claim 2, which is characterized in that in the display area, except described image obtains area
Other regions in domain include thin film transistor (TFT), and the second light shielding part for blocking the thin film transistor (TFT)；Described first hides
Light portion and the second light shielding part same layer are arranged.
4. array substrate as described in claim 1, which is characterized in that in the display area, except described image obtains area
Other regions in domain include thin film transistor (TFT), and the active layer same layer of first light shielding part and the thin film transistor (TFT) is arranged.
5. array substrate as described in claim 1, which is characterized in that further include being located at the underlay substrate to walk with the metal
Buffer layer between line, first light shielding part include the first sub- light shielding part and the second sub- light shielding part of lamination setting, and described the
For one sub- light shielding part between the underlay substrate and the buffer layer, the second sub- light shielding part is located at the buffer layer and institute
It states between metal routing.
6. array substrate as claimed in claim 5, which is characterized in that in the display area, except described image obtains area
Other regions in domain include thin film transistor (TFT), and the second light shielding part for blocking the thin film transistor (TFT)；First son
Light shielding part and the second light shielding part same layer are arranged, and the active layer same layer of the second sub- light shielding part and the thin film transistor (TFT) is set
It sets.
7. array substrate as claimed in any one of claims 1 to 6, which is characterized in that the transmission region only includes positioned at described
Buffer layer on underlay substrate.
8. a kind of liquid crystal display device, which is characterized in that including such as described in any item array substrates of claim 1-7.
9. a kind of preparation method of such as described in any item array substrates of claim 1-7 characterized by comprising
The first light shielding part is formed on the underlay substrate of neighboring area；
A plurality of metal routing is formed on the underlay substrate for being formed with first light shielding part；Wherein, the metal routing is in institute
The orthographic projection stated on underlay substrate is covered by orthographic projection of first light shielding part on the underlay substrate.
10. preparation method as claimed in claim 9, which is characterized in that before forming a plurality of metal routing, also wrap
It includes:
The active layer and insulating layer of buffer layer, thin film transistor (TFT) are formed in image-acquisition area；
It is located at the active layer and the insulating layer of the thin film transistor (TFT) of the transmission region by a patterning processes removal,
Only to retain the buffer layer in the transmission region.
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Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110610970A (en) * | 2019-08-29 | 2019-12-24 | 武汉华星光电半导体显示技术有限公司 | Display panel, display device and display panel preparation method |
| CN111276055A (en) * | 2020-02-28 | 2020-06-12 | 武汉天马微电子有限公司 | Display panel and display device |
| CN111540271A (en) * | 2020-05-18 | 2020-08-14 | 昆山国显光电有限公司 | Display panel and display device |
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| CN111834429A (en) * | 2020-07-08 | 2020-10-27 | 云谷（固安）科技有限公司 | Array substrate, display panel and electronic equipment |
| CN111916463A (en) * | 2020-08-20 | 2020-11-10 | 武汉华星光电技术有限公司 | Array substrate, preparation method thereof and display panel |
| CN112086497A (en) * | 2020-09-15 | 2020-12-15 | 武汉华星光电半导体显示技术有限公司 | Display device and method for manufacturing the same |
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| CN113327941A (en) * | 2021-05-28 | 2021-08-31 | 合肥维信诺科技有限公司 | Array substrate, display panel and preparation method of array substrate |
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| WO2020259473A1 (en) * | 2019-06-25 | 2020-12-30 | 华为技术有限公司 | Display screen and terminal |
| CN110610970A (en) * | 2019-08-29 | 2019-12-24 | 武汉华星光电半导体显示技术有限公司 | Display panel, display device and display panel preparation method |
| CN111276055A (en) * | 2020-02-28 | 2020-06-12 | 武汉天马微电子有限公司 | Display panel and display device |
| CN111276055B (en) * | 2020-02-28 | 2021-07-16 | 武汉天马微电子有限公司 | Display panel and display device |
| CN111540271A (en) * | 2020-05-18 | 2020-08-14 | 昆山国显光电有限公司 | Display panel and display device |
| CN111540271B (en) * | 2020-05-18 | 2022-06-17 | 昆山国显光电有限公司 | Display panel and display device |
| CN111627339A (en) * | 2020-06-29 | 2020-09-04 | 武汉天马微电子有限公司 | Display panel and display device |
| CN111834429A (en) * | 2020-07-08 | 2020-10-27 | 云谷（固安）科技有限公司 | Array substrate, display panel and electronic equipment |
| CN111916463A (en) * | 2020-08-20 | 2020-11-10 | 武汉华星光电技术有限公司 | Array substrate, preparation method thereof and display panel |
| CN112086497A (en) * | 2020-09-15 | 2020-12-15 | 武汉华星光电半导体显示技术有限公司 | Display device and method for manufacturing the same |
| CN113327941A (en) * | 2021-05-28 | 2021-08-31 | 合肥维信诺科技有限公司 | Array substrate, display panel and preparation method of array substrate |
| CN113327941B (en) * | 2021-05-28 | 2023-08-01 | 合肥维信诺科技有限公司 | Array substrate, display panel and preparation method of array substrate |
| CN113687534A (en) * | 2021-08-25 | 2021-11-23 | 武汉华星光电技术有限公司 | Display panel and display device |
| CN113687534B (en) * | 2021-08-25 | 2022-08-05 | 武汉华星光电技术有限公司 | Display panel and display device |
| WO2023024175A1 (en) * | 2021-08-25 | 2023-03-02 | 武汉华星光电技术有限公司 | Display panel and display device |
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