CN110429682A - A kind of super capacitor pack non-dissipative equalizing circuit and control method - Google Patents
A kind of super capacitor pack non-dissipative equalizing circuit and control method Download PDFInfo
- Publication number
- CN110429682A CN110429682A CN201910761949.6A CN201910761949A CN110429682A CN 110429682 A CN110429682 A CN 110429682A CN 201910761949 A CN201910761949 A CN 201910761949A CN 110429682 A CN110429682 A CN 110429682A
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- Prior art keywords
- super capacitor
- circuit
- equalizing circuit
- monomer
- unit
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0013—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries acting upon several batteries simultaneously or sequentially
- H02J7/0014—Circuits for equalisation of charge between batteries
- H02J7/0016—Circuits for equalisation of charge between batteries using shunting, discharge or bypass circuits
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/34—Parallel operation in networks using both storage and other dc sources, e.g. providing buffering
- H02J7/345—Parallel operation in networks using both storage and other dc sources, e.g. providing buffering using capacitors as storage or buffering devices
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
The present invention relates to electronic technology, in particular to a kind of super capacitor pack non-dissipative equalizing circuit and control method.The super capacitor group is divided into several units, includes several super capacitor monomers in the unit, first electric voltage equalization between progress each unit, then carries out the electric voltage equalization of each super capacitor monomer in unit.A kind of super capacitor pack non-dissipative equalizing circuit and control method are provided, the loss of super capacitor group Balance route is reduced.
Description
Technical field
The present invention relates to electronic technology, in particular to a kind of super capacitor pack non-dissipative equalizing circuit and control method.
Background technique
Super capacitor group can not be neglected as a limited energy source, the loss of balancing procedure although ratio is little
Slightly.There are inconsistency, the charging rate of each monomer and the appearances obtained for internal resistance and capacity due to monomer each in super capacitor group
Amount is different, and this inconsistency exists always and as the increase of charging times has the tendency that increasing, so will be from root
An independent equal balance system must be equipped with for each super capacitor group by reducing the inconsistency between monomer in sheet, to reduce
Loss equalizing.
Summary of the invention
Present invention solves the technical problem that: a kind of super capacitor pack non-dissipative equalizing circuit and control method are provided, reduced super
The loss of grade capacitance group Balance route.
Technical solution of the present invention: a kind of super capacitor pack non-dissipative equalizing control method, the super capacitor group are divided into
Several units, the interior unit includes several super capacitor monomers, first electric voltage equalization between progress each unit, then is carried out in unit
The electric voltage equalization of each super capacitor monomer.
Preferably, electric voltage equalization carrying out unit to the total voltage of each unit first.Provide a kind of easy, easily acquisition
Balanced object, improve the efficiency of electric voltage equalization between unit.
Preferably, two super capacitor monomers are included at least in each unit；The super capacitor group includes at least
Two units.Quick equalization methods simultaneously are provided between a kind of super capacitor group part and level, energy damage is effectively reduced
Consumption.
Preferably, it is controlled by the combination of switch and inductance, constitutes different charging and discharging circuits, it is same between voltage each unit
Shi Jinhang Balance route.Provide a kind of different automatic corresponding efficient charge and discharge time of building according to voltage value between unit
Road improves energy conversion efficiency.
Preferably, by switching the combination control with inductance, the Balance route of each super capacitor monomer in unit is realized.It mentions
A kind of conducting according to switch has been supplied effectively to turn by energy storage inductor between corresponding super capacitor monomer to shutdown realization energy
It moves, improves balanced efficiency between super capacitor monomer.
A kind of super capacitor pack non-dissipative equalizing circuit, the circuit include that super capacitor monomer, super capacitor monomer are equal
Weigh circuit 10 and supercapacitive cell equalizing circuit 9, and multiple super capacitor monomers pass through the balanced electricity of super capacitor monomer
Road 10 is connected to, and the super capacitor monomer and super capacitor monomer equalizing circuit 10 form supercapacitive cell equalizing circuit,
The multiple supercapacitive cell equalizing circuit is connected to by supercapacitive cell equalizing circuit 9.Energy can be made by providing one kind
Between supercapacitive cell between super capacitor monomer the equalizing circuit of fast transfer simultaneously, effectively reduce energy loss, mention
High transfer efficiency.
Preferably, the super capacitor monomer in the supercapacitive cell equalizing circuit is series connection or series-parallel combination.It is super
Grade capacitor monomer connects by way of combining series connection or in series and parallel, can effectively improve super capacitor group global voltage or entirety
Capacity.
Preferably, the super capacitor monomer equalizing circuit 10 includes several switches and inductance, and each switch corresponds to
In parallel with super capacitor monomer, inductance is the energy-storage travelling wave tube in balancing procedure.Provide a kind of simple, quick super capacitor list
Body equalizing circuit improves the efficiency of electric voltage equalization between super capacitor monomer.
Preferably, if the supercapacitive cell equalizing circuit 9 includes dry-cured meat winding and switch, the coupling winding
Quantity is equal to the quantity of supercapacitive cell, and coupling winding, switch and supercapacitive cell constitute charging and discharging circuit, pass through switch
Control make couple winding correspond to different supercapacitive cells.Any two super capacitor list can be fast implemented by providing one kind
The bidirectional high-efficiency rate transmitting of energy between member, when non-adjacent supercapacitive cell does not need equilibrium, which can be effective
It directly transmits with realizing energy crosses formula, without carrying out secondary equilibrium by intermediate Super capacitor cell, is greatly shortened
Weighing apparatus process reduces energy loss.
Detailed description of the invention
Fig. 1 is a kind of series connected super-capacitor module non-dissipative equalizing control principle block diagram shown in the present invention；
Fig. 2 is that the present invention implements voltage balance circuit functional block diagram.
Specific embodiment
As shown in Figure 1, a kind of series connected super-capacitor module non-dissipative equalizing control circuit, including charging circuit 1, control circuit 2,
Accumulator 3, voltage monitoring circuit 4, voltage balance circuit 5 and booster circuit 6.The input terminal VIN1 of the charging circuit 1 connects
Enter to input power 7, the input terminal VIN2 of control circuit 2 is connected to input power 7, and the input terminal VIN3 of accumulator 3 is connected to
1 output end VOUT1 of charging circuit, the input terminal VIN4 of booster circuit 6 are connected to the output end VOUT2 of accumulator 3, boosting electricity
The output end VOUT2 on road 6 is connected to out-put supply 8；Two control signal outputs CTR1 and CTR2 of the control circuit 2 points
It is not connected to the control signal input SHD1 of charging circuit 1 and the control signal input SHD2 of booster circuit 6；Control circuit
2 two bus signals end M-SPI1 and M-SPI2 are connected respectively to the bus signals end SPI1 and voltage of voltage monitoring circuit 4
The bus signals end SPI2 of equalizing circuit 5；The balanced input terminal SIN of accumulator 3 is connected to 5 balanced output terminal of voltage balance circuit
SOUT；The voltage signal monitoring input terminal CIN of voltage monitoring circuit 4 is connected to the voltage signal monitoring output end of accumulator 3
COUT；
The charging circuit 1 is constant current-constant-power charging circuit, is buck-boost μM odule Switching Power Supply, is used for
It charges to accumulator 3；
The control circuit 2 is electric with voltage balance circuit 5, voltage monitoring respectively by bus signals M-SPI1 and M-SPI2
Road 4 carries out equalization information and voltage monitoring information exchange；2 detection input of control circuit or output end voltage, when voltage not
When within the scope of defined, by output end CTR1, perhaps CTR2 exports cut-off signals charge closing circuit 1 or booster circuit
6 output；
The accumulator 3 is a capacitance group by the series connection of 6 super capacitors, the capacitance group can between each other series, parallel,
Or parallel connection and serial connection is combined into accumulator；
The voltage monitoring circuit 4 can detect 12 serial connected super capacitor monomers, the monitoring model of each super-capacitor voltage
Enclosing can be from 0V to 5V, and the voltage measurement error of every road super capacitor monomer is less than 1.2mV, under high-rate mode, super electricity
The voltage acquisition period for holding monomer can be down to 240 μ s.
The voltage balance circuit 5 can realize direct non-dissipative equalizing between super capacitor, 6 super electricity in accumulator 3
Holding series connection is a capacitance group, is two-by-two a unit in group, which can realize DIRECT ENERGY between any two unit
Bi-directional, when non-adjacent unit does not need equilibrium, balancing procedure with can realizing energy crosses formula directly transmitting and transformation, and nothing
Secondary equilibrium need to be carried out by temporary location, be conducive to shorten balancing procedure, reduce energy loss.
The booster circuit 6 is made of a μM odule type Switching Power Supply, the electricity that can export the output end VO2 of accumulator 3
Pressure is exported after boosting to setting voltage by output end VO3.
The present invention uses super capacitor group as accumulator, uses a kind of non-dissipative equalizing control method to super capacitor
Any one super capacitor carries out two-way, non-dissipative type Balance route in group.The control method is super to any one monomer
For grade capacitor, it both can individually charge, can also individually discharge, all capacitors in super capacitor group can finally be made to reach equal
Weighing apparatus.During Balance route, energy is shifted always rather than is consumed, and is effectively protected electricity inside super capacitor group
Lotus reduces the heat discharged in balancing procedure.
As shown in Fig. 2, the voltage balance circuit 5 includes supercapacitive cell equalizing circuit 9, super capacitor monomer equilibrium
Circuit 10, the super capacitor monomer equalizing circuit 10, as energy transfer element, pass through NMOS tube using inductance L1, L2, L3
S1~S6 is constituted.When voltage imbalance between super capacitor monomer, control circuit 2 passes through the accurately balanced electricity of control super capacitor monomer
The each NMOS tube in road 10 disconnects and conducting, in conjunction with inductance with balanced each super capacitor monomer voltage.
Between the supercapacitive cell equalizing circuit 9 using with centre tapped electromagnetic component as energy transfer element,
Pass through three coupling winding L4, L5, L6 (no-load voltage ratio 1:1:1) and four NMOS tube S7~S10, four diode D7~D10 structures
At.When voltage imbalance between supercapacitive cell, control circuit 2 passes through internal algorithm and accurately controls equilibrium between supercapacitive cell
The each NMOS tube of circuit 9 disconnects and conducting, according to the size of supercapacitive cell voltage, may make up by normal shock, flyback and Buck-
Boost etc. different switch change-over topologys forms corresponding equalizing circuit with balanced each unit voltage.Specific Balance route logic
It is as shown in the table:
Balance route logic between 1 supercapacitive cell of table
Balance route logic in 2 supercapacitive cell of table
| Imbalance state | Balance route logic between super capacitor monomer |
| UC1≥UC2 | Switch S1 conducting |
| UC2≥UC1 | Switch S2 conducting |
When each supercapacitive cell voltage is UB1≥UB2≥UB3When, control switch S10 conducting, B1 is filled by S10 to L4
Electricity, at this point, circuit L6-B3-D8 is connected, circuit constitutes forward converter topology at this time.When S10 is turned off, circuit L5-B3-D7 conducting,
Circuit constitutes circuit of reversed excitation topology at this time, and B1 excess energy is discharged through L5 to B3；
When each supercapacitive cell voltage is UB1≥UB3≥UB2When, control switch S10 conducting, B1 is filled by S10 to L4
Electricity, at this point, circuit L6-B3-D8 is connected, circuit constitutes forward converter topology at this time.When S10 is turned off, circuit L4-B2-D9 conducting,
Circuit constitutes Buck-Boost circuit topology at this time, and B1 excess energy is discharged through L4 to B2；
When each supercapacitive cell voltage is UB2≥UB1≥UB3When, control switch S9 conducting, B2 is charged by S9 to L4,
At this point, circuit L5-B3-D7 is connected, circuit constitutes forward converter topology at this time.When S9 is turned off, circuit L6-B3-D8 conducting, at this time
Circuit constitutes circuit of reversed excitation topology, and B2 excess energy is discharged through L6 to B3；
When each supercapacitive cell voltage is UB2≥UB3≥UB1When, control switch S9 conducting, B2 is charged by S9 to L4,
At this point, circuit L5-B3-D7 is connected, circuit constitutes forward converter topology at this time.When S9 is turned off, circuit L4-B1-D10 conducting, this
When circuit constitute Buck-Boost circuit topology, B2 excess energy through L4 to B1 discharge；
When each supercapacitive cell voltage is UB3≥UB2≥UB1When, control switch S7 conducting, B3 is charged by S9 to L5,
At this point, circuit L4-B2-D9 is connected, circuit constitutes forward converter topology at this time.When S7 is turned off, circuit L4-B1-D10 conducting, this
When circuit constitute circuit of reversed excitation topology, B3 excess energy through L4 to B1 discharge；
When each supercapacitive cell voltage is UB3≥UB1≥UB2When, control switch S8 conducting, B3 is charged by S8 to L6,
At this point, circuit L4-B1-D10 is connected, circuit constitutes forward converter topology at this time, and inductance L4 is without output at this time.When S8 is turned off, return
Road L4-B2-D9 conducting, circuit constitutes circuit of reversed excitation topology at this time, and B3 excess energy is discharged through L4 to B2.
Claims (9)
1. a kind of super capacitor pack non-dissipative equalizing control method, which is characterized in that the super capacitor group is divided into several units,
Include several super capacitor monomers in the unit, carries out electric voltage equalization between each unit first, then carry out each super electricity in unit
Hold the electric voltage equalization of monomer.
2. a kind of super capacitor pack non-dissipative equalizing control method according to claim 1, which is characterized in that first to each
The total voltage of unit carries out electric voltage equalization between unit.
3. a kind of super capacitor pack non-dissipative equalizing control method according to claim 1, which is characterized in that each list
Two super capacitor monomers are included at least in first；The super capacitor group includes at least two units.
4. a kind of super capacitor pack non-dissipative equalizing control method according to claim 1, which is characterized in that by inductance and
The combination of switch controls, and constitutes different charging and discharging circuits, carries out Balance route simultaneously to voltage each unit.
5. a kind of super capacitor pack non-dissipative equalizing control method according to claim 1, which is characterized in that pass through switch
The Balance route of each super capacitor monomer in unit is realized in conducting.
6. a kind of super capacitor pack non-dissipative equalizing circuit, it is characterized in that: the circuit includes super capacitor monomer, super capacitor
Monomer equalizing circuit [10] and supercapacitive cell equalizing circuit [9], multiple super capacitor monomers pass through super capacitor
Monomer equalizing circuit [10] connection, the super capacitor monomer and super capacitor monomer equalizing circuit [10] form super capacitor
Unit equalizing circuit, the multiple supercapacitive cell equalizing circuit are connected to by supercapacitive cell equalizing circuit [9].
7. a kind of super capacitor pack non-dissipative equalizing circuit according to claim 6, it is characterized in that: the supercapacitive cell
Super capacitor monomer in equalizing circuit is serial or parallel connection.
8. a kind of super capacitor pack non-dissipative equalizing circuit according to claim 6, it is characterized in that: the super capacitor monomer
Equalizing circuit [10] includes several switches, and each switch correspondence is in parallel with super capacitor monomer.
9. a kind of super capacitor pack non-dissipative equalizing circuit according to claim 6, it is characterized in that: the supercapacitive cell
Equalizing circuit [9] is if include dry-cured meat winding and switch, number of the quantity for coupling winding at least equal to supercapacitive cell
Amount, coupling winding, switch and supercapacitive cell constitute charging and discharging circuit, keep coupling winding corresponding different by the control of switch
Supercapacitive cell.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910761949.6A CN110429682A (en) | 2019-08-16 | 2019-08-16 | A kind of super capacitor pack non-dissipative equalizing circuit and control method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910761949.6A CN110429682A (en) | 2019-08-16 | 2019-08-16 | A kind of super capacitor pack non-dissipative equalizing circuit and control method |
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| CN110429682A true CN110429682A (en) | 2019-11-08 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023065084A1 (en) * | 2021-10-18 | 2023-04-27 | 深圳市华思旭科技有限公司 | Circuit structure, control method therefor, and power supply device |
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| WO2023065084A1 (en) * | 2021-10-18 | 2023-04-27 | 深圳市华思旭科技有限公司 | Circuit structure, control method therefor, and power supply device |
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