CN110429091A - A kind of global pixel structure and forming method with light-blocking structure - Google Patents

A kind of global pixel structure and forming method with light-blocking structure Download PDF

Info

Publication number
CN110429091A
CN110429091A CN201910688464.9A CN201910688464A CN110429091A CN 110429091 A CN110429091 A CN 110429091A CN 201910688464 A CN201910688464 A CN 201910688464A CN 110429091 A CN110429091 A CN 110429091A
Authority
CN
China
Prior art keywords
layer
light
blocking structure
dielectric layer
interlayer dielectric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201910688464.9A
Other languages
Chinese (zh)
Other versions
CN110429091B (en
Inventor
顾学强
王言虹
陈力山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai IC R&D Center Co Ltd
Chengdu Image Design Technology Co Ltd
Original Assignee
Shanghai Integrated Circuit Research and Development Center Co Ltd
Chengdu Image Design Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Integrated Circuit Research and Development Center Co Ltd, Chengdu Image Design Technology Co Ltd filed Critical Shanghai Integrated Circuit Research and Development Center Co Ltd
Priority to CN201910688464.9A priority Critical patent/CN110429091B/en
Publication of CN110429091A publication Critical patent/CN110429091A/en
Application granted granted Critical
Publication of CN110429091B publication Critical patent/CN110429091B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/1462Coatings
    • H01L27/14623Optical shielding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14632Wafer-level processed structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14685Process for coatings or optical elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14687Wafer level processing

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

The global pixel structure with light-blocking structure that the invention discloses a kind of, including the photodiode being set on substrate, transfer tube, memory node, metal interconnecting layer in substrate upper interlayer dielectric layer is located at the upper area between the photodiode of adjacent pixel unit, and memory node is covered, cyclic annular deep trench is equipped in interlayer dielectric layer above photodiode, it is mutually electrically isolated between deep trench lower end and the upper surface of photodiode, one compound light-blocking structure is filled in deep trench, and from the upper surface for the interlayer dielectric layer that the turnover of deep trench upper end is covered on metal interconnecting layer, realize the interlayer dielectric layer for being covered compound light-blocking structure, metal interconnecting layer and the completely insulated masking of memory node, therefore the signal of storage node not will receive the influence of incident ray, avoid the distortion of output signal.The forming method for the global pixel structure with light-blocking structure that the invention also discloses a kind of.

Description

A kind of global pixel structure and forming method with light-blocking structure
Technical field
The present invention relates to cmos image sensor technical fields, more particularly, to a kind of overall situation with light-blocking structure Pixel structure and forming method.
Background technique
Imaging sensor refers to the device for converting optical signals to electric signal, usually extensive commercial imaging sensor core Piece includes charge-coupled device (CCD) and complementary metal oxide semiconductor (CMOS) image sensor chip two major classes.
Cmos image sensor is compared with traditional ccd sensor, have low-power consumption, low cost and with CMOS technology phase The features such as compatible, therefore have been more and more widely used.Present cmos image sensor has not only been applied to consumer electronics neck Domain, such as miniature digital camera (DSC), mobile phone camera, in video camera and digital single-lens reflex camera (DSLR), and in automotive electronics, Monitoring, the fields such as biotechnology and medicine are also widely used.
The pixel unit of cmos image sensor is that imaging sensor realizes photosensitive core devices, most common pixel list Member is the active pixel structure comprising a photodiode and four transistors.In these devices, photodiode is sense Light unit realizes collection and photoelectric conversion to light;Other MOS transistors are control units, main to realize to photoelectricity two Pole pipe is chosen, and resets, the control of signal amplification and reading.The number of MOS transistor, determines non-sense in one pixel unit Size shared by light region.Above-mentioned include the dot structure of four transistors is commonly referred to as 4T pixel unit.
Usually there are two types of shutter control modes in digital camera: i.e. mechanical shutter and electronic shutter.Mechanical shutter passes through The folding of the mechanical parts before cmos image sensor is mounted on to control the time for exposure;Electronic shutter by pixel unit when Sequence controls to change the time of integration, to achieve the purpose that control the time for exposure.Since mechanical shutter needs mechanical parts, can occupy The area of digital camera, therefore it is not suitable for portable digital camera.For video surveillance applications, due to be usually into Therefore row video acquisition generally controls the time for exposure using electronic shutter.Wherein electronic shutter is divided into two kinds again: i.e. roller shutter type With global exposure type.Time for exposure between every row of roller shutter type electronic shutter be it is inconsistent, hold when shooting high-speed object Easily cause motion blur phenomenon;And every a line of global exposure type electronic shutter is in same Time Exposure, then simultaneously by charge signal It is stored in the memory node of pixel unit, finally exports the signal of memory node line by line.Global exposure type electronic shutter due to All rows are exposed in the same time, so not will cause motion blur phenomenon.
It is right as cmos image sensor is more and more widely used in industrial, vehicle-mounted, road monitoring and high speed camera It is further increased in the demand for the imaging sensor that can capture high-speed moving object image.In order to monitor high-speed object, CMOS Imaging sensor needs the pixel unit (referred to as global pixel) using global exposure, and for depositing in global exposing pixels unit The memory node for storing up charge signal is a very important index for the spurious response of light source.In practical applications, according to Each pixel unit uses the number of transistor, and global exposing pixels unit has 4T, 5T, 6T, 8T and 12T etc., and memory node can To use junction capacity or MOS (metal-oxide-semiconductor structure) capacitor.
As shown in Figure 1, the charge-storage node in existing 5T overall situation exposing pixels unit is exactly the junction capacity on 7 side of transfer tube 6.The parasitic photoresponse of memory node 6 refers to that memory node capacitor to the spurious response of incident light, for pixel unit, enters The light for being mapped to pixel unit surface cannot all focus on 2 surface of photodiode on substrate 1 due to reflect and scattering, There is portions incident light that may be entered on memory node 6 by multiple reflections, memory node 6 is under the irradiation of incident ray Photoelectric respone can be generated as photodiode 2, the charge generated on memory node 6 due to incident light will affect original It is stored in the voltage signal generated by photodiode 2 above, causes the distortion of signal.In order to reduce since storage saves Photoelectric respone caused by 6 light leakages of point, need to prevent using completely opaque metal screen layer 8 on memory node 6 into Penetrate the influence of light.
Compared with common CMOS process, the parasitic photoresponse of global pixel in order to prevent, conventional overall situation pixel unit is in layer Between one layer of metal shadowing layer 8 being additionally formed is equipped in dielectric layer 3.This layer of metal shadowing layer 8 is usually using lighttight tungsten, aluminium It is made with metal compound materials such as metals or tantalum nitride, titanium nitride such as copper.Since 8 large area of metal shadowing layer is covered with transmission Pipe 7 and memory node 6, in order to avoid the mutual crosstalk in the pixel course of work on transfer tube 7 and memory node 6, whole metals Masking layer 8 is finally grounded by metal interconnecting layer 4.
Metal shadowing layer is the special process in imaging sensor, needs to be developed on stand CMOS.Usually The metal shadowing layer forming method of global pixel is to be deposited before the formation of metal interconnecting layer 4 using one layer of additional tungsten And patterning process.But additional Metal deposition and etching, be easy to cause metal contamination, to influence pixel performance.And it is Achieve the effect that light-blocking, the area coverage of metal shadowing layer 8 is larger, this further increases the risks of metal contamination.Meanwhile it storing Node 6 needs to be connected to metal interconnecting layer 4 by contact hole 5, since memory node 6 is a constantly variation during the work time Dynamic Signal, therefore the contact hole 5 on memory node 6 cannot be connected with metal shadowing layer 8, it is necessary between keeping certain Away from.Thus light leakage gap is formed on memory node 6.There is no metal shadowing layer 8 or contact hole 5 in light leakage interstitial site Covering, therefore incident ray can pass through light leakage gap by the multiple reflections of metal interconnecting layer 4 and reach memory node 6, produce Raw parasitism photoresponse causes the distortion of global pixel storage signal and the decline of picture quality.
Summary of the invention
It is an object of the invention to overcome drawbacks described above of the existing technology, a kind of overall situation with light-blocking structure is provided Pixel structure and forming method.
To achieve the above object, technical scheme is as follows:
A kind of global pixel structure with light-blocking structure, comprising: the photodiode on substrate, transfer tube are deposited Node, and the interlayer dielectric layer being covered on the substrate are stored up, is equipped with metal interconnecting layer, the gold in the interlayer dielectric layer Belong to interconnection layer and be located at the upper area between the photodiode of two pixel units of arbitrary neighborhood, and the memory node is covered It covers, is equipped with a cyclic annular deep trench, the lower end of the deep trench in the interlayer dielectric layer above the photodiode vertically It mutually being electrically isolated between the upper surface of the photodiode, a compound light-blocking structure is filled in the deep trench, and from The upper end turnover of the deep trench is covered on the upper surface of the interlayer dielectric layer on the metal interconnecting layer, and realization will be described multiple Close the completely insulated masking of the interlayer dielectric layer, metal interconnecting layer and memory node that light-blocking structure is covered.
Further, mutually electric by an insulating layer between the lower end of the deep trench and the upper surface of the photodiode Sexual isolation.
Further, the insulating layer is ring-type corresponding with the deep trench, in the top of the photodiode Form opening.
Further, the compound light-blocking structure is using one of titanium, titanium nitride, tantalum nitride, tungsten, aluminium, copper, cobalt and nickel Or a variety of formation.
Further, the insulating layer is using one of silicon nitride, silicon oxynitride and silicon carbide or a variety of formation.
A kind of forming method of the global pixel structure with light-blocking structure, comprising the following steps:
One substrate is provided, uses conventional cmos image sensor process over the substrate, forms photodiode, transmission Pipe and memory node;
Full sheet deposits etching barrier layer materials on the substrate surface;
The lithography and etching on barrier layer is performed etching, the circle etching resistance for being looped around photodiode top position is only retained Barrier material forms etching barrier layer, and as insulating layer;
Full sheet deposits interlayer dielectric layer material on the substrate surface, forms interlayer dielectric layer;
Metal interconnecting layer is formed in the interlayer dielectric layer, and the metal interconnecting layer is made to be only located at arbitrary neighborhood two Upper area between the photodiode of pixel unit;
The lithography and etching of deep trench is carried out, is vertically formed in the square interlayer dielectric layer on the photodiode One cyclic annular deep trench corresponding with the etching barrier layer, and make it is described it is deep plough groove etched penetrate the interlayer dielectric layer, be parked in On the etching barrier layer;
The deposit for carrying out compound light-blocking structure material makes the compound light-blocking structure material full of the deep trench, and from The deep trench upper end is extended on the upper surface of the interlayer dielectric layer;
Lithography and etching is carried out to the compound light-blocking structure material, removal is located at the institute of the cyclic annular inside of the deep trench The part compound light-blocking structure material in inter-level dielectric layer surface is stated, the cyclic annular outside for being located at the deep trench is retained The part compound light-blocking structure material in the inter-level dielectric layer surface, forms compound light-blocking structure;Wherein, described compound The completely insulated masking of the interlayer dielectric layer, metal interconnecting layer and memory node that light-blocking structure is covered it.
Further, the etching barrier layer materials are one of silicon nitride, silicon oxynitride and silicon carbide or a variety of.
Further, the compound light-blocking structure material is one in titanium, titanium nitride, tantalum nitride, tungsten, aluminium, copper, cobalt and nickel Kind is a variety of.
Further, the deposition thickness of the compound light-blocking structure material is 10 angstroms to 10000 angstroms.
Further, the substrate is N-type or P-type silicon substrate.
It can be seen from the above technical proposal that the present invention is by forming one in interlayer dielectric layer square on the photodiode Loop deep trench fills the materials such as metal or metallic compound in deep trench, and extends over the layer to other than deep trench Between on dielectric layer, form the compound light-blocking structure of lighttight metal layer for surrounding entire metal interconnecting layer, realize to incident light The complete shielding of line, therefore the signal of memory node not will receive the influence of incident ray, ensure that global exposing pixels unit Storage capacitance in signal accuracy, avoid the distortion of output signal.Also, with the work of routine large area covering tungsten Skill is different, in the present invention between the metal layer in deep trench and underlying photoelectric diode area using cyclic annular insulating layer carry out every From, and metal layer, only in the deep trench of each pixel unit around a round figure is formed, global sections product is smaller, thus Prevent the possibility of metal contamination.
Detailed description of the invention
Fig. 1 is a kind of structural schematic diagram of existing 5T overall situation exposing pixels unit.
Fig. 2 is a kind of domain structure signal of global pixel structure with light-blocking structure of a preferred embodiment of the present invention Figure.
Fig. 3 is a kind of global pixel structure schematic diagram with light-blocking structure of a preferred embodiment of the present invention.
Fig. 4-Figure 10 is a kind of formation side of global pixel structure with light-blocking structure of a preferred embodiment of the present invention The processing step schematic diagram of method.
Specific embodiment
With reference to the accompanying drawing, specific embodiments of the present invention will be described in further detail.
It should be noted that in following specific embodiments, when describing embodiments of the invention in detail, in order to clear Ground indicates structure of the invention in order to illustrate, spy does not draw to the structure in attached drawing according to general proportion, and has carried out part Amplification, deformation and simplified processing, therefore, should be avoided in this, as limitation of the invention to understand.
In specific embodiment of the invention below, Fig. 2-Fig. 3 is please referred to, Fig. 2 is a preferred embodiment of the present invention A kind of domain structure schematic diagram of the global pixel structure with light-blocking structure, Fig. 3 is one kind of a preferred embodiment of the present invention Global pixel structure schematic diagram with light-blocking structure;Wherein, Fig. 3 shows the cross section structure in direction " A-B " of the domain along Fig. 2 Figure.As shown in Fig. 2, the domain structure of the global pixel structure provided by the invention with light-blocking structure, with conventional global pixel It compares, in order to avoid the light leakage gap between original metal screen layer and contact hole is to global pixel memory node storage signal It influences (please referring to Fig. 1), the present invention is in inner circle area (i.e. two pole of photoelectricity of the top-level metallic interconnection layer 26 of common metal interconnection layer Pipe upper area) it is respectively arranged with a loop etching barrier layer (insulating layer) 31 and a circle zanjon groove layer 32.As shown in figure 3, The width of top-level metallic interconnection layer 26 in usual pixel in metal interconnecting layer 21 is maximum, and to must come out metal mutual for deep trench 32 Even 21 certain distance of layer, to avoid short circuit is formed between the metal in deep trench 32 and interconnection layer metal.Therefore, with Fig. 3 in Fig. 2 In top-level metallic interconnection layer 26 illustrate the correlation between deep trench 32, etching barrier layer 31 and metal interconnecting layer 21.
As shown in figure 3, a kind of global pixel structure with light-blocking structure of the invention, it may include on substrate 20 Photodiode 28, transfer tube 30, memory node 29, and the metal interconnecting layer 21 on substrate 20.Substrate 20 can be used Semi-conductor silicon chip etc., and substrate 20 can be N-type or P-type silicon substrate.The invention is not limited thereto.
Interlayer dielectric layer 25 is covered on substrate 20;Metal interconnecting layer 21 is arranged in interlayer dielectric layer 25.Metal interconnection Layer 21 can be multilayered structure (it includes the top-level metallic interconnection layer 26 positioned at top layer).Also, in metal interconnecting layer 21 In upper area between two photodiodes 28 of two pixel units that interconnection metal is located at arbitrary neighborhood, so as in light The top of electric diode 28 forms optical channel.
Memory node 29 is normally at the lower zone of metal interconnecting layer 21;Between memory node 29 and metal interconnecting layer 21 Contact hole 27 can be used to be attached.
The also vertical deep trench 32 for being equipped with a loop, deep trench 32 in the interlayer dielectric layer 25 of 28 top of photodiode Interior outside be all interlayer dielectric layer 25;The lower end of deep trench 32 and the upper surface of photodiode 28 mutually electrically isolate.Specifically Ground can be isolated between the lower end and the upper surface of photodiode 28 of deep trench 32 by an insulating layer 31.Insulating layer 31 can have ring-type corresponding with deep trench 32, to form opening 24 in the top position of photodiode 28.Also, it insulate The cricoid width boundary of layer 31 should ensure that and can electrically isolate completely deep trench 32 and photodiode 28.
Silicon nitride, silicon oxynitride or/and silicon carbide etc. can be used in insulating layer material.Also, insulating layer 31 can be one layer Or multilayered structure.
Deep trench 32 is located at the inner circle area (please referring to Fig. 2), i.e. of the top-level metallic interconnection layer 26 in metal interconnecting layer 21 In the interlayer dielectric layer 25 of 28 upper area of photodiode.The region is also the area to form optical channel (corresponding with opening 24) Domain.A compound light-blocking structure 23 is equipped on the upper surface of interlayer dielectric layer 25 in deep trench 32 and other than deep trench 32 With 22;Compound light-blocking structure 23 and 22 is filled in deep trench 32, and from the upper end of deep trench 32 to deep trench 32 on the outside of extend, Turnover is covered on the upper surface of the interlayer dielectric layer 25 on metal interconnecting layer 21.
The lower end of the part 23 in deep trench 32 and the upper surface of insulating layer 31 are filled in compound light-blocking structure 23 and 22 Connect.
The metals such as titanium, titanium nitride, tantalum nitride, tungsten, aluminium, copper, cobalt and nickel or metal can be used in compound light-blocking structure 23 and 22 One of compound-material or a variety of formation.I.e. compound light-blocking structure 23 and 22 uses lighttight metal-layer structure.
In this way, compound light-blocking structure 23 and 22 will just be disposed below the mutual of the metal interconnecting layer 21 in interlayer dielectric layer 25 Even metal and memory node 29 completely obscured (encirclement) get up, and are isolated with interconnection metal-insulator, to avoid in deep trench 32 Metal layer 23 and interconnection metal between formed short circuit.
The compound light-blocking structure 23 and 22 of entire metal interconnecting layer 21, and the compound light-blocking knot of each pixel are surrounded by being formed Structure 23 is connected with 22, forms similar cell structure, realizes the complete shielding to incident ray, therefore the signal of memory node 29 The influence that not will receive incident ray avoids the distortion of output signal;Meanwhile the metal layer 23 filled in deep trench 32 is whole Body section product is smaller, can utmostly avoid metal contamination, the image of high quality can be obtained by making cmos image sensor finally.
Above structure of the invention can be applied to the various global pixels for needing storage capacitance such as 4T, 5T, 6T, 8T and 12T In structure, influence of the incident light to charge signal in memory node capacitor is avoided to realize.
Below by specific embodiment and attached drawing, to a kind of global pixel structure with light-blocking structure of the invention Forming method is described in detail.
Fig. 4-Figure 10 is please referred to, Fig. 4-Figure 10 is a kind of global picture with light-blocking structure of a preferred embodiment of the present invention The processing step schematic diagram of the forming method of meta structure.A kind of formation of global pixel structure with light-blocking structure of the invention Method can be used for making a kind of global pixel structure with light-blocking structure that above-mentioned such as Fig. 3 is shown, may particularly include with Lower step:
As shown in figure 4, providing a substrate 20, such as a N-type or P-type silicon substrate can be used.Firstly, can on substrate 20 Using conventional cmos image sensor process, the pixel units knots such as photodiode 28, transfer tube 30 and memory node 29 are formed Structure.
Secondly as shown in figure 5, full sheet deposits etching barrier layer materials 31 ' on 20 surface of substrate.Etching barrier layer materials 31 ' can be used the dielectric material of the etching high selectivity ratio such as silicon nitride, silicon oxynitride and silicon carbide.
Again as shown in fig. 6, performing etching the lithography and etching on barrier layer.Only retain after etching and is looped around photodiode The etching barrier layer materials 31 ' of a loop on 28 top positions, all by the etching barrier layer materials 31 ' in other positions Removal forms etching barrier layer 31.Also, using the etching barrier layer of formation 31 as subsequent deep trench 32 and photoelectricity to be formed Insulating layer 31 between diode 28.The profile of etching barrier layer 31 is corresponding with the profile of deep trench 32.
Then as shown in fig. 7, full sheet deposits interlayer dielectric layer material, example on 20 surface of substrate for being formed with above structure Normal silica material such as can be used, form interlayer dielectric layer (rear track media layer) 25.And it is formed in interlayer dielectric layer 25 One to multiple layer metal interconnecting layer 21, such as the three-layer metal interconnection layer 21 of diagram, and formed and be used in interlayer dielectric layer 25 The contact hole 27 of metal interconnecting layer 21 and memory node 29 is connected, and metal interconnecting layer 21 is made to be only located at two pictures of arbitrary neighborhood Upper area between the photodiode 28 of plain unit.Wherein, the optical channel region of 28 top of photodiode is exactly metal The inner circle area of the top-level metallic interconnection layer 26 of interconnection layer 21.
Then as shown in figure 8, the lithography and etching of deep trench is carried out in interlayer dielectric layer 25, on photodiode 28 A circle cyclic annular deep trench 32 corresponding with etching barrier layer 31 is vertically formed in the interlayer dielectric layer 25 of side.When etching, make to be formed Deep trench 32 be located in the interlayer dielectric layer 25 of the top of photodiode 28, deep trench 32 is etched through interlayer dielectric layer 25, It stops on etching barrier layer 31.
Then as shown in figure 9, carrying out the deposit of compound light-blocking structure material, that is, metal filling processes are carried out.In deep trench The deposit that metal or metal compound material 23 ' are carried out in 32, makes compound light-blocking structure material 23 ' full of deep trench 32, and from The upper end of deep trench 32 is extended on the upper surface of interlayer dielectric layer 25.
Metal or metal compound material conventional in CMOS technology can be used to be formed in compound light-blocking structure material, wraps Include one of metal materials such as titanium, titanium nitride, tantalum nitride, tungsten, aluminium, copper, cobalt and nickel or several.The overall thickness of metal layer deposit It can be between 10 angstroms to 10000 angstroms.
Final metal or metallic compound 23 ', which realize deep trench 32, fills, while being formed above rear track media layer 25 Surface metal-layer.
Then, as shown in Figure 10, lithography and etching is carried out to compound light-blocking structure material 23 ', i.e. progress photodiode The metal layer etching of 28 tops, the part that removal is located on 25 surface of interlayer dielectric layer of cyclic annular 32 inside of deep trench are compound light-blocking Structural material 23 ' retains the compound light-blocking structure material in part being located on 25 surface of interlayer dielectric layer in cyclic annular 32 outside of deep trench Material 23 ', to form the compound light-blocking knot being made of metal layer 23 in deep trench 32 and 25 surface metal-layer 22 of interlayer dielectric layer Structure 23 and 22, and optical channel is formed above photodiode 28.Compound light-blocking structure 23 and 22 is by lower section interlayer dielectric layer 25 In metal interconnecting layer 21 and memory node 29 is completely insulated covers up.
In conclusion the present invention, which passes through in interlayer dielectric layer square on the photodiode, forms a loop deep trench, The materials such as metal or metallic compound, and the part interlayer dielectric layer extended over to other than deep trench are filled in deep trench On, the compound light-blocking structure of lighttight metal layer for surrounding entire metal interconnecting layer is formed, is realized to the complete of incident ray Shielding, therefore the signal of memory node not will receive the influence of incident ray, ensure that the storage electricity of global exposing pixels unit The accuracy of signal in appearance, avoids the distortion of output signal.Also, it is different with the technique of routine large area covering tungsten, It is isolated between the metal layer and underlying photoelectric diode area in deep trench using cyclic annular insulating layer in the present invention, and gold Belong to layer only in the deep trench of each pixel unit around a round figure is formed, global sections product is smaller, to prevent The possibility of metal contamination.
Protection model above-described to be merely a preferred embodiment of the present invention, that the embodiment is not intended to limit the invention It encloses, therefore all with the variation of equivalent structure made by specification and accompanying drawing content of the invention, similarly should be included in this hair In bright protection scope.

Claims (10)

1. a kind of global pixel structure with light-blocking structure characterized by comprising the photodiode on substrate, Transfer tube, memory node, and the interlayer dielectric layer being covered on the substrate are equipped with metal in the interlayer dielectric layer and interconnect Layer, the metal interconnecting layer are located at the upper area between the photodiode of two pixel units of arbitrary neighborhood, and will be described Memory node covers, and is equipped with a cyclic annular deep trench, the depth in the interlayer dielectric layer above the photodiode vertically It is mutually electrically isolated between the lower end of groove and the upper surface of the photodiode, a compound light-blocking structure is filled in the zanjon It is real in slot, and from the upper surface for the interlayer dielectric layer that the turnover of the upper end of the deep trench is covered on the metal interconnecting layer The completely insulated screening of the interlayer dielectric layer, metal interconnecting layer and memory node that now the compound light-blocking structure is covered It covers.
2. the global pixel structure according to claim 1 with light-blocking structure, which is characterized in that under the deep trench It is mutually electrically isolated between end and the upper surface of the photodiode by an insulating layer.
3. the global pixel structure according to claim 2 with light-blocking structure, which is characterized in that the insulating layer be with The corresponding ring-type of the deep trench forms opening in the top of the photodiode.
4. the global pixel structure according to claim 1 with light-blocking structure, which is characterized in that the compound light-blocking knot Structure is using one of titanium, titanium nitride, tantalum nitride, tungsten, aluminium, copper, cobalt and nickel or a variety of formation.
5. the global pixel structure according to claim 2 with light-blocking structure, which is characterized in that the insulating layer uses One of silicon nitride, silicon oxynitride and silicon carbide or a variety of formation.
6. a kind of forming method of the global pixel structure with light-blocking structure, which comprises the following steps:
One substrate is provided, over the substrate use conventional cmos image sensor process, formed photodiode, transfer tube and Memory node;
Full sheet deposits etching barrier layer materials on the substrate surface;
The lithography and etching on barrier layer is performed etching, the circle etching barrier layer for being looped around photodiode top position is only retained Material forms etching barrier layer, and as insulating layer;
Full sheet deposits interlayer dielectric layer material on the substrate surface, forms interlayer dielectric layer;
Metal interconnecting layer is formed in the interlayer dielectric layer, and the metal interconnecting layer is made to be only located at two pixels of arbitrary neighborhood Upper area between the photodiode of unit;
Carry out the lithography and etching of deep trench, be vertically formed in the square interlayer dielectric layer on the photodiode one with The corresponding cyclic annular deep trench of the etching barrier layer, and make it is described it is deep plough groove etched penetrate the interlayer dielectric layer, be parked in described On etching barrier layer;
The deposit for carrying out compound light-blocking structure material makes the compound light-blocking structure material full of the deep trench, and described in Deep trench upper end is extended on the upper surface of the interlayer dielectric layer;
Lithography and etching is carried out to the compound light-blocking structure material, removal is located at the layer of the cyclic annular inside of the deep trench Between the part compound light-blocking structure material on dielectric layer surface, retain the described of the cyclic annular outside for being located at the deep trench The part compound light-blocking structure material in inter-level dielectric layer surface, forms compound light-blocking structure;Wherein, described compound light-blocking The completely insulated masking of the interlayer dielectric layer, metal interconnecting layer and memory node that structure is covered it.
7. the forming method of the global pixel structure according to claim 6 with light-blocking structure, which is characterized in that described Etching barrier layer materials are one of silicon nitride, silicon oxynitride and silicon carbide or a variety of.
8. the forming method of the global pixel structure according to claim 6 with light-blocking structure, which is characterized in that described Compound light-blocking structure material is one of titanium, titanium nitride, tantalum nitride, tungsten, aluminium, copper, cobalt and nickel or a variety of.
9. the forming method of the global pixel structure according to claim 6 with light-blocking structure, which is characterized in that described The deposition thickness of compound light-blocking structure material is 10 angstroms to 10000 angstroms.
10. the forming method of the global pixel structure according to claim 6 with light-blocking structure, which is characterized in that institute Stating substrate is N-type or P-type silicon substrate.
CN201910688464.9A 2019-07-29 2019-07-29 Global pixel structure with light blocking structure and forming method Active CN110429091B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910688464.9A CN110429091B (en) 2019-07-29 2019-07-29 Global pixel structure with light blocking structure and forming method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910688464.9A CN110429091B (en) 2019-07-29 2019-07-29 Global pixel structure with light blocking structure and forming method

Publications (2)

Publication Number Publication Date
CN110429091A true CN110429091A (en) 2019-11-08
CN110429091B CN110429091B (en) 2023-03-03

Family

ID=68412838

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910688464.9A Active CN110429091B (en) 2019-07-29 2019-07-29 Global pixel structure with light blocking structure and forming method

Country Status (1)

Country Link
CN (1) CN110429091B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111463225A (en) * 2020-04-22 2020-07-28 上海微阱电子科技有限公司 Global shutter image sensor unit and preparation method thereof
US20220173147A1 (en) * 2020-11-27 2022-06-02 Sharp Semiconductor Innovation Corporation Solid-state imaging device
CN116884984A (en) * 2023-09-04 2023-10-13 合肥海图微电子有限公司 Image sensor and manufacturing method thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102130140A (en) * 2008-01-21 2011-07-20 索尼株式会社 Solid-state imaging device
CN102386193A (en) * 2010-08-30 2012-03-21 索尼公司 Solid-state imaging device and electronic apparatus
CN109119434A (en) * 2018-08-31 2019-01-01 上海华力集成电路制造有限公司 A kind of dot structure and its manufacturing method
CN110299374A (en) * 2019-06-26 2019-10-01 上海微阱电子科技有限公司 A kind of global pixel cell structure and forming method reducing parasitic photoresponse

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102130140A (en) * 2008-01-21 2011-07-20 索尼株式会社 Solid-state imaging device
CN102386193A (en) * 2010-08-30 2012-03-21 索尼公司 Solid-state imaging device and electronic apparatus
CN109119434A (en) * 2018-08-31 2019-01-01 上海华力集成电路制造有限公司 A kind of dot structure and its manufacturing method
CN110299374A (en) * 2019-06-26 2019-10-01 上海微阱电子科技有限公司 A kind of global pixel cell structure and forming method reducing parasitic photoresponse

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111463225A (en) * 2020-04-22 2020-07-28 上海微阱电子科技有限公司 Global shutter image sensor unit and preparation method thereof
CN111463225B (en) * 2020-04-22 2023-06-20 上海微阱电子科技有限公司 Global shutter image sensor unit and preparation method thereof
US20220173147A1 (en) * 2020-11-27 2022-06-02 Sharp Semiconductor Innovation Corporation Solid-state imaging device
US11843012B2 (en) * 2020-11-27 2023-12-12 Sharp Semiconductor Innovation Corporation Solid-state imaging device
CN116884984A (en) * 2023-09-04 2023-10-13 合肥海图微电子有限公司 Image sensor and manufacturing method thereof
CN116884984B (en) * 2023-09-04 2023-12-29 合肥海图微电子有限公司 Image sensor and manufacturing method thereof

Also Published As

Publication number Publication date
CN110429091B (en) 2023-03-03

Similar Documents

Publication Publication Date Title
US9735196B2 (en) Photosensitive capacitor pixel for image sensor
US9978786B2 (en) Solid-state image-capturing device and production method thereof, and electronic appliance
CN108598100B (en) Global pixel structure for reducing light leakage of storage node and manufacturing method
US9373657B2 (en) System and method for fabricating a 3D image sensor structure
CN103258829A (en) Solid-state imaging device, image sensor, method of manufacturing image sensor, and electronic apparatus
KR102651181B1 (en) Imaging elements and imaging devices
CN106098714B (en) Back-illuminated type overall situation exposing pixels cellular construction and manufacturing method
US9312299B2 (en) Image sensor with dielectric charge trapping device
CN107302008B (en) Back-illuminated pixel unit structure for enhancing near-infrared photosensitive property and forming method
CN110429091A (en) A kind of global pixel structure and forming method with light-blocking structure
TWI757894B (en) Image sensor and method of forming the same
CN107195648B (en) Low-noise high-sensitivity global pixel unit structure and forming method thereof
US20160181294A1 (en) Backside illuminated image sensor and manufacturing method therefor
US11742368B2 (en) Image sensing device and method for forming the same
JP3185623U (en) CMOS sensor with back-illuminated electronic global shutter control
KR20210038832A (en) Embedded light shield structure for cmos image sensor
JP2013168546A (en) Image sensor, method of manufacturing the same, and electronic apparatus
CN110299374A (en) A kind of global pixel cell structure and forming method reducing parasitic photoresponse
CN105762160B (en) Back-illuminated global pixel unit structure and preparation method thereof
CN112117291A (en) Backside-illuminated charge domain global shutter image sensor and manufacturing method thereof
CN109148497B (en) Global pixel structure for preventing parasitic light response and forming method
CN104282628B (en) A kind of preparation method of cmos image sensor overall situation pixel storage capacitance
CN109411493B (en) Structure and forming method of light leakage prevention global pixel unit
CN109494232B (en) Global pixel structure of light leakage prevention CMOS image sensor and forming method
CN106409850A (en) 3D global pixel unit and preparation method thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant