CN110299374A - A kind of global pixel cell structure and forming method reducing parasitic photoresponse - Google Patents
A kind of global pixel cell structure and forming method reducing parasitic photoresponse Download PDFInfo
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- H01L27/144—Devices controlled by radiation
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- H01L27/144—Devices controlled by radiation
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Abstract
The invention discloses a kind of global pixel cell structures for reducing parasitic photoresponse, including the photodiode being set on substrate, transfer tube, memory node, and it is covered in the interlayer dielectric layer on substrate, metal interconnecting layer is equipped in interlayer dielectric layer, and metal interconnecting layer is located at the upper area between the photodiode of two pixel units of arbitrary neighborhood, deep trench is additionally provided in interlayer dielectric layer above photodiode, the bottom surface of deep trench and the upper surface of photodiode are isolated, one compound light-blocking structure is covered on the side wall of deep trench, it forms opening in the upper and lower ends of deep trench, and it extends on the upper surface of interlayer dielectric layer, by the completely insulated masking of metal interconnecting layer in interlayer dielectric layer below, therefore the signal of storage node not will receive the influence of incident ray, avoid the distortion of output signal.The invention also discloses a kind of forming methods of global pixel cell structure for reducing parasitic photoresponse.
Description
Technical field
The present invention relates to cmos image sensor technical fields, reduce the complete of parasitic photoresponse more particularly, to a kind of
Office's pixel cell structure and forming method.
Background technique
Imaging sensor refers to the device for converting optical signals to electric signal, usually extensive commercial imaging sensor core
Piece includes charge-coupled device (CCD) and complementary metal oxide semiconductor (CMOS) image sensor chip two major classes.
Cmos image sensor is compared with traditional ccd sensor, have low-power consumption, low cost and with CMOS technology phase
The features such as compatible, therefore have been more and more widely used.Present cmos image sensor has not only been applied to consumer electronics neck
Domain, such as miniature digital camera (DSC), mobile phone camera, in video camera and digital single-lens reflex camera (DSLR), and in automotive electronics,
Monitoring, the fields such as biotechnology and medicine are also widely used.
The pixel unit of cmos image sensor is that imaging sensor realizes photosensitive core devices, most common pixel list
Member is the active pixel structure comprising a photodiode and four transistors.In these devices, photodiode is sense
Light unit realizes collection and photoelectric conversion to light；Other MOS transistors are control units, main to realize to photoelectricity two
Pole pipe is chosen, and resets, the control of signal amplification and reading.The number of MOS transistor, determines non-sense in one pixel unit
Size shared by light region.Above-mentioned include the dot structure of four transistors is commonly referred to as 4T pixel unit.
Usually there are two types of shutter control modes in digital camera: i.e. mechanical shutter and electronic shutter.Mechanical shutter passes through
The folding of the mechanical parts before cmos image sensor is mounted on to control the time for exposure；Electronic shutter by pixel unit when
Sequence controls to change the time of integration, to achieve the purpose that control the time for exposure.Since mechanical shutter needs mechanical parts, can occupy
The area of digital camera, therefore it is not suitable for portable digital camera.For video surveillance applications, due to be usually into
Therefore row video acquisition generally controls the time for exposure using electronic shutter.Wherein electronic shutter is divided into two kinds again: i.e. roller shutter type
With global exposure type.Time for exposure between every row of roller shutter type electronic shutter be it is inconsistent, hold when shooting high-speed object
Easily cause motion blur phenomenon；And every a line of global exposure type electronic shutter is in same Time Exposure, then simultaneously by charge signal
It is stored in the memory node of pixel unit, finally exports the signal of memory node line by line.Global exposure type electronic shutter due to
All rows are exposed in the same time, so not will cause motion blur phenomenon.
It is right as cmos image sensor is more and more widely used in industrial, vehicle-mounted, road monitoring and high speed camera
It is further increased in the demand for the imaging sensor that can capture high-speed moving object image.In order to monitor high-speed object, CMOS
Imaging sensor needs the pixel unit (referred to as global pixel) using global exposure, and for depositing in global exposing pixels unit
The memory node for storing up charge signal is a very important index for the spurious response of light source.In practical applications, according to
Each pixel unit uses the number of transistor, and global exposing pixels unit has 4T, 5T, 6T, 8T and 12T etc..
As shown in Figure 1, the charge-storage node in existing 5T overall situation exposing pixels unit is exactly the junction capacity on 7 side of transfer tube
6.The parasitic photoresponse of memory node 6 refers to that memory node capacitor to the spurious response of incident light, for pixel unit, enters
The light for being mapped to pixel unit surface cannot all focus on 2 surface of photodiode on substrate 1 due to reflect and scattering,
There is portions incident light that may be entered on memory node 6 by multiple reflections, memory node 6 is under the irradiation of incident ray
Photoelectric respone can be generated as photodiode 2, the charge generated on memory node 6 due to incident light will affect original
It is stored in the voltage signal generated by photodiode 2 above, causes the distortion of signal.In order to reduce since storage saves
Photoelectric respone caused by 6 light leakages of point, need to prevent using completely opaque metal screen layer 8 on memory node 6 into
Penetrate the influence of light.
Compared with common CMOS process, the parasitic photoresponse of global pixel in order to prevent, conventional overall situation pixel unit is in layer
Between one layer of metal shadowing layer 8 being additionally formed is equipped in dielectric layer 3.This layer of metal shadowing layer 8 is usually using lighttight tungsten, aluminium
It is made with metal compound materials such as metals or tantalum nitride, titanium nitride such as copper.Since 8 large area of metal shadowing layer is covered with transmission
Pipe 7 and memory node 6, in order to avoid the mutual crosstalk in the pixel course of work on transfer tube 7 and memory node 6, whole metals
Masking layer 8 is finally grounded by metal interconnecting layer 4.
Metal shadowing layer is the special process in imaging sensor, needs to be developed on stand CMOS.Usually
The metal shadowing layer forming method of global pixel is to be deposited before the formation of metal interconnecting layer 4 using one layer of additional tungsten
And patterning process.But additional Metal deposition and etching, be easy to cause metal contamination, to influence pixel performance.And it is
Achieve the effect that light-blocking, the area coverage of metal shadowing layer 8 is larger, this further increases the risks of metal contamination.Meanwhile it storing
Node 6 needs to be connected to metal interconnecting layer 4 by contact hole 5, since memory node 6 is a constantly variation during the work time
Dynamic Signal, therefore the contact hole 5 on memory node 6 cannot be connected with metal shadowing layer 8, it is necessary between keeping certain
Away from.Thus light leakage gap is formed on memory node 6.There is no metal shadowing layer 8 or contact hole 5 in light leakage interstitial site
Covering, therefore incident ray can pass through light leakage gap by the multiple reflections of metal interconnecting layer 4 and reach memory node 6, produce
Raw parasitism photoresponse causes the distortion of global pixel storage signal and the decline of picture quality.
Summary of the invention
It is an object of the invention to overcome drawbacks described above of the existing technology, providing a kind of reduces the complete of parasitic photoresponse
Office's pixel cell structure and forming method.
To achieve the above object, technical scheme is as follows:
A kind of global pixel cell structure reducing parasitic photoresponse, including the photodiode being set on substrate, transmission
It manages, memory node, and the interlayer dielectric layer being covered on the substrate, metal interconnecting layer is equipped in the interlayer dielectric layer,
And the metal interconnecting layer is located at the upper area between the photodiode of two pixel units of arbitrary neighborhood, the photoelectricity two
Deep trench, the upper table of the bottom surface of the deep trench and the photodiode are additionally provided in the interlayer dielectric layer above pole pipe
Face is isolated, and a compound light-blocking structure is covered on the side wall of the deep trench, is formed in the upper and lower ends of the deep trench
Opening, and extend on the upper surface of the interlayer dielectric layer, by the metal in the interlayer dielectric layer below
The completely insulated masking of interconnection layer.
Further, it is separated by between the bottom surface of the deep trench and the upper surface of the photodiode by an insulating layer
From.
Further, be covered in the compound light-blocking structure in the zanjon groove sidewall lower end and the insulating layer
Upper surface connects.
Further, photic zone is filled in the deep trench within the compound light-blocking structure.
Further, the compound light-blocking structure is using one of titanium, titanium nitride, tantalum nitride, tungsten, aluminium, copper, cobalt and nickel
Or a variety of formation, the photic zone are formed using organic material or inorganic material.
A kind of forming method for the global pixel cell structure reducing parasitic photoresponse, comprising the following steps:
One substrate is provided, uses conventional cmos image sensor process over the substrate, forms photodiode, transmission
Pipe and memory node；
Full sheet deposits etching barrier layer materials on the substrate surface；
The lithography and etching on barrier layer is performed etching, the etching barrier layer materials of photodiode top position are only retained,
Etching barrier layer is formed, and as insulating layer；
Full sheet deposits interlayer dielectric layer material on the substrate surface, forms interlayer dielectric layer；
Metal interconnecting layer is formed in the interlayer dielectric layer, and the metal interconnecting layer is made to be only located at arbitrary neighborhood two
Upper area between the photodiode of pixel unit；
The lithography and etching for carrying out deep trench, the interlayer for being located at the deep trench above the photodiode are situated between
In matter layer, and stop on the etching barrier layer；Wherein, the sectional dimension of the deep trench is less than or equal to the lower section quarter
Lose the size on barrier layer；
The deposit that compound light-blocking structure material is carried out in the deep trench is covered in the compound light-blocking structure material
On the bottom surface and side wall of the deep trench, and extend on the upper surface of the interlayer dielectric layer；
Lithography and etching is carried out to the compound light-blocking structure material, removal is located at described multiple in the zanjon groove bottom
Light-blocking structure material is closed, the compound light-blocking knot in the zanjon groove sidewall and on the interlayer dielectric layer upper surface is retained
Structure material forms compound light-blocking structure；Wherein, the compound light-blocking structure is by the gold in the interlayer dielectric layer below
Belong to the completely insulated masking of interconnection layer；
The filling of light transmission layer material is carried out in the deep trench, it is rectangular at photic zone on the photodiode.
Further, the etching barrier layer materials are silicon nitride, silicon oxynitride or silicon carbide.
Further, the compound light-blocking structure material is one in titanium, titanium nitride, tantalum nitride, tungsten, aluminium, copper, cobalt and nickel
Kind is a variety of.
Further, the deposition thickness of the compound light-blocking structure material is between 10 angstroms to 10000 angstroms.
Further, the light transmission layer material is organic material or inorganic material.
It can be seen from the above technical proposal that the present invention is deep by being formed in interlayer dielectric layer square on the photodiode
Groove, and the materials such as metal or metallic compound are filled in deep trench, forms lighttight metal layer, then by photoetching and
Etching removes the metal layer in zanjon groove bottom above photodiode, only retains zanjon groove sidewall and inter-level dielectric layer surface
Metal layer, formed surround entire metal interconnecting layer compound light-blocking structure, realize the complete shielding to incident ray, therefore
The signal of memory node not will receive the influence of incident ray, ensure that signal in the storage capacitance of global exposing pixels unit
Accuracy avoids the distortion of output signal.Also, it is different with the technique of routine large area covering tungsten, in the present invention
It is isolated between metal layer and underlying photoelectric diode area in deep trench using etching barrier layer, and metal layer is each
Only around a round figure is formed in the groove of pixel unit, global sections product is smaller, so that prevent metal contamination can
Energy.Meanwhile light transmission reinforcing material is filled in deep trench to increase the sensitivity of pixel unit, further improve image sensing
The performance of device.
Detailed description of the invention
Fig. 1 is a kind of structural schematic diagram of existing 5T overall situation exposing pixels unit.
Fig. 2 is a kind of domain knot of the global pixel cell structure of reduction parasitism photoresponse of a preferred embodiment of the present invention
Structure schematic diagram.
Fig. 3 is a kind of global pixel cell structure schematic diagram of reduction parasitism photoresponse of a preferred embodiment of the present invention.
Fig. 4-Figure 11 is a kind of global pixel cell structure of reduction parasitism photoresponse of a preferred embodiment of the present invention
The processing step schematic diagram of forming method.
Specific embodiment
With reference to the accompanying drawing, specific embodiments of the present invention will be described in further detail.
It should be noted that in following specific embodiments, when describing embodiments of the invention in detail, in order to clear
Ground indicates structure of the invention in order to illustrate, spy does not draw to the structure in attached drawing according to general proportion, and has carried out part
Amplification, deformation and simplified processing, therefore, should be avoided in this, as limitation of the invention to understand.
In specific embodiment of the invention below, Fig. 2-Fig. 3 is please referred to, Fig. 2 is a preferred embodiment of the present invention
A kind of domain structure schematic diagram for the global pixel cell structure reducing parasitic photoresponse, Fig. 3 is a preferred embodiment of the present invention
A kind of reduction parasitism photoresponse global pixel cell structure schematic diagram；Wherein, Fig. 3 shows side " A-B " of the domain along Fig. 2
To cross section structure figure.As shown in Fig. 2, the domain knot of the global pixel cell structure provided by the invention for reducing parasitic photoresponse
Structure, compared with conventional global pixel, in order to avoid the light leakage gap between original metal screen layer and contact hole is to global pixel
Memory node stores the influence (please referring to Fig. 1) of signal, top-level metallic interconnection layer 26 of the present invention in common metal interconnection layer
Inner circle area (i.e. photodiode upper area) is respectively arranged with insulating layer (etching barrier layer) 31 and a circle zanjon groove layer 32.
As shown in figure 3, the width of the top-level metallic interconnection layer 26 usually in pixel in metal interconnecting layer 21 is maximum, and deep trench 32 is necessary
21 certain distance of metal interconnecting layer is left, to avoid short circuit is formed between the metal in deep trench 32 and interconnection layer metal.Therefore,
It is mutual between deep trench 32, insulating layer 31 and metal interconnecting layer 21 to illustrate with the top-level metallic interconnection layer 26 in Fig. 3 in Fig. 2
Relationship.
As shown in figure 3, a kind of global pixel cell structure of reduction parasitism photoresponse of the invention, it may include be set to substrate
Photodiode 28 on 20, transfer tube 30, memory node 29, and the metal interconnecting layer 21 on substrate 20.Substrate 20
Semi-conductor silicon chip etc. can be used, and substrate 20 can be N-type or P-type silicon substrate.The invention is not limited thereto.
Interlayer dielectric layer 25 is covered on substrate 20；Metal interconnecting layer 21 is arranged in interlayer dielectric layer 25.Metal interconnection
Layer 21 can be multilayered structure (it includes the top-level metallic interconnection layer 26 positioned at top layer).Also, in metal interconnecting layer 21
In upper area between two photodiodes 28 of two pixel units that interconnection metal is located at arbitrary neighborhood, so as in light
The top of electric diode 28 forms optical channel.
Contact hole 27 can be used between memory node 29 and metal interconnecting layer 21 to be attached.
Deep trench 32 is additionally provided in the interlayer dielectric layer 25 of 28 top of photodiode；The bottom surface of deep trench 32 and photoelectricity two
The upper surface of pole pipe 28 is isolated.Specifically, one can be passed through between the bottom surface of deep trench 32 and the upper surface of photodiode 28
A insulating layer 31 is isolated.Also, the lateral dimension (area) for illustrating insulating layer 31 should be greater than or be equal to 32 bottom surface of deep trench
Lateral dimension (area), to realize being completely electrically isolated between deep trench 32 and photodiode 28.
Silicon nitride, silicon oxynitride or silicon carbide etc. can be used in insulating layer material.Also, insulating layer 31 can be one layer or more
Layer structure.
Deep trench 32 is located at the inner circle area (please referring to Fig. 2), i.e. of the top-level metallic interconnection layer 26 in metal interconnecting layer 21
In the interlayer dielectric layer 25 of 28 upper area of photodiode.It is set in deep trench 32 and on the upper surface of interlayer dielectric layer 25
There is a compound light-blocking structure 23 and 22；Compound light-blocking structure 23 and 22 is covered on the side wall of deep trench 32, and to deep trench
It extends over other than 32 on the upper surface of interlayer dielectric layer 25.
The upper of the lower end of the part 23 on 32 side wall of deep trench and insulating layer 31 is covered in compound light-blocking structure 23 and 22
Surface connects.In this way, compound light-blocking structure 23 and 22 just forms hatch frame in the upper and lower ends of deep trench 32, to reserve light
The space in channel.
The metals such as titanium, titanium nitride, tantalum nitride, tungsten, aluminium, copper, cobalt and nickel or metal can be used in compound light-blocking structure 23 and 22
One of compound-material or a variety of formation.I.e. compound light-blocking structure 23 and 22 uses lighttight metal-layer structure.
In this way, compound light-blocking structure 23 and 22 will just be disposed below the mutual of the metal interconnecting layer 21 in interlayer dielectric layer 25
Even metal completely obscured (encirclement) gets up, and is isolated with interconnection metal-insulator, to avoid the metal layer 23 in deep trench 32 and mutually
Even short circuit is formed between metal.
The compound light-blocking structure 23 and 22 that entire metal interconnecting layer 21 is surrounded by being formed, realizes to the complete of incident ray
Full-shield, therefore the signal of memory node 29 not will receive the influence of incident ray, avoid the distortion of output signal；Meanwhile
The global sections product of 32 inner metal layer 23 of deep trench is smaller, can utmostly avoid metal contamination, make cmos image sensor most
The image of high quality can be obtained eventually.
It can be filled out in the deep trench 32 being located within compound light-blocking structure 23 and 22 as a preferred embodiment
Filled with photic zone 24, to increase the sensitivity of pixel unit, the performance of imaging sensor can be further promoted.
Photic zone 24 can be used with high light transmittance can organic material or inorganic material fill and to be formed.
Above structure of the invention can be applied to the various global pixels for needing storage capacitance such as 4T, 5T, 6T, 8T and 12T
In structure, influence of the incident light to charge signal in memory node capacitor is avoided to realize.
Below by specific embodiment and attached drawing, to a kind of global pixel unit of reduction parasitism photoresponse of the invention
The forming method of structure is described in detail.
Fig. 4-Figure 11 is please referred to, Fig. 4-Figure 11 is a kind of overall situation of reduction parasitism photoresponse of a preferred embodiment of the present invention
The processing step schematic diagram of the forming method of pixel cell structure.A kind of global pixel list of reduction parasitism photoresponse of the invention
The forming method of meta structure can be used for making a kind of global pixel unit for reduction parasitism photoresponse that above-mentioned such as Fig. 3 is shown
Structure may particularly include following steps:
As shown in figure 4, providing a substrate 20, such as a N-type or P-type silicon substrate can be used.Firstly, can on substrate 20
Using conventional cmos image sensor process, the pixel units knots such as photodiode 28, transfer tube 30 and memory node 29 are formed
Structure.
Secondly as shown in figure 5, full sheet deposits etching barrier layer materials 31 ' on 20 surface of substrate.Etching barrier layer materials
31 ' can be used the dielectric material of the etching high selectivity ratio such as silicon nitride, silicon oxynitride and silicon carbide.
Again as shown in fig. 6, performing etching the lithography and etching on barrier layer.Only retain 28 top of photodiode after etching
Etching barrier layer materials 31 ' on position all remove the etching barrier layer materials 31 ' in other positions, form etching resistance
Barrier 31.Also, using the etching barrier layer of formation 31 as between subsequent deep trench 32 and photodiode 28 to be formed
Insulating layer 31.The lateral dimension (area) of etching barrier layer 31 should be greater than or equal to photodiode 28 lateral dimension (face
Product).
Then as shown in fig. 7, full sheet deposits interlayer dielectric layer material, example on 20 surface of substrate for being formed with above structure
Normal silica material such as can be used, form interlayer dielectric layer (rear track media layer) 25.And it is formed in interlayer dielectric layer 25
One to multiple layer metal interconnecting layer 21, such as the three-layer metal interconnection layer 21 of diagram, and formed and be used in interlayer dielectric layer 25
The contact hole 27 of metal interconnecting layer 21 and memory node 29 is connected, and metal interconnecting layer 21 is made to be only located at two pictures of arbitrary neighborhood
Upper area between the photodiode 28 of plain unit.The optical channel region of 28 top of photodiode is exactly metal interconnecting layer
The inner circle area of 21 top-level metallic interconnection layer 26.
Then as shown in figure 8, carrying out the lithography and etching of deep trench in interlayer dielectric layer 25.Make the depth to be formed when etching
Groove 32 is located in the interlayer dielectric layer 25 of 28 top of photodiode, and deep trench 32 is etched through interlayer dielectric layer 25, stops
On etching barrier layer 31.Wherein, it should ensure that the sectional dimension (area) for making deep trench 32 is less than or equal to lower section etch stopper
The lateral dimension (area) of layer 31.
Then as shown in figure 9, carrying out metal filling processes, metal or metal compound material are carried out in deep trench 32
23 ' deposit, i.e., the deposit of the compound material of light-blocking structure 23 and 22.
Metal or metal compound material conventional in CMOS technology can be used in the compound material of light-blocking structure 23 and 22
It is formed, including one of metal materials such as titanium, titanium nitride, tantalum nitride, tungsten, aluminium, copper, cobalt and nickel or several.Metal layer deposit
Overall thickness can be between 10 angstroms to 10000 angstroms.
Final metal or metallic compound 23 ' realize filling to the bottom surface (bottom) of deep trench 32 and side wall, while rear
Surface metal-layer 22 is formed above track media layer.
Then, as shown in Figure 10, lithography and etching is carried out to compound light-blocking structure material 23 ', i.e. progress photodiode
28 top metal layer etching, removal be located at 32 bottom surface of deep trench on metal layer material, retain 32 side wall of deep trench on and
Metal layer material on 25 upper surface of interlayer dielectric layer, to be formed by 25 surface of trenched side-wall metal layer 23 and interlayer dielectric layer
The compound light-blocking structure 23 and 22 that metal layer 22 forms.Compound light-blocking structure 23 and 22 is by the metal in lower section interlayer dielectric layer 25
Interconnection layer 21 is completely insulated to be covered up.
Finally, as shown in figure 11, the filling of light transmission layer material is carried out in deep trench 32, above photodiode 28
Photic zone 24 is formed in deep trench 32.That is a part of the composition of photic zone 24 optical channel.
The organic material or inorganic material that enhancing light transmission can be used form photic zone 24.
In conclusion the present invention, which passes through in interlayer dielectric layer square on the photodiode, forms deep trench, and in zanjon
The materials such as metal or metallic compound are filled in slot, form lighttight metal layer, then pass through lithography and etching for photoelectricity two
Metal layer above pole pipe in zanjon groove bottom removes, and only retains the metal layer of zanjon groove sidewall and inter-level dielectric layer surface, shape
At the compound light-blocking structure for surrounding entire metal interconnecting layer, the complete shielding to incident ray is realized, therefore memory node
Signal not will receive the influence of incident ray, ensure that the accuracy of signal in the storage capacitance of global exposing pixels unit, keeps away
The distortion of output signal is exempted from.Also, it is different with the technique of routine large area covering tungsten, in the present invention in deep trench
It is isolated between metal layer and underlying photoelectric diode area using etching barrier layer, and metal layer is in each pixel unit
Only around a round figure is formed in groove, global sections product is smaller, to prevent the possibility of metal contamination.Meanwhile
Light transmission reinforcing material is filled in deep trench to increase the sensitivity of pixel unit, further improves the performance of imaging sensor.
Above is merely a preferred embodiment of the present invention, the protection scope that embodiment is not intended to limit the invention, therefore
It is all to change with equivalent structure made by specification and accompanying drawing content of the invention, it similarly should be included in protection of the invention
In range.
Claims (10)
1. a kind of global pixel cell structure for reducing parasitic photoresponse, which is characterized in that including the photoelectricity two being set on substrate
Pole pipe, transfer tube, memory node, and the interlayer dielectric layer being covered on the substrate are equipped with gold in the interlayer dielectric layer
Belong to interconnection layer, and the metal interconnecting layer is located at the upper area between the photodiode of two pixel units of arbitrary neighborhood,
Deep trench, the bottom surface of the deep trench and the photoelectricity two are additionally provided in the interlayer dielectric layer above the photodiode
The upper surface of pole pipe is isolated, and a compound light-blocking structure is covered on the side wall of the deep trench, in the upper of the deep trench
Lower both ends form opening, and extend on the upper surface of the interlayer dielectric layer, will be below in the interlayer dielectric layer
The completely insulated masking of the metal interconnecting layer.
2. the global pixel cell structure according to claim 1 for reducing parasitic photoresponse, which is characterized in that the zanjon
It is isolated between the bottom surface of slot and the upper surface of the photodiode by an insulating layer.
3. the global pixel cell structure according to claim 2 for reducing parasitic photoresponse, which is characterized in that be covered in institute
The lower end for stating the compound light-blocking structure in zanjon groove sidewall connects with the upper surface of the insulating layer.
4. the global pixel cell structure according to claim 1 for reducing parasitic photoresponse, which is characterized in that described compound
Photic zone is filled in the deep trench within light-blocking structure.
5. the global pixel cell structure according to claim 4 for reducing parasitic photoresponse, which is characterized in that described compound
Light-blocking structure is used using one of titanium, titanium nitride, tantalum nitride, tungsten, aluminium, copper, cobalt and nickel or a variety of formation, the photic zone
Organic material or inorganic material are formed.
6. a kind of forming method for the global pixel cell structure for reducing parasitic photoresponse, which comprises the following steps:
One substrate is provided, over the substrate use conventional cmos image sensor process, formed photodiode, transfer tube and
Memory node；
Full sheet deposits etching barrier layer materials on the substrate surface；
The lithography and etching on barrier layer is performed etching, the etching barrier layer materials of photodiode top position are only retained, is formed
Etching barrier layer, and as insulating layer；
Full sheet deposits interlayer dielectric layer material on the substrate surface, forms interlayer dielectric layer；
Metal interconnecting layer is formed in the interlayer dielectric layer, and the metal interconnecting layer is made to be only located at two pixels of arbitrary neighborhood
Upper area between the photodiode of unit；
The lithography and etching for carrying out deep trench, makes the deep trench be located at the interlayer dielectric layer above the photodiode
In, and stop on the etching barrier layer；Wherein, the sectional dimension of the deep trench is less than or equal to the lower section etching resistance
The size of barrier；
The deposit that compound light-blocking structure material is carried out in the deep trench is covered in the compound light-blocking structure material described
On the bottom surface and side wall of deep trench, and extend on the upper surface of the interlayer dielectric layer；
Lithography and etching is carried out to the compound light-blocking structure material, removal is located at the compound gear in the zanjon groove bottom
Photo structure material retains the compound light-blocking structure material in the zanjon groove sidewall and on the interlayer dielectric layer upper surface
Material, forms compound light-blocking structure；Wherein, the compound light-blocking structure is mutual by the metal in the interlayer dielectric layer below
The even completely insulated masking of layer；
The filling of light transmission layer material is carried out in the deep trench, it is rectangular at photic zone on the photodiode.
7. the forming method of the global pixel cell structure according to claim 6 for reducing parasitic photoresponse, feature exist
In the etching barrier layer materials are silicon nitride, silicon oxynitride or silicon carbide.
8. the forming method of the global pixel cell structure according to claim 6 for reducing parasitic photoresponse, feature exist
In the compound light-blocking structure material is one of titanium, titanium nitride, tantalum nitride, tungsten, aluminium, copper, cobalt and nickel or a variety of.
9. the forming method of the global pixel cell structure of the parasitic photoresponse of the reduction according to claim 6 or 8, feature
It is, the deposition thickness of the compound light-blocking structure material is between 10 angstroms to 10000 angstroms.
10. the forming method of the global pixel cell structure according to claim 6 for reducing parasitic photoresponse, feature exist
In the light transmission layer material is organic material or inorganic material.
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| CN112768482A (en) * | 2021-01-20 | 2021-05-07 | 联合微电子中心有限责任公司 | Back-illuminated global shutter pixel structure and manufacturing method thereof |
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| US20070052053A1 (en) * | 2005-08-29 | 2007-03-08 | Chiu-Te Lee | Complementary metal oxide semiconductor image sensor and fabricating method thereof |
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| CN110429091A (en) * | 2019-07-29 | 2019-11-08 | 上海集成电路研发中心有限公司 | A kind of global pixel structure and forming method with light-blocking structure |
| CN110429091B (en) * | 2019-07-29 | 2023-03-03 | 上海集成电路研发中心有限公司 | Global pixel structure with light blocking structure and forming method |
| CN112768482A (en) * | 2021-01-20 | 2021-05-07 | 联合微电子中心有限责任公司 | Back-illuminated global shutter pixel structure and manufacturing method thereof |
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