CN110413033A - A kind of integrated circuit with Low-offset voltage based on bipolar process - Google Patents
A kind of integrated circuit with Low-offset voltage based on bipolar process Download PDFInfo
- Publication number
- CN110413033A CN110413033A CN201910663568.4A CN201910663568A CN110413033A CN 110413033 A CN110413033 A CN 110413033A CN 201910663568 A CN201910663568 A CN 201910663568A CN 110413033 A CN110413033 A CN 110413033A
- Authority
- CN
- China
- Prior art keywords
- pipe
- pnp pipe
- emitter
- collector
- pnp
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
Abstract
A kind of integrated circuit with Low-offset voltage based on bipolar process discloses the method that bipolar process dual input turns single output IC system imbalance that solves.This method reduces influence of the bipolar device base current to unbalance of system in conjunction with base current compensation technology and current loading compensation technique using double turns of single matching techniques.Double output ends for turning single match circuit are connected with base current compensation circuit；The base current compensation circuit is connected with double list match circuits that turn；The current loading compensation circuit is connected with double turns of single match circuits, base current compensation circuits.This circuit advantage: (1) influence that bipolar transistor base electric current lacks of proper care to circuit system is reduced, Circuit Matching precision is improved；(2) circuit gain is improved；(3) currents match is not influenced by High-current output.The present invention is widely used in precision operational-amplifier, low imbalance comparator, high-precision ad/da converter and other related fieldss based on bipolar process.
Description
Technical field
The present invention relates to semiconductor integrated circuit, more specifically, are related to bipolar semiconductor integrated circuit, specific next
It says, is related to ambipolar Low-offset voltage integrated circuit.
Background technique
For the integrated circuit of dual input list output, offset voltage is an important design parameter, is using bipolar work
It is double for the dual input list output of bipolar process as shown in Figure 1 to turn single unit circuit diagram when skill carries out IC design, at this
In circuit, setting bias voltage makes NPN pipe Q3 collector current I, while NPN pipe Q4 collector current is I, if PNP pipe Q1,
Q2 current amplification factor is β1, then PNP pipe Q2 collector current beProduce offset currentTherefore, by
There is certain intrinsic base current in bipolar device, the integrated circuit so as to cause dual input list output occurs inherently
Unbalance of system, error precision are greater than 10-5.The present invention is directed to reduce this unbalance of system, Low-offset voltage collection of the invention is realized
At circuit.
The patent for being related to offset voltage in Chinese patent database have " a kind of comparator imbalance voltage compensating circuit and
Compensation method " Patent No. CN103176497, a kind of " current detection circuit for eliminating offset voltage " Patent No.
CN106483366A, a kind of " circuit for eliminating operational amplifier offset voltage " Patent No. CN106656081A, a kind of " band mistake
Adjust the rail-to-rail reference of voltage tester and correction " Patent No. CN106788351A.However so far, it there is no using the present invention
The technical solution realizes the application part of Low-offset voltage.
Summary of the invention
Present invention seek to address that the unbalance of system problem of the dual input list output integrated circuit based on bipolar process, using double
Turn single matching technique, in conjunction with base current compensation technology and current loading compensation technique, to reduce bipolar device base current pair
The influence of unbalance of system, to achieve the purpose that solve the problems, such as.
Symbol description involved in all formula of the present invention:
Idc indicates DC current source, the serial number of digital representation DC current source thereafter.IQXXIndicate certain device port
Electric current, wherein I indicates current symbol, and Q indicates that bipolar transistor symbol, first X indicate device number in subscript QXX,
Number is 1,2,3 etc. Arabic numerals, and second X indicates the port of device, is C (collector), B (base stage) and E (hair respectively
Emitter-base bandgap grading).IRXThe electric current of certain resistance is flowed through in expression, and wherein I indicates current symbol, and R indicates resistor symbols, X announcer in subscript RX
Part number, number 1,2,3 etc. Arabic numerals.SQXIndicate certain device emitter area, wherein S indicates emitter area symbol
Number, Q indicates that bipolar transistor symbol, X indicate device number, number 1,2,3 etc. Arabic numerals in subscript QX.
Double turns of single matching technique schemes, base current compensation technical solution, current loading compensation technique schemes are described in detail
It is as follows:
1, double turns of single matching technique schemes
Double turns of single matching techniques are the technologies for instigating double rotary single circuit that unbalance of system is not present, and matching refers to that circuit is not present
Unbalance of system, the smaller Circuit Matching degree of unbalance of system is higher, and default is sufficiently small (in bipolar device electricity in unbalance of system in the present invention
When stream amplification factor is 100, error precision reaches) when can be considered matching.
The present invention uses double rotary single circuit, and dual signal input is converted to mono signal output.Circuit diagram such as Fig. 2 (band
The double of match circuit turn single unit circuit diagram), shown in Fig. 3 (with output-stage circuit double turn single match circuit figures), Q1, Q2, Q5,
Q6, Q7, Q8 are the PNP pipe of same type, and resistance R1, R2, R5 resistance value is R1=R2=2R5=R, and suitable bias voltage is arranged
Make NPN pipe Q3, Q4 collector current I1, the electric current of setting DC current source Idc1 is 4I1.If Q1, Q2, Q5, Q6, Q7, Q8 are put
Big multiple is β1.At this time
Then
Flow through the electric current I of resistance R5R5Are as follows:
Simultaneously
So current error IX1For
Error precision α1For
Work as β1When=100, α1=3.84e-8, therefore the unbalance of system ratio very little that the circuit generates, can be neglected, can
It is considered as matching.
To achieve the purpose that reduce offset voltage.
2, base current compensation technical solution
Base current compensation technical solution refers to using a kind of circuit, mends to unbalance of system caused by base current
It repays.
The technical solution must be implemented on the basis of double turns of single matching technique schemes, as Fig. 4 (mend by band base current
Repay the double of circuit and turn single match circuit figures), Fig. 5 (base current compensation circuit be further improved after double turn single match circuit figures)
It is shown.
Fig. 4 tentatively uses the circuit diagram of base current compensation on the basis of Fig. 3.
In conjunction with circuit theory as shown in Figure 4, to base current compensation technical solution, detailed description are as follows:
In order to eliminate influence of the Q9 base current to Circuit Matching, compensated using the method for base current compensation, such as
Shown in Fig. 4, on the basis of circuit shown in Fig. 3, increase the base current compensation circuit of Q10, Q11 composition, Q10 is as base stage electricity
Stream compensation transistor carries out base flow shunting to Q5 collector current, so that reduce Q9 base current matches shadow caused by Q2, Q6
It rings, Q9 pipe base current is compensated.
But Q9 and Q10 base current is not of uniform size at this time.If NPN pipe Q9, Q10, Q11 current amplification factor is β2If
Q9 emitter current is I2, NPN pipe Q9, Q10 bring current error is IX2:
Circuit generation system can be caused to lack of proper care.
Fig. 5 is the circuit diagram of the further improved base current compensation technology on Fig. 4 circuit base.
In conjunction with circuit theory as shown in Figure 5, to base current compensation technical solution, detailed description are as follows:
If NPN pipe Q9, Q10, Q11 current amplification factor is β2If Q9 emitter current is I2.Then
NPN pipe Q9, Q10 bring current error is IX2。
The mirror current source for increasing PNP pipe Q12 and PNP pipe Q14 composition, as base current Acquisition Circuit.PNP pipe Q12
Collector current is NPN pipe Q11 base current, and suitable PNP pipe Q12, Q14 area ratio, the collector of PNP pipe Q14 is arranged
Electric current can compensate NPN pipe Q9, Q10 bring current error.Increase PNP pipe Q15, PNP pipe Q15 emitter voltage can give PNP pipe
Q12 emitter, PNP pipe Q14 emitter, NPN pipe Q10 collector provide bias voltage.The emitter of PNP pipe Q12, Q14 is set
The size of area are as follows:
PNP pipe Q14 can compensate current error IX as base current compensation pipe, Q14 collector current2, Q14 collector electricity
The present Q7 pipe base stage of fluid are as follows:
Current error is IX after compensation3。
Error precision α2For
β at this time2When=100, α2=9.7e-7, circuit can be considered matching.
If Idc2 electric current is I3If PNP pipe Q15, Q7, Q8 current amplification factor is β1, then Q15 pipe base current causes Q7
Collector current variable quantity isCaused variable quantity is sufficiently small, can be neglected.
To achieve the purpose that reduce offset voltage.
3, current loading compensation technique scheme
Current loading compensation technique scheme refers to through the design to IC chip internal physical structure, negative in electric current
When setting out existing variation, influence the bias current of front stage circuits by current loading variation, to make unbalance of system not because of electricity
The variation of current load and change.
Circuit theory using current loading compensation technique scheme is as shown in Figure 6.
The size of the emitter area of PNP pipe Q12, Q13 is set are as follows:
SQi3=3SQi2
The current ratio that Q13 collector current flows into resistance R1, R2, R5 is 1:1:1.Q9, Q10 base are flowed into so can compensate
The electric current of pole, while being by the electric current that Q13 collector flows on resistance R5Cause to change in Q7 collector current
Amount isCaused variable quantity is sufficiently small, can be neglected.Q11 driving current is by DC current source simultaneously
Idc2 supply, will not influence DC current source Idc1.
To achieve the purpose that reduce offset voltage.
Design by adopting the above technical scheme it is double turn single IC, error precision is less than 10-6, greatly improve double turns of lists
Integrated circuit realizes the purpose of design of Low-offset voltage integrated circuit to the processing accuracy of signal.The technical solution can be extensive
Applied to precision operational-amplifier, low imbalance comparator, high-precision AD/DA and other related application fields.
Detailed description of the invention
Fig. 1, which is that the prior art is double, turns single unit circuit diagram.
Fig. 2 is that double with match circuit turn single unit circuit diagram.
Fig. 3 is double turns of single match circuit figures with output-stage circuit.
Fig. 4 is double turns of single match circuit figures with base current compensation circuit.
Fig. 5 is double turns of single match circuit figures after base current compensation circuit is further improved.
Fig. 6, which is that the base current compensation of belt current load compensation circuit is double, turns single match circuit figure.
In Fig. 1: Q3, Q4 are that the NPN of same type is managed, and Q1, Q2 are the PNP pipe of same type, and R1, R2, R3, R4 are identical
The resistance of type.
In Fig. 2: Q1, Q2, Q5, Q6, Q7, Q8 are the PNP pipe of same type, and Q3, Q4 are that the NPN of same type is managed, R1,
R2, R3, R4, R5 are the resistance of same type.
In Fig. 3: Q1, Q2, Q5, Q6, Q7, Q8 are the PNP pipe of same type, and Q3, Q4, Q9 are that the NPN of same type is managed,
R1, R2, R3, R4, R5, R6 are the resistance of same type.
In Fig. 4: Q1, Q2, Q5, Q6, Q7, Q8 are the PNP pipe of same type, and Q3, Q4, Q9, Q10, Q11 are same type
NPN pipe, R1, R2, R3, R4, R5, R6 are the resistance of same type.
In Fig. 5: Q1, Q2, Q5, Q6, Q7, Q8, Q12, Q14, Q15 are the PNP pipe of same type, Q3, Q4, Q9, Q10, Q11
It is managed for the NPN of same type, R1, R2, R3, R4, R5, R6 are the resistance of same type.
In Fig. 6: Q1, Q2, Q5, Q6, Q7, Q8, Q12, Q13, Q14, Q15 be same type PNP pipe, Q3, Q4, Q9,
Q10, Q11 are that the NPN of same type is managed, and R1, R2, R3, R4, R5, R6 are the resistance of same type.
Specific embodiment
The specific embodiment of the method for the present invention is as follows:
In order to eliminate the unbalance of system that existing double rotary single circuit generates, realizes that signal is double using double turns of single matching techniques and turn
It is single, such as attached drawing 3.Q1, Q2, Q5, Q6, Q7, Q8 are the PNP pipe of same type, and resistance R1, R2, R5 resistance value ratio is R1=R2=
2R5=R, suitable bias voltage, which is arranged, makes NPN pipe Q3, Q4 collector current I1, setting constant-current supply Idc1 electric current is 4I1。
If Q1, Q2, Q5, Q6, Q7, Q8 amplification factor are β1.Current error is IX at this time1:
In order to eliminate influence of the Q9 base current to Circuit Matching, therefore use circuit as shown in Figure 4 to Q9 pipe base current
It compensates.But Q9 and Q10 base current is not of uniform size at this time.If NPN pipe Q9, Q10, Q11 current amplification factor is β2If
Q9 emitter current is I2, NPN pipe Q9, Q10 bring current error is IX2:
Circuit generation system can be caused to lack of proper care.Therefore base current compensation is carried out using circuit shown in attached drawing 5, PNP is set
Pipe Q12, Q14 emitter area ratio is
The effect of Q14 is compensation current error IX2, current error is IX after compensation3:
If Idc2 electric current is I3If PNP pipe Q15, Q7, Q8 current amplification factor is β1, then Q15 pipe base current causes Q7
Collector current variable quantity isWhen load current changes so that Q9 emitter current is excessive, the base stage of Q9, Q10 pipe
Electric current can further influence double turns of single match circuit matching degrees, and matching degree is made to be lower.Therefore circuit shown in Fig. 6 is used to realize load electricity
Stream compensation.PNP pipe Q12, Q13 size is set are as follows:
SQi3=3SQi2
The current ratio that shown Q13 collector current flows into resistance R1, R2, R5 is 1:1:1.So can compensate flow into Q9,
The electric current of Q10 base stage.It is by the electric current that Q13 collector flows on resistance R5Cause to change in Q7 collector current
Amount isQ11 driving current is supplied by DC current source Idc2 simultaneously, will not influence DC current source Idc1.
Circuit overall error IX at this time4Are as follows:
Error precision α3For
If β1=100, β2=100, I2=10I1(large load current), I3=0.5I1, α3=3.32e-7.Therefore the circuit
It is considered as matching.
Realize the purpose of design of Low-offset voltage integrated circuit.
Claims (8)
1. a kind of integrated circuit with Low-offset voltage based on bipolar process, including double turn single unit circuit, feature
Be, further include it is double turn single match circuits, it is described it is double turn single match circuit include DC current source, mirror-image constant flow source circuit and
Match circuit, the DC current source are connected with the mirror-image constant flow source circuit, and the mirror-image constant flow source circuit turns only with double
The mirror-image constant flow source circuit of first circuit is connected, and the match circuit input terminal turns single unit circuit output end with pair and is connected.
2. a kind of integrated circuit with Low-offset voltage based on bipolar process according to claim 1, feature
Be, it is described it is double to turn single match circuit include same type PNP pipe Q1, Q2, Q5, Q6, Q7, Q8, same type NPN pipe Q3, Q4 is similar
Type resistance R1, R2, R3, R4, R5, DC current source Idc1；The DC current source Idc1 output end and resistance R1, R2, R5 are public
End is connected altogether, while the resistance R1 other end is connected with PNP pipe Q5 emitter, the resistance R2 other end is connected with PNP pipe Q6 emitter,
The resistance R5 other end is connected with PNP pipe Q8 emitter；The PNP pipe Q5 base stage and PNP pipe Q6 base stage, PNP pipe Q6 collector,
PNP pipe Q2 emitter is connected；The PNP pipe Q5 collector is connected with PNP pipe Q1 emitter；The PNP pipe Q1 base stage and PNP pipe
Q1 collector, PNP pipe Q2 base stage, NPN pipe Q3 collector are connected；Shown NPN pipe Q3 base stage is connected with NPN pipe Q4 base stage, is inclined
Set voltage end；The NPN pipe Q4 collector and PNP pipe Q2 collector, PNP pipe Q7 base stage are connected to signal output end；The NPN
Pipe Q3 emitter and the one end resistance R3 are connected to signal input part, and the NPN pipe Q4 emitter and the one end resistance R4 are connected to letter
Number input terminal；The common end described resistance R3, R4 and PNP pipe Q7 collector, PNP pipe Q8 collector are connected to negative supply；The PNP
Pipe Q8 base stage is connected with PNP pipe Q7 emitter.
3. a kind of integrated circuit with Low-offset voltage based on bipolar process according to claim 1, feature
It is, further includes base current compensation circuit, the base current compensation circuit is by base current compensation transistor and its load
Circuit composition, the base current compensation circuit are connected with double non-output ends for turning single match circuit.
4. a kind of integrated circuit with Low-offset voltage based on bipolar process according to claim 3, feature
It is, the base current compensation circuit includes same type PNP pipe Q1, Q2, Q5, Q6, Q7, Q8, same type NPN pipe Q3, Q4,
Q9, Q10, Q11, same type resistance R1, R2, R3, R4, R5, R6, DC current source Idc1；The DC current source Idc1 output
End be connected with the common end resistance R1, R2, R5 and NPN pipe Q11 base stage, while the resistance R1 other end be connected with PNP pipe Q5 emitter,
The resistance R2 other end is connected with PNP pipe Q6 emitter, the resistance R5 other end is connected with PNP pipe Q8 emitter；The PNP pipe Q5 base
Pole is connected with PNP pipe Q6 base stage, PNP pipe Q6 collector, PNP pipe Q2 emitter；The PNP pipe Q5 collector and PNP pipe Q1 are sent out
Emitter-base bandgap grading, NPN pipe Q10 base stage are connected；The PNP pipe Q1 base stage and PNP pipe Q1 collector, PNP pipe Q2 base stage, NPN pipe Q3 current collection
Extremely it is connected；Shown NPN pipe Q3 base stage is connected with NPN pipe Q4 base stage, is biased electrical pressure side；The NPN pipe Q4 collector and PNP pipe
Q2 collector, PNP pipe Q7 base stage, NPN pipe Q9 base stage are connected；The NPN pipe Q3 emitter and the one end resistance R3 are connected to signal
Input terminal, the NPN pipe Q4 emitter and the one end resistance R4 are connected to signal input part；The common end described resistance R3, R4, R6 with
PNP pipe Q7 collector, PNP pipe Q8 collector are connected to negative supply；The PNP pipe Q8 base stage is connected with PNP pipe Q7 emitter；Institute
NPN pipe Q11 collector is stated to be connected with positive supply；The NPN pipe Q11 emitter is connected with NPN pipe Q10 collector；The NPN pipe
Q10 emitter is connected with NPN pipe Q9 collector；The NPN pipe Q9 emitter and the one end resistance R6 are connected to signal output end.
5. a kind of integrated circuit with Low-offset voltage based on bipolar process according to claim 3, feature
It is, the base current compensation circuit also adds base current Acquisition Circuit, and the base current Acquisition Circuit is by mirror image
Current source circuit and bias voltage circuit composition, the base current Acquisition Circuit and double turns of single match circuits and base current are mended
Transistor circuit is repaid to be connected.
6. a kind of integrated circuit with Low-offset voltage based on bipolar process according to claim 5, feature
It is, the base current compensation circuit includes same type PNP pipe Q1, Q2, Q5, Q6, Q7, Q8, Q12, Q14, Q15, same type
NPN pipe Q3, Q4, Q9, Q10, Q11, same type resistance R1, R2, R3, R4, R5, R6, DC current source Idc1, Idc2；
The DC current source Idc1 output end is connected with the common end resistance R1, R2, R5；The DC current source Idc2 output end
It is connected with PNP pipe Q12 emitter, PNP pipe Q14 emitter, PNP pipe Q15 emitter；The resistance R1 other end and PNP pipe Q5
Emitter is connected, the resistance R2 other end is connected with PNP pipe Q6 emitter, the resistance R5 other end and PNP pipe Q8 emitter, PNP pipe
Q15 base stage is connected；The PNP pipe Q5 base stage is connected with PNP pipe Q6 base stage, PNP pipe Q6 collector, PNP pipe Q2 emitter；It is described
PNP pipe Q5 collector is connected with PNP pipe Q1 emitter, NPN pipe Q10 base stage；The PNP pipe Q1 base stage and PNP pipe Q1 collector,
PNP pipe Q2 base stage, NPN pipe Q3 collector are connected；Shown NPN pipe Q3 base stage is connected with NPN pipe Q4 base stage, is biased electrical pressure side；
The NPN pipe Q4 collector is connected with PNP pipe Q2 collector, PNP pipe Q7 base stage, NPN pipe Q9 base stage；The NPN pipe Q3 transmitting
Pole and the one end resistance R3 are connected to signal input part, and the NPN pipe Q4 emitter and the one end resistance R4 are connected to signal input part；
The common end described resistance R3, R4, R6 and PNP pipe Q7 collector, PNP pipe Q8 collector, PNP pipe Q15 collector are connected to negative electricity
Source；The PNP pipe Q8 base stage is connected with PNP pipe Q7 emitter, PNP pipe Q14 collector；The NPN pipe Q11 collector and positive electricity
Source is connected；The NPN pipe Q11 base stage is connected with PNP pipe Q12 collector, PNP pipe Q12 base stage, PNP pipe Q14 base stage；The NPN
Pipe Q11 emitter is connected with NPN pipe Q10 collector；The NPN pipe Q10 emitter is connected with NPN pipe Q9 collector；The NPN
Pipe Q9 emitter and the one end resistance R6 are connected to signal output end.
7. a kind of integrated circuit with Low-offset voltage based on bipolar process according to claim 6, feature
It is, further includes current loading compensation circuit, the current loading compensation circuit and double turns of single match circuits, base current compensation
Circuit is connected, and by the ratio of emitter area between design chips internal transistor, realizes the current loading compensation circuit
With the current ratio of the base current compensation circuit, lack of proper care to compensate double matchings for turning single match circuit systems.
8. a kind of integrated circuit with Low-offset voltage based on bipolar process according to claim 7, feature
It is, the current loading compensation circuit includes same type PNP pipe Q1, Q2, Q5, Q6, Q7, Q8, Q12, Q13, Q14, Q15, together
Type NPN pipe Q3, Q4, Q9, Q10, Q11, same type resistance R1, R2, R3, R4, R5, R6, DC current source Idc1, Idc2；Institute
DC current source Idc1 output end is stated to be connected with the common end resistance R1, R2, R5 and PNP pipe Q13 current collection grade；The DC current source
Idc2 output end is connected with PNP pipe Q12 emitter, PNP pipe Q13 emitter, PNP pipe Q14 emitter, PNP pipe Q15 emitter；
The resistance R1 other end is connected with PNP pipe Q5 emitter, the resistance R2 other end is connected with PNP pipe Q6 emitter, resistance R5 is another
One end is connected with PNP pipe Q8 emitter, PNP pipe Q15 collector；The PNP pipe Q5 base stage and PNP pipe Q6 base stage, PNP pipe Q6 collection
Electrode is connected；The PNP pipe Q5 collector is connected with PNP pipe Q1 emitter, NPN pipe Q10 base stage；The PNP pipe Q1 base stage with
PNP pipe Q1 collector, PNP pipe Q2 base stage, NPN pipe Q3 collector are connected；Shown NPN pipe Q3 base stage is connected with NPN pipe Q4 base stage,
For biased electrical pressure side；The NPN pipe Q4 collector is connected with PNP pipe Q2 collector, PNP pipe Q7 base stage, NPN pipe Q9 base stage；Institute
It states NPN pipe Q3 emitter and the one end resistance R3 is connected to signal input part, the NPN pipe Q4 emitter is connected with the one end resistance R4
For signal input part；The common end described resistance R3, R4, R6 and PNP pipe Q7 collector, PNP pipe Q8 collector, PNP pipe Q15 current collection
Pole is connected to negative supply；The PNP pipe Q8 base stage is connected with PNP pipe Q7 emitter, PNP pipe Q14 collector；The NPN pipe Q11
Collector is connected with positive supply；The NPN pipe Q11 base stage and PNP pipe collector, PNP pipe Q12 base stage, PNP pipe Q13 base stage,
PNP pipe Q14 base stage is connected；The NPN pipe Q11 emitter is connected with NPN pipe Q10 collector；The NPN pipe Q10 emitter with
NPN pipe Q9 collector is connected；The NPN pipe Q9 emitter and the one end resistance R6 are connected to signal output end.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910663568.4A CN110413033B (en) | 2019-07-22 | 2019-07-22 | Bipolar process-based integrated circuit with ultra-low offset voltage |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910663568.4A CN110413033B (en) | 2019-07-22 | 2019-07-22 | Bipolar process-based integrated circuit with ultra-low offset voltage |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110413033A true CN110413033A (en) | 2019-11-05 |
| CN110413033B CN110413033B (en) | 2021-09-21 |
Family
ID=68362424
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910663568.4A Active CN110413033B (en) | 2019-07-22 | 2019-07-22 | Bipolar process-based integrated circuit with ultra-low offset voltage |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110413033B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201639547U (en) * | 2010-01-28 | 2010-11-17 | 安石 | Single-OPAMP prime amplifier applying LF256H single operational amplifier |
| CN104362992A (en) * | 2014-10-16 | 2015-02-18 | 中国科学院上海技术物理研究所 | CMOS (Complementary Metal Oxide Semiconductor) low-temperature low-noise operational amplifier circuit |
| CN106656081A (en) * | 2016-12-20 | 2017-05-10 | 峰岹科技（深圳）有限公司 | Circuit for eliminating offset voltage of operational amplifier |
| EP3213685A1 (en) * | 2014-10-30 | 2017-09-06 | Korea Advanced Institute of Science and Technology | Optical spectroscopy system using pipeline-structured matched filter and dual-slope analog digital converter and method for controlling the optical spectroscopy system |
-
2019
- 2019-07-22 CN CN201910663568.4A patent/CN110413033B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201639547U (en) * | 2010-01-28 | 2010-11-17 | 安石 | Single-OPAMP prime amplifier applying LF256H single operational amplifier |
| CN104362992A (en) * | 2014-10-16 | 2015-02-18 | 中国科学院上海技术物理研究所 | CMOS (Complementary Metal Oxide Semiconductor) low-temperature low-noise operational amplifier circuit |
| EP3213685A1 (en) * | 2014-10-30 | 2017-09-06 | Korea Advanced Institute of Science and Technology | Optical spectroscopy system using pipeline-structured matched filter and dual-slope analog digital converter and method for controlling the optical spectroscopy system |
| CN106656081A (en) * | 2016-12-20 | 2017-05-10 | 峰岹科技（深圳）有限公司 | Circuit for eliminating offset voltage of operational amplifier |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110413033B (en) | 2021-09-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4612464A (en) | High speed buffer circuit particularly suited for use in sample and hold circuits | |
| US3497824A (en) | Differential amplifier | |
| CN108958345A (en) | differential reference voltage buffer | |
| CN103941792B (en) | Bandgap voltage reference circuit | |
| CN206671935U (en) | A kind of bipolar transistor amplifier with input current compensation circuit | |
| JPH0374529B2 (en) | ||
| CN114062765B (en) | Low-power-consumption high-precision voltage detection circuit | |
| CN110413033A (en) | A kind of integrated circuit with Low-offset voltage based on bipolar process | |
| KR20160071410A (en) | Method and apparatus for a floating current source | |
| US10141892B1 (en) | Bias circuit for supplying a bias current to a RF power amplifier | |
| CN112994623B (en) | Power detection circuit applied to power amplifier | |
| US6801090B1 (en) | High performance differential amplifier | |
| CN208063151U (en) | A kind of BUFFER common-mode voltages stabilizing circuit | |
| JPS61224712A (en) | Integrated amplification circuit | |
| CN113342117A (en) | Band-gap reference circuit for improving power supply rejection ratio by using feedback loop | |
| CN216904692U (en) | Zero drift-free active rectifier | |
| US7348910B2 (en) | Reference module apparatus and method therefor | |
| CN217037143U (en) | Open-loop high-gain precision current amplification circuit based on BCD (binary coded decimal) process | |
| CN110445482A (en) | A kind of comparator of the high Slew Rate of low-power consumption | |
| CN111293983A (en) | High-linearity active mixer with common-mode feedback | |
| CN112928998B (en) | Bipolar transistor amplifier | |
| JP2021061498A (en) | Linear amplifier | |
| CN114679040B (en) | Current-limiting protection circuit | |
| CN110597346A (en) | Low-temperature floating band gap reference voltage source circuit | |
| CN108390655A (en) | A kind of BUFFER common-mode voltages stabilizing circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information | ||
| CB02 | Change of applicant information |
Address after: No. 238, north section of Xintian Avenue, Guiyang, Guizhou 550000 Applicant after: Guizhou Zhenhua Fengguang Semiconductor Co.,Ltd. Address before: No. 238, north section of Xintian Avenue, Guiyang, Guizhou 550000 Applicant before: GUIZHOU ZHENHUA FENGGUANG SEMICONDUCTOR Co.,Ltd. |
|
| GR01 | Patent grant | ||
| GR01 | Patent grant |