CN110366084A - A kind of semiconductor devices and preparation method thereof and electronic device - Google Patents
A kind of semiconductor devices and preparation method thereof and electronic device Download PDFInfo
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- CN110366084A CN110366084A CN201910489891.4A CN201910489891A CN110366084A CN 110366084 A CN110366084 A CN 110366084A CN 201910489891 A CN201910489891 A CN 201910489891A CN 110366084 A CN110366084 A CN 110366084A
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- anchor point
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 32
- 238000002360 preparation method Methods 0.000 title claims abstract description 18
- 239000000758 substrate Substances 0.000 claims abstract description 60
- 239000000463 material Substances 0.000 claims description 25
- 125000004122 cyclic group Chemical group 0.000 claims 1
- 230000035945 sensitivity Effects 0.000 abstract description 3
- 238000005530 etching Methods 0.000 description 12
- 229920002120 photoresistant polymer Polymers 0.000 description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 8
- 230000015572 biosynthetic process Effects 0.000 description 6
- 238000002347 injection Methods 0.000 description 6
- 239000007924 injection Substances 0.000 description 6
- 229910052581 Si3N4 Inorganic materials 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- 229920005591 polysilicon Polymers 0.000 description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 229910052732 germanium Inorganic materials 0.000 description 4
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 4
- 239000007788 liquid Substances 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
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- 239000000203 mixture Substances 0.000 description 1
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- 238000012545 processing Methods 0.000 description 1
- 238000009827 uniform distribution Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R19/00—Electrostatic transducers
- H04R19/005—Electrostatic transducers using semiconductor materials
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R31/00—Apparatus or processes specially adapted for the manufacture of transducers or diaphragms therefor
- H04R31/003—Apparatus or processes specially adapted for the manufacture of transducers or diaphragms therefor for diaphragms or their outer suspension
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R2201/00—Details of transducers, loudspeakers or microphones covered by H04R1/00 but not provided for in any of its subgroups
- H04R2201/003—Mems transducers or their use
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R2231/00—Details of apparatus or processes specially adapted for the manufacture of transducers or diaphragms therefor covered by H04R31/00, not provided for in its subgroups
- H04R2231/001—Moulding aspects of diaphragm or surround
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Acoustics & Sound (AREA)
- Signal Processing (AREA)
- Manufacturing & Machinery (AREA)
- Micromachines (AREA)
Abstract
This application discloses a kind of semiconductor devices, and preparation is on substrate, comprising: vibrating diaphragm, back pole plate and back chamber, wherein vibrating diaphragm is equipped with sunk structure.By the way that sunk structure is arranged on vibrating diaphragm, the internal stress in this body structure of vibrating diaphragm can be discharged, so that vibrating diaphragm has higher mechanical sensitivity, to bring more preferably signal-to-noise ratio to device.A kind of preparation method of semiconductor devices, and the electronic device including semiconductor devices is also disclosed in the application.
Description
Technical field
The invention relates to the semiconductor devices and its preparation side of a kind of semiconductor devices more particularly to a kind of acoustics
Method.
Background technique
In semiconductor field, a kind of MEMS device is acoustic transducer, which can experience the vibration of air caused by sound
It is dynamic so that the movable electrode plate in acoustic transducer is forced to simple harmonic oscillation, cause the variation of analog signal, finally believe sound
Number it is converted into electric signal.Acoustic transducer mainly includes vibrating diaphragm, i.e. movable electrode plate；Back pole plate, i.e. fixed plate electrode；Carry on the back chamber knot
Structure, i.e. sound pressure signal enter channel.
Summary of the invention
The embodiment of the present application provides a kind of semiconductor devices, can provide a kind of better device of acoustical behavior.
The semiconductor devices of the embodiment of the present application, preparation is on substrate, comprising: vibrating diaphragm, back pole plate and back chamber, feature exist
In: the vibrating diaphragm is equipped with sunk structure.
Due to the semiconductor devices of the application, by the way that sunk structure is arranged on vibrating diaphragm, this body structure of vibrating diaphragm can be discharged
In internal stress so that vibrating diaphragm have higher mechanical sensitivity, to bring more preferably signal-to-noise ratio to device.
Optionally, the vibrating diaphragm is fixed over the substrate by vibrating diaphragm anchor point, and the vibrating diaphragm anchor point is continuous anchor
Point.The benefit designed in this way is all stress perfect uniform distribution in this structure when deformation occurs for vibrating diaphragm stress, no
Have any stress concentration point.
Optionally, the sunk structure includes several closed recessed grooves.
Optionally, the vibrating diaphragm is cylinder, and the recessed groove is cylindrical groove, and the vibrating diaphragm anchor point is continuous ring
Shape anchor point, and the recessed groove is located in the diaphragm area surrounded by the vibrating diaphragm anchor point.
Optionally, several recessed grooves are configured centered on the vibrating diaphragm center, and the recessed groove is located at described
Close to the region of the vibrating diaphragm anchor point on vibrating diaphragm.
Optionally, the recessed groove is cylinder, and the recessed groove is 5, the vibrating diaphragm thickness and the recessed groove
Depth ratio is less than 3.
The embodiment of the present application also provides a kind of preparation method of semiconductor devices, includes the following steps:
Prepare a substrate；
Anchor point is formed in substrate face and with the vibrating diaphragm of sunk structure；
The upper surface of vibrating diaphragm or below form back pole plate and acoustic aperture；
Gap is formed between back pole plate and vibrating diaphragm and forms back chamber far from the one side of back pole plate in vibrating diaphragm, prepared by device
At.
Optionally, in substrate face formation anchor point and with the vibrating diaphragm of sunk structure, concretely:
The first insulating layer is formed in the front of the substrate, is patterned that form one first recessed to first insulating layer
Slot, first groove expose the part substrate；
Then it is patterned to form several second grooves in the first insulating layer, the depth of second groove is less than institute
State the depth of the first insulating layer；
Diaphragm materials layer is formed on the first insulating layer, and the diaphragm materials layer fills first groove, and portion
Divide covering the second groove；
The diaphragm materials layer is patterned, the edge of first insulating layer is exposed, formed the anchor point with
Vibrating diaphragm with sunk structure.
Optionally, the anchor point is continuous anchor point.
The application another further aspect also provides a kind of electronic device comprising semiconductor devices above-mentioned.
Vibrating diaphragm itself can be discharged because being prepared for sunk structure on vibrating diaphragm by semiconductor devices prepared by this method
Internal stress in structure, so that vibrating diaphragm has higher mechanical sensitivity, to bring more preferably signal-to-noise ratio to device.
Other features and advantage will illustrate in the following description, also, partly become from specification
It obtains it is clear that being understood and implementing the application.The purpose of the application and other advantages can be by written explanations
Specifically noted structure is achieved and obtained in book, claims and attached drawing.
Detailed description of the invention
In order to more clearly explain the technical solutions in the embodiments of the present application, make required in being described below to embodiment
Attached drawing is briefly introduced, it should be apparent that, the drawings in the following description are only some examples of the present application, for this
For the those of ordinary skill in field, without any creative labor, it can also be obtained according to these attached drawings
His attached drawing.
Fig. 1 is semiconductor device structure schematic diagram provided by the embodiments of the present application；
Fig. 2 is the vibrating diaphragm layer of the embodiment of the present application and the cross-sectional structure schematic diagram of anchor point；
Fig. 3 is the schematic top plan view of the embodiment of the present application vibrating diaphragm；
Fig. 4 is the embodiment of the present application vibrating diaphragm into the cross-sectional structure partial enlarged view with anchor point；
Fig. 5 is the preparation flow figure of semiconductor devices provided by the embodiments of the present application；
Fig. 6 A to Fig. 6 D is the part preparation step schematic diagram of semiconductor devices provided by the embodiments of the present application；
Specific embodiment
In the following description, a large amount of concrete details are given more thoroughly to understand in order to provide to the application.So
And it is obvious to the skilled person that the application may not need one or more of these details and be able to
Implement.In other examples, in order to avoid obscuring with the application, for some technical characteristics well known in the art not into
Row description.
It should be understood that the application can be implemented in different forms, and should not be construed as being limited to propose here
Embodiment.On the contrary, provide these embodiments will make it is open thoroughly and completely, and scope of the present application is fully passed to
Those skilled in the art.In the accompanying drawings, for clarity, the size and relative size in the area Ceng He may be exaggerated.From beginning to end
Same reference numerals indicate identical element.
It should be understood that when element or layer be referred to " ... on ", " with ... it is adjacent ", " being connected to " or " being coupled to " it is other
When element or layer, can directly on other elements or layer, it is adjacent thereto, be connected or coupled to other elements or layer, or
There may be elements or layer between two parties by person.On the contrary, when element is referred to as " on directly existing ... ", " with ... direct neighbor ", " directly
It is connected to " or " being directly coupled to " other elements or when layer, then there is no elements or layer between two parties.It should be understood that although can make
Various component, assembly units, area, floor and/or part are described with term first, second, third, etc., these component, assembly units, area, floor and/
Or part should not be limited by these terms.These terms be used merely to distinguish a component, assembly unit, area, floor or part with it is another
One component, assembly unit, area, floor or part.Therefore, it is not departing under the application introduction, first element discussed below, portion
Part, area, floor or part are represented by second element, component, area, floor or part.
Spatial relation term for example " ... under ", " ... below ", " below ", " ... under ", " ... it
On ", " above " etc., herein can for convenience description and being used describe an elements or features shown in figure with
The relationship of other elements or features.It should be understood that spatial relation term intention further includes making other than orientation shown in figure
With the different orientation with the device in operation.For example, then, being described as " under other elements if the device in attached drawing is overturn
Face " or " under it " or " under it " elements or features will be oriented in other elements or features "upper".Therefore, exemplary art
Language " ... below " and " ... under " it may include upper and lower two orientations.Device can additionally be orientated (be rotated by 90 ° or its
It is orientated) and spatial description language as used herein correspondingly explained.
The purpose of term as used herein is only that description specific embodiment and the limitation not as the application.Make herein
Used time, " one " of singular, "one" and " described/should " be also intended to include plural form, unless the context clearly indicates separately
Outer mode.It is also to be understood that term " composition " and/or " comprising ", when being used in this specification, determines the feature, whole
The presence of number, step, operations, elements, and/or components, but be not excluded for one or more other features, integer, step, operation,
The presence or addition of component, assembly unit and/or group.Herein in use, term "and/or" include any of related listed item and
All combinations.
Shen is described herein with reference to the cross-sectional view of the schematic diagram of the desirable embodiment (and intermediate structure) as the application
Embodiment please.As a result, it is contemplated that from the variation of shown shape as caused by such as manufacturing technology and/or tolerance.Therefore,
Embodiments herein should not necessarily be limited to the specific shape in area shown here, but including due to for example manufacturing caused shape
Shape deviation.For example, being shown as the injection region of rectangle usually has round or bending features and/or implantation concentration ladder at its edge
Degree, rather than binary from injection region to non-injection regions changes.Equally, which can lead to by the disposal area that injection is formed
Some injections in area between the surface passed through when injection progress.Therefore, the area shown in figure is substantially schematic
, their shape is not intended the true form in the area of display device and is not intended to limit scope of the present application.
In order to thoroughly understand the application, detailed step and detailed structure will be proposed in following description, so as to
Illustrate the technical solution that the application proposes.The preferred embodiment of the application is described in detail as follows, however in addition to these detailed descriptions
Outside, the application can also have other embodiments.
Fig. 1 shows 100 structure of semiconductor devices of the application one embodiment, prepares on substrate 160, comprising:
Vibrating diaphragm 110, back pole plate (including electrode layer 130 and thereon insulating layer 140), back chamber 150 and acoustic aperture 120, vibrating diaphragm 110 pass through anchor point
112 are directly anchored on substrate 160.Here vibrating diaphragm is the movable electrode of device, and back pole plate is fixed electrode, and back chamber is sound
Pressure signal enters channel.The material of substrate 160 can be silicon substrate, be also possible on germanium, germanium silicon, gallium arsenide substrate or insulator
Silicon substrate.Those skilled in the art can according to need selection substrate, therefore the type of substrate should not limit the protection of the application
Range.The electrode layer 130 of back pole plate can be superimposed for polysilicon and silicon nitride, can also only use polysilicon.
In the present embodiment, vibrating diaphragm is directly anchored on substrate by continuous anchor point, and anchor point can be single circle,
It can be multiple circles.Referring to fig. 2 to Fig. 4, vibrating diaphragm is equipped with sunk structure.Sunk structure includes several 111 (difference of recessed grooves
For 1111-1115), the quantity of sunk structure can be single or multiple, can be continuously or discontinuously, recess is finally
Continuous circular, arc, rectangular or other shapes.When vibrating diaphragm is cylindrical, recessed groove is continuous cylindrical groove, can also be with
It is arc, rectangular or other shapes.Vibrating diaphragm leads to vibrating diaphragm anchor points support on substrate, and recessed groove, which is located at, to be surrounded by vibrating diaphragm anchor point
In diaphragm area.
There are following characteristics in sunk structure design, the ability and parameter vibrating diaphragm thickness of this structure release stress compare cup depth
H/t, number of depressions N, recess spacing d, recess width w, be recessed, specific value directly proportional away from the most marginal distance D1-D5 of vibrating diaphragm
It can be tested and be obtained by limited times.In a specific example, recessed groove is symmetrical arranged centered on vibrating diaphragm center, recess
Slot is located at the region on vibrating diaphragm close to vibrating diaphragm anchor point.Vibrating diaphragm be circle, recessed groove be cylinder, recessed groove be 5 (respectively
1111-1115), in order to make this sunk structure have the function that discharge vibrating diaphragm stress, the width of the recessed groove selected in this example
More than 1um, the depth ratio of vibrating diaphragm thickness and recessed groove is less than 3.
One embodiment of preparation method (referring to Fig. 5) of the semiconductor devices of the application, includes the following steps:
Step S501 prepares a substrate；
Anchor point and the vibrating diaphragm with sunk structure is formed on the substrate in step S502；
Step S503 forms back pole plate and acoustic aperture on vibrating diaphragm；
Step S504 forms gap between vibrating diaphragm and back pole plate, while forming back chamber in substrate back, prepared by device
At；
The semiconductor devices prepared by above-mentioned preparation process, wherein vibrating diaphragm is directly anchored on substrate by anchor point, is made
The vibrating diaphragm obtained in the structure can have preferable structure compliance.
It is carried out below with reference to preparation method of Fig. 6 A to 6D to a specific implementation of the semiconductor devices of the application detailed
Description, wherein Fig. 6 A to 6D shows the cross-sectional view of the structure of the formation of the part steps in preparation process.
In step S501, a substrate 601 is provided, substrate has front and the back side.The material of substrate 601 can serve as a contrast for silicon
Bottom is also possible to germanium, germanium silicon, gallium arsenide substrate or silicon-on-insulator substrate.Those skilled in the art can according to need selection
Substrate, therefore the type of substrate should not limit the protection scope of the application.Substrate 601 in the present embodiment is preferably silicon substrate.
Front and the back side of substrate are located at the opposite sides of substrate 601.
In step S502, vibrating diaphragm is formed in the front (can be any one side) of substrate 601 and with sunk structure
Anchor point forms structure as shown in the figure.
Firstly, the front in substrate 601 forms the first insulating layer 602, the first insulating layer 602 is patterned to form one
First groove, the first groove expose section substrate 601.
Specifically, depositing the first insulating layer 602 on the front of substrate 601, photoresist is formed on the first insulating layer 602
Layer (not shown), is exposed photoresist layer and develops, form the photoresist layer of image conversion, expose the first insulating layer 602
The upper predetermined position for forming the first groove, performs etching the first insulating layer 602 using patterned photoresist layer as exposure mask, until sudden and violent
Expose substrate 601, form the first groove in the first insulating layer 602, removes patterned photoresist finally by cineration technics
Layer.Optionally, the material of the first insulating layer 602 is the lamination or this field skill of silica, silicon nitride or silica and silicon nitride
Other materials known to art personnel.
Then second of graphical, several second groove of formation, the depth of the second groove are carried out in the first insulating layer 602
Less than the depth of the first insulating layer；
And then, diaphragm materials layer is formed on the first insulating layer 602, diaphragm materials layer fills the first groove and covers the
One insulating layer 602, is partially filled with the second groove, forms sunk structure to be formed in anchor point and the second groove in the first groove；
Then, diaphragm materials layer is patterned, exposes the edge of the first insulating layer 602, form anchor point and have sunk structure
Vibrating diaphragm 603.The material of diaphragm materials layer is polysilicon or other materials well known by persons skilled in the art.
The subsequent vibrating diaphragm as MEMS device of vibrating diaphragm 603, the material of vibrating diaphragm 603 can choose polysilicon, germanium silicon, germanium or its
His flexible metal or semiconductor material, it is ensured that vibrating diaphragm by sound or inertia force etc. active force and after vibration deformation also
It can restore, and ensure that vibrating diaphragm has good electric conductivity.
In the present embodiment, it is preferred that anchor point is continuous anchor point, and anchor point can be single circle, be also possible to multiple circles
Shape or other structures well known by persons skilled in the art.The application is to the structure and quantity of anchor point and without limitation.
In step S503, back pole plate and acoustic aperture are formed on vibrating diaphragm 603.Back pole plate and vibrating diaphragm 603 are dielectrically separated from gap,
Multiple through-holes of communication gap are formed in back pole plate.Back pole plate can be located at vibrating diaphragm either above or below
In step S504, back chamber is formed at the back side of substrate 601, back chamber exposes vibrating diaphragm and backwards to gap 760.
It describes in detail below to step S503 and step S504:
Electrode layer is formed on vibrating diaphragm.
Specifically, firstly, forming second insulating layer on vibrating diaphragm.It should be noted that second insulating layer and the first insulation
The material of layer can be identical；Certainly, second insulating layer can also use the material different from the first insulating layer, the application couple
This and without limitation.
Second insulating layer covers vibrating diaphragm and the first insulating layer.Then, figure is carried out to second insulating layer and the first insulating layer
Shape, specifically, patterned photoresist layer is formed over the second dielectric, using patterned photoresist layer as exposure mask, to
Two insulating layers are performed etching with the first insulating layer, expose the edge of substrate, and multiple thirds are formed in second insulating layer
Groove.The depth of third groove is less than the thickness of second insulating layer, i.e. third groove does not expose vibrating diaphragm.Optionally, third
Groove is uniformly distributed in second insulating layer, and third groove is corresponding with vibrating diaphragm.Then the first insulating layer and are etched again
Two insulating layers are to substrate.
Then, an electrode layer is formed, electrode layer fills up third groove and covers second insulating layer and substrate 601.Finally,
Electrode layer is patterned, i.e., forms patterned photoresist layer on electrode layer, using patterned photoresist layer as exposure mask,
Electrode layer is performed etching, the edge of substrate 601 and the edge of second insulating layer are exposed, forms electrode layer.Electrode layer
Polysilicon, germanium silicon or germanium may be selected in material, can also be other metals such as aluminium or other materials well known by persons skilled in the art
Material.
First through hole is formed on back pole plate.
Specifically, third insulating layer covers electrode layer, second insulating layer and substrate firstly, forming a third insulating layer
601；Then, image conversion is carried out to third insulating layer and electrode layer, forms the multiple first through hole for exposing second insulating layer,
Middle electrode layer and third insulating layer constitute the back pole plate of device together.Such as it can be graphical by being formed on third insulating layer
Photoresist layer, expose position of the through-hole of predetermined formation on third insulating layer, be then with patterned photoresist layer
Exposure mask performs etching third insulating layer and electrode layer, until second insulating layer is exposed, in third insulating layer and electrode
Multiple first through hole are formed in layer.Acoustic aperture of the first through hole mainly as MEMS device.
Then, optionally, the 4th insulating layer is formed on the front of substrate 601, the 4th insulating layer fills first through hole, and
Cover third insulating layer and substrate, that is, the front of the 4th insulating layer covering substrate 601.Avoid the subsequent back to substrate 601
The positive structure of substrate 601 is impacted when face is operated.The material of 4th insulating layer is preferably silica, silicon nitride
Or silica/silicon nitride laminated construction or other materials well known by persons skilled in the art.
Then, the 4th groove is formed on the back side of substrate 601.Specifically, the back side of substrate 601 is patterned,
The 4th groove of the first insulating layer of exposure is formed, and retains the substrate in the 4th groove with anchor point with positive area.
Gap is formed between back pole plate and vibrating diaphragm, and back chamber is formed between vibrating diaphragm and substrate.
Specifically, will be formed in previous step using BOE (Buffered Oxide Etch, buffered oxide etch) method
Structure be placed in oxide etching liquid, etching liquid performs etching to exposing first insulating layer by the 4th groove
The vibrating diaphragm forms back chamber at the back side of the substrate 601.In the process that etching liquid performs etching first insulating layer
In, the etching liquid simultaneously performs etching the 4th insulating layer, after removing the 4th insulating layer, passes through the through-hole
The second insulating layer is performed etching, the part second insulating layer is removed, is formed between the vibrating diaphragm and back pole plate
Gap.That is, the formation of the removal of the 4th insulating layer, the formation in the gap and the back chamber, is same
It is carried out in processing step (i.e. BOE).
The application is illustrated through the foregoing embodiment, but it is to be understood that, above-described embodiment is only intended to
The purpose of citing and explanation, and be not intended to for the application being limited within the scope of described embodiment.Furthermore those skilled in the art
Member can also be made more kinds of according to teachings of the present application it is understood that the application is not limited to above-described embodiment
Variants and modifications, these variants and modifications are all fallen within the application range claimed.The protection scope of the application by
The appended claims and its equivalent scope are defined.
Claims (10)
1. a kind of semiconductor devices, preparation is on substrate, comprising: vibrating diaphragm, back pole plate and back chamber, it is characterised in that: the vibrating diaphragm
It is equipped with sunk structure.
2. semiconductor devices as described in claim 1, it is characterised in that: the vibrating diaphragm is fixed on the lining by vibrating diaphragm anchor point
On bottom, and the vibrating diaphragm anchor point is continuous anchor point.
3. semiconductor devices as claimed in claim 1 or 2, it is characterised in that: the sunk structure includes several closed recessed
Fall into slot.
4. semiconductor devices as claimed in claim 3, it is characterised in that: the vibrating diaphragm is cylinder, and the recessed groove is circle
Cylindrical groove, and the vibrating diaphragm anchor point is continuous cyclic annular anchor point, and the recessed groove is located at the vibration surrounded by the vibrating diaphragm anchor point
In diaphragm area.
5. semiconductor devices as claimed in claim 4, it is characterised in that: during several recessed grooves with the vibrating diaphragm center are
The heart is configured, and the recessed groove is located at the region on the vibrating diaphragm close to the vibrating diaphragm anchor point.
6. semiconductor devices as claimed in claim 4, it is characterised in that: the recessed groove is cylinder, and the recessed groove is 5
A, the depth ratio of the vibrating diaphragm thickness and the recessed groove is less than 3.
7. a kind of electronic device, including such as semiconductor devices as claimed in any one of claims 1 to 6.
8. a kind of preparation method of semiconductor devices, which comprises the steps of:
Prepare a substrate；
Anchor point is formed in the substrate face and with the vibrating diaphragm of sunk structure；
The upper surface of vibrating diaphragm or below form back pole plate and acoustic aperture；
Gap is formed between the back pole plate and the vibrating diaphragm and forms back chamber, device far from the one side of the back pole plate in vibrating diaphragm
Part preparation is completed.
9. the preparation method of semiconductor devices as claimed in claim 8, which is characterized in that described to form anchor point in substrate face
Vibrating diaphragm with sunk structure is had, specifically includes:
The first insulating layer is formed in the front of the substrate, first insulating layer is patterned to form one first groove,
First groove exposes the part substrate；
Then it is patterned to form several second grooves in the first insulating layer, the depth of second groove is less than described the
The depth of one insulating layer；
Diaphragm materials layer is formed on the first insulating layer, and the diaphragm materials layer fills first groove, and part is covered
The second groove of lid；
The diaphragm materials layer is patterned, the edge of first insulating layer is exposed, forms the anchor point and have
The vibrating diaphragm of sunk structure.
10. the preparation method of semiconductor devices as claimed in claim 9, which is characterized in that the anchor point is continuous anchor point.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910489891.4A CN110366084A (en) | 2019-06-06 | 2019-06-06 | A kind of semiconductor devices and preparation method thereof and electronic device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910489891.4A CN110366084A (en) | 2019-06-06 | 2019-06-06 | A kind of semiconductor devices and preparation method thereof and electronic device |
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| CN110366084A true CN110366084A (en) | 2019-10-22 |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
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