CN110364601A - A kind of vertical LED chip epitaxial structure and preparation method thereof and vertical LED chip - Google Patents
A kind of vertical LED chip epitaxial structure and preparation method thereof and vertical LED chip Download PDFInfo
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0093—Wafer bonding; Removal of the growth substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
- H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
Abstract
The invention discloses a kind of vertical LED chip epitaxial structures comprising: the first substrate；Removing buffer layer on first substrate；Contact diffusion layer on the removing buffer layer；U-GaN layers of high temperature on the contact diffusion layer；With the epitaxial layer being set on the high temperature U-GaN layer；The epitaxial layer successively includes the first semiconductor layer, active layer and the second semiconductor layer；Wherein, the removing buffer layer is by InN or InxGa1‑xN is made, and the contact diffusion layer is made of N-GaN；High temperature U-GaN layers of the resistivity is 10‑2~10‑3Ω·cm2, N-GaN layers of the resistivity is 10‑5~10‑8Ω·cm2.The present invention improves rippability by novel removing buffer layer；Make current distribution more uniform by contact diffusion layer simultaneously, improves brightness, reduce voltage.
Description
Technical field
The present invention relates to LED technology field more particularly to a kind of vertical LED chip epitaxial structure and its preparations
Method and vertical LED chip
Background technique
Respectively in the two sides of luminescent layer, electric current longitudinally transmits, improves well the front electrode and bottom-side electrodes of vertical LED
The problem of current crowding；The substrate that vertical LED can be high using thermal conductivity simultaneously, such as silicon substrate, realize large area heat dissipation,
To which powerful heat dissipation problem can also be readily solved, it can reach the dual purpose of improved efficiency and cost decline, have higher
Cost performance.Therefore in LED, shared share is more important in the market in recent years for vertical LED chip, becomes research hotspot.
The preparation process of existing vertical LED is general are as follows: (1) deposit epitaxial layers on the first substrate；(2) wafer bonding
To new substrate；(3) the first substrate of laser lift-off；(4) N electrode is made.Wherein, bonding technology and laser lift-off process vertical LED
Maximum technological difficulties in preparation process.
The principal element for influencing laser lift-off process has: the structure of laser nature and epitaxial wafer.From epitaxial wafer
From the point of view of angle, the stress distribution improved between sapphire crystal and epitaxial layer is key point；Existing technology is usually used
The AlN buffer layer of one layer of improvement stress distribution is deposited, in sapphire substrates to promote rippability；But this AlN buffering
The peeling effect of layer is still undesirable.A kind of improved method is that U-GaN layers of one layer of low temperature is first deposited in sapphire substrates is (heavy
800 DEG C of accumulated temperature degree <, thickness are used as buffer layer less than 50nm), then U-GaN layers of (depositing temperature > 1000 of redeposited high temperature
DEG C), epitaxial layer etc.；Although this low temperature U-GaN layers are relatively easy to remove；But U-GaN layers of high temperature exposed after its removing
Resistivity is higher, and directly production electrode is often difficult to form better Ohmic contact on high temperature U-GaN layer, therefore usually
It needs using high temperature U-GaN layers of grinding or etching removal, so that complex technical process, at high cost.
On the other hand, since existing bonding technology maturity is low, bonding Ohmic contact is poor, to affect vertical
The global voltage of LED chip reduces the light efficiency of chip.
Summary of the invention
Technical problem to be solved by the present invention lies in, a kind of vertical LED chip epitaxial structure is provided, is easily peeled off,
And homogeneous current distribution.
The present invention also technical problems to be solved are, provide a kind of preparation side of above-mentioned vertical LED chip epitaxial structure
Method.
The present invention also technical problems to be solved are, provide a kind of preparation method of vertical LED chip, process flow
Simply, at low cost.
The present invention also technical problems to be solved are, provide a kind of vertical LED chip, and brightness is high, and voltage is small, whole
Light efficiency is high.
In order to solve the above-mentioned technical problems, the present invention provides a kind of vertical LED chip epitaxial structures comprising:
First substrate；
Removing buffer layer on first substrate；
Contact diffusion layer on the removing buffer layer；
U-GaN layers of high temperature on the contact diffusion layer；
With the epitaxial layer being set on the high temperature U-GaN layer；The epitaxial layer successively includes the first semiconductor layer, active layer
With the second semiconductor layer；
Wherein, the removing buffer layer is by InN or InxGa1-xN is made, and the contact diffusion layer is made of N-GaN；
High temperature U-GaN layers of the resistivity is 10-2~10-3Ω·cm2, N-GaN layers of the resistivity is 10-5~
10-8Ω·cm2。
As an improvement of the above technical solution, the removing buffer layer is by InxGa1-xN is made, wherein x >=0.2.
As an improvement of the above technical solution, the contact diffusion layer is made of the N-GaN that Si is adulterated, wherein Si's mixes
Miscellaneous concentration is 1018~1020cm-3；
High temperature U-GaN layers of the electron concentration is 5 × 1015~8 × 1016cm-3。
As an improvement of the above technical solution, it is described removing buffer layer with a thickness of 20~50nm.
As an improvement of the above technical solution, the contact diffusion layer with a thickness of 0.2~2 μm, described high temperature U-GaN layers
With a thickness of 3.5~6 μm.
Correspondingly, the invention also discloses a kind of preparation methods of above-mentioned vertical LED chip epitaxial structure comprising:
(1) the first substrate is provided；
(2) removing buffer layer is formed on first substrate；
(3) contact diffusion layer is formed on the removing buffer layer；
(4) high temperature U-GaN layers is formed on the contact diffusion layer；
(5) epitaxial layer is formed on described high temperature U-GaN layers to get the vertical LED chip epitaxial structure finished product is arrived.
As an improvement of the above technical solution, in step (2), the formation temperature of the removing buffer layer is 450~600
℃；
In step (3), the formation temperature of the contact diffusion layer is 1000~1300 DEG C；
In step (4), high temperature U-GaN layers of the formation temperature is 1000~1200 DEG C.
As an improvement of the above technical solution, the removing buffer layer, contact diffusion layer, U-GaN layers of high temperature be all made of
Mocvd method is formed.
Correspondingly, the invention also discloses a kind of preparation methods of vertical LED chip comprising:
(1) vertical LED chip epitaxial structure is prepared；
(2) current-diffusion layer and complex reflex layer are formed on the epitaxial structure；
(3) the first bonded layer is formed on the complex reflex layer；
(4) one second substrate is provided, forms the second bonded layer over the substrate；
(5) the first bonded layer and the second bonded layer are bonded, form bonded layer；
(6) the first substrate of laser lift-off and removing buffer layer；
(7) first electrode is formed on exposed contact diffusion layer；
(8) metal layer on back is formed in second substrate back.
Correspondingly, being prepared the invention also discloses a kind of vertical LED chip by such as above-mentioned preparation method.
The invention has the following beneficial effects:
1. the present invention is prepared for novel removing buffer layer on substrate, InN or In is usedxGa1-xN is made, and the removing is slow
It is bigger to rush the more common AlN of lattice mismatch between layer and sapphire, and make it be more easier to absorb laser containing In, thus greatly
Width improves the rippability of the first substrate in the present invention.
2. the present invention is prepared for contact diffusion layer on removing buffer layer, resistivity is 10-5~10-8Ω·cm2, effectively
Promotion electrode and epitaxial layer Ohmic contact, promote current spread, improve the brightness of LED chip to reduce, reduce
Voltage.Meanwhile this contact diffusion layer to have significantly simplified production without removing U-GaN layers in chip fabrication process
Technique.
Detailed description of the invention
Fig. 1 is a kind of structural schematic diagram of vertical LED chip epitaxial structure in the present invention；
Fig. 2 is a kind of preparation method flow chart of vertical LED chip epitaxial structure of the present invention；
Fig. 3 is a kind of preparation method flow chart of vertical LED chip of the present invention；
Fig. 4 is a kind of structural schematic diagram of vertical LED chip of the present invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, the present invention is made into one below in conjunction with attached drawing
Step ground detailed description.Only this is stated, the present invention occurs in the text or will occur up, down, left, right, before and after, it is inside and outside etc. just
Position word is not to specific restriction of the invention only on the basis of attached drawing of the invention.
Referring to Fig. 1, the invention discloses a kind of vertical LED chip epitaxial structures comprising: the first substrate 11 is successively set
In removing buffer layer 12, contact diffusion layer 13, high temperature U-GaN layer 14 and epitaxial layer 15 on the first substrate 11；Wherein, epitaxial layer
15 include the first semiconductor layer 151, active layer 152 and the second semiconductor layer 153.
Wherein, removing buffer layer 12 is by InN or InxGa1-xN is made.Traditional AlN buffer layer is compared, due to the molecule of In
Amount is bigger, therefore InN or InxGa1-xDislocation between N and the first substrate 1 is more serious, while above two material is also easier to inhale
Receive laser；The two is comprehensive so that the more traditional AlN buffer layer of removing buffer layer 12 in the present invention is more easier from the first substrate 1
Removing.
Further, removing buffer layer 12 is by InxGa1-xN is made, InxGa1-xThe crystal match of N and GaN base epitaxial layer 15
Property is higher, is more easier to form stable epitaxial layer.As selection InxGa1-xWhen N, x >=0.2；X value is bigger, then removes buffering
The color of layer is deeper, easier absorption laser, that is, laser lift-off more easy to accomplish；Further, 0.2≤x≤0.6；Work as x
When >=0.6, the crystal match removed between buffer layer 12 and epitaxial layer 15 is excessively poor, influences epitaxial layer lattice quality, Jin Erying
Ring the light efficiency of LED chip.
Remove buffer layer 12 with a thickness of 20~50nm；As its thickness G T.GT.GT 50nm, absorbs amount of laser light and rise, remove difficulty
It is promoted；Meanwhile blocked up removing buffer layer 12 can also generate internal stress, influence the growth of 15 crystal of later period epitaxial layer.When its thickness
When spending < 20nm, the lattice mismatch between substrate 1 and epitaxial layer 15 can not be effectively buffered.Preferably, the thickness of buffer layer 12 is removed
Degree is 25~40nm.
Wherein, contact diffusion layer 13 is made of N-GaN, resistivity 10-5~10-8Ω·cm2；U-GaN layers of high temperature
Resistivity is 10-2~10-3Ω·cm2.13 resistivity of contact diffusion layer in the present invention is low, can effectively promote N electrode and outer
Prolong the Ohmic contact of layer 15, promote current spread, to promote the brightness of LED chip, reduces voltage.Meanwhile this contact is expanded
Layer 13 is dissipated to have significantly simplified production technology without removing U-GaN layers of high temperature in chip fabrication process.In addition, retaining high
After warm U-GaN layer 14, the thickness of whole GaN layer (U-GaN layers of 14+GaN base epitaxial layer 15 of high temperature) is higher, so that flow vertically through
Current spread is more uniform, promotes the light efficiency of LED chip.
Wherein, contact diffusion layer 13 is made of the N-GaN that Si is adulterated, and the doping concentration of Si is 1018~1020cm-3；This is mixed
The contact diffusion layer 13 of miscellaneous concentration has very high electron concentration, can reach 1018cm-3More than, it can substantially enhance N electrode and outer
Prolong the Ohmic contact of layer 15, promotes current spread.Wherein, the electron concentration of high temperature U-GaN layer 14 is 5 × 1015~8 × 1016cm-3。
Current-diffusion layer 3 with a thickness of 0.2~2 μm；When 0.2 μm of its thickness <, can not effectively scattered current effect.
When 2 μm of its thickness G T.GT.GT, higher cost.Preferably, current-diffusion layer 3 with a thickness of 1~1.5 μm.
It should be noted that the dislocation with the first substrate 1 is imitated since present invention employs novel removing buffer layers 12
U-GaN layers of low temperature that should be more traditional, AlN layers it is more serious；Therefore it can not effectively buffer between the first substrate 1 and epitaxial layer 15
Lattice mismatch.For this purpose, the present invention changes the structure of contact diffusion layer 13 and high temperature U-GaN layer 14, to eliminate such crystalline substance
Lattice mismatch.
Specifically, the present invention is added to contact diffusion layer 13 on removing buffer layer 12, partition extension lattice can be played
The effect of defect can effectively cooperate with removing buffer layer 12, the lattice mismatch of epitaxial layer 15 and the first substrate 1 is effectively reduced.Together
When, control contact diffusion layer 13 with a thickness of 1~2 μm, can also further function as eliminate lattice mismatch effect.
Further, the present invention is prepared for high temperature U-GaN layer 14 on contact diffusion layer 13；High temperature U-GaN layer 14 and outer
The lattice constant prolonged between layer 15 is more nearly, and lattice mismatch is smaller；It can effectively eliminate between the first substrate 1 and epitaxial layer 15
Lattice mismatch.Meanwhile the present invention control high temperature U-GaN layers with a thickness of 3.5~6 μm, U-GaN layers of high temperature of this range can have
Effect eliminates lattice mismatch.Preferably, high temperature U-GaN layers with a thickness of 4~6 μm.
It should be noted that traditional U-GaN layer, is generally divided into U-GaN layers and high temperature U-GaN layers of low temperature；Wherein low temperature
U-GaN layers of crystallization degree is lower, and buffer function is stronger；But its laser glass is weaker；Therefore the present invention does not use low temperature U-
GaN layer, only with U-GaN layers of high temperature.In addition, in traditional vertical chip structure, U-GaN layers of (low temperature U-GaN+ high temperature U-
GaN 3 μm of the general < of overall thickness)；Because U-GaN layers of resistivity is higher, current spread will affect, and the present invention passes through contact
Diffusion layer 13 effectively eliminates this defect, so that U-GaN layers of high temperature of thickness is larger, and then plays the work of buffer lattice mismatch
With.
Specifically, the first semiconductor layer 151 is N-GaN layers in the present invention, the second semiconductor layer is P-GaN layers.
Referring to fig. 2, the invention also discloses a kind of preparation methods of above-mentioned epitaxial structure comprising following steps:
S100: the first substrate is provided；
Wherein, the first substrate 1 selects sapphire or silicon carbide, but not limited to this.Preferably, silicon carbide is selected.
S200: removing buffer layer is formed on the first substrate；
Wherein, removing buffer layer is formed using MOCVD, PECVD or MBE method；Preferably, it is formed and is removed using mocvd method
Buffer layer；Its formation temperature is 450~600 DEG C；The removing buffer layer that this temperature range is formed can preferably be attached to blue treasured
On stone lining bottom.
S300: contact diffusion layer is formed on removing buffer layer；
Wherein, contact diffusion layer is formed using MOCVD, PECVD or MBE method；Preferably, it is formed and is contacted using mocvd method
Diffusion layer；Its formation temperature is 1000~1300 DEG C；The crystal quality for the N-GaN layer that this temperature range is formed is preferable, resistivity
It is low, conducive to the abundant diffusion of electric current.
S400: high temperature U-GaN layers is formed on contact diffusion layer；
Wherein, high temperature U-GaN layers is formed using MOCVD, PECVD or MBE method；Preferably, high temperature is formed using mocvd method
U-GaN layers；Its formation temperature is 1000~1200 DEG C.The high temperature U-GaN layer crystal weight of this temperature growth is good, with epitaxial layer it
Between lattice dislocation it is small.
S500: forming epitaxial layer on U-GaN layers of high temperature, obtains vertical LED chip epitaxial structure finished product.
Correspondingly, the invention also discloses a kind of preparation methods of vertical LED chip referring to Fig. 3 comprising following step
It is rapid:
S1: vertical LED epitaxial structure is prepared；
It is specific as noted above；
S2: current-diffusion layer and complex reflex layer are formed on epitaxial structure；
Specifically, S2 includes:
S21: ohmic contact layer is formed on epitaxial structure；
Wherein, the ingredient of ohmic contact layer 2 is that Mg adulterates GaN, can effective strengthening electric current diffusion layer 2 and current-diffusion layer
Ohmic contact between 3；
S22: current-diffusion layer is formed on ohmic contact layer；
Wherein, current-diffusion layer 3 is by one of tin indium oxide (ITO), fluorine oxide tin (FTO) and aluminum zinc oxide (AZO)
Or it several is made；But not limited to this；The resistance of current-diffusion layer 3 is smaller；It can play the role of dissufion current.
S23: complex reflex layer is formed on current-diffusion layer；
Complex reflex layer 4 includes reflecting layer 41 and etching barrier layer 42.Reflecting layer 41 is made of Ag and/or Al, can be effective
Reflect the light that epitaxial structure issues.Etching barrier layer 42 can prevent reflecting layer 41 from metal ion transport diffusion occurs.Etching
Barrier layer 42 is laminated construction, is made of two or more in Cr, Pt, Ti, Au, Ni and TiW.Preferably, etch stopper
Layer 42 is formed by Cr layers and TiW layers.
S3: the first bonded layer is formed on complex reflex layer；
Specifically, the first bonded layer 51 is laminated construction, structure Cr/Ti/Pt/Au, Cr/Ti/Pt/Sn or Au/Sn/
Pt/Sn, but not limited to this.
S4: the second substrate is provided, forms the second bonded layer on the second substrate；
Wherein, the second substrate 6 is transfer substrate, is used for epitaxial structure.Specifically, copper substrate or conductive silicon lining can be selected
Bottom, but not limited to this.
The composition of second bonded layer 52 is identical as the first bonded layer 51.
S5: the first bonded layer and the second bonded layer are bonded；
Specifically, the second substrate equipped with the second bonded layer and the epitaxial structure equipped with the first bonded layer are carried out key
It closes；It is bonded in vacuum environment, is carried out under constant temperature constant pressure.Its temperature is 150~300 DEG C, and pressure is 5~15kN.
S6: the first substrate of laser lift-off and removing buffer layer；
Specifically, after removing buffer layer 12 absorbs laser light energy, melt and be detached from by the first one side of substrate of laser irradiation,
And then expose contact diffusion layer；
It should be noted that conventional vertical LED chip, generally also needs to grind or etch to go after laser lift-off
Except U-GaN layers；But the present invention eliminates this step by the setting of epitaxial structure, simplifies LED core blade technolgy.
S7: first electrode is formed on contact diffusion layer；
Specifically, S7 includes:
S71: the deposit passivation layer on exposed contact diffusion layer；
Specifically, passivation layer 7 is made of silica, it is used to protect LED chip；
S72: lithography and etching is carried out to the passivation layer, forms exposed region；
Specifically, the exposed region is etched to the first semiconductor layer 151；
S73: first electrode is formed in exposed region；
Specifically, first electrode 8 is laminated construction, it is made of two or more in Cr, Ti, Ni, Sn, Au, Pt.The
One electrode is equivalent to the N electrode of LED chip.
S8: metal layer on back is formed in the second substrate surface；
Metal layer on back 9 is laminated construction, is made of two or more in Cr, Ti, Ni, Sn, Au, Pt.Back-side gold
Belong to the N electrode that layer 9 is equivalent to LED chip.
Specifically, referring to fig. 4, the invention also discloses a kind of vertical LED chips comprising: the second substrate 6；Set on
The metal layer on back 9 of two substrate backs；It is sequentially arranged in bonded layer 5, the complex reflex layer 4, current-diffusion layer of the second substrate face
3, epitaxial structure 1, passivation layer 7 and first electrode 8；Wherein, epitaxial structure 1 includes be sequentially arranged in current-diffusion layer 3 the second half
Conductor layer 153, active layer 152, the first semiconductor layer 151, high temperature U-GaN layer 14 and contact diffusion layer 13.First electrode 8 runs through
Passivation layer 7, contact diffusion layer 13, high temperature U-GaN layer 14 and the connection of the first semiconductor layer 151.
Further, ohmic contact layer 2 is additionally provided between current-diffusion layer 3 and epitaxial structure 1；Expand for promoting electric current
Dissipate the Ohmic contact of layer 3 with epitaxial structure 1.The present invention passes through the setting of contact diffusion layer 13, ohmic contact layer 3, effectively increases
The Ohmic contact of LED chip each section eliminates bonding bring Ohmic contact undesirable adverse effect to a certain extent.
The above is the preferred embodiment of invention, it is noted that those skilled in the art are come
It says, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also considered as this
The protection scope of invention.
Claims (10)
1. a kind of vertical LED chip epitaxial structure characterized by comprising
First substrate；
Removing buffer layer on first substrate；
Contact diffusion layer on the removing buffer layer；
U-GaN layers of high temperature on the contact diffusion layer；
With the epitaxial layer being set on the high temperature U-GaN layer；The epitaxial layer successively includes the first semiconductor layer, active layer and
Two semiconductor layers；
Wherein, the removing buffer layer is by InN or InxGa1-xN is made, and the contact diffusion layer is made of N-GaN；
High temperature U-GaN layers of the resistivity is 10-2~10-3Ω·cm2, N-GaN layers of the resistivity is 10-5~10-8
Ω·cm2。
2. vertical LED chip epitaxial structure as described in claim 1, which is characterized in that the removing buffer layer is by InxGa1-xN
It is made, wherein x >=0.2.
3. vertical LED chip epitaxial structure as claimed in claim 2, which is characterized in that the contact diffusion layer is adulterated by Si
N-GaN be made, wherein the doping concentration of Si be 1018~1020cm-3；
High temperature U-GaN layers of the electron concentration is 5 × 1015~8 × 1016cm-3。
4. vertical LED chip epitaxial structure as claimed in claim 2, which is characterized in that it is described removing buffer layer with a thickness of
20~50nm.
5. vertical LED chip epitaxial structure as claimed in claim 4, which is characterized in that the contact diffusion layer with a thickness of
0.2~2 μm, described high temperature U-GaN layers with a thickness of 3.5~6 μm.
6. a kind of preparation method of vertical LED chip epitaxial structure as described in any one in claim 1-5, which is characterized in that
Include:
(1) the first substrate is provided；
(2) removing buffer layer is formed on first substrate；
(3) contact diffusion layer is formed on the removing buffer layer；
(4) high temperature U-GaN layers is formed on the contact diffusion layer；
(5) epitaxial layer is formed on described high temperature U-GaN layers to get the vertical LED chip epitaxial structure finished product is arrived.
7. the preparation method of vertical LED chip epitaxial structure as claimed in claim 6, which is characterized in that in step (2), institute
The formation temperature for stating removing buffer layer is 450~600 DEG C；
In step (3), the formation temperature of the contact diffusion layer is 1000~1300 DEG C；
In step (4), high temperature U-GaN layers of the formation temperature is 1000~1200 DEG C.
8. the preparation method of vertical LED chip epitaxial structure as claimed in claim 7, which is characterized in that the removing buffering
Layer, contact diffusion layer, U-GaN layers of high temperature be all made of mocvd method and formed.
9. a kind of preparation method of vertical LED chip characterized by comprising
(1) vertical LED chip epitaxial structure as described in any one in claim 1-5 is prepared；
(2) current-diffusion layer and complex reflex layer are formed on the epitaxial structure；
(3) the first bonded layer is formed on the complex reflex layer；
(4) one second substrate is provided, forms the second bonded layer over the substrate；
(5) the first bonded layer and the second bonded layer are bonded, form bonded layer；
(6) the first substrate of laser lift-off and removing buffer layer；
(7) first electrode is formed on exposed contact diffusion layer；
(8) metal layer on back is formed in second substrate back.
10. a kind of vertical LED chip, which is characterized in that it is prepared by preparation method as claimed in claim 8 or 9.
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