CN110351945A - A kind of multilayer circuit board and its manufacture craft with error-disable function - Google Patents
A kind of multilayer circuit board and its manufacture craft with error-disable function Download PDFInfo
- Publication number
- CN110351945A CN110351945A CN201910588385.0A CN201910588385A CN110351945A CN 110351945 A CN110351945 A CN 110351945A CN 201910588385 A CN201910588385 A CN 201910588385A CN 110351945 A CN110351945 A CN 110351945A
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- CN
- China
- Prior art keywords
- plate core
- mistake proofing
- calibrated holes
- circuit board
- error
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
This application involves a kind of multilayer circuit board and its manufacture craft with error-disable function, wherein with the multilayer circuit board of error-disable function, comprising: the multilayer plate core set gradually, it is laminated between adjacent two layers plate core by prepreg, wherein every laminate core corresponding position offers mistake proofing calibrated holes, mistake proofing calibrated holes are rectangular configuration, and from top to bottom rectangle length is sequentially reduced the mistake proofing calibrated holes of multilayer plate core.The multilayer circuit board and its manufacture craft with error-disable function of the application, wherein every laminate core in multilayer circuit board offers mistake proofing calibrated holes, and mistake proofing calibrated holes are rectangular configuration, from top to bottom rectangle length is sequentially reduced the mistake proofing calibrated holes of multilayer plate core, multilayer circuit board is in overlapping, whether correct reduce rule by detection mistake proofing calibrated holes, can be realized quickly determine multilayer plate core overlapping it is whether correct, process after preventing defective products wiring board from flowing into, product quality is improved, enterprise's production cost is reduced.
Description
Technical field
This application involves wiring board production technical fields, specifically, being related to a kind of multilayer circuit board with error-disable function
And its manufacture craft.
Background technique
Multilayer circuit board in process of production, is needed by different internal layer plate cores and without the PP(Prepreg of type, half admittedly
Change piece) pressed again after overlapping in advance, and in the prior art, generally different plate cores and PP are carried out using manual type
Arrangement overlapping because plate core perhaps between PP variety classes more difficult differentiation generally by marker pen in each plate core or PP
It is decorated with not isolabeling to distinguish, manually be overlapped by searching for the label to plate core or PP further according to label when overlapping.
But the label in above-mentioned plate core and PP is easy that missing occurs in storage or transportational process or is erased, and causes
Error is manually easy in subsequent lamination, and in pressing working procedure, it is difficult to screen the defective products of lamination sequence error, makes
Defective products wiring board can be processed always, until defective products wiring board just can be carried out interception functional test technique is unqualified, greatly
The production cost of enterprise is increased greatly.
Summary of the invention
The application's is designed to provide that a kind of design is simple, mistake proofing effect is good, error detection effect is good has error-disable function
Multilayer circuit board and its manufacture craft.
According to a first aspect of the present application, the application provides a kind of multilayer circuit board with error-disable function comprising: according to
The multilayer plate core of secondary setting is laminated between adjacent two layers plate core, wherein every laminate core corresponding position is equal by prepreg
Offer mistake proofing calibrated holes, mistake proofing calibrated holes are rectangular configuration, the mistake proofing calibrated holes of multilayer plate core from top to bottom rectangle length according to
Secondary reduction.
According to the embodiment of the application, the projection of the mistake proofing calibrated holes of lower layer's plate core in the horizontal plane is located at top plate
In the projection of the mistake proofing calibrated holes of core in the horizontal plane.
According to the embodiment of the application, every laminate core is provided with differentiation band, distinguishes band and the adjoining of mistake proofing calibrated holes, under
The differentiation band of laminate core is located in the projection of the mistake proofing calibrated holes of upper layer plate core in the horizontal plane.
According to the embodiment of the application, the differentiation band of multilayer plate core is located at the projection on horizontal plane from top to bottom successively
Connection.
According to a second aspect of the present application, the application provides a kind of production work of multilayer circuit board with error-disable function
Skill, the multilayer circuit board with error-disable function includes the multilayer plate core set gradually, passes through semi-solid preparation between adjacent two layers plate core
Piece is laminated, and includes the following steps: step S1: boring mistake proofing school at multilayer plate core and the corresponding position of prepreg respectively
Device to hole, mistake proofing calibrated holes are rectangular configuration, by lamination sequence, by top layer plate core to undermost plate core mistake proofing calibrated holes
From top to bottom rectangle length is sequentially reduced, and the mistake proofing calibrated holes of every layer of prepreg are corresponding with upper layer plate core；Step S2: exist respectively
Internal layer circuit is made in different plate cores；Step S3: plate core and prepreg are folded by the sequence that mistake proofing calibrated holes are sequentially reduced
It is combined, then pressing forms multi-layer board；And step S4: upper drilling, heavy copper, plating, production successively are carried out to multi-layer board
Outer-layer circuit, production solder mask, surface treatment and molding, form route board finished product.
According to the embodiment of the application, also bored in the corresponding position of each plate core and prepreg in step S1
Registration holes are aligned in step S3 before all plate cores and prepreg pressing using registration holes.
According to the embodiment of the application, before all plate cores and prepreg press in step S3, mistake proofing school is detected
Device to hole reduces whether rule is correct, if correctly being pressed, if mistake, overlapping corresponds to plate core and prepreg again.
According to the embodiment of the application, also each plate core is made in step S1 and distinguishes band, the differentiation of lower layer's plate core
Band is located in the projection of the mistake proofing calibrated holes of upper layer plate core in the horizontal plane.
According to the embodiment of the application, before all plate cores and prepreg press in step S3, band is distinguished in detection
Whether the regularity of distribution is correct, if correctly being pressed, if mistake, overlaps corresponding plate core and prepreg again.
The multilayer circuit board and its manufacture craft with error-disable function of the application, wherein every laminate in multilayer circuit board
Core offers mistake proofing calibrated holes, and mistake proofing calibrated holes are rectangular configuration, the mistake proofing calibrated holes of multilayer plate core from top to bottom square
Shape length is sequentially reduced, and whether multilayer circuit board is correct by detection mistake proofing calibrated holes reduction rule in overlapping, can be realized
Whether correct quickly determine multilayer plate core overlapping, process after preventing defective products wiring board from flowing into improves product quality, reduces enterprise
Industry production cost.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of the multilayer circuit board in an embodiment with error-disable function.
Fig. 2 is the structural schematic diagram of the multilayer circuit board in another embodiment with error-disable function.
Fig. 3 is the differentiation band effect diagram of the multilayer circuit board in another embodiment with error-disable function.
Specific embodiment
The application is described in further detail below in conjunction with specific embodiments and drawings.
It please refers to shown in Fig. 1, is the structural schematic diagram of the multilayer circuit board in an embodiment with error-disable function.
The application provides a kind of multilayer circuit board with error-disable function comprising and the multilayer plate core 1 set gradually is adjacent
It is laminated between two layers of plate core 1 by prepreg 2, wherein every 1 corresponding position of laminate core offers mistake proofing calibrated holes 11,
Mistake proofing calibrated holes 11 are rectangular configuration, and from top to bottom, rectangle length is sequentially reduced the mistake proofing calibrated holes 11 of multilayer plate core 1, thus
Convenient for whether correctly quickly being judged the overlapping of multilayer plate core 1.
In one embodiment, please continue to refer to shown in Fig. 1, the throwing of the mistake proofing calibrated holes 11 of lower layer's plate core 1 in the horizontal plane
Shadow is located in the projection of the mistake proofing calibrated holes 11 of upper layer plate core 1 in the horizontal plane, in this way, make multilayer circuit board by bowing
When angle is observed, the stepped distribution of mistake proofing calibrated holes 11 is easily facilitated to whether the overlapping of multilayer plate core 1 correctly judges, effectively
Improve judging efficiency.
In one embodiment, please also refer to shown in Fig. 2 to 3, there are the more of error-disable function in respectively another embodiment
The structural schematic diagram and differentiation band effect diagram of sandwich circuit board, every laminate core 1, which is provided with, distinguishes band 12, distinguishes band 12 and prevents
Wrong calibrated holes 11 are adjacent, and the differentiation band 12 of lower layer's plate core 1 is located at the projection of the mistake proofing calibrated holes 11 of upper layer plate core 1 in the horizontal plane
It is interior, in other words, when observing multilayer circuit board by the angle of depression, the differentiation band 12 of every laminate core 1 can be observed simultaneously, specifically, often
The differentiation band 12 of laminate core 1 is distinguished using different colours or label, for example, distinguishing band 12 when 1 number of plies of plate core is 7 layers and dividing
It color Cai Yong not distinguish in red, orange, yellow, green, blue, blue, purple seven, or distinguish the digital block that sequence or backward is respectively adopted in band 12
Point, by distinguish band 12 further increase to multilayer plate core 1 overlapping whether correct judging efficiency.In another embodiment, more
The projection that the differentiation band 12 of laminate core 1 is located on horizontal plane is from top to bottom sequentially connected, and in other words, observes multilayer by the angle of depression
When wiring board, the differentiation band 12 of all plate cores 1 is compact to link together, when overlapping mistake occurs, between adjacent differentiation band 12
There are vacancy, in this way, can further improve to multilayer plate core 1 overlapping whether correct judging efficiency.
The application also provides a kind of technique of multilayer circuit board with error-disable function, wherein the multilayer with error-disable function
Wiring board includes the multilayer plate core 1 set gradually, is laminated between adjacent two layers plate core 1 by prepreg 2, mainly includes
Following steps.
Step S1: mistake proofing calibrated holes 11, mistake proofing school are bored at multilayer plate core 1 and the corresponding position of prepreg 2 respectively
Device to hole 11 is rectangular configuration, by lamination sequence, by top layer plate core to undermost plate core 1 mistake proofing calibrated holes 11 by up to
Lower rectangle length is sequentially reduced, and the mistake proofing calibrated holes 11 of every layer of prepreg 2 are corresponding with upper layer plate core 1.
Step S2: internal layer circuit is made in different plate cores 1 respectively.
Step S3: plate core and prepreg are superimposed together by the sequence that mistake proofing calibrated holes are sequentially reduced, then pressed
Form multi-layer board.
Step S4: upper drilling, heavy copper, plating, production outer-layer circuit, production solder mask, surface successively are carried out to multi-layer board
Processing and molding, form route board finished product.
In one embodiment, registration holes also are bored in the corresponding position of each plate core 1 and prepreg 2 in step S1,
Before all plate cores 1 and prepreg 2 press in step S3, aligned using registration holes, in this way, effectively improve multilayer
The product quality of plate.
In one embodiment, before all plate cores 1 and prepreg 2 press in step S3, using optical detection apparatus or
Person's artificial detection mistake proofing calibrated holes 11 reduce whether rule is correct, if correctly being pressed, if mistake, overlapping is corresponded to again
Plate core and prepreg, in this way, improve the quality of production of multilayer circuit board.
In one embodiment, also each plate core 1 is made in step S1 and distinguishes band 12,12, the differentiation band of lower layer's plate core 1
In in the projection in the horizontal plane of mistake proofing calibrated holes 11 of upper layer plate core 1, by distinguish band 12 easily facilitate to multi-layer board whether
Overlapping is correctly judged.
In another embodiment, before all plate cores 1 and prepreg 2 press in step S3, detection is distinguished band 12 and is distributed
Whether rule is correct, if correctly being pressed, if mistake, overlaps corresponding plate core 1 and prepreg 12, detection zone again
Divide the regularity of distribution of band 12 to realize more rapidly, efficiently judge whether lamination is correct, further increases production efficiency.
In conclusion the multilayer circuit board and its manufacture craft with error-disable function of the application, wherein multilayer circuit board
In every laminate core offer mistake proofing calibrated holes, and mistake proofing calibrated holes are rectangular configuration, the mistake proofing calibrated holes of multilayer plate core
From top to bottom rectangle length is sequentially reduced, and whether just multilayer circuit board reduces rule in overlapping, through detection mistake proofing calibrated holes
Really, it can be realized and quickly determine whether multilayer plate core overlapping is correct, and process after preventing defective products wiring board from flowing into improves product
Quality reduces enterprise's production cost.
In the description of the present application, it is to be understood that term such as "upper", "lower", "front", "rear", " left side ",
The orientation or positional relationship of the instructions such as " right side ", "vertical", "horizontal", "top", "bottom" "inner", "outside" is side based on the figure
Position or positional relationship are merely for convenience of description the application and simplify description, rather than the device or member of indication or suggestion meaning
Part must have a particular orientation, be constructed and operated in a specific orientation, therefore should not be understood as the limitation to the application.
In this application unless specifically defined or limited otherwise, term " installation ", " connected ", " connection ", " fixation " etc.
Term shall be understood in a broad sense, for example, it may be being fixedly connected, may be a detachable connection, or integral；It can be mechanical connect
It connects, is also possible to be electrically connected；It can be directly connected, can also can be in two elements indirectly connected through an intermediary
The interaction relationship of the connection in portion or two elements.It for the ordinary skill in the art, can be according to specific feelings
Condition understands the concrete meaning of above-mentioned term in this application.
Although being carried out to the description of the present application combination embodiments above, those skilled in the art
Member can carry out many replacements based on the above contents, modifications and variations, be obvious.Therefore, all such substitutions,
Improvements and changes are included in the spirit and scope of appended claims.
Claims (9)
1. a kind of multilayer circuit board with error-disable function, characterized in that it comprises: the multilayer plate core set gradually is adjacent
It is laminated between two layers of plate core by prepreg, wherein every layer of plate core corresponding position offers mistake proofing calibrated holes,
The mistake proofing calibrated holes are rectangular configuration, and from top to bottom rectangle length is sequentially reduced the mistake proofing calibrated holes of plate core described in multilayer.
2. the multilayer circuit board according to claim 1 with error-disable function, which is characterized in that plate core described in lower layer is prevented
The projection of wrong calibrated holes in the horizontal plane is located in the projection of the mistake proofing calibrated holes of plate core described in upper layer in the horizontal plane.
3. the multilayer circuit board according to claim 2 with error-disable function, which is characterized in that every layer of plate core setting
There is differentiation band, the differentiation band is adjacent with mistake proofing calibrated holes, and the differentiation band of plate core described in lower layer is located at the anti-of plate core described in upper layer
In the projection of wrong calibrated holes in the horizontal plane.
4. the multilayer circuit board according to claim 4 with error-disable function, which is characterized in that the area of plate core described in multilayer
The projection for dividing band to be located on horizontal plane is from top to bottom sequentially connected.
5. a kind of manufacture craft of the multilayer circuit board with error-disable function, the multilayer circuit board with error-disable function include
The multilayer plate core set gradually is laminated between adjacent two layers plate core, which is characterized in that including walking as follows by prepreg
It is rapid:
Step S1: mistake proofing calibrated holes, the mistake proofing calibrated holes are bored at multilayer plate core and the corresponding position of prepreg respectively
For rectangular configuration, by lamination sequence, by the plate core of top layer, to the mistake proofing calibrated holes of undermost plate core, from top to bottom rectangle is long
Degree is sequentially reduced, and the mistake proofing calibrated holes of every layer of prepreg are corresponding with upper layer plate core；
Step S2: internal layer circuit is made in different plate cores respectively；
Plate core and prepreg: being superimposed together by step S3 by the sequence that mistake proofing calibrated holes are sequentially reduced, and then pressing is formed
Multi-layer board；And
Step S4: upper drilling, heavy copper, plating, production outer-layer circuit, production solder mask, surface treatment successively are carried out to multi-layer board
And molding, form route board finished product.
6. the manufacture craft of the multilayer circuit board according to claim 5 with error-disable function, which is characterized in that the step
Registration holes also are bored in the corresponding position of each plate core and prepreg in rapid S1, all plate cores and half in the step S3
Before cured sheets pressing, aligned using registration holes.
7. the manufacture craft of the multilayer circuit board according to claim 5 with error-disable function, which is characterized in that the step
Before all plate cores and prepreg press in rapid S3, whether detection mistake proofing calibrated holes reduction rule is correct, if correct progress
Pressing overlaps corresponding plate core and prepreg if mistake again.
8. the manufacture craft of the multilayer circuit board according to claim 5 with error-disable function, which is characterized in that the step
Also each plate core is made in rapid S1 and distinguishes band, the differentiation band of plate core described in lower layer is located at the mistake proofing calibrated holes of plate core described in upper layer
In projection in the horizontal plane.
9. the manufacture craft of the multilayer circuit board according to claim 8 with error-disable function, which is characterized in that the step
Before all plate cores and prepreg press in rapid S3, whether the detection differentiation band regularity of distribution is correct, if correctly being pressed,
If mistake, corresponding plate core and prepreg are overlapped again.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910588385.0A CN110351945A (en) | 2019-07-01 | 2019-07-01 | A kind of multilayer circuit board and its manufacture craft with error-disable function |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910588385.0A CN110351945A (en) | 2019-07-01 | 2019-07-01 | A kind of multilayer circuit board and its manufacture craft with error-disable function |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110351945A true CN110351945A (en) | 2019-10-18 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910588385.0A Pending CN110351945A (en) | 2019-07-01 | 2019-07-01 | A kind of multilayer circuit board and its manufacture craft with error-disable function |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112033294A (en) * | 2020-08-17 | 2020-12-04 | 胜宏科技（惠州）股份有限公司 | Method for identifying whether PP (polypropylene) sheets are correctly stacked |
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| US4648607A (en) * | 1986-03-04 | 1987-03-10 | Ishikawa Gasket Co. Ltd. | Steel laminate gasket with assembly order identification device |
| CN101216106A (en) * | 2007-01-05 | 2008-07-09 | 石川密封垫板有限责任公司 | Metal gasket and mis-assembly detection method of metal gasket |
| CN103415141A (en) * | 2013-08-29 | 2013-11-27 | 东莞市若美电子科技有限公司 | Inner core plate of sandwich plate and lamination error proof method of sandwich plate |
-
2019
- 2019-07-01 CN CN201910588385.0A patent/CN110351945A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4648607A (en) * | 1986-03-04 | 1987-03-10 | Ishikawa Gasket Co. Ltd. | Steel laminate gasket with assembly order identification device |
| CN101216106A (en) * | 2007-01-05 | 2008-07-09 | 石川密封垫板有限责任公司 | Metal gasket and mis-assembly detection method of metal gasket |
| CN103415141A (en) * | 2013-08-29 | 2013-11-27 | 东莞市若美电子科技有限公司 | Inner core plate of sandwich plate and lamination error proof method of sandwich plate |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112033294A (en) * | 2020-08-17 | 2020-12-04 | 胜宏科技（惠州）股份有限公司 | Method for identifying whether PP (polypropylene) sheets are correctly stacked |
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Application publication date: 20191018 |