CN110350020B - Epitaxial substrate - Google Patents
Epitaxial substrate Download PDFInfo
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- CN110350020B CN110350020B CN201910057928.6A CN201910057928A CN110350020B CN 110350020 B CN110350020 B CN 110350020B CN 201910057928 A CN201910057928 A CN 201910057928A CN 110350020 B CN110350020 B CN 110350020B
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- substrate structure
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- substrate
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- 239000000758 substrate Substances 0.000 title claims abstract description 116
- 235000012431 wafers Nutrition 0.000 description 51
- 238000000034 method Methods 0.000 description 20
- 230000007547 defect Effects 0.000 description 10
- 238000003486 chemical etching Methods 0.000 description 6
- 238000000407 epitaxy Methods 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- 239000013078 crystal Substances 0.000 description 3
- 238000003754 machining Methods 0.000 description 3
- 229910002601 GaN Inorganic materials 0.000 description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 2
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical Vapour Deposition (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
The invention provides an epitaxial substrate. The epitaxial substrate comprises a substrate structure, wherein the substrate structure is provided with an upper part and a lower part, the upper part is provided with a first side surface parallel to the thickness direction of the substrate structure, the lower part is provided with a second side surface parallel to the thickness direction of the substrate structure, and a distance is arranged between the first side surface and the second side surface and is between 0.1mm and 3mm.
Description
Technical Field
The present disclosure relates to a substrate, and particularly to an epitaxial substrate.
Background
Metal Organic Chemical Vapor Deposition (MOCVD) is one method currently used to perform epitaxial (epitaxiy) processes on wafers (wafers). In the MOCVD process, a wafer is disposed on a substrate. The desired crystal growth is achieved by controlling process parameters such as temperature, gas pressure and gas flow rate within the chamber.
However, in the MOCVD process, since the wafer is rapidly rotated, the edge of the wafer is likely to contact the wall surface of the carrier (carrier), and further, the wafer is likely to collide with the carrier to generate cracks (crack), slip lines (slip lines), and the like. Such defects may affect the subsequent devices, resulting in poor device yield.
Therefore, how to reduce the edge defect of the chip to improve the yield of the device is one of the problems to be solved.
Disclosure of Invention
The invention provides an epitaxial substrate, which can solve the problem that defects are easy to generate at the edge of a wafer during wafer epitaxy.
The epitaxial substrate comprises a substrate structure, wherein the substrate structure is provided with an upper part and a lower part, the upper part and the lower part are respectively provided with a first side surface and a second side surface which are parallel to the thickness direction of the substrate structure, a distance is arranged between the first side surface and the second side surface, and the distance is 0.1 mm-3 mm.
In an embodiment of the invention, a portion where the first side surface of the upper portion is connected to the lower portion has a joint angle.
In an embodiment of the invention, the engagement angle includes 90 degrees or an R angle.
In an embodiment of the invention, a thickness of an upper portion of the substrate structure is between 200 μm and 500 μm.
In an embodiment of the invention, a ratio of a thickness of the upper portion to a distance between the first side surface and the second side surface is a tangent of a first angle.
In an embodiment of the invention, a portion of the first side surface connected to the lower portion is an inclined surface, the inclined surface and the horizontal plane form a second angle, and the second angle is not greater than the first angle.
In an embodiment of the invention, the upper portion of the substrate structure has a top surface opposite to the lower portion, and a chamfer is formed between the top surface and the first side surface.
In an embodiment of the invention, the lower portion of the substrate structure has a top surface joined to the upper portion, and a chamfer is formed between the top surface and the second side surface of the lower portion.
In an embodiment of the invention, the lower portion of the substrate structure has a bottom surface opposite to the upper portion, and a chamfer is formed between the bottom surface and the second side surface of the lower portion.
In an embodiment of the invention, the substrate structure may be composed of a first wafer and a second wafer, the upper portion is the first wafer, and the lower portion is the second wafer.
Based on the above, the epitaxial substrate of the present invention is divided into the upper portion and the lower portion, and the side surfaces of the upper portion and the lower portion have a specific distance therebetween, so that the problem that the edge of the wafer touches the wall surface of the carrier due to the rapid rotation of the carrier carrying the epitaxial substrate during the epitaxial process can be avoided, thereby reducing the edge defect of the wafer and further improving the yield of the device.
In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below.
Drawings
Fig. 1 is a schematic half-sectional view of an epitaxial substrate according to a first embodiment of the present invention;
fig. 2 is a schematic half-sectional view of an epitaxial substrate according to a second embodiment of the present invention;
fig. 3 is a schematic half-sectional view of an epitaxial substrate according to a third embodiment of the present invention;
fig. 4 is a schematic half-sectional view of an epitaxial substrate according to a fourth embodiment of the invention;
fig. 5 is a schematic half-sectional view of an epitaxial substrate according to a fifth embodiment of the invention;
fig. 6 is a schematic half-sectional view of an epitaxial substrate according to a sixth embodiment of the invention.
Description of the reference numerals
100. 200, 300, 400, 500, 600: substrate structure
102: upper part
102a, 104a: the top surface
104: lower part
104b: bottom surface
106: first side surface
108: second side surface
110: angle of engagement
112. 606: chamfering
114. 116: inner angle
202: inclined plane
602: first wafer
604: second wafer
d: distance between two adjacent devices
t: thickness of
θ 1: a first angle
θ 2: second angle
Detailed Description
Exemplary embodiments of the present invention will now be described more fully hereinafter with reference to the accompanying drawings, but the invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In the drawings, the size and thickness of regions, regions and layers may not be drawn to scale for clarity. For ease of understanding, like elements in the following description will be described with like reference numerals.
Fig. 1 is a schematic half-sectional view of an epitaxial substrate according to a first embodiment of the invention.
Referring to fig. 1, the epitaxial substrate of the first embodiment includes a substrate structure 100. The substrate structure 100 has an upper portion 102 and a lower portion 104, and only half of the epitaxial substrate is shown for clarity, it being understood that the other half of the entire epitaxial substrate corresponds to a mirror surface. According to the present embodiment, the substrate structure 100 is a single wafer, and the material thereof is, for example, silicon carbide, aluminum oxide (sapphire), gallium nitride, aluminum nitride, or other materials.
The upper portion 102 of the substrate structure 100 has a first side 106 parallel to the thickness direction of the substrate structure 100; the lower portion 104 has a second side 108 parallel to the thickness direction of the substrate structure 100. In the present embodiment, the first side 106 and the second side 108 have a distance d therebetween, and the distance d is between 0.1mm and 3mm, such as 0.1mm, 0.5mm, 1mm, 1.5mm, 2mm, 2.5mm, or 3mm. In detail, if the distance d is less than 0.1mm, the first side 106 and the second side 108 are too close to each other to be located on the same plane, so that the probability of the edge touching the wall of the carrier during the wafer epitaxy cannot be reduced. If the distance d is greater than 3mm, the available area of the upper portion 102 is too small. In one embodiment, the maximum diameter of the upper portion 102 is less than the maximum diameter of the lower portion 104, and the outer extension surface is a top surface 102a of the upper portion 102 opposite the lower portion 104, although the invention is not limited thereto. If the substrate structure 100 is inverted, the maximum diameter of the upper portion 102 may be greater than the maximum diameter of the lower portion 104, where the outer extension surface is a bottom surface 104b of the lower portion 104 opposite the upper portion 102.
In the present embodiment, since the wafer epitaxy is performed by using the MOCVD method, the first side surface 106 is far away from the wall surface of the carrier than the second side surface 108, and a specific distance d is provided therebetween. That is, when the substrate structure 100 rotates in the process, the carrier only touches the second side 108 because the first side 106 and the second side 108 have the specific distance d therebetween, and the first side 106 is not affected, so that the problem that the edge of the wafer carried on the substrate structure 100 touches the wall of the carrier due to the rapid rotation of the wafer can be avoided, thereby preventing the occurrence of wafer edge defects and improving the yield of devices.
In the present embodiment, a portion where the upper portion 102 of the substrate structure 100 is connected to the lower portion 104 of the substrate structure 100 has a joint angle 110. The joint angle 110 in the present embodiment is an angle R, but the invention is not limited thereto; the engagement angle 110 may also be 90 degrees.
In the present embodiment, the upper portion 102 of the substrate structure 100 has a thickness t, for example, between 200 μm and 500 μm. In detail, if the thickness t of the upper portion 102 is less than 200 μm, the upper portion 102 of the substrate structure 100 is likely to touch the wall surface of the carrier due to the high-speed rotation of the substrate structure 100 in the epitaxy process, and further damage the wafer carried on the upper portion 102 of the substrate structure 100; if the thickness t of the upper portion 102 is greater than 500 μm, the lower portion 104 of the substrate structure 100 may have an insufficient thickness compared to the upper portion 102, which may cause the substrate structure to fly off the carrier during the epitaxy process due to high speed rotation.
In some embodiments, the upper portion 102a of the substrate structure 100 has a chamfer (level) 112 between the first side 106 and the top surface 102a, wherein the chamfer 112 is between 9 degrees and 47 degrees, preferably between 10 degrees and 25 degrees. In other embodiments, the lower portion 104 of the substrate structure 100 has a top surface 104a joined to the upper portion 102, the top surface 104a forms an interior angle 114 with the second side surface 108, and the second side surface 108 forms another interior angle 116 with the bottom surface 104b of the lower portion 104. The inner angle 114 may be a chamfer angle, wherein the chamfer angle is between 9 degrees and 47 degrees, preferably between 10 degrees and 25 degrees. In detail, if the chamfer 112 or the inner angle 114 of the chamfer is less than 9 degrees, the chamfer is too small, so that the defect easily extends to the crystal plane growing on the substrate structure 100; if the chamfer 112 or the inner angle 114 of the chamfer is higher than 47 degrees, the substrate structure 100 is easily chipped. In other embodiments, the chamfer 112 or the inner angle 114 of the chamfer is between 10 degrees and 25 degrees, which is suitable for preventing the generation of wafer edge defects, thereby improving the device yield. In view of workability, the chamfering process is performed by, for example, CNC precision machining, L-shaped forming round edge grinding wheel, grinding process, laser process, or chemical etching (chemical etching), but the invention is not limited thereto.
The substrate structure 100 is designed by the chamfer 112, so that the gas flow in the epitaxial process can flow more smoothly through the upper part 102 of the substrate structure 100, and the stress generated when the wafer edge collides can be dispersed. In addition, if the inner corners 114 of the substrate structure 100 are designed to be chamfered, the stress generated when the edge of the lower portion 104 touches the wall of the carrier can be reduced, thereby improving the stability of the epitaxy process.
Fig. 2 is a schematic half-sectional view of an epitaxial substrate according to a second embodiment of the present invention, in which the same or similar components are denoted by the same or similar reference numerals as in the first embodiment.
Referring to fig. 2, the epitaxial substrate of the second embodiment includes a substrate structure 200. The substrate structure 200 is similar to the substrate structure 100, wherein the difference between the two is that the portion where the first side 106 and the lower portion 104 of the substrate structure 200 are connected is an inclined surface 202, and the connection relationship and the materials of the other components are described in detail in the first embodiment, and therefore will not be repeated in the following.
In the present embodiment, the thickness t of the upper portion 102 of the substrate structure 200 is one of the right-angled sides of a right-angled triangle, and the distance d between the first side surface 106 and the second side surface 108 is the other right-angled side of the right-angled triangle, so that the hypotenuse of the right-angled triangle formed by the thickness t and the distance d forms a first angle θ 1 with the top surface 102a of the upper portion 102. Wherein, the ratio of the thickness t to the distance d is defined as the tangent of the first angle theta 1; that is, tan θ 1= t/d. Therefore, the second angle θ 2 between the inclined surface 202 and the top surface 104a of the lower portion 104 is not greater than the first angle θ 1. That is, the upper portion 102 may be determined to be present when the second angle θ 2 of the substrate structure 200 is not greater than the first angle θ 1.
Fig. 3 is a schematic half-sectional view of an epitaxial substrate according to a third embodiment of the invention, wherein the same or similar components are denoted by the same or similar reference numerals as in the first embodiment.
Referring to fig. 3, the epitaxial substrate of the third embodiment includes a substrate structure 300. The substrate structure 300 is similar to the substrate structure 100, wherein the difference between the two is that the inner corner 116 between the bottom surface 104b and the second side surface 108 of the lower portion 104 of the substrate structure 300 is chamfered.
In the present embodiment, the chamfer angle between the bottom surface 104b and the second side surface 108 of the lower portion 104 of the substrate structure 300 is between 9 degrees and 47 degrees, preferably between 10 degrees and 25 degrees. In view of workability, the chamfer is formed by CNC precision machining, L-shaped forming round edge grinding wheel, grinding process, laser process, or chemical etching (chemical etching), for example, but the invention is not limited thereto.
Because the inner corners 116 of the substrate structure 300 are designed as chamfers, stress generated when the edge of the lower portion 104 of the substrate structure 300 touches the wall of the carrier can be reduced, thereby improving the stability of the epitaxial process.
Fig. 4 is a schematic half-sectional view of an epitaxial substrate according to a fourth embodiment of the invention, in which the same or similar components are denoted by the same or similar reference numerals as in the first embodiment.
Referring to fig. 4, the epitaxial substrate of the fourth embodiment includes a substrate structure 400. The substrate structure 400 is similar to the substrate structure 100, wherein the difference between the two is that the joint angle 110 of the portion where the first side 106 and the lower portion 104 of the substrate structure 400 are connected is 90 degrees. When the bonding angle 110 is 90 degrees, the process of preparing the substrate structure may be simplified.
Fig. 5 is a schematic half-sectional view of an epitaxial substrate according to a fifth embodiment of the invention, in which the same or similar components are denoted by the same or similar reference numerals as in the first embodiment.
Referring to fig. 5, the epitaxial substrate of the fifth embodiment includes a substrate structure 500. The substrate structure 500 is similar to the substrate structure 400, with the difference being that the inner corners 114 of the lower portion 104 of the substrate structure 500 are not chamfered.
Fig. 6 is a schematic half-sectional view of an epitaxial substrate according to a sixth embodiment of the invention, wherein the same or similar components are denoted by the same or similar reference numerals as in the first embodiment.
Referring to fig. 6, the epitaxial substrate of the sixth embodiment includes a substrate structure 600, and the substrate structure 600 is composed of a first wafer 602 and a second wafer 604. It is noted that the first wafer 602 is substantially identical to the upper portion 102 of the substrate structure in the above-described embodiment, and the second wafer 604 is substantially identical to the lower portion 104 of the substrate structure in the above-described embodiment. According to the present embodiment, the maximum diameter of the first wafer 602 is smaller than the maximum diameter of the second wafer 604, but the present invention is not limited thereto. In some embodiments, if the substrate structure 600 is inverted, the maximum diameter of the first wafer 602 may be larger than the maximum diameter of the second wafer 604. The first wafer and the second wafer are made of materials such as silicon, silicon carbide, aluminum oxide (sapphire), gallium nitride, aluminum nitride, or other epitaxial materials, wherein the first wafer and the second wafer may be made of the same or different materials.
In some embodiments, the first side 106 of the first wafer 602 has chamfers 112 and 606 at both ends, and the inner corners 114 and 116 of the second side 108 of the second wafer 604 may also be chamfers at both ends. The invention is not so limited and in other embodiments the inner corners 114 and 116 of the second wafer 604 may not be chamfered. The chamfer 606 is 9 to 47 degrees, preferably 10 to 25 degrees. In detail, if the chamfer 606 is less than 9 degrees, the defects are easily extended to the crystal planes grown on the substrate structure 100; if the chamfer 606 is higher than 47 degrees, chipping of the substrate structure 100 is likely to occur. In other embodiments, the chamfer 606 is between 10 degrees and 25 degrees, which is suitable for preventing wafer edge defects and improving device yield. In view of workability, the chamfering 606 may be performed by, for example, CNC precision machining, L-shaped round edge grinding, laser processing, or chemical etching (chemical etching), but the invention is not limited thereto.
Since the substrate structure 600 is composed of the first wafer 602 and the second wafer 604 separated, the chamfering 112, 606 of the first wafer 602 and the second wafer 604, the inner corners 114 and 116 exhibiting the chamfers may be performed before bonding the first and second wafers. In another embodiment, the inner corners 114 and 116 of the second wafer 604 that are chamfered may be performed after the first wafer 602 and the second wafer 604 are bonded, but the invention is not limited thereto.
In summary, the epitaxial substrate of the present invention has the specific distance between the upper and lower side surfaces, so that the problem of the edge of the wafer touching the wall surface of the carrier during the epitaxial process of the epitaxial substrate can be avoided, thereby reducing the edge defect of the wafer and further improving the yield of the device.
Although the present invention has been described with reference to the above embodiments, it should be understood that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention.
Claims (8)
1. An epitaxial substrate, comprising:
a substrate structure having an upper portion and a lower portion, wherein the upper portion has a first side surface parallel to a thickness direction of the substrate structure, the lower portion has a second side surface parallel to the thickness direction of the substrate structure, a distance is provided between the first side surface and the second side surface, and the distance is between 0.1mm and 3mm,
wherein a ratio of a thickness of the upper portion to the distance between the first side and the second side is tangent to a first angle,
the part of the first side surface connected with the lower part is an inclined surface, a second angle is formed between the inclined surface and the horizontal plane, and the second angle is not larger than the first angle.
2. The epitaxial substrate of claim 1, wherein a region where the first side of the upper portion meets the lower portion has a joint angle.
3. The epitaxial substrate of claim 2, wherein the junction angle comprises 90 degrees or an R-angle.
4. The epitaxial substrate of claim 1, wherein the thickness of the upper portion of the substrate structure is between 200 μ ι η and 500 μ ι η.
5. The epitaxial substrate of claim 1, wherein the upper portion of the substrate structure has a top surface opposite the lower portion, the top surface of the upper portion having a chamfer therebetween and the first side surface.
6. The epitaxial substrate of claim 1, wherein the lower portion of the substrate structure has a top surface joined to the upper portion, the top surface and the second side surface of the lower portion having a chamfer therebetween.
7. The epitaxial substrate of claim 1, wherein the lower portion of the substrate structure has a bottom surface opposite the upper portion with a chamfer therebetween.
8. The epitaxial substrate of claim 1, wherein the substrate structure is comprised of a first wafer and a second wafer, the upper portion is the first wafer, and the lower portion is the second wafer.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW107111729A TWI665718B (en) | 2018-04-03 | 2018-04-03 | Epitaxy substrate |
| TW107111729 | 2018-04-03 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110350020A CN110350020A (en) | 2019-10-18 |
| CN110350020B true CN110350020B (en) | 2022-11-08 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910057928.6A Active CN110350020B (en) | 2018-04-03 | 2019-01-22 | Epitaxial substrate |
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| CN (1) | CN110350020B (en) |
| TW (1) | TWI665718B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200721263A (en) * | 2005-07-08 | 2007-06-01 | Soitec Silicon On Insulator | Method of production of a film |
| CN102412356A (en) * | 2010-09-23 | 2012-04-11 | 展晶科技(深圳)有限公司 | Epitaxial substrate |
| WO2017110262A1 (en) * | 2015-12-22 | 2017-06-29 | 株式会社Sumco | Double side polishing method for wafers, epitaxial wafer manufacturing method using same, and epitaxial wafers |
-
2018
- 2018-04-03 TW TW107111729A patent/TWI665718B/en active
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- 2019-01-22 CN CN201910057928.6A patent/CN110350020B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200721263A (en) * | 2005-07-08 | 2007-06-01 | Soitec Silicon On Insulator | Method of production of a film |
| CN102412356A (en) * | 2010-09-23 | 2012-04-11 | 展晶科技(深圳)有限公司 | Epitaxial substrate |
| WO2017110262A1 (en) * | 2015-12-22 | 2017-06-29 | 株式会社Sumco | Double side polishing method for wafers, epitaxial wafer manufacturing method using same, and epitaxial wafers |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201942954A (en) | 2019-11-01 |
| TWI665718B (en) | 2019-07-11 |
| CN110350020A (en) | 2019-10-18 |
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