CN110336479B - Reconstruction method for modulation wave of three-level NPC inverter switching device in online monitoring period - Google Patents

Reconstruction method for modulation wave of three-level NPC inverter switching device in online monitoring period Download PDF

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CN110336479B
CN110336479B CN201910507526.1A CN201910507526A CN110336479B CN 110336479 B CN110336479 B CN 110336479B CN 201910507526 A CN201910507526 A CN 201910507526A CN 110336479 B CN110336479 B CN 110336479B
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switching device
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cathode
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CN110336479A (en
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马铭遥
詹铭玥
郭伟生
王佳宁
张兴
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Hefei University of Technology
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/327—Testing of circuit interrupters, switches or circuit-breakers
    • G01R31/3271—Testing of circuit interrupters, switches or circuit-breakers of high voltage or medium voltage devices
    • G01R31/3275—Fault detection or status indication
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/487—Neutral point clamped inverters

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Abstract

The invention discloses a reconstruction method of a modulation wave of a switching device of a three-level NPC inverter in an online monitoring period. The modulation wave reconstruction method provided by the invention utilizes the redundancy state of the switching device to be detected, and creates monitoring conditions for realizing the online monitoring of the switching device of the three-level NPC inverter. The invention ensures the safety of the system to be tested and the monitoring system when the three-level NPC inverter switching device is monitored on line, and meets the normal working principle of each power device of the inverter, thereby avoiding the short-circuit fault of an external monitoring circuit and the inverter main circuit. The modulation wave reconstruction method provided by the invention has the minimum influence degree on the operation of the inverter and the minimum influence on the power quality of the load current waveform. The modulation wave reconstruction method provided by the invention is simple and visual and is easy to operate.

Description

Reconstruction method for modulation wave of three-level NPC inverter switching device in online monitoring period
Technical Field
The invention relates to a reconstruction method of a modulation wave of a three-level NPC inverter, in particular to a reconstruction method of a modulation wave of a switching device of a three-level NPC inverter in an online monitoring period.
Background
The multi-level inverter technology realizes high-voltage high-power output by improving the topological structure of the converter. It can improve output voltage waveform, reduce switching loss, and has no need of step-up/step-down transformer and voltage-equalizing circuit. The stress is greatly reduced compared to a two-level inverter under the same DC bus voltage condition, which can improve the EMI characteristics of the device. At present, the multi-level inverter is widely applied to the fields of high-voltage high-power variable-frequency speed regulation systems, active filtering of power systems, dynamic reactive compensation and the like, and can also be widely applied to more critical national defense military systems and links influencing national economy in the future. However, as the number of levels of the multi-level inverter increases, the number of switching devices also increases significantly, which results in the reliability of the operation state of the inverter system being reduced, and the failure of any one device may cause the whole circuit to stop working, even affect the safety of other circuits, and cause immeasurable economic loss.
Relevant data statistics show that the power converter faults account for a high proportion of the total number of faults of all electrical equipment in a power electronic system, and the IGBT module is a main component of the power converter, so that the fault rate of the power converter caused by IGBT failure is high. Relevant research statistics show that the fault rate of the IGBT module in the power electronic device is up to 31%. The most typical and most widely used of the multi-level inverters is the three-level NPC inverter. Therefore, online monitoring of the power devices is particularly important to improve the reliability of the three-level NPC inverter.
The invention discloses a Chinese patent document (CN207832955U) entitled IGBT (insulated gate bipolar transistor) online detection device, which is simple in structure, novel and unique, small in size and convenient to carry and use, but does not specifically indicate whether external conditions need to be adjusted and matched when online monitoring is realized, so that the matching between a system to be detected and a monitoring system is realized.
The chinese patent document (CN105337523B) entitled "NPC type three-level inverter reliability online monitoring system and method" introduces a more complete NPC type three-level inverter reliability online monitoring system and method, but does not specifically describe how the inverter needs to be adjusted during the online monitoring period to achieve the adaptation between the inverter and the online monitoring system.
In summary, the following problems still exist in the online monitoring of the switching devices of the existing three-level NPC inverter:
1) how to manufacture monitoring conditions for realizing on-line monitoring of the three-level NPC inverter switching devices is not specifically described;
2) how to ensure the safety of a system to be tested and a monitoring system when a three-level NPC inverter switching device is monitored on line is not specifically described;
3) the existing method has large influence on the operation of the inverter and the electric energy quality of the load current waveform.
Disclosure of Invention
The technical problem to be solved by the invention is the deficiency of the scheme, namely, a reliable and safe three-level NPC inverter switching device on-line monitoring period modulation wave reconstruction method is provided.
In order to achieve the purpose of the invention, the invention provides a three-level NPC inverter switching device online monitoring period modulation wave reconstruction method, the three-level NPC inverter related to the online monitoring period modulation wave reconstruction method comprises a direct current source Udc, two direct current side capacitors C1 and C2 and a three-phase topological structure, wherein the direct current side capacitor C1 and the direct current side capacitor C2 are connected in series and then are connected in parallel with a direct current side power source Udc, and a connection point of the direct current side capacitor C1 and the direct current side capacitor C2 is defined as an inverter neutral point; the three-phase topological structures are completely the same, each phase comprises 10 switching devices, wherein the phase A comprises 4 IGBTs, 4 anti-parallel diodes and 2 clamping diodes, the 4 IGBTs in the phase A are respectively recorded as a switching device Sa1, a switching device Sa2, a switching device Sa3 and a switching device Sa4, the 4 anti-parallel diodes in the phase A are respectively recorded as a switching device Da1, a switching device Da2, a switching device Da3 and a switching device Da4, and the 2 clamping diodes in the phase A are respectively recorded as a switching device D1 and a switching device D2; phase B comprises 4 IGBTs, 4 anti-parallel diodes and 2 clamping diodes, wherein 4 IGBTs in phase B are respectively recorded as a switch device Sb1, a switch device Sb2, a switch device Sb3 and a switch device Sb4, 4 anti-parallel diodes in phase B are respectively recorded as a switch device Db1, a switch device Db2, a switch device Db3 and a switch device Db4, and 2 clamping diodes in phase B are respectively recorded as a switch device D3 and a switch device D4; the phase C comprises 4 IGBTs, 4 anti-parallel diodes and 2 clamping diodes, wherein the 4 IGBTs in the phase C are respectively recorded as a switching device Sc1, a switching device Sc2, a switching device Sc3 and a switching device Sc4, the 4 anti-parallel diodes in the phase C are respectively recorded as a switching device Dc1, a switching device Dc2, a switching device Dc3 and a switching device Dc4, and the 2 clamping diodes in the phase C are respectively recorded as a switching device D5 and a switching device D6;
the on-line monitoring period modulation wave reconstruction method comprises the following steps:
step 1, a three-level NPC inverter is arranged to adopt a sinusoidal pulse width modulation control mode, and a normal operation working state is maintained, namely A, B, C three-phase modulation waves are in each fundamental wave period, and the expression is as follows:
fa(ωt)＝Msin(ωt)0≤t＜T
Figure BDA0002092317590000031
Figure BDA0002092317590000032
wherein f isa(ω t) is an A-phase modulated wave, fb(ω t) is a B-phase modulated wave, fc(ω T) is a C-phase modulation wave, M is a modulation degree, ω is a fundamental wave angular frequency, T is time, π is a circumferential ratio, T is a fundamental wave period;
step 2, the upper computer sends out an instruction for carrying out online monitoring on a specified switching device of the three-level NPC inverter, wherein the specified switching device comprises:
4A phases: switching device Sa2, switching device Sa3, switching device Da2, switching device Da 3:
4B phases: a switching device Sb2, a switching device Sb3, a switching device Db2, a switching device Db 3;
4C phases: a switching device Sc2, a switching device Sc3, a switching device Dc2, a switching device Dc 3;
step 3, calling a designated program by a controller of the three-level NPC inverter to forcibly reconstruct a three-phase modulation wave of the three-level NPC inverter into a designated expression, so that a PWM output waveform of a phase where the designated switching device is located is forcibly maintained at a 0 level in a monitoring period, the designated switching device is in a redundant state, and the three-phase modulation wave maintains three-phase balance, specifically, there are the following six conditions:
first, when the designated switching device is Sa2 or Da 2:
Figure BDA0002092317590000033
Figure BDA0002092317590000034
Figure BDA0002092317590000035
wherein f isa(ω t)' is the A-phase modulated wave after reconstruction in the on-line monitoring period, fb(ω t)' is atB-phase modulated wave, f, after reconstruction of line monitoring periodc(ω t)' is a C-phase modulated wave reconstructed during the on-line monitoring period, Δ tmIs the duration of the monitoring period;
secondly, when the designated switching device is Sa3 or Da 3:
Figure BDA0002092317590000041
Figure BDA0002092317590000042
Figure BDA0002092317590000043
thirdly, when the designated switching device is Sb2 or Db 2:
Figure BDA0002092317590000044
Figure BDA0002092317590000045
Figure BDA0002092317590000046
fourth, when the designated switching device is Sb3 or Db 3:
Figure BDA0002092317590000047
Figure BDA0002092317590000048
Figure BDA0002092317590000049
fifth, when the designated switching device is Sc2 or Dc 2:
fa(ωt)'＝Msin(ωt) 0≤t＜T
Figure BDA0002092317590000051
Figure BDA0002092317590000052
sixthly, when the specified switching device is Sc3 or Dc 3:
fa(ωt)'＝Msin(ωt) 0≤t＜T
Figure BDA0002092317590000053
Figure BDA0002092317590000054
step 4, after the monitoring is finished, the upper computer command is reset, the modulation wave of the three-phase NPC inverter is restored to the following expression in each fundamental wave period, and meanwhile, the next command is waited;
fa(ωt)”＝Msin(ωt) 0≤t＜T
Figure BDA0002092317590000055
Figure BDA0002092317590000056
wherein f isa(ω t) "is the A-phase modulated wave after the end of the on-line monitoring period, fb(ω t) "is the B-phase modulated wave after the end of the on-line monitoring period, fc(ω t) "is the C-phase modulated wave after the end of the on-line monitoring period.
Compared with the prior art, the invention has the beneficial effects that:
1. the modulation wave reconstruction method provided by the method of the invention utilizes the redundancy state of the switching device to be tested to manufacture monitoring conditions for realizing the online monitoring of the switching device of the three-level NPC inverter.
2. The method ensures the safety of the system to be tested and the monitoring system when the three-level NPC inverter switching device is monitored on line, meets the normal working principle of each power device of the inverter, and avoids the short circuit fault of an external monitoring circuit and the main circuit of the inverter.
3. The modulation wave reconstruction method provided by the method has the minimum influence degree on the operation of the inverter and the minimum influence on the power quality of the load current waveform.
4. The modulation wave reconstruction method provided by the invention is simple and visual and is easy to operate.
Drawings
Fig. 1 is a topology of a three-level NPC inverter in an example of the invention.
Fig. 2 is a schematic diagram of an online monitoring period for Sa 3.
Fig. 3 is a schematic diagram of an online monitoring period for Da 3.
Fig. 4 is a simulation waveform of a monitoring period using a modulation wave of the present invention.
Fig. 5 is a simulation waveform of the load current after the modulation wave reconstruction method of the present invention is applied.
Fig. 6 is a simulation waveform of the load current after the modulation wave reconstruction method of the present invention is not applied.
Fig. 7 is a simulation waveform of the load current after the modulation wave reconstruction method of the present invention is not applied.
Detailed Description
The present invention will be described in further detail below with reference to the accompanying drawings.
Fig. 1 is a topology of a three-level NPC inverter in an example of the present invention, including a dc source Udc, two dc-side capacitors C1, C2, and a three-phase topology. The direct-current side capacitor C1 and the direct-current side capacitor C2 are connected in series and then connected in parallel with a direct-current side power supply Udc, and a connection point of the direct-current side capacitor C1 and the direct-current side capacitor C2 is defined as an inverter neutral point; the three-phase topology is identical and each phase comprises 10 switching devices. The phase A comprises 4 IGBTs, 4 anti-parallel diodes and 2 clamping diodes, the 4 IGBTs in the phase A are respectively recorded as a switching device Sa1, a switching device Sa2, a switching device Sa3 and a switching device Sa4, the 4 anti-parallel diodes in the phase A are respectively recorded as a switching device Da1, a switching device Da2, a switching device Da3 and a switching device Da4, and the 2 clamping diodes in the phase A are respectively recorded as a switching device D1 and a switching device D2. Phase B comprises 4 IGBTs, 4 anti-parallel diodes and 2 clamping diodes, wherein 4 IGBTs in phase B are respectively recorded as a switching device Sb1, a switching device Sb2, a switching device Sb3 and a switching device Sb4, 4 anti-parallel diodes in phase B are respectively recorded as a switching device Db1, a switching device Db2, a switching device Db3 and a switching device Db4, and 2 clamping diodes in phase B are respectively recorded as a switching device D3 and a switching device D4. The phase C includes 4 IGBTs, 4 anti-parallel diodes and 2 clamping diodes, the 4 IGBTs in the phase C are respectively recorded as a switching device Sc1, a switching device Sc2, a switching device Sc3 and a switching device Sc4, the 4 anti-parallel diodes in the phase C are respectively recorded as a switching device Dc1, a switching device Dc2, a switching device Dc3 and a switching device Dc4, and the 2 clamping diodes in the phase C are respectively recorded as a switching device D5 and a switching device D6.
The collector of the switching device Sa1 is connected to the anode of the capacitor C1, the emitter of the switching device Sa1 is connected to the collector of the switching device Sa2, the emitter of the switching device Sa2 is connected to the collector of the switching device Sa3, the emitter of the switching device Sa3 is connected to the collector of the switching device Sa4, the emitter of the switching device Sa4 is connected to the cathode of the capacitor C2, the collector of the switching device Sb2 is connected to the anode of the capacitor C2, the emitter of the switching device Sb2 is connected to the collector of the switching device Sb2, the emitter of the switching device Sc2 is connected to the cathode of the capacitor C2, the collector of the switching device Sc2 is connected to the anode of the capacitor C2, the emitter of the switching device Sc2 is connected to the collector of the switching device Sc2, the emitter of the switching device Sc2 is connected to the cathode of the capacitor C2, switching device Da1 is connected with switching device Sa1 emitter at the anode, switching device Da1 is connected with switching device Sa1 collector at the cathode, switching device Da2 is connected with switching device Sa2 emitter at the anode, switching device Da2 is connected with switching device Sa2 collector at the cathode, switching device Da3 is connected with switching device Sa3 emitter at the anode, switching device Da3 is connected with switching device Sa3 collector at the cathode, switching device Da3 is connected with switching device Sa3 emitter at the anode, switching device Db3 is connected with switching device Sb3 emitter at the cathode, switching device Db3 is connected with switching device Sb3 collector at the cathode, switching device Db3 is connected with switching device Sb3 emitter at the anode, the cathode of the switching device Db4 is connected with the collector of the switching device Sb4, the anode of the switching device Dc1 is connected with the emitter of the switching device Sc1, the cathode of the switching device Dc1 is connected with the collector of the switching device Sc1, the anode of the switching device Dc2 is connected with the emitter of the switching device Sc2, the cathode of the switching device Dc2 is connected with the collector of the switching device Sc2, the anode of the switching device Dc3 is connected with the emitter of the switching device Sc3, the cathode of the switching device Dc3 is connected with the collector of the switching device Sc3, the anode of the switching device Dc4 is connected with the emitter of the switching device Sc4, the cathode of the switching device Dc4 is connected with the collector of the switching device Sc4, the anode of the switching device D1 is connected with the inverter neutral point, the cathode of the switching device D1 is connected with the emitter of the switching device Sa1, the switching device D1, the anode of the switching device D4 is connected with the collector of the switching device Sb4, the cathode of the switching device D4 is connected with the neutral point of the inverter, the anode of the switching device D5 is connected with the neutral point of the inverter, the cathode of the switching device D5 is connected with the emitter of the switching device Sc1, the anode of the switching device D6 is connected with the collector of the switching device Sc4, the cathode of the switching device D6 is connected with the neutral point of the inverter, and the load part is connected with the emitter of Sa2, the emitter of Sb 483.
The inverter operating state is classified into P, O, N three operating states, and the states of the respective switching devices in the three operating states are shown in table 1.
Figure BDA0002092317590000081
The relevant electrical parameters when the invention is implemented are set as follows:
the direct current source Udc is 150V, the direct current side capacitor C1 is C2 is 56000 μ F, the modulation degree M is 0.8, the fundamental wave angular frequency ω is 100 pi, pi is the circumferential rate, the duration Δ t of the monitoring period is Δ tm＝0.4ms。
The on-line monitoring time interval modulation wave reconstruction method comprises the following steps:
step 1, a three-level NPC inverter is arranged to adopt a sinusoidal pulse width modulation control mode, and a normal operation working state is maintained, namely A, B, C three-phase modulation waves are in each fundamental wave period, and the expression is as follows:
fa(ωt)＝Msin(ωt) 0≤t＜T
Figure BDA0002092317590000082
Figure BDA0002092317590000083
wherein f isa(ω t) is an A-phase modulated wave, fb(ω t) is a B-phase modulated wave, fc(ω T) is a C-phase modulation wave, M is a modulation degree, ω is a fundamental wave angular frequency, T is time, π is a circumferential ratio, and T is a fundamental wave period.
In this example, the A, B, C three-phase modulated wave has the following expression in each fundamental wave period:
fa(ωt)'＝0.8sin(ωt) 0≤t＜0.02s
Figure BDA0002092317590000084
Figure BDA0002092317590000085
step 2, the upper computer sends out an instruction for carrying out online monitoring on a specified switching device of the three-level NPC inverter, wherein the specified switching device comprises:
4A phases: switching device Sa2, switching device Sa3, switching device Da2, switching device Da 3:
4B phases: a switching device Sb2, a switching device Sb3, a switching device Db2, a switching device Db 3;
4C phases: a switching device Sc2, a switching device Sc3, a switching device Dc2, a switching device Dc 3.
Step 3, calling a designated program by a controller of the three-level NPC inverter to forcibly reconstruct a three-phase modulation wave of the three-level NPC inverter into a designated expression, so that a PWM output waveform of a phase where the designated switching device is located is forcibly maintained at a 0 level in a monitoring period, the designated switching device is in a redundant state, and the three-phase modulation wave maintains three-phase balance, specifically, there are the following six conditions:
first, when the designated switching device is Sa2 or Da 2:
Figure BDA0002092317590000091
Figure BDA0002092317590000092
Figure BDA0002092317590000093
wherein f isa(ω t)' is the A-phase modulated wave after reconstruction in the on-line monitoring period, fb(ω t)' is a B-phase modulated wave reconstructed during an on-line monitoring period, fc(ω t)' is a C-phase modulated wave reconstructed during the on-line monitoring period, Δ tmIs the duration of the monitoring period;
secondly, when the designated switching device is Sa3 or Da 3:
Figure BDA0002092317590000094
Figure BDA0002092317590000095
Figure BDA0002092317590000096
thirdly, when the designated switching device is Sb2 or Db 2:
Figure BDA0002092317590000101
Figure BDA0002092317590000102
Figure BDA0002092317590000103
fourth, when the designated switching device is Sb3 or Db 3:
Figure BDA0002092317590000104
Figure BDA0002092317590000105
Figure BDA0002092317590000106
fifth, when the designated switching device is Sc2 or Dc 2:
fa(ωt)'＝M sin(ωt) 0≤t＜T
Figure BDA0002092317590000107
Figure BDA0002092317590000108
sixthly, when the specified switching device is Sc3 or Dc 3:
fa(ωt)'＝M sin(ωt) 0≤t＜T
Figure BDA0002092317590000111
Figure BDA0002092317590000112
in this example, the upper computer sends out an instruction for performing online monitoring on the switching device Sa3 and the switching device Da3 of the phase a of the three-level NPC inverter, and then the controller of the three-level NPC inverter calls a designated program, so that the three-phase modulation wave of the three-level NPC inverter is forcibly reconstructed into a designated expression, and thus the phase a PWM output waveform is forcibly maintained at the level 0 in the monitoring period, the switching device Sa3 and the switching device Da3 are in a redundant state, and the three-phase modulation wave maintains three-phase balance. Specifically, in this embodiment, the a-phase modulation wave f after reconstruction of the online monitoring perioda(ω t)', B-phase modulated wave f reconstructed at on-line monitoring periodb(ω t)' and C-phase modulated wave f reconstructed during on-line monitoring periodc(ω t)' is calculated as follows:
Figure BDA0002092317590000113
Figure BDA0002092317590000114
Figure BDA0002092317590000115
in the process of implementing online monitoring specifically by this example, referring to fig. 2 and fig. 3, fig. 2 is a schematic diagram of an online monitoring period of Sa3, and fig. 3 is a schematic diagram of an online monitoring period of Da3, in the above process, according to table 1, Sa3 and Da3 are in a redundant state (device is turned on but no load current flows), so as to implement injection of external monitoring current.
And 4, after the monitoring is finished, resetting the instruction of the upper computer, recovering the modulation wave of the three-phase NPC inverter into the following expression in each fundamental wave period, and waiting for the next instruction.
fa(ωt)”＝M sin(ωt) 0≤t＜T
Figure BDA0002092317590000121
Figure BDA0002092317590000122
Wherein f isa(ω t) "is the A-phase modulated wave after the end of the on-line monitoring period, fb(ω t) "is the B-phase modulated wave after the end of the on-line monitoring period, fc(ω t) "is the C-phase modulated wave after the end of the on-line monitoring period.
In the example, after the monitoring is finished, the upper computer command is reset, and the modulation wave of the three-phase NPC inverter is restored to the following expression in each fundamental wave period, and meanwhile, the next command is waited.
Specifically, in the present embodiment, the a-phase modulation wave f after the end of the online monitoring perioda(ω t) ", B-phase modulated wave f after the end of on-line monitoring periodb(ω t) "and C-phase modulated wave f after the end of the on-line monitoring periodc(ω t) "is calculated as follows:
fa(ωt)”＝0.8sin(ωt) 0≤t＜0.02s
Figure BDA0002092317590000123
Figure BDA0002092317590000124
in this example, fig. 4 is a simulation waveform of a modulation wave in a monitoring period, fig. 5 is a simulation waveform of a load current after a modulation wave reconstruction method of the present invention is adopted, and fig. 6 and fig. 7 are simulation waveforms of a load current after a modulation wave reconstruction method of the present invention is not adopted.

Claims (1)

1. The three-level NPC inverter related to the on-line monitoring period modulation wave reconstruction method comprises a direct current source Udc, two direct current side capacitors C1 and C2 and a three-phase topological structure, wherein the direct current side capacitor C1 and the direct current side capacitor C2 are connected in series and then are connected in parallel with the direct current side power source Udc, and a connection point of the direct current side capacitor C1 and the direct current side capacitor C2 is defined as an inverter neutral point; the three-phase topological structures are completely the same, each phase comprises 10 switching devices, wherein the phase A comprises 4 IGBTs, 4 anti-parallel diodes and 2 clamping diodes, the 4 IGBTs in the phase A are respectively recorded as a switching device Sa1, a switching device Sa2, a switching device Sa3 and a switching device Sa4, the 4 anti-parallel diodes in the phase A are respectively recorded as a switching device Da1, a switching device Da2, a switching device Da3 and a switching device Da4, and the 2 clamping diodes in the phase A are respectively recorded as a switching device D1 and a switching device D2; phase B comprises 4 IGBTs, 4 anti-parallel diodes and 2 clamping diodes, wherein 4 IGBTs in phase B are respectively recorded as a switch device Sb1, a switch device Sb2, a switch device Sb3 and a switch device Sb4, 4 anti-parallel diodes in phase B are respectively recorded as a switch device Db1, a switch device Db2, a switch device Db3 and a switch device Db4, and 2 clamping diodes in phase B are respectively recorded as a switch device D3 and a switch device D4; the phase C comprises 4 IGBTs, 4 anti-parallel diodes and 2 clamping diodes, wherein the 4 IGBTs in the phase C are respectively recorded as a switching device Sc1, a switching device Sc2, a switching device Sc3 and a switching device Sc4, the 4 anti-parallel diodes in the phase C are respectively recorded as a switching device Dc1, a switching device Dc2, a switching device Dc3 and a switching device Dc4, and the 2 clamping diodes in the phase C are respectively recorded as a switching device D5 and a switching device D6; the collector of the switching device Sa1 is connected to the anode of the capacitor C1, the emitter of the switching device Sa1 is connected to the collector of the switching device Sa2, the emitter of the switching device Sa2 is connected to the collector of the switching device Sa3, the emitter of the switching device Sa3 is connected to the collector of the switching device Sa4, the emitter of the switching device Sa4 is connected to the cathode of the capacitor C2, the collector of the switching device Sb2 is connected to the anode of the capacitor C2, the emitter of the switching device Sb2 is connected to the collector of the switching device Sb2, the emitter of the switching device Sc2 is connected to the cathode of the capacitor C2, the collector of the switching device Sc2 is connected to the anode of the capacitor C2, the emitter of the switching device Sc2 is connected to the collector of the switching device Sc2, the emitter of the switching device Sc2 is connected to the cathode of the capacitor C2, switching device Da1 is connected with switching device Sa1 emitter at the anode, switching device Da1 is connected with switching device Sa1 collector at the cathode, switching device Da2 is connected with switching device Sa2 emitter at the anode, switching device Da2 is connected with switching device Sa2 collector at the cathode, switching device Da3 is connected with switching device Sa3 emitter at the anode, switching device Da3 is connected with switching device Sa3 collector at the cathode, switching device Da3 is connected with switching device Sa3 emitter at the anode, switching device Db3 is connected with switching device Sb3 emitter at the cathode, switching device Db3 is connected with switching device Sb3 collector at the cathode, switching device Db3 is connected with switching device Sb3 emitter at the anode, the cathode of the switching device Db4 is connected with the collector of the switching device Sb4, the anode of the switching device Dc1 is connected with the emitter of the switching device Sc1, the cathode of the switching device Dc1 is connected with the collector of the switching device Sc1, the anode of the switching device Dc2 is connected with the emitter of the switching device Sc2, the cathode of the switching device Dc2 is connected with the collector of the switching device Sc2, the anode of the switching device Dc3 is connected with the emitter of the switching device Sc3, the cathode of the switching device Dc3 is connected with the collector of the switching device Sc3, the anode of the switching device Dc4 is connected with the emitter of the switching device Sc4, the cathode of the switching device Dc4 is connected with the collector of the switching device Sc4, the anode of the switching device D1 is connected with the inverter neutral point, the cathode of the switching device D1 is connected with the emitter of the switching device Sa1, the switching device D1, the anode of the switching device D4 is connected with the collector of the switching device Sb4, the cathode of the switching device D4 is connected with the neutral point of the inverter, the anode of the switching device D5 is connected with the neutral point of the inverter, the cathode of the switching device D5 is connected with the emitter of the switching device Sc1, the anode of the switching device D6 is connected with the collector of the switching device Sc4, the cathode of the switching device D6 is connected with the neutral point of the inverter, and the load part is connected with the emitter of Sa2, the emitter of Sb 483;
the method for reconstructing the modulation wave in the online monitoring period is characterized by comprising the following steps:
step 1, a three-level NPC inverter is arranged to adopt a sinusoidal pulse width modulation control mode, and a normal operation working state is maintained, namely A, B, C three-phase modulation waves are in each fundamental wave period, and the expression is as follows:
fa(ωt)＝Msin(ωt)0≤t＜T
Figure FDA0002404703320000021
Figure FDA0002404703320000022
wherein f isa(ω t) is an A-phase modulated wave, fb(ω t) is a B-phase modulated wave, fc(ω T) is a C-phase modulation wave, M is a modulation degree, ω is a fundamental wave angular frequency, T is time, π is a circumferential ratio, T is a fundamental wave period;
step 2, the upper computer sends out an instruction for carrying out online monitoring on a specified switching device of the three-level NPC inverter, wherein the specified switching device comprises:
4A phases: switching device Sa2, switching device Sa3, switching device Da2, switching device Da 3:
4B phases: a switching device Sb2, a switching device Sb3, a switching device Db2, a switching device Db 3;
4C phases: a switching device Sc2, a switching device Sc3, a switching device Dc2, a switching device Dc 3;
step 3, calling a designated program by a controller of the three-level NPC inverter to forcibly reconstruct a three-phase modulation wave of the three-level NPC inverter into a designated expression, so that a PWM output waveform of a phase where the designated switching device is located is forcibly maintained at a 0 level in a monitoring period, the designated switching device is in a redundant state, and the three-phase modulation wave maintains three-phase balance, specifically, there are the following six conditions:
first, when the designated switching device is Sa2 or Da 2:
Figure FDA0002404703320000031
Figure FDA0002404703320000032
Figure FDA0002404703320000033
wherein f isa(ω t)' is the A-phase modulated wave after reconstruction in the on-line monitoring period, fb(ω t)' is a B-phase modulated wave reconstructed during an on-line monitoring period, fc(ω t)' is a C-phase modulated wave reconstructed during the on-line monitoring period, Δ tmIs the duration of the monitoring period;
secondly, when the designated switching device is Sa3 or Da 3:
Figure FDA0002404703320000034
Figure FDA0002404703320000035
Figure FDA0002404703320000036
thirdly, when the designated switching device is Sb2 or Db 2:
Figure FDA0002404703320000041
Figure FDA0002404703320000042
Figure FDA0002404703320000043
fourth, when the designated switching device is Sb3 or Db 3:
Figure FDA0002404703320000044
Figure FDA0002404703320000045
Figure FDA0002404703320000046
fifth, when the designated switching device is Sc2 or Dc 2:
fa(ωt)'＝Msin(ωt) 0≤t＜T
Figure FDA0002404703320000047
Figure FDA0002404703320000048
sixthly, when the specified switching device is Sc3 or Dc 3:
fa(ωt)'＝M sin(ωt) 0≤t＜T
Figure FDA0002404703320000051
Figure FDA0002404703320000052
step 4, after the monitoring is finished, the upper computer command is reset, the modulation wave of the three-phase NPC inverter is restored to the following expression in each fundamental wave period, and meanwhile, the next command is waited;
fa(ωt)”＝Msin(ωt) 0≤t＜T
Figure FDA0002404703320000053
Figure FDA0002404703320000054
wherein f isa(ω t) "is the A-phase modulated wave after the end of the on-line monitoring period, fb(ω t) "is the B-phase modulated wave after the end of the on-line monitoring period, fc(ω t) "is the C-phase modulated wave after the end of the on-line monitoring period.
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