CN110324014B - Ultra-wideband high-efficiency power amplifier based on harmonic control network - Google Patents
Ultra-wideband high-efficiency power amplifier based on harmonic control network Download PDFInfo
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Abstract
The invention discloses an ultra-wideband high-efficiency power amplifier based on a harmonic control network, and belongs to the technical field of wireless communication. The invention adopts TL1 and TL2 to form a novel harmonic control circuit, and controls the impedance of three frequency points at V through a double-wire structure TL3 and TL41The impedance condition of the transistor, and thus the transistor output terminal Z0The impedance form is introduced into a T-shaped section consisting of three branches TL5, TL6 and TL7, TL8, TL9, TL10 and TL11 are base frequency matching parts, the control of the second harmonic impedance of three frequency points in a frequency band is completed, the technical effect in the frequency band of 0.22G-1.54GHz is achieved, the advantages of being larger than 60% in drain rate and higher than 10dB in gain are achieved, and the power amplifier has significance for subsequently designing a multi-frequency band high-efficiency power amplifier applicable to the frequency band of a new-generation communication system.
Description
Technical Field
The invention belongs to the technical field of wireless communication, relates to a radio frequency power amplifier, and particularly relates to an ultra wide band high-efficiency power amplifier based on a novel harmonic control network.
Background
With the rapid development of the 5G communication technology and the significant technical innovation challenge in the field of radio frequency devices, the novel radio frequency device should meet the technical indexes of high efficiency, high speed and low time delay and the wider spectrum coverage requirement of a 5G communication system. The power amplifier is an indispensable part of a radio frequency transceiver system, is an important device for introducing system energy consumption, and has a great influence on the whole transceiver due to the performance index.
It is known that the frequency band mainly used by three operators in China in the 4G era is between 1.8GHz and 2.7GHz, and recently published 5G commercial license plates are respectively introduced to the frequency bands of 200MHz near 3.6GHz and 4.8GHz for use. Therefore, designing a high-efficiency ultra-wideband power amplifier satisfying the communication frequency bands (mainly 4G and 5G) has great scientific and commercial significance to meet the challenge of the 5G era.
Some of the currently proposed ultra-wideband power amplifiers are designed by adopting a continuous type F class or inverse F class theory, or calculate specific parameters of a matching circuit by adopting an optimized iterative algorithm. The whole design idea is relatively complex, and the realization difficulty is higher; the control of the second harmonic impedance is limited to only one frequency point, which results in lower efficiency of other frequency points in the frequency band.
Disclosure of Invention
The invention provides an ultra-wideband high-efficiency power amplifier based on a harmonic control network, which adopts a novel harmonic control circuit, completes the control of the secondary harmonic impedance of three frequency points in a frequency band by introducing a double-line structure, achieves the technical effect in the frequency band of 0.22G-1.54GHz, has the advantages of more than 60 percent of drain rate and more than 10dB gain, and has significance for the subsequent design of a multi-frequency-band high-efficiency power amplifier applicable to the frequency band of a new generation of communication system.
In the ultra-wideband power amplifier based on the novel harmonic control network, TL1 and TL2 form a third harmonic control microstrip network, and the purpose is to control third harmonic impedance of a central frequency band (set to be 1GHz) (the third harmonic impedance is initially set to be an open circuit, but actual subsequent tuning can be changed).
The introduction of T-shaped nodes consisting of three branches TL5, TL6 and TL7 leads the frequency point impedance of three frequency points 2GHz, 2.4GHz and 2.8GHz (1GHz, 1.2GHz and 1.4GHz double frequency) on the F2 surface to be in a short circuit state, and the impedance of the three frequency points is controlled at V through a double-line structure (TL3 and TL4)1The impedance condition of the transistor, and thus the transistor output terminal Z0The impedance form of the point, and then the control of the multi-frequency point second harmonic is completed (Z)0The second harmonic optimum impedance may be determined by a load pull method).
TL8, TL9, TL10 and TL11 are fundamental frequency matching parts, and the parameter determination method is as follows:
1. determined at Z by the load pull method0The optimal impedance range of the fundamental frequency at each frequency point is positioned;
2. according to the specific parameters of TL 1-TL 7, the method deduces the V-position of each frequency point2The optimal impedance condition of (c);
3. the approximate matching of each frequency point at V2 is carried out through microstrip lines of TL 8-TL 10.
The ultra-wideband power amplifier based on the novel harmonic control network has the advantages that:
(1) the design flow is simple, the knowledge in the aspect of complex algorithm is not involved, the harmonic control and the fundamental frequency impedance matching part are separated, and the design is convenient.
(2) The matching of multi-frequency point second harmonic impedance is carried out, and the overall efficiency on the frequency band is improved.
Drawings
Fig. 1 is an output matching schematic diagram of an ultra-wideband high-efficiency power amplifier based on a novel harmonic control network according to the invention.
Fig. 2 is a schematic diagram of the overall structure of the power amplifier designed by the invention.
Fig. 3 shows the drain efficiency, gain and output power of the power amplifier of the present invention as a function of frequency.
Fig. 4 is a plot of the parameter S (1,1) versus frequency.
Fig. 5 is a plot of the parameter S (2,1) versus frequency.
In the figure:
the numbers 1, … …, and 17 respectively indicate a first microstrip line TL, … …, a seventeenth microstrip line TL, which are abbreviated as TL1, … …, and TL17 in the specification, and the characteristic impedances corresponding to the microstrip lines TL1, … …, and TL17 are Z in order1,……,Z17Corresponding electrical lengths in order of theta1,……,θ17。
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings and examples.
The ultra-wideband high-efficiency power amplifier based on the novel harmonic control network adopts a novel harmonic control network technical means, improves the overall performance of the power amplifier by introducing a double-line structure, achieves the technical effect of higher efficiency and output power in a frequency band of 0.22GHz-1.54GHz, has the advantages of more than 60% of drain rate and bandwidth of more than 10dB gain, and has reference significance for subsequently designing a multi-frequency bandwidth high-efficiency power amplifier suitable for the frequency band of a new generation of communication system.
The invention provides an ultra-wideband high-efficiency power amplifier based on a novel harmonic control network, which is based on Advanced Design System (ADS) software of Agilent, wherein a transistor adopts CREE CGH40010F, a static working point is determined at a position where drain bias voltage Vds is 28V and gate bias voltage Vgs is-2.8V through Datasheet (a data table provided by a chip manufacturer), and drain current is 0.2A.
Fig. 1 shows an output matching schematic diagram of the power amplifier, wherein one end of the first microstrip line TL1 is connected to the drain end of the transistor, and the other end of the first microstrip line TL1 is connected to a two-wire structure composed of the second microstrip line TL2, the third microstrip line TL3, and the fourth microstrip line TL 4; one end of the second microstrip line TL2 is connected with a double-line structure consisting of the first microstrip line TL1, the third microstrip line TL3 and the fourth microstrip line TL4, and the other end of the second microstrip line TL2 keeps an open-circuit state; one end of the third microstrip line TL3 is connected with the first microstrip line TL1 and the second microstrip line TL2 respectively, and the other end of the third microstrip line TL3 is connected with a T-shaped section formed by the fifth microstrip line TL5, the sixth microstrip TL6 and the seventh microstrip TL 7; two ends of the fourth microstrip line TL4 are connected to two ends of the third microstrip line TL3, respectively; one end of a fifth microstrip line TL5 is connected with the T-shaped joint, and the other end of the fifth microstrip line TL5 is connected with a drain bias voltage Vds; a bypass capacitor is connected between the fifth microstrip line TL5 and the drain bias voltage Vds; one end of the sixth microstrip line TL6 is connected with the T-shaped joint, and the other end of the sixth microstrip line TL6 is open-circuited; one end of the seventh microstrip line TL7 is connected with the T-shaped joint, and the other end of the seventh microstrip line TL7 is open-circuited; one end of the eighth microstrip line TL8 is connected with the T-shaped section, and the other end of the eighth microstrip line TL8 is connected with the ninth microstrip line TL 9; one end of the ninth microstrip line TL9 is connected with the TL8, and the other end of the ninth microstrip line TL9 is connected with the tenth microstrip line TL 10; one end of the tenth microstrip line TL10 is connected with the TL9, and the other end of the tenth microstrip line TL10 is connected with the eleventh microstrip line TL 11; one end of the eleventh microstrip line TL11 is connected to the TL10, and the other end is connected to the dc blocking capacitor C3. The TL 8-TL 11 form a fundamental frequency matching part, a DC blocking capacitor C3 is connected with a 50-ohm load at an output end, and the port is defined as two ports.
As shown in fig. 2, which is a schematic diagram of the overall structure of the power amplifier, the input matching part includes TL12-TL 17. A twelfth microstrip line TL12, one end of which is connected to the gate terminal of the transistor and the other end of which is connected to a parallel circuit composed of a stabilizing resistor R2 and a stabilizing capacitor C1 (2.1 pF); the thirteenth microstrip line TL13, the stabilizing resistor R1, the TL14 and the TL15 form a cross-point, one end of the thirteenth microstrip line TL13 is connected with the cross-shaped joint, and the other end of the thirteenth microstrip line TL13 is connected with a parallel circuit formed by the stabilizing resistor R2(20 omega) and the stabilizing capacitor C1; a fourteenth microstrip line TL14, one end of which is connected to the cross joint and the other end of which is open-circuited; a fifteenth microstrip line TL15, one end of which is connected to the cross joint and the other end of which is connected to the input terminal of the C2 capacitor; TL16 is connected between the capacitance of C2 and TL15, and a DC blocking capacitance C2 is connected with the input end, and the port is defined as a port.
One end of a sixteenth microstrip line TL16 is connected with the TL15, and the other end of the sixteenth microstrip line TL16 is open-circuited; a seventeenth microstrip TL17, having one end connected to the ten bytes through a stabilizing resistor R1(75 Ω), and the other end connected to a gate bias Vgs. A bypass capacitor is connected between TL17 and the gate bias Vgs.
According to the ultra-wideband high-efficiency power amplifier based on the novel harmonic control network, as shown in fig. 1 and fig. 2, parameters of microstrip lines TL 1-TL 17 are designed according to the following steps:
step 1: through a load traction method in ADS software, the optimal values of 1GHz third harmonic impedance, 1GHz, 1.2GHz and 1.4GHz second harmonic impedance and the optimal values of 0.22-1.54GHz fundamental frequency matching are respectively determined.
Step 2: will the electrical length theta of TL22The preset value is 30 degrees @1GHz, the short circuit state is realized at the F1 surface for 3GHz through the microwave network theory, the third harmonic impedance is preset to be in the open circuit state, and therefore the TL1 electrical length theta is equal to1The preset value is 30 ° @1 GHz. The F1 plane is located between the second microstrip line TL2 and the first microstrip line TL 1.
And step 3: according to the ABCD matrix in the microwave network theory, for the matrix of the microwave network formed by TL1 and TL2, θ 1 and θ 2 are the electrical lengths of TL1 and TL2 corresponding to 1GHz, when f ═ i × f0There is sometimes the following relationship matrix:
wherein f is the frequency of the actual analysis, i is the ratio of the actual analysis frequency to the center frequency (1GHz), and f0Taking Z for a central frequency of 1GHz and Y11Inverse value of (Z)1And Z2Characteristic impedances of TL1 and TL2 respectively, i is taken according to analysis frequency points, j is a complex unit, Ai、Bi、Ci、DiRespectively representing two matrices MLine1And Mstub2And multiplying to obtain the value of each element corresponding to the new matrix. Mline1And Mstub2The first microstrip line TL1 and the second microstrip line TL2 correspond to ABCD matrices respectively.
Therefore, the impedance Z can be determined by carrying out load traction on the second harmonic0Further determining V1Corresponding impedance is obtained, and V is obtained by calculation1The second harmonic optimum impedance at three frequency points 1G, 1.2G and 1.4G.
As shown in FIG. 1, V1Is the impedance seen from in front of the third and fourth microstrip lines TL3, TL4 towards the output; z0Is the impedance seen from the transistor drain terminal towards the output terminal.
For a microwave network composed of microstrip lines TL3 and TL4, the ABCD matrix has the following expression: (ABCD matrix and matrix M for TL3 and TL4)line1Similarly):
θ3and theta4Electrical lengths of TL3 and TL4, Z, corresponding to 1GHz3And Z4Characteristic impedances of TL3 and TL4, respectively.
A3＝cosiθ3 B3＝j*Z3*siniθ3
C3＝j*Y3*siniθ3 D3＝cosiθ3
A4＝cosiθ4 B4＝j*Z4*siniθ4
C4＝j*Y4*siniθ4 D4＝cosiθ4
Assume that the impedance looking into the output load at port F2 is ZLAnd easily get:
the specific characteristic impedance Z of TL3 and TL4 can be determined by the impedance at V1 of 3 frequency points (1G, 1.2G and 1.4G) and the formula3、Z4And electrical length theta3、θ4。
And 4, step 4: the calculated impedance V is calculated and found through the formula (1) to the formula (3)1The real part of TL5 electrical length theta is small and almost negligible for convenience5The value is set to 90 DEG @1GHz, TL6 electrical length theta6The value is set to 45 DEG @1.2GHz, TL7 electrical length theta7The value is set to 45 DEG @1.4GHz, so that the determination of the second harmonic short circuit point of 3 frequency points at the F2 surface is convenient. As shown in FIG. 1, saidThe F2 plane is located before the fifth TL5 and sixth TL6 microstrip lines.
And 5: after determining parameters (characteristic impedance and electrical length) of TL 1-TL 7, V can be calculated through ABCD matrix of microwave network composed of seven microstrip lines2The fundamental frequency of the point (f) is the optimum impedance and ZoThe relationship between (same as formula 8), ZoThe fundamental frequency optimum impedance of (A) can be determined by load pulling, and then (V)2The optimum impedance at the fundamental frequency can be determined. As shown in FIG. 1, V2Is the impedance seen from before the eighth microstrip line TL8 towards the output.
Step 6: the parameter values (characteristic impedance and electrical length) of TL 8-TL 11 can be obtained by the optimal tuning of ADS software (which is the tuning function of ADS software), so that the values of all unknown parameters can be determined, as shown in table 1.
TABLE 1 Final determination of specific parameter values for output matching
| Z1(Ω) | Z2(Ω) | Z3(Ω) | Z4(Ω) | Z5(Ω) | Z6(Ω) |
| 64 | 34 | 80 | 72 | 55 | 76 |
| θ1(°) | θ2(°) | θ3(°) | θ4(°) | θ5(°) | θ6(°) |
| 36 | 30 | 67 | 56 | 90 | 45@1.2GHz |
| Z7(Ω) | Z8(Ω) | Z9(Ω) | Z10(Ω) | Z11(Ω) | |
| 80 | 32.6 | 26 | 41 | 34 | |
| θ7(°) | θ8(°) | θ9(°) | θ10(°) | θ11(°) | |
| 45@1.4GHz | 34 | 54 | 31 | 26 |
As shown in fig. 2: TL12-TL17 constitute an input matching section of the power amplifier, the stabilizing resistor R2 is 20 Ω, the stabilizing capacitor C1 is 2.1pF and the stabilizing resistor R1 is 75 Ω form a stabilizing circuit section, parameters of TL13-TL16 can be determined by the method of reference 1, TL17 is the gate bias length is 90 °, and specific parameters are shown in table 2 below.
TABLE 2 TL12-TL17 parameter values
| Z12(Ω) | Z13(Ω) | Z14(Ω) | Z15(Ω) | Z16(Ω) | Z17(Ω) |
| 35 | 27 | 80 | 30 | 65 | 95 |
| θ12(°) | θ13(°) | θ14(°) | θ15(°) | θ16(°) | θ17(°) |
| 39 | 76 | 25 | 60 | 40 | 90 |
As shown in FIG. 3, the curves of the gain, the drain efficiency and the output power of the power amplifier along with the frequency change show that the designed power amplifier can maintain a gain greater than 10dB and an efficiency greater than 60% in the frequency range of 0.22GHz to 1.54 GHz.
As shown in FIG. 4, the return loss varies with frequency, and S (1,1) is below-5 db in the 450MHz-1.35GHz frequency band, which indicates that better broadband matching is achieved.
According to fig. 5, the insertion loss varies with the frequency, and it can be seen that the insertion loss S (2,1) is maintained at 15dB or more in the 0.22GHz-1.54GHz band, which satisfies the requirement that the target power amplifier obtains a high gain.
The three groups of curves show that the power amplifier designed by the invention has more excellent performance indexes in the ultra-wide frequency band of 0.22GHz-1.54 GHz.
Reference 1: ma, Y.Liu, W.Pan, and Y.Tang "0.4-3.0 GHz high hly effective-tuned power amplifier" Electron.Lett., vol.51, No.23, pp.1911-1913, Nov.2015.
Claims (1)
1. An ultra-wideband high-efficiency power amplifier based on a harmonic control network is provided with an input matching part and an output matching part;
the method is characterized in that:
the output matching section comprises eleven microstrip lines, wherein:
one end of the first microstrip line TL1 is connected with the drain end of the transistor, and the other end of the first microstrip line TL1 is respectively connected with one end of the second microstrip line TL2 and a double-line structure consisting of the third microstrip line TL3 and the fourth microstrip TL 4; TL1 impedance is 64 Ω and electrical length is 36 °;
one end of the second microstrip line TL2 is connected with the other end of the first microstrip line TL1, and the two-wire structure consisting of the third microstrip line TL3 and the fourth microstrip line TL4 is connected, and the other end of the second microstrip line TL2 is kept in an open-circuit state; TL2 impedance of 34 omega and electrical length of 30°；
One end of a third microstrip line TL3 is connected with the other end of the first microstrip line TL1, one end of the second microstrip line TL2 and one end of a fourth microstrip line TL4 respectively, the other end of the third microstrip line TL3 is connected with the other end of the fourth microstrip line TL4, one end of a fifth microstrip TL5, one end of a sixth microstrip TL6, one end of a seventh microstrip TL7 and one end of an eighth microstrip TL8 respectively, and the fifth microstrip TL5, the sixth microstrip TL6 and the seventh microstrip TL7 form a T-shaped section; TL3 impedance of 80 omega and electrical length of 67°；
Two ends of the fourth microstrip line TL4 are connected to two ends of the third microstrip line TL3, respectively; the other end of the fourth microstrip line TL4 is also connected to one end of a fifth microstrip line TL5, one end of a sixth microstrip TL6, one end of a seventh microstrip line TL7 and one end of an eighth microstrip line TL8, respectively; TL4 impedance of 72 omega and electrical length of 56°；
One end of a fifth microstrip line TL5 is respectively connected with the other end of the third microstrip line TL3, the other end of the fourth microstrip line TL4, one end of a sixth microstrip TL6, one end of a seventh microstrip TL7 and one end of an eighth microstrip TL8, and the other end of the fifth microstrip TL5 is connected with a drain bias voltage Vds; a bypass capacitor is connected between the fifth microstrip line TL5 and the drain bias voltage Vds; TL5 impedance of 55 omega and electrical length of 90°The resonance frequency point is at 1 GHz;
one end of a sixth microstrip line TL6 is connected to the other end of the third microstrip line TL3, the other end of the fourth microstrip line TL4, one end of the fifth microstrip line TL5, one end of the seventh microstrip line TL7 and one end of the eighth microstrip line TL8, respectively, and the other end of the sixth microstrip line TL6 is open-circuited; TL6 impedance of 76 omega and electrical length of 45°The resonance frequency point is at 1.2 GHz;
one end of a seventh microstrip line TL7 is connected to the other end of the third microstrip line TL3, the other end of the fourth microstrip line TL4, one end of the fifth microstrip line TL5, one end of the sixth microstrip line TL6 and one end of the eighth microstrip line TL8, respectively, and the other end of the seventh microstrip line TL7 is open-circuited; TL7 impedance of 80 omega and electrical length of 45°The resonance frequency point is at 1.4 GHz;
one end of an eighth microstrip line TL8 is connected to the other end of the third microstrip line TL3, the other end of the fourth microstrip line TL4, one end of the fifth microstrip line TL5, one end of the sixth microstrip line TL6 and one end of the seventh microstrip line TL7, and the other end of the eighth microstrip line TL8 is connected to one end of the ninth microstrip line TL 9; TL8 impedance of 32.6 omega and electrical length of 34°；
One end of a ninth microstrip line TL9 is connected with the other end of the TL8, and the other end of the ninth microstrip line TL9 is connected with one end of a tenth microstrip line TL 10; TL9 impedance of 26 omega and electrical length of 54°；
One end of a tenth microstrip line TL10 is connected to the other end of the TL9, and the other end of the tenth microstrip line TL10 is connected to one end of an eleventh microstrip line TL 11; TL10 impedance of 41 omega and electrical length of 31°；
One end of an eleventh microstrip line TL11 is connected with the other end of the TL10, and the other end of the eleventh microstrip line TL11 is connected with one end of a DC blocking capacitor C3; TL11 impedance of 34 omegaElectrical length of 26°；
The TL 8-TL 11 form a fundamental frequency matching part, and the other end of the blocking capacitor C3 is connected with a load of 50 omega at an output end;
the input matching section comprises six microstrip lines, wherein:
the other end of the twelfth microstrip line TL12 is connected with the gate end of the transistor, one end of the twelfth microstrip line TL12 is respectively connected with the other end of the stabilizing resistor R2 and the other end of the stabilizing capacitor C1, and the stabilizing resistor R2 and the stabilizing capacitor C1 form a parallel circuit; TL12 impedance of 35 omega and electrical length of 39°；
The other end of the thirteenth microstrip line TL13 is connected to one end of the stabilizing resistor R2 and one end of the stabilizing capacitor C1, respectively, and one end of the thirteenth microstrip line TL13 is connected to one end of the fourteenth microstrip line TL14, the other end of the fifteenth microstrip line TL15 and one end of the stabilizing resistor R1, respectively; the stabilizing resistor R1, the thirteenth microstrip line TL13, the fourteenth microstrip line TL14 and the fifteenth microstrip line TL15 form ten bytes; TL13 impedance of 27 omega and electrical length of 76°；
One end of a fourteenth microstrip line TL14 is connected to one end of a thirteenth microstrip line TL13, the other end of a fifteenth microstrip line TL15 and one end of a stabilizing resistor R1, respectively, and the other end of the fourteenth microstrip line TL14 is open-circuited; TL14 has an impedance of 80 omega and an electrical length of 25°；
The other end of the fifteenth microstrip line TL15 is connected to one end of a thirteenth microstrip line TL13, one end of a fourteenth microstrip line TL14 and one end of a stabilizing resistor R1, respectively, and one end of the fifteenth microstrip line TL15 is connected to the other end of a dc blocking capacitor C2 and one end of a sixteenth microstrip line TL16, respectively; a sixteenth microstrip line TL16 is connected between the other end of the DC blocking capacitor C2 and the fifteenth microstrip line TL15, and one end of the DC blocking capacitor C2 is connected with the input end; TL15 impedance of 30 omega and electrical length of 60°；
One end of a sixteenth microstrip line TL16 is connected with one end of a fifteenth microstrip line TL15 and the other end of the DC blocking capacitor C2, and the other end of the sixteenth microstrip line TL16 is open-circuited; TL16 impedance of 65 omega and electrical length of 40°；
One end of the seventeenth microstrip line TL17 is connected toThe other end of the fixed resistor R1 is connected, and the other end of the seventeenth microstrip line TL17 is connected with a gate bias Vgs; a bypass capacitor is connected between the seventeenth microstrip line TL17 and the gate bias Vgs; the seventeenth microstrip line TL17 has an impedance of 95 Ω and an electrical length of 90 Ω°；
The first microstrip line TL1 and the second microstrip line TL2 form a third harmonic control microstrip network;
the ultra-wideband high-efficiency power amplifier based on the harmonic control network has a static operating point at drain bias voltage Vds =28V, gate bias voltage Vgs = -2.8V, and drain current = 0.2A.
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| 滤波微波器件基础理论及技术研究;张博;《中国博士学位论文全文数据库 信息科技辑》;20180915(第9期);正文第48至50页 * |
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| CN110324014A (en) | 2019-10-11 |
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