CN110321258A - A kind of bus test method, system and test terminal, CPLD - Google Patents
A kind of bus test method, system and test terminal, CPLD Download PDFInfo
- Publication number
- CN110321258A CN110321258A CN201910464999.8A CN201910464999A CN110321258A CN 110321258 A CN110321258 A CN 110321258A CN 201910464999 A CN201910464999 A CN 201910464999A CN 110321258 A CN110321258 A CN 110321258A
- Authority
- CN
- China
- Prior art keywords
- test
- cpld
- bus
- sent
- test data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 333
- 238000010998 test method Methods 0.000 title claims abstract description 14
- 238000004891 communication Methods 0.000 claims abstract description 86
- 238000003860 storage Methods 0.000 claims abstract description 54
- 230000005540 biological transmission Effects 0.000 claims abstract description 6
- 238000010586 diagram Methods 0.000 description 11
- 238000000034 method Methods 0.000 description 6
- 238000013461 design Methods 0.000 description 3
- 238000000605 extraction Methods 0.000 description 2
- 230000003993 interaction Effects 0.000 description 2
- 230000006399 behavior Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 210000004556 brain Anatomy 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/263—Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
The embodiment of the present invention provides a kind of bus test method, system and test terminal, CPLD, by the way that the first communication component and storage assembly is arranged in test terminal, second communication component, control assembly and bus interface component are set in CPLD, it tests terminal and control instruction is sent to by CPLD by the first communication component, CPLD is allowed to carry out test configurations；And the first test data is sent to CPLD, allow CPLD to be sent to device under test, on the other hand, CPLD can also receive the second test data of device under test transmission, and be transmitted to test terminal, and test terminal is allowed to store the second test data.Since how CPLD carries out what the first test data that data transmit-receive and CPLD are sent to testing data can be determined by test terminal during bus test, improve the flexibility of bus test scheme.
Description
Technical field
The present invention relates to electronic technology field more particularly to a kind of bus test methods, system and test terminal, CPLD.
Background technique
PLD (Programmable Logic Device, programmable logic device) is used as ASIC (Application
Specific Integrated Circuit, specific integrated circuit) one of field semi-custom circuit, key advantage be
Circuit can be modified as needed in the design phase, until pleasing oneself to design work.Once design is completed, can be immediately
It puts into production, it is only necessary to which the PLD of quantity required for simply being programmed using final software design document can.
In general, being all directly to be directly realized by corelation behaviour in CPLD on piece logic when carrying out bus test.For example, logical
It crosses and CPLD is programmed, to determine the strategy of itself and bus side progress data transmit-receive using the program in CPLD, and pre-
First the CPLD data for needing to be sent in bus are stored in CPLD, CPLD is allowed directly to be determined according to program in bus test
Strategy the test data of storage is sent to bus.Obviously, this bus test scheme needs to be programmed CPLD, not enough
Flexibly, it meanwhile, is also stored in advance in CPLD because of the data sent to bus, it is inconvenient in bus test
Change, and then cause bus test process to ossify and fix, tests the problem of flexibility difference.
Summary of the invention
Bus test method provided by the invention, system and test terminal, CPLD, main technical problems to be solved are:
Solve the problems, such as that existing bus test scheme is inflexible.
In order to solve the above technical problems, the present invention provides a kind of test terminal, test terminal include the first communication component with
Storage assembly, the first communication component are used to communicate to connect with the second communication component of complex programmable logic device (CPLD)；CPLD
It further include bus interface component, and the control assembly being connect respectively with the second communication component, bus interface assembly communication, bus
Interface module is used to communicate to connect by bus and device under test；
First communication component is used to for control instruction and the first test data being sent to the second communication component of CPLD, control
Instruction is used to indicate control assembly and carries out test configurations, and the first test data is sent to device under test by bus for CPLD；
First communication component be also used to receive CPLD transmission the second test data, and by the second test data be sent to storage assembly into
Row storage, the second test data are sent to CPLD by bus by device under test.
Optionally, storage assembly includes the first storage location and the second storage location, and the first storage location is for storing control
System instruction and the first test data；Second storage location is for storing the second test data.
Optionally, the first communication component and the second communication component are communicated to connect by serial mode.
Optionally, test terminal further includes display component, and display component is for being shown the second test data.
It include control assembly the present invention also provides a kind of CPLD, CPLD, and the with control assembly communication connection respectively
First communication component of two communication components and bus interface component, the second communication component and test terminal communicates to connect, bus
Interface module is connect with device under test by bus communication；
Control assembly is used to realize test configurations, root from received control instruction from test terminal according to the second communication component
Data transmit-receive strategy is determined according to test configurations；And the second communication component is controlled after configuration is complete and receives test terminal is sent the
First test data is sent to device under test by one test data and control bus interface module；Control assembly is also used to control
Bus interface component processed receives the second test data that device under test is sent, and will control the second communication component and test number for second
According to being sent to test terminal.
Optionally, the second communication component and the first communication component are communicated to connect by serial mode.
The present invention also provides a kind bus test methods, comprising:
Test terminal is used to indicate CPLD to CPLD transmission and carries out test configurations control instruction；
It tests terminal and sends the first test data to CPLD, the first test data is sent to for CPLD by bus to be measured
Device；
It tests terminal and receives the second test data that CPLD is sent, the second test data is sent by device under test by bus
To CPLD；
Test terminal stores the second test data.
Optionally, after the second test data that test terminal reception CPLD is sent, further includes:
Test terminal is shown the second test data.
The present invention also provides a kind of bus test methods, comprising:
CPLD receives the control instruction for being used to indicate test configurations that test terminal is sent；
CPLD completes test configurations according to control instruction, determines data transmit-receive strategy according to test configurations；
CPLD receives the first test data that test terminal is sent, and the first test data is sent to by bus to be measured
Device；
CPLD receives device under test and is sent through the bus the second test data, and by the second test data by being sent to
Test terminal.
The beneficial effects of the present invention are:
Bus test method, system and the test terminal, CPLD provided according to embodiments of the present invention, by test terminal
The first communication component of middle setting and storage assembly, are arranged the second communication component, control assembly and bus interface group in CPLD
Part realizes the communication between test terminal and CPLD using the first communication component and the second communication component, passes through bus interface group
Part realizes that the bus between CPLD and device under test connects.Test terminal can be sent control instruction by the first communication component
To CPLD, CPLD is allowed to carry out test configurations, so that CPLD determination be allowed how to carry out data transmit-receive work during bus test.
It after CPLD completes test configurations, tests terminal and the first test data is sent to CPLD, allow CPLD by the first test data
It is sent to device under test, on the other hand, CPLD can also receive the second test data that device under test is sended over by bus, and
Second test data is sent to test terminal by the second communication component, test terminal is allowed to deposit the second test data
Storage.Since how CPLD carries out the first test that data transmit-receive and CPLD are sent to testing data during bus test
What data can be determined by test terminal, therefore, improve the flexibility of bus test scheme.
Detailed description of the invention
Fig. 1 is a kind of structural schematic diagram of the bus testing system provided in the embodiment of the present invention one；
Fig. 2 is a kind of structural schematic diagram of the test terminal provided in the embodiment of the present invention one；
Fig. 3 is a kind of structural schematic diagram of the CPLD provided in the embodiment of the present invention one；
Fig. 4 is another structural schematic diagram of the bus testing system provided in the embodiment of the present invention one；
Fig. 5 is another structural schematic diagram of the test terminal provided in the embodiment of the present invention one；
Fig. 6 is another structural schematic diagram of the test terminal provided in the embodiment of the present invention one；
Fig. 7 is a kind of interaction diagrams of the bus test method provided in the embodiment of the present invention two.
Specific embodiment
The embodiment of the present invention is described in further detail below by specific embodiment combination attached drawing.
Embodiment one:
It fixes, leads to solve the data transmit-receive mode of CPLD and the test data of transmission in existing bus test scheme
The problem of causing bus test scheme regular and rigid, the present embodiment provides a kind of bus test schemes, referring firstly to shown in fig. 1
The structural schematic diagram of bus testing system:
Bus testing system 1 includes test terminal 10, CPLD 20 and device under test 30, and wherein CPLD 20 is respectively the same as survey
It tries terminal 10 and device under test 30 communicates to connect.Optionally, device under test 30 is connect with CPLD 20 by bus communication.
In the present embodiment, the bus interface operating mode of CPLD 20 does not determine at the beginning, but needs basis
Terminal 10 is tested to determine its test configurations.Namely how CPLD 20 with device under test 30 carries out data transmit-receive and CPLD
20 can to device under test 30 send which kind of test data not be it is fixed, determined by 10 side of test terminal.In the present embodiment
In a kind of example, testing includes storage assembly 11 and the first communication component 12 in terminal 10, as shown in Figure 2.First communication set
Control instruction can be sent to CPLD 20 by part 12, and CPLD 20 is allowed to complete test configurations according to control instruction.It should be understood that
It is that control instruction is not specific a certain kind, and can be and be arranged and stored in any control therein by test job personnel
System instruction, different control instructions can carry out different configurations to CPLD 20, so that CPLD 20 is with different buses
Bus interworking is carried out between interfaces mode and device under test 30.In addition, the first communication component 12 can also be for reality
Existing CPLD 20 is interacted with other tested between terminal 10, such as the first test data is sent to CPLD 20, and receive
The second test data that CPLD 20 is sent, and the second test data is sent to storage assembly 11, allow storage assembly 11 to second
Test data is stored.
In some examples of the present embodiment, the first communication component 12 is sent to the control instruction and/or of CPLD 20
One test data can be the extraction from storage assembly 11 obtains namely storage assembly 11 and be applied not only to the second test of storage
Data can also be for storage at least one of the first test data and control instruction.Certainly, in some of the present embodiment
In example, test terminal 10 further includes input module (such as keyboard, touch screen etc.), and tester can pass through input module
To test 10 input control of terminal instruction or the first test data, test terminal 10 by input module receive control instruction it
Afterwards, the first communication component 12 can be directly controlled, control instruction is sent to CPLD 20, so that CPLD 20 completes test configurations.
In the other example of the present embodiment, after test terminal 10 gets control instruction, storage assembly pair can be first allowed
Control instruction is stored, and then, is deposited when needing to carry out test configurations to CPLD 20, then by the extraction of the first communication component 12
The control instruction that storage component 11 stores is sent.For the first test data, when test terminal 10 gets the first test number
According to rear, first first it can be stored by storage assembly 11, when CPLD 20 completes test configurations and then by the first test
Data are sent to CPLD 20.Alternatively, the first survey can also be inputted in real time when needing to send the first test data by tester
Data are tried, the first test data of input is then sent in real time by CPLD 20 by the first communication component 12.
Incorporated by reference to the another of the bus testing system 1 shown in a kind of structural schematic diagram and Fig. 4 of the CPLD 20 shown in Fig. 3
A kind of structural schematic diagram: including the second communication component 21 and control assembly 22, bus interface component 23 in CPLD 20, wherein
Second communication component 21 is used to be communicatively coupled with the first communication component 11 in test terminal 10, in some of the present embodiment
In example, communicated between the second communication component 21 and the first communication component 12 based on serial mode.So the first communication
Component 12 and the second communication component 21 all can be Serial Interface Components.Certainly, those skilled in the art are it is to be understood that
Communication mode between one communication component 12 and the second communication component 21 includes but is not limited to serial communication mode, also be can also be
Other any feasible communication modes.Control assembly 22 in CPLD 20 is received for obtaining the second communication component 21
Control instruction, and control instruction is parsed, to obtain bus interface configuration information, and is configured according to the bus interface
Information realization test configurations determine the bus interface operating mode of oneself.In addition, control assembly 22 complete test configurations it
Afterwards, control assembly 22, can control bus after the second communication component 21 flanks from test terminal 10 and receives the first test data
First test data is sent to device under test 30 by bus by interface module 23, and certainly, bus interface component 23 is to device to be measured
Working frequency, the timing etc. that part 30 sends data are all based on test configurations and determine.
On the other hand, device under test 30 also can send the second test data to CPLD 20 by bus, in control assembly 22
Control under, bus interface component 23 will receive the second test data that device under test 30 sends over from bus, so
After control the second communication component 21 by the second test data be sent to test terminal 10.
It, can after first communication component 12 of test terminal 10 receives the second test data that CPLD 20 is sended over
The second test data is sent to storage assembly 11, storage assembly 11 is allowed to store the second test data.In this implementation
Example some examples in, as shown in Figure 5: in storage assembly 11 include the first storage assembly 111 and the second storage assembly 112,
Wherein, the first storage assembly 111 can be used for control store instruction and the first test data, and the second storage assembly 112 is for depositing
Store up the second test data.It is understood that the first storage assembly 111 and the second storage assembly 112 can be two individually
Memory device, namely be physically two independent devices；In the other example of the present embodiment, the first storage group
Part 111 is also possible to belong to two different storage locations in a memory from the second storage assembly 112.
It should be understood that the second test data that test terminal 10 receives is for bus test, therefore, second
Test data is not only to need stored data, tester should be also exposed to, so that tester determines whether
There are failures.In some examples of the present embodiment, test terminal 10 can show the second test number by external instrument
According to.But, in some examples of the present embodiment, test terminal 10 further includes display component, as shown in fig. 6, display component
13 can read the second test data in the second storage assembly 112, and be shown to the second test data.It needs to illustrate
It is that display component 13 can directly display the numerical value of the second test data, the second test data can also be patterned place
Tester is showed after reason.
By the way that display component 13 is arranged in test terminal 10, it is able to solve the second test number in existing bus test scheme
The problem of according to that can only be returned to CPLD 20, cause tester that can not intuitively understand the second test data, facilitates test
Personnel understand bus test result.In some examples, test terminal 10 can be PC (personal computer), such as desktop
Brain, laptop and tablet computer etc..
Test terminal, CPLD and bus testing system provided in this embodiment, by being added in bus testing system
Terminal is tested, test configurations are carried out to CPLD by test terminal, is programmed so as to avoid to CPLD, leads to the test of CPLD
Process ossifys, it is difficult to the problem of changing；Simultaneously as the first test data is to be sent to CPLD by testing terminal side, therefore,
First test data can be edited by tester, it is not necessary to be limited only to be stored in advance in the data in CPLD.
Further, since test terminal can also show CPLD the second test data sent, solution
The problem of tester can not intuitively understand the second test data numerical value in existing bus test scheme of having determined simplifies bus survey
Examination process improves the intuitive of bus test result displaying.
Embodiment two:
The present embodiment will provide a kind of bus test method, refer to test terminal, CPLD and device to be measured shown in Fig. 7
A kind of interaction diagrams that bus test is carried out between part, in combination with Fig. 1-6:
S702: test terminal is used to indicate CPLD to CPLD transmission and carries out test configurations control instruction.
In the present embodiment, test terminal sends control instruction to CPLD by the first communication component, in the present embodiment
In some examples, the control instruction that test terminal is sent is arranged by tester.First communication component is by control instruction
CPLD is sent to by serial ports.
S704:CPLD completes test configurations according to control instruction.
The second communication component in CPLD, which receives, to be come after the control instruction of self-test terminal, can send control instruction
To control assembly, control instruction is parsed by control assembly, so that it is determined that bus interface configuration information, then according to bus
Interface configuration information completes test configurations.It should be understood that control assembly is just able to determine how after completing test configurations
Control bus interface module and device under test carry out bus data and receive and dispatch, frequency, data transmit-receive including determining data transmit-receive
Timing etc..
S706: test terminal sends the first test data to CPLD.
After CPLD completes test configurations, test terminal will send the first test data, the first test number to CPLD
It is determined according to can be to be arranged by tester, it should be appreciated that in some examples of the present embodiment, tester can be with
It first determines the first test data, and first the first test data is stored by storage assembly.Test configurations are completed in CPLD
Later, the first communication component tested in terminal will extract the first test data from storage assembly, and be sent out by serial ports
Give CPLD.
First test data is sent to device under test by bus by S708:CPLD.
After CPLD completes test configurations, the second communication component will receive the first test data from test terminal side, with
Afterwards control assembly will control bus interface module the first test data is sent to device under test, certainly, bus by bus
Interface module is all based on test configurations to working frequency, the timing etc. that device under test sends data and determines.
S710:CPLD receives device under test and is sent through the bus the second test data.
Device under test also can send the second test data to CPLD by bus, and under the control of control assembly, bus is connect
Mouth component will receive the second test data that device under test sends over from bus.
Second test data is sent to test terminal by S712:CPLD.
After bus interface component receives the second test data, control assembly controls the second communication component and surveys second
Examination data are sent to test terminal.In the case that the second communication component and the first communication component are by serial communication, second is logical
Believe that component will send the second test data to test terminal by serial communication mode.
S714: test terminal storage simultaneously shows the second test data.
It, can be by second after first communication component of test terminal receives the second test data that CPLD is sended over
Test data is sent to storage assembly, and storage assembly is allowed to store the second test data.
In some examples of the present embodiment, test terminal is to the storage of the first test data and the second test data
Separation, wherein the first test data and control instruction are stored in the first storage assembly, and the second test data is then stored in
In second storage assembly.First storage assembly and the second storage assembly can be two physically independent memory devices,
It is also possible to belong to two different storage locations in a memory.
In some examples of the present embodiment, test terminal further includes display component, is received in the first communication component
First display component can read the second test data in the second storage assembly, and be shown to the second test data.It needs
It is noted that display component can directly display the numerical value of the second test data, the second test data can also be subjected to figure
Tester is showed after shapeization processing.
Bus test method provided in this embodiment carries out test configurations to CPLD by test terminal, so as to avoid
CPLD is programmed, causes the test process of CPLD to ossify, it is difficult to the problem of changing；Simultaneously as the first test data is
It is sent to CPLD by testing terminal side, therefore, the first test data can be edited by tester, it is not necessary to be limited only to pre-
The data being first stored in CPLD.Since test terminal can also show CPLD the second test data sent,
Solve the problems, such as that tester can not intuitively understand the second test data numerical value in existing bus test scheme, simplify bus
Test process improves the intuitive of bus test result displaying.
It should be understood that in the absence of conflict, the feature in the present invention embodiment can be applied in combination.
Obviously, those skilled in the art should be understood that each module of the embodiments of the present invention or each step can be used
General computing device realizes that they can be concentrated on a single computing device, or be distributed in multiple computing device institutes
On the network of composition, optionally, they can be realized with the program code that computing device can perform, it is thus possible to by them
It is stored in computer storage medium (ROM/RAM, magnetic disk, CD) and is performed by computing device, and in some cases, it can
With the steps shown or described are performed in an order that is different from the one herein, or they are fabricated to each integrated circuit dies
Block, or single integrated circuit module is maked multiple modules or steps in them to realize.So the present invention does not limit
It is combined in any specific hardware and software.
The above content is combining specific embodiment to be further described to made by the embodiment of the present invention, cannot recognize
Fixed specific implementation of the invention is only limited to these instructions.For those of ordinary skill in the art to which the present invention belongs,
Without departing from the inventive concept of the premise, a number of simple deductions or replacements can also be made, all shall be regarded as belonging to the present invention
Protection scope.
Claims (10)
1. a kind of test terminal, which is characterized in that the test terminal include the first communication component and storage assembly, described first
Communication component is used to communicate to connect with the second communication component of complex programmable logic device (CPLD)；The CPLD further includes bus
Interface module, and the control assembly connecting respectively with second communication component, bus interface assembly communication, the bus connect
Mouth component is used to communicate to connect by bus and device under test；
First communication component is used to for control instruction and the first test data being sent to the second communication component of the CPLD,
The control instruction is used to indicate the control assembly and carries out test configurations, and first test data passes through for the CPLD
Bus is sent to the device under test；First communication component is also used to receive the second test data that the CPLD is sent,
And second test data is sent to the storage assembly and is stored, second test data is by the device under test
The CPLD is sent to by bus.
2. test terminal as described in claim 1, which is characterized in that the storage assembly includes the first storage location and second
Storage location, first storage location is for storing the control instruction and first test data；Second storage
Position is for storing second test data.
3. test terminal as described in claim 1, which is characterized in that first communication component and second communication component
It is communicated to connect by serial mode.
4. test terminal as described in any one of claims 1-3, which is characterized in that the test terminal further includes display group
Part, the display component is for being shown second test data.
5. a kind of CPLD, which is characterized in that the CPLD includes control assembly, and is communicated to connect respectively with the control assembly
The second communication component and bus interface component, first communication component of second communication component and test terminal is logical
Letter connection, the bus interface component are connect with device under test by bus communication；
The control assembly is used for the received control instruction realization survey from the test terminal according to second communication component
Trial is set, and determines data transmit-receive strategy according to the test configurations；And second communication component is controlled after configuration is complete and is connect
The first test data that the test terminal is sent is received, and the control bus interface component sends out first test data
Give the device under test；The control assembly is also used to control the bus interface component and receives what the device under test was sent
Second test data, and second communication component will be controlled, second test data is sent to the test terminal.
6. CPLD as claimed in claim 5, which is characterized in that second communication component passes through with first communication component
Serial mode communication connection.
7. a kind of bus testing system, which is characterized in that tested eventually including device under test, as described in claim any one of 1-4
End and CPLD described in claim 5 or 6.
8. a kind of bus test method characterized by comprising
Test terminal is used to indicate the CPLD to CPLD transmission and carries out test configurations control instruction；
The test terminal sends the first test data to the CPLD, and first test data passes through total for the CPLD
Line is sent to device under test；
The test terminal receives the second test data that the CPLD is sent, and second test data is by the device under test
The CPLD is sent to by bus；
The test terminal stores second test data.
9. bus test method as claimed in claim 8, which is characterized in that the test terminal receives the CPLD hair
After the second test data sent, further includes:
The test terminal is shown second test data.
10. a kind of bus test method characterized by comprising
CPLD receives the control instruction for being used to indicate test configurations that test terminal is sent；
The CPLD completes test configurations according to the control instruction, determines data transmit-receive strategy according to the test configurations；
The CPLD receives the first test data that the test terminal is sent, and first test data is sent out by bus
Give device under test；
The CPLD receives the device under test and is sent through the bus the second test data, and second test data is led to
It crosses and is sent to the test terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910464999.8A CN110321258A (en) | 2019-05-30 | 2019-05-30 | A kind of bus test method, system and test terminal, CPLD |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910464999.8A CN110321258A (en) | 2019-05-30 | 2019-05-30 | A kind of bus test method, system and test terminal, CPLD |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110321258A true CN110321258A (en) | 2019-10-11 |
Family
ID=68119349
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910464999.8A Pending CN110321258A (en) | 2019-05-30 | 2019-05-30 | A kind of bus test method, system and test terminal, CPLD |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110321258A (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6035263A (en) * | 1997-06-05 | 2000-03-07 | Samsung Electronics Co., Ltd. | Device for testing product using communication ports of personal computer |
| CN1924823A (en) * | 2006-09-29 | 2007-03-07 | 北京中星微电子有限公司 | Method and system for testing chip |
| CN102567156A (en) * | 2010-12-31 | 2012-07-11 | 鸿富锦精密工业（深圳）有限公司 | Test set for server hard disk backplane |
| CN105866662A (en) * | 2016-05-24 | 2016-08-17 | 佰电科技(苏州)有限公司 | Printer touch screen function testing device |
| CN109144932A (en) * | 2018-08-03 | 2019-01-04 | 中国航空工业集团公司雷华电子技术研究所 | A kind of device and method of the quick dynamic configuration FPGA based on DSP |
-
2019
- 2019-05-30 CN CN201910464999.8A patent/CN110321258A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6035263A (en) * | 1997-06-05 | 2000-03-07 | Samsung Electronics Co., Ltd. | Device for testing product using communication ports of personal computer |
| CN1924823A (en) * | 2006-09-29 | 2007-03-07 | 北京中星微电子有限公司 | Method and system for testing chip |
| CN102567156A (en) * | 2010-12-31 | 2012-07-11 | 鸿富锦精密工业（深圳）有限公司 | Test set for server hard disk backplane |
| CN105866662A (en) * | 2016-05-24 | 2016-08-17 | 佰电科技(苏州)有限公司 | Printer touch screen function testing device |
| CN109144932A (en) * | 2018-08-03 | 2019-01-04 | 中国航空工业集团公司雷华电子技术研究所 | A kind of device and method of the quick dynamic configuration FPGA based on DSP |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102035673B (en) | Fiber channel-based general automatic test system | |
| CN103631688A (en) | Method and system for testing interface signal | |
| CN109408468A (en) | Document handling method and device calculate equipment and storage medium | |
| CN111176984A (en) | Signal-oriented automatic test implementation method | |
| CN109839548A (en) | Interface test method, apparatus and system | |
| WO2017148221A1 (en) | Transmission control method, apparatus and system for serial peripheral interface | |
| CN103246588A (en) | Controller and implementation method for self-checking serial bus | |
| CN108628712A (en) | A kind of applied program testing method and terminal device | |
| CN109062820A (en) | A kind of software performance testing method and device | |
| CN111693294A (en) | Vehicle detection method and device, terminal equipment and storage medium | |
| CN107632910A (en) | A kind of method of testing and device | |
| CN109885327A (en) | A kind of method and device upgrading CPLD | |
| CN110321258A (en) | A kind of bus test method, system and test terminal, CPLD | |
| CN117193249A (en) | Complex avionics system test and integrated verification platform | |
| CN100403254C (en) | Computer and graphic card detachably connected thereto | |
| CN116257037A (en) | Method, system, electronic device and storage medium for generating controller test program | |
| US7076739B2 (en) | Data computation apparatus and method for using the data computation apparatus for adjustment of electronic controller | |
| CN115758987A (en) | Video input interface verification system and verification method | |
| CN114660383A (en) | Universal ground detection test board card for load manager | |
| US8635567B1 (en) | Electronic design automation tool for guided connection assistance | |
| CN113985374A (en) | Test platform and test method for radar system | |
| CN107153376A (en) | A kind of electronic controller | |
| US20080281549A1 (en) | Test Apparatus for Control Unit, Pattern Signal Creating Apparatus, and Test Program Generating Apparatus | |
| CN106685588A (en) | Adapter, data transmission system and method | |
| US9342641B1 (en) | Configuration of logic analyzer using graphical user interface |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20191011 |