CN110287030B - Memory use method and device - Google Patents

Memory use method and device Download PDF

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Publication number
CN110287030B
CN110287030B CN201910579175.5A CN201910579175A CN110287030B CN 110287030 B CN110287030 B CN 110287030B CN 201910579175 A CN201910579175 A CN 201910579175A CN 110287030 B CN110287030 B CN 110287030B
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address range
memory
address
processing unit
sub
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CN110287030A (en
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何晓明
刘硕
李峰
宋炳雨
许晓梦
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Weichai Power Co Ltd
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Weichai Power Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory

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  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Devices For Executing Special Programs (AREA)

Abstract

The embodiment of the application provides a memory use method and a memory use device, wherein the method comprises the following steps: acquiring a total address range of a memory allocated by a processing unit; acquiring each sub-address range corresponding to a compiling file when a code is compiled; determining the utilization rate of the memory by the processing unit according to the total address range and each sub-address range corresponding to the compiled file; and using the unused memory in the memory according to the utilization rate. The utilization rate of the memory of the processing unit obtained by the embodiment of the application is more accurate, the unused memory in the memory is used according to the utilization rate of the memory allocated by the processing unit, the reasonable allocation of the memory of the processing unit can be realized, and the utilization rate of the memory of the processing unit is improved.

Description

Memory use method and device
Technical Field
The present invention relates to computer technologies, and in particular, to a method and an apparatus for using a memory.
Background
With the rapid development of the computer field, the role of data storage in the field is increasing. There is a great deal of interest in the efficient use of chip storage resources.
The method for counting the utilization rate of the chip memory resources mainly comprises the steps of reading the last address of the used chip memory resources from a compiled file generated by compiling, subtracting the first address of the chip memory resources to obtain the used chip memory resources, and obtaining the utilization rate of the chip memory resources according to the used chip memory resources and unused chip memory resources.
The address of the variable in the memory of the compiler usually needs to be aligned with the byte length of the variable during the compilation, so that the staggered definition of the variables with different byte lengths may cause discontinuous addresses allocated to the variable by the compiler, and therefore, the method for acquiring the utilization rate of the chip memory resource is not accurate.
Disclosure of Invention
The embodiment of the application provides a memory using method and device, which can obtain accurate utilization rate of chip memory resources.
In a first aspect, an embodiment of the present application provides a memory use method, where the method includes: acquiring a total address range of a memory allocated by a processing unit; acquiring each sub-address range corresponding to a compiling file when a code is compiled; determining the utilization rate of the memory by the processing unit according to the total address range of the memory allocated by the processing unit and each sub-address range corresponding to the compiled file; and using the unused memory in the memory according to the utilization rate.
According to the scheme, the utilization rate of the memory by the processing unit is determined according to the total address range of the memory allocated by the processing unit and each sub-address range corresponding to the compiled file, the obtained utilization rate of the memory by the processing unit is accurate, the unused memory in the memory is used according to the utilization rate of the memory allocated by the processing unit, the reasonable allocation of the memory of the processing unit can be realized, and the utilization rate of the memory of the processing unit is improved.
With reference to the first aspect, in a possible implementation manner of the first aspect, the determining, according to the total address range and each sub-address range corresponding to the compiled file, a usage rate of the memory by the processing unit includes: determining a target address contained in a sub-address range corresponding to the compiled file in each address included in the total address range; and determining the utilization rate of the memory by the processing unit according to the number of the target addresses and the number of the addresses included in the total address range.
According to the scheme, the utilization rate of the memory by the processing unit can be acquired accurately.
With reference to the first aspect, in a possible implementation manner of the first aspect, before determining, according to the number of target addresses and the number of addresses included in the total address range, a usage rate of the memory by the processing unit, the method includes: taking each address of the memory allocated by the processing unit as each first key value, and setting a numerical value corresponding to each first key value as a first numerical value to construct a first dictionary; updating the numerical value corresponding to the target address from a first numerical value to a second numerical value; and counting the number of the second numerical values, wherein the number of the second numerical values is the number of the target addresses.
The scheme provides a specific implementation mode for counting the number of target addresses.
With reference to the first aspect, in a possible implementation manner of the first aspect, determining, in each address included in the total address range, a target address included in a sub address range corresponding to the compiled file includes: taking the identifier of each sub-address range corresponding to the compiled file as each second key value, taking the starting address corresponding to the sub-address range as a first numerical value of the second key value corresponding to the sub-address range and taking the ending address as a second numerical value of the second key value corresponding to the sub-address range, so as to construct a second dictionary; and according to the second dictionary, determining the target address contained in the sub-address range corresponding to the compiled file in each address included in the total address range.
According to the scheme, the address range of the used memory in the total address range of the memory allocated to the processing unit is displayed more visually by constructing the mapping data type.
With reference to the first aspect, in a possible implementation manner of the first aspect, the obtaining a total address range of the memory allocated by the processing unit includes: and acquiring the total address range of the memory allocated to the processing unit from the link file.
The scheme provides a specific mode for acquiring the total address range in the memory allocated by the processing unit.
In a second aspect, an embodiment of the present application provides an apparatus for using a memory, including an obtaining module, a processing module, and an application module, where the obtaining module is configured to obtain a total address range of the memory allocated by the processing unit; acquiring each sub-address range corresponding to a compiling file when a code is compiled; the processing module is used for determining the utilization rate of the memory by the processing unit according to a total address range and each sub-address range corresponding to the compiled file; the application module is used for using the unused memory in the memory according to the utilization rate.
With reference to the second aspect, in a possible implementation manner of the second aspect, the determining, by the processing module, a usage rate of the memory by the processing unit according to the total address range and each sub-address range corresponding to the compiled file includes: the processing module is specifically configured to determine, among the addresses included in the total address range, a target address included in a sub address range corresponding to the compiled file; and determining the utilization rate of the memory by the processing unit according to the number of the target addresses and the number of the addresses included in the total address range.
With reference to the second aspect, in a possible implementation manner of the second aspect, before the processing module is configured to determine, according to the number of target addresses and the number of addresses included in the total address range, a usage rate of the memory by the processing unit, the processing module is further configured to: taking each address of the memory allocated by the processing unit as each first key value, and setting a numerical value corresponding to each first key value as a first numerical value to construct a first dictionary; updating the numerical value corresponding to the target address from a first numerical value to a second numerical value; and counting the number of the second numerical values, wherein the number of the second numerical values is the number of the target addresses.
With reference to the second aspect, in a possible implementation manner of the second aspect, the determining, by the processing module, a target address included in a sub address range corresponding to the compiled file in each address included in the total address range includes: the processing module is specifically configured to use the identifier of each sub-address range corresponding to the compiled file as each second key value, use the start address corresponding to the sub-address range as a first numerical value of the second key value corresponding to the sub-address range, and use the end address as a second numerical value of the second key value corresponding to the sub-address range, so as to construct a second dictionary; and according to the second dictionary, determining the target address contained in the sub-address range corresponding to the compiled file in each address included in the total address range.
With reference to the second aspect, in a possible implementation manner of the second aspect, the acquiring module is configured to acquire a total address range of the memory allocated to the processing unit, and includes: the processing module is specifically configured to obtain a total address range of the memory allocated to the processing unit from the link file.
In a third aspect, an embodiment of the present application provides an electronic device, which includes a processor and a memory, and is characterized in that the memory stores instructions, and the processor is configured to invoke the instructions and execute the method according to the first aspect and any possible implementation manner of the first aspect.
In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, which includes a program or instructions, and when the program or instructions are run on a computer, the method according to the first aspect and any possible implementation manner of the first aspect is performed.
According to the memory using method and device, the total address range of the memory allocated by the processing unit and each sub-address range corresponding to the compiling file are compiled when the codes are compiled, the utilization rate of the processing unit on the memory is determined, and the unused memory in the memory is used according to the utilization rate. The obtained utilization rate of the memory by the processing unit is more accurate, the reasonable distribution of the memory of the processing unit can be realized, and the utilization rate of the memory of the processing unit is improved.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a first flowchart of a memory usage method according to an embodiment of the present disclosure;
fig. 2 is a second flowchart of a memory usage method according to an embodiment of the present application;
fig. 3 is a schematic structural diagram of a device for memory usage according to an embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a first flowchart of a memory usage method according to an embodiment of the present application, where the memory usage method according to the embodiment is applicable to a memory usage device. The memory using device can be a computer or a part of the computer, and the computer can be a terminal, such as a vehicle-mounted terminal, and can also be a server. As shown in fig. 1, the method of this embodiment may include:
and step S101, acquiring the total address range of the memory allocated by the processing unit.
The processing unit may be a processing unit in a computer, for example, the processing unit is an ECU applied in an automobile, or may be another processing unit in the computer, which is not limited in this application.
The total address range of the memory allocated by the processing unit includes the address ranges of all unused memories and the address ranges of all used memories in the memory allocated by the processing unit.
For obtaining the total address range of the memory allocated to the processing unit, in one mode, obtaining the total address range of the memory allocated to the processing unit includes: and acquiring the total address range of the memory allocated to the processing unit from the link file.
The link file refers to a file generated in the compiling process, the link file includes a total address range of the memory allocated to the processing unit, and the total address range of the memory allocated to the processing unit can be read from the link file.
The total address range of the memory allocated to the processing unit may also be obtained by other manners, and the application is not limited herein.
And S102, acquiring each sub-address range corresponding to the compiling file during code compiling.
During the integration process of the current processing unit, a program is written into the processing unit, the code is compiled during the program writing process, and during the code compiling process, one or more compiled files, such as a 'MAP' type compiled file generated during the code compiling process, are generated. The compiled file comprises sub address ranges corresponding to the compiled file, and the sub address ranges corresponding to the compiled file are the ranges of addresses occupied by the compiled file, so that the sub address ranges corresponding to the compiled file can be read from the compiled file.
It can be understood that the address included in each sub-address range corresponding to the compiled file is an address in the total address range of the memory allocated by the processing unit. And the address included in each sub-address range corresponding to the compiled file is the address used in the memory allocated by the processing unit.
Each sub-address range corresponding to the compiled file may be an address range corresponding to each object in the compiled file. Each address range corresponding to the object is the range of addresses occupied by the object. Wherein, the object includes but is not limited to variable, function.
Step S103, determining the utilization rate of the memory allocated to the processing unit by the processing unit according to the total address range and each sub-address range corresponding to the compiled file.
For the convenience of subsequent expression, the expression "the utilization rate of the memory allocated to the processing unit by the processing unit" is used as the utilization rate of the memory by the processing unit "
In step S102, the address included in each sub-address range corresponding to the compiled file is the address used in the memory allocated to the processing unit, so that the memory usage rate of the processing unit corresponding to the current processing unit integration process can be determined according to each sub-address range corresponding to the compiled file and the total address range of the memory allocated to the processing unit.
It should be understood by those skilled in the art that the sum of the memory usage rate of the processing unit corresponding to the current processing unit integration process and the memory usage rate of the processing unit corresponding to the previous processing unit integration process is the total memory usage rate of the processing unit.
And step S104, using the unused memory in the memory allocated by the processing unit according to the utilization rate of the memory by the processing unit.
The specific memory usage and the specific memory usage in the allocated memory of the processing unit can be determined according to the usage rate of the allocated memory of the processing unit, and the processing unit can use the unused memory in the allocated memory of the processing unit in the subsequent process.
For example, the processing unit is an ECU, when the ECU is integrated, it may be determined that 70% of the memory allocated to the ECU is unused, assuming that the memory usage rate of the ECU is 30%, and when the ECU is re-integrated, the memory may be allocated according to 70% of the unused memory allocated to the ECU.
In this embodiment, the utilization rate of the memory allocated by the processing unit is determined by the total address range of the memory allocated by the processing unit and each sub-address range corresponding to the compiled file, and because each sub-address range corresponding to the compiled file is each address range corresponding to each object in the compiled file and does not include an unused address, the utilization rate of the memory by the processing unit determined in this embodiment is relatively accurate. The unused memory in the memory is used according to the utilization rate of the memory allocated by the processing unit, the reasonable allocation of the memory of the processing unit can be realized, and the utilization rate of the memory of the processing unit is improved.
Several specific embodiments are adopted below to describe a specific determination method of the memory usage rate in the previous embodiment.
Fig. 2 is a second flowchart of a memory using method according to an embodiment of the present application, where the method according to the embodiment may include:
in step S201, the target address included in the sub address range corresponding to the compiled file is determined among the addresses included in the total address range.
Each address in the total address range of the memory allocated by the processing unit is compared with the sub-address range corresponding to the compiled file, and if a certain address of the memory allocated by the processing unit is in the sub-address range corresponding to the compiled file, the address can be determined as the address used in the memory allocated by the processing unit, namely the target address.
In one implementation, determining a target address included in a sub-address range corresponding to a compiled file from among addresses included in a total address range includes:
a1, using the identifier of each sub-address range corresponding to the compiled document as each second key value, using the start address corresponding to the sub-address range as the first numerical value of the second key value corresponding to the sub-address range, and using the end address corresponding to the sub-address range as the second numerical value of the second key value corresponding to the sub-address range, so as to construct a second dictionary.
That is, the second dictionary is constructed as follows: and taking the identifier of each sub-address range corresponding to the compiled file as a second key value, namely a key value. For any first sub-address range in each sub-address range corresponding to the compiled file, the start address corresponding to the first sub-address range is used as a first numerical value (namely, a first value) of a second key value corresponding to the first sub-address range, and the end address corresponding to the first sub-address range is used as a second numerical value (namely, a second value) of a second key value corresponding to the first sub-address range, so that a second dictionary is obtained. And the second key value corresponding to the sub-address range is the identifier of the sub-address range.
The dictionary is a mapping data type, works like a hash table, and is composed of key-value pairs. The dictionary may also be other mapping data types, and is not limited in this application.
a2, according to the second dictionary, determining the target address contained in the sub address range corresponding to the compiled file among the addresses included in the total address range.
And determining the target address of the sub-address range corresponding to the compiled file according to the numerical value of each second key value in the second dictionary and each address included in the total address range. That is, if a first address included in a certain total address range is an address between or two values of a certain second key value, the first address is a target address.
Illustratively, the total address range of the memory allocated by the processing unit is address 1 to address 20, the sub-address ranges corresponding to the compiled file are address 1 to address 3, and address 5 to address 8, and by comparing each address included in the total address range of the memory allocated by the processing unit with each sub-address range corresponding to the compiled file, it can be determined that address 1, address 2, address 3, address 5, address 6, address 7, and address 8 in the total address range of the memory allocated by the processing unit are within the sub-address range corresponding to the compiled file, and therefore the target address is address 1, address 2, address 3, address 5, address 6, address 7, and address 8.
Step S202, determining the utilization rate of the memory by the processing unit according to the number of the target addresses and the number of the addresses included in the total address range of the memory allocated by the processing unit.
Because the utilization rate of the memory by the corresponding processing unit in the integration process of the current processing unit is equal to the integration process of the current processing unit, the number of addresses used for compiling the file/the number of total addresses corresponding to the memory allocated by the processing unit. The number of the target addresses is the integration process of the current processing unit, the number of the addresses used for compiling the file, and the number of the addresses included in the total address range of the memory allocated by the processing unit is the number of the total addresses corresponding to the memory allocated by the processing unit.
It can be understood that, before determining the utilization rate of the memory by the processing unit according to the number of the target addresses and the number of the addresses included in the total address range, the method further includes: the number of target addresses is determined.
One implementation of determining the number of target addresses is described below.
Determining a number of target addresses, comprising:
b1, using each address of the memory distributed by the processing unit as each first key value, and setting the value corresponding to each first key value as the first value to construct the first dictionary.
Alternatively, the first value may be 0.
Taking the dictionary formed by the key-value pairs as an example, taking each address of the memory allocated by the processing unit as a first key value, namely a key value, and setting a value (value) value corresponding to each first key value as a first value to construct a first dictionary.
For example, the total address range of the memory allocated by the processing unit is address 1 to address 25, and with these 25 addresses as key values, the first numerical value corresponding to the key value may be set to 0 to construct the first dictionary.
b2, updating the value corresponding to the target address from the first value to the second value.
Alternatively, the second value may be 1.
Illustratively, the total address range of the memory allocated by the processing unit is address 1 to address 25, the target addresses are address 1, address 2, address 5 and address 6, and the first value 0 corresponding to the 4 target addresses in the dictionary 1 is updated to the second value 1.
b3, counting the number of the second numerical value, wherein the number of the second numerical value is the number of the target address.
After determining the number of target addresses, the utilization rate of the memory by the processing unit may be determined according to the number of target addresses and the number of addresses included in the total address range.
Illustratively, the number of the second value in the first dictionary is counted, when the second value is 1, the number of 1 in the first dictionary is counted, and the number of the second value 1 in the first dictionary is the number of the target address.
In this embodiment, in each address included in the total address range of the memory allocated to the processing unit, the target address included in the sub-address range corresponding to the compiled file is determined, and the usage rate of the memory by the processing unit is determined according to the number of the target addresses and the number of the addresses included in the total address range, so that the determined usage rate of the memory by the processing unit is relatively accurate, and the method is simple and easy to implement.
The memory usage method provided in the embodiment of the present application is described above, and the apparatus provided in the embodiment of the present application is described below with specific embodiments.
Fig. 3 is a schematic structural diagram of a device for memory usage according to an embodiment of the present disclosure. As shown in fig. 3, the apparatus of the present embodiment may include: an acquisition module 31, a processing module 32 and an application module 33.
The acquiring module 31 is configured to acquire a total address range of the memory allocated by the processing unit; acquiring each sub-address range corresponding to a compiling file when a code is compiled; the processing module 32 is configured to determine, according to a total address range and each sub-address range corresponding to the compiled file, a utilization rate of the memory by the processing unit; the application module 33 is configured to use the unused memory in the memory according to the usage rate.
Optionally, as an embodiment, the processing module 32 is configured to determine, according to the total address range and each sub-address range corresponding to the compiled file, a utilization rate of the memory by the processing unit, and includes: the processing module is specifically configured to determine, among the addresses included in the total address range, a target address included in a sub address range corresponding to the compiled file; and determining the utilization rate of the memory by the processing unit according to the number of the target addresses and the number of the addresses included in the total address range.
Optionally, as an embodiment, before the processing module 32 is configured to determine, according to the number of the target addresses and the number of the addresses included in the total address range, the usage rate of the memory by the processing unit, further configured to: taking each address of the memory allocated by the processing unit as each first key value, and setting a numerical value corresponding to each first key value as a first numerical value to construct a first dictionary; updating the numerical value corresponding to the target address from a first numerical value to a second numerical value; and counting the number of the second numerical values, wherein the number of the second numerical values is the number of the target addresses.
Optionally, as an embodiment, the processing module 32 is configured to determine, in each address included in the total address range, a target address included in a sub address range corresponding to the compiled file, and includes: the processing module is specifically configured to use the identifier of each sub-address range corresponding to the compiled file as each second key value, use the start address corresponding to the sub-address range as a first numerical value of the second key value corresponding to the sub-address range, and use the end address as a second numerical value of the second key value corresponding to the sub-address range, so as to construct a second dictionary; and according to the second dictionary, determining the target address contained in the sub-address range corresponding to the compiled file in each address included in the total address range.
Optionally, as an embodiment, the obtaining module 32 is configured to obtain a total address range of the memory allocated by the processing unit, and includes: the processing module is specifically configured to obtain a total address range of the memory allocated to the processing unit from the link file.
Fig. 4 is a schematic structural diagram of an electronic device 40 according to an embodiment of the present disclosure, and as shown in fig. 4, the electronic device according to the present disclosure includes a processor 41 and a memory 42, where the memory 42 stores an instruction, and the processor 41 is configured to call the instruction to control execution of the method according to any one of the foregoing embodiments.
For a specific implementation process of the processor 41, reference may be made to the above method embodiments, which implement similar principles and technical effects, and this embodiment is not described herein again.
The application also provides a computer-readable storage medium, wherein computer-executable instructions are stored in the computer-readable storage medium, and when a processor executes the computer-executable instructions, the memory using method is realized.
The computer-readable storage medium may be implemented by any type of volatile or non-volatile memory device or combination thereof, such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disk. Readable storage media can be any available media that can be accessed by a general purpose or special purpose computer.
An exemplary readable storage medium is coupled to the processor such the processor can read information from, and write information to, the readable storage medium. Of course, the readable storage medium may also be an integral part of the processor. The processor and the readable storage medium may reside in an Application Specific Integrated Circuits (ASIC). Of course, the processor and the readable storage medium may also reside as discrete components in the apparatus.
Those of ordinary skill in the art will understand that: all or a portion of the steps of implementing the above-described method embodiments may be performed by hardware associated with program instructions. The program may be stored in a computer-readable storage medium. When executed, the program performs steps comprising the method embodiments described above; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims (8)

1. A method for using a memory, comprising:
acquiring a total address range of a memory allocated by a processing unit;
acquiring each sub-address range corresponding to a compiling file when a code is compiled;
determining a target address contained in a sub-address range corresponding to the compiled file in each address included in the total address range;
taking each address of the memory allocated by the processing unit as each first key value, and setting a numerical value corresponding to each first key value as a first numerical value to construct a first dictionary;
updating the numerical value corresponding to the target address from a first numerical value to a second numerical value;
counting the number of the second numerical values, wherein the number of the second numerical values is the number of the target addresses;
determining the utilization rate of the memory by the processing unit according to the number of the target addresses and the number of the addresses included in the total address range;
and using the unused memory in the memory according to the utilization rate.
2. The method of claim 1, wherein determining the target address included in the sub-address range corresponding to the compiled file among the addresses included in the total address range comprises:
taking the identifier of each sub-address range corresponding to the compiled file as each second key value, taking the starting address corresponding to the sub-address range as a first numerical value of the second key value corresponding to the sub-address range and taking the ending address as a second numerical value of the second key value corresponding to the sub-address range, so as to construct a second dictionary;
and according to the second dictionary, determining the target address contained in the sub-address range corresponding to the compiled file in each address included in the total address range.
3. The method of claim 1 or 2, wherein the obtaining the total address range of the memory allocated by the processing unit comprises:
and acquiring the total address range of the memory allocated to the processing unit from the link file.
4. The device for using the memory comprises an acquisition module, a processing module and an application module, and is characterized in that the acquisition module is used for acquiring the total address range of the memory allocated by the processing unit;
acquiring each sub-address range corresponding to a compiling file when a code is compiled;
the processing module is used for determining the utilization rate of the memory by the processing unit according to a total address range and each sub-address range corresponding to the compiled file;
the application module is used for using the unused memory in the memory according to the utilization rate;
the processing module is specifically configured to determine, among the addresses included in the total address range, a target address included in a sub address range corresponding to the compiled file;
determining the utilization rate of the memory by the processing unit according to the number of the target addresses and the number of the addresses included in the total address range;
the processing module is further configured to:
taking each address of the memory allocated by the processing unit as each first key value, and setting a numerical value corresponding to each first key value as a first numerical value to construct a first dictionary;
updating the numerical value corresponding to the target address from a first numerical value to a second numerical value;
and counting the number of the second numerical values, wherein the number of the second numerical values is the number of the target addresses.
5. The apparatus of claim 4, wherein the processing module is configured to determine, among the addresses included in the total address range, a target address included in a sub address range corresponding to the compiled file, and includes:
the processing module is specifically configured to use the identifier of each sub-address range corresponding to the compiled file as each second key value, use the start address corresponding to the sub-address range as a first numerical value of the second key value corresponding to the sub-address range, and use the end address as a second numerical value of the second key value corresponding to the sub-address range, so as to construct a second dictionary;
and according to the second dictionary, determining the target address contained in the sub-address range corresponding to the compiled file in each address included in the total address range.
6. The apparatus according to claim 4 or 5, wherein the obtaining module is configured to obtain a total address range of the memory allocated by the processing unit, and includes:
the processing module is specifically configured to obtain a total address range of the memory allocated to the processing unit from the link file.
7. An electronic device comprising a processor and a memory, wherein the memory has stored therein instructions, and wherein the processor is configured to invoke the instructions and perform the method of any of claims 1-3.
8. A computer readable storage medium comprising a program or instructions, characterized in that the method of any of claims 1-3 is performed when said program or instructions are run on a computer.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102063363A (en) * 2010-01-26 2011-05-18 深圳市同洲电子股份有限公司 Memory footprint statistical device and method
CN102734896A (en) * 2012-07-06 2012-10-17 青岛海尔空调电子有限公司 Method and device for monitoring operation environments of multi-split air-conditioning system
CN102831069A (en) * 2012-06-30 2012-12-19 华为技术有限公司 Memory processing method and memory management equipment
CN106469118A (en) * 2015-08-19 2017-03-01 深圳市博巨兴实业发展有限公司 A kind of memorizer Memory Allocation access method and device
CN108319504A (en) * 2018-03-19 2018-07-24 武汉斗鱼网络科技有限公司 EMS memory occupation optimization method, device and readable storage medium storing program for executing

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200828014A (en) * 2006-12-28 2008-07-01 Genesys Logic Inc Flash memory management method with low RAM utilization
CN107015914B (en) * 2016-01-28 2020-12-22 长城汽车股份有限公司 Data calibration method and system
CN109710396B (en) * 2017-10-26 2023-08-22 华为技术有限公司 Method and device for information acquisition and memory release

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102063363A (en) * 2010-01-26 2011-05-18 深圳市同洲电子股份有限公司 Memory footprint statistical device and method
CN102831069A (en) * 2012-06-30 2012-12-19 华为技术有限公司 Memory processing method and memory management equipment
CN102734896A (en) * 2012-07-06 2012-10-17 青岛海尔空调电子有限公司 Method and device for monitoring operation environments of multi-split air-conditioning system
CN106469118A (en) * 2015-08-19 2017-03-01 深圳市博巨兴实业发展有限公司 A kind of memorizer Memory Allocation access method and device
CN108319504A (en) * 2018-03-19 2018-07-24 武汉斗鱼网络科技有限公司 EMS memory occupation optimization method, device and readable storage medium storing program for executing

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
嵌入式linux内存管理设计与实现;李江雄;《中国优秀硕士学位论文全文数据库 信息科技辑》;20100515;全文 *
嵌入式系统内存自动化统计方法研究;颜丽;《萍乡学院学报》;20181231(第6期);全文 *

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