CN107015914B - Data calibration method and system - Google Patents

Data calibration method and system Download PDF

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Publication number
CN107015914B
CN107015914B CN201610063465.0A CN201610063465A CN107015914B CN 107015914 B CN107015914 B CN 107015914B CN 201610063465 A CN201610063465 A CN 201610063465A CN 107015914 B CN107015914 B CN 107015914B
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calibration
memory
random access
memory space
size
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CN107015914A (en
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杨明
杜雷鸣
李雷
张建彪
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Great Wall Motor Co Ltd
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Great Wall Motor Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0284Multiple user address space allocation, e.g. using different base addresses
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629Configuration or reconfiguration of storage systems
    • G06F3/0635Configuration or reconfiguration of storage systems by changing the path, e.g. traffic rerouting, path reconfiguration

Abstract

The invention provides a data calibration method and a system, which comprises the following steps: the upper computer establishes connection with the lower computer, and after the connection is successful, the upper computer sends a memory size instruction required by calibration to a random access memory of the lower computer; the random access memory allocates a memory space with a corresponding size according to a memory size instruction required by calibration, wherein the memory space is less than or equal to the storage space of the random access memory; the upper computer maps the parameters corresponding to the required calibration quantity to the memory space; and the lower computer writes parameters corresponding to the calibration quantity mapped to the memory space into Flash in a flashing mode. The invention can release the memory space of the random access register to the maximum extent, improves the utilization rate of the random access register, further improves the system operation efficiency, saves the development cost, and has higher flexibility because the random access register mapping space of the data completely conforms to the size of the standard quantity.

Description

Data calibration method and system
Technical Field
The invention belongs to the technical field of single-chip microcomputers, and particularly relates to a data calibration method and a data calibration system.
Background
At present, Data Calibration of a controller is mainly realized based on a CCP (controller area Protocol, ECU (Electronic Control Unit) Calibration Protocol) that is based on a CAN bus, that is, before Data of the controller is calibrated, measured, and written, a program supporting the CCP Protocol is realized inside the controller, so that the controller CAN receive and send a CRO (command receive Object) and a DTO (Data Transfer Object) meeting the CCP specification, and CAN analyze and execute the received CRO command, and the part of the program is driven by software of a lower computer of the CCP Calibration Protocol. The bottom driver comprises a CAN driver, a CANInterface driver and a Flash driver, and the upper computer adopts INCA to calibrate, observe and write.
For the Flash of the calibration data, since the calibration data is defined in the Flash address interval and can only be changed by the Flash, the Flash address segment of the calibration data should be mapped to a corresponding RAM (Random Access Memory) segment, the calibration parameters are operated in the RAM, and after optimal control is obtained, the data in the RAM is flashed to Flash to complete the calibration function.
In the whole calibration process, relevant files need to be configured on the upper computer. Examples include: an A2L file, an S19 file, a DLL file, a Prof file, and the like. The A2l file adopts the ASAP2 standard to perform standard and normalized description on the functions, interfaces and calibration information of the controller. The program files of the Freescale series chip are different in file format generated by compiling and linking different controllers, such as HEX files. The DLL is a disk file, which is composed of global data, service functions and resources, and is loaded by the system into the virtual space of a process at runtime, becoming part of a calling process. The DLL realizes code packaging, and the programming of the DLL is independent of a specific programming language and a compiler. The Prof file is a Flash programming tool for configuring the control unit in a specific project. During Flash programming operation, a Prof file is required to be called to execute a Flash flow. The Prof file structure includes: ini file (Prof script installation information), menu file,. cnf file (configuration information file),. prm file (flash flow). In the configuration information file, three storage AREAs, namely, ERASE _ MEM _ AREA (erased storage AREA), DEST _ MEM _ AREA (target storage AREA), and SOURCE _ MEM _ AREA (SOURCE storage AREA) are set as storage AREAs of calibration data.
The above-described calibration mechanism is described, for example, by the example shown in fig. 1. As shown in fig. 1, the upper computer interacts with the lower computer, and during initialization, the upper computer sends a handshake instruction to the lower computer, and the lower computer performs logic processing on the received instruction, and feeds back a processing result to the upper computer, and during communication interaction, maps all calibration data into the RAM to prepare for subsequent calibration work. And when the handshake is successful, the observation variable is added, and automatic uploading can be realized. Further, fig. 2 shows a schematic process of address mapping and flashing of calibration data by the current calibration mechanism.
Therefore, in the current calibration mechanism, a space with the size of calibration data must be reserved in the RAM to realize that data in Flash is mapped into the RAM, when the host computer performs calibration, only a few calibration quantities are usually calibrated, and the RAM space mapped in the rest is idle, so that the execution efficiency is low. For example, when the calibration amount data reaches 64KB, the RAM memory space must be reserved for 64KB, and since the RAM memory of the controller is small, typically several tens of KB, it is difficult to achieve normal calibration in this case. In later project development, calibration data will gradually increase, so the RAM to be mapped must also be expanded, the RAM memory space of the chip itself is limited, and the cost of externally expanding the RAM is high.
Disclosure of Invention
In view of this, the present invention is directed to provide a data calibration method, which can release the memory space of the random access register to the maximum extent, improve the utilization rate of the random access register, further improve the system operation efficiency, and save the development cost, and the random access register mapping space of the data completely conforms to the size of the calibration amount, so that the flexibility is higher.
In order to achieve the purpose, the technical scheme of the invention is realized as follows:
a data calibration method comprises the following steps: the method comprises the following steps that connection is established between an upper computer (110) and a lower computer (120), and after the connection is successful, the upper computer (110) sends a memory size instruction required by calibration to a random access memory of the lower computer (120); the random access memory (130) allocates a memory space with a corresponding size according to the memory size instruction required by the calibration, wherein the memory space is less than or equal to the storage space of the random access memory (130); the upper computer (110) maps the parameters corresponding to the required calibration quantity to the memory space; and the lower computer (120) writes parameters corresponding to the calibration quantity mapped to the memory space into Flash in a flashing mode.
Further, after the parameters corresponding to the calibration quantities mapped to the memory space are written into Flash, the method further includes: and releasing the memory space.
Further, the parameters corresponding to the calibration amount include a storage address, a size, and a serial number of the calibration amount.
Further, the size of the memory space is N, the size of the required calibration quantity is M, and the number of calibration quantities which can be calibrated simultaneously by the upper computer (110) is N/M, wherein N is larger than M.
Further, the lower computer (120) is a vehicle control unit.
Compared with the prior art, the data calibration method has the following advantages:
according to the data calibration method, after the upper computer and the lower computer successfully shake hands, the upper computer sends a memory size instruction required by calibration to the random access memory, the random access memory allocates a memory space with a corresponding size according to the instruction, then the upper computer maps parameters corresponding to the required calibration amount to the memory space, and finally the lower computer writes the parameters corresponding to the calibration amount mapped to the memory space into Flash. The method can release the memory space of the random access register to the maximum extent, improves the utilization rate of the random access register, further improves the system operation efficiency, saves the development cost, and has higher flexibility because the mapping space of the random access register of the data completely conforms to the size of the standard quantity.
Another objective of the present invention is to provide a data calibration system, which can release the memory space of the random access register to the maximum extent, improve the utilization rate of the random access register, further improve the system operation efficiency, and save the development cost, and the mapping space of the random access register of the data completely conforms to the size of the calibration amount, so that the flexibility is higher.
In order to achieve the purpose, the technical scheme of the invention is realized as follows:
a data calibration system, comprising: the device comprises an upper computer (110), a lower computer (120), a communication protocol (140) and a random access memory (130), wherein the upper computer (110) is connected with the lower computer (120) through the communication protocol (140), after the connection is successful, the upper computer (110) sends a memory size instruction required by calibration to the random access memory (130), the random access memory (130) distributes a memory space with a corresponding size according to the memory size instruction required by calibration, the upper computer (110) maps parameters corresponding to the required calibration amount to the memory space, and the lower computer (120) writes the parameters corresponding to the calibration amount mapped to the memory space to Flash, wherein the memory space is smaller than or equal to the storage space of the random access memory (130).
Further, the random access memory (130) is further configured to release the memory space after the parameters corresponding to the calibration amounts mapped to the memory space are written into Flash.
Further, the parameters corresponding to the calibration quantity include a storage address, a size and a serial number of the calibration quantity.
Furthermore, the size of the memory space is N, the size of the required calibration quantity is M, and the number of the calibration quantities which can be calibrated simultaneously by the upper computer (110) is N/M, wherein N is larger than M.
Further, the lower computer (120) is a vehicle control unit.
Compared with the prior art, the data calibration system and the data calibration method have the same advantages, and are not described herein again.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate an embodiment of the invention and, together with the description, serve to explain the invention and not to limit the invention. In the drawings:
FIG. 1 is a schematic diagram of a communication process between an upper computer and a lower computer in a conventional controller calibration mechanism;
FIG. 2 is a schematic diagram illustrating a data mapping and flashing process in a conventional controller calibration mechanism;
FIG. 3 is a flow chart of a data calibration method according to an embodiment of the present invention;
FIG. 4 is a schematic diagram illustrating a calibration data mapping process in the data calibration method according to the embodiment of the present invention;
FIG. 5 is a schematic diagram of a calibration data flashing process in the data calibration method according to the embodiment of the present invention; and
fig. 6 is a block diagram of a data calibration system according to an embodiment of the present invention.
Description of reference numerals:
100-a data calibration system, 110-an upper computer, 120-a lower computer, 130-a random access memory and 140-a communication protocol.
Detailed Description
It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict.
The present invention will be described in detail below with reference to the embodiments with reference to the attached drawings.
FIG. 3 is a flow chart of a data calibration method according to an embodiment of the invention.
As shown in fig. 3, the data calibration method according to an embodiment of the present invention includes the following steps:
step S1: and the upper computer establishes connection with the lower computer, and after the connection is successful, the upper computer sends a memory size instruction required by calibration to a random access memory of the lower computer.
The connection between the upper computer and the lower computer is established, for example, in the following manner: during initialization, the upper computer sends a handshake command to the lower computer, after receiving the handshake command, the lower computer sends a communication success command to the upper computer after internal logic processing, and at the moment, the upper computer and the lower computer are successfully connected. And during the instruction interaction between the upper computer and the lower computer, the operation of mapping all calibration data to the RAM is not carried out.
The upper computer is, for example, a computer, a PC, a cloud server, or the like. The lower computers are, for example, a vehicle control unit, an engine control unit ECU, and the like.
Step S2: the random access memory allocates a memory space with a corresponding size according to a memory size instruction required by calibration, wherein the memory space is less than or equal to the storage space of the random access memory
The parameters corresponding to the required calibration quantity comprise the storage address, the size and the serial number of the calibration quantity.
Step S3: and the upper computer maps the parameters corresponding to the required calibration quantity to the memory space. That is, the upper computer maps the storage address, size and serial number corresponding to the required calibration quantity to the memory space allocated by the random access memory.
In other words, steps S2 and S3 are the dynamic mapping process of the calibration data address. Specifically, as shown in fig. 4, in the bottom layer code of the lower computer, a mapped memory space is defined in the RAM area, when the upper computer performs calibration on the Data1 calibration amount, the upper computer sends a corresponding calibration result to the bottom layer code of the lower computer, where the calibration result includes address, size, and serial number of the Data1 calibration amount, and when the bottom layer code receives the calibration result, the calibration result is mapped into the RAM, so as to replace the operation of copying the calibration Data to the RAM in the handshake process of the upper computer and the lower computer, and at this time, perform calibration operation on the parameters. When the upper computer calibrates the Data2, in a similar way, the lower computer receives the calibration result corresponding to the Data2 calibration amount sent by the upper computer, and maps the calibration result into the RAM, the mapped memory start address is after the Data1 maps the RAM memory address, and so on, and the same is true for the dynamic mapping process of the calibration results of the Data3, the Data4 and the Datan, for example, as shown in fig. 4, which is not described herein.
Step S4: and the lower computer writes parameters corresponding to the calibration quantity mapped to the memory space into Flash in a flashing mode.
Specifically, after the data calibration is completed, the parameters of the controller reach the optimal control, and then the Flash is performed, and the storage address, the size, and the serial number corresponding to the calibration amount dynamically mapped to the RAM are flashed into Flash, where a specific Flash flow is shown in fig. 5, for example.
Further, in an embodiment of the present invention, after the parameters corresponding to the calibration quantities mapped to the memory space are written to Flash, the method further includes: and releasing the memory space.
Further, in an embodiment of the present invention, assuming that the size of the memory space allocated by the random access memory is N and the size of one required calibration amount is M, the number of calibration amounts that can be calibrated simultaneously by the upper computer is N/M. Examples are as follows: if the size of the allocated storage space of the mapped RAM is 2KB, that is, 2KB of calibration data can be calibrated in real time by the upper computer, and if the size of the calibration quantity is 2Byte, the upper computer can calibrate 2 × 1024/2 to 1024 variables at the same time. That is, the present invention can completely calibrate a larger parameter through a smaller RAM space, and the present calibration technique must define RAMs of the same space according to the size of all calibration data, so that the RAM space of the controller can be flexibly utilized by using the data calibration method of the embodiment of the present invention.
In summary, according to the data calibration method of the embodiment of the present invention, after the upper computer and the lower computer successfully handshake, the upper computer sends a memory size instruction required for calibration to the random access memory, the random access memory allocates a memory space of a corresponding size according to the instruction, then the upper computer maps parameters corresponding to the required calibration amount to the memory space, and finally the lower computer writes parameters corresponding to the calibration amount mapped to the memory space to Flash. The method can release the memory space of the random access register to the maximum extent, improves the utilization rate of the random access register, further improves the system operation efficiency, saves the development cost, and has higher flexibility because the mapping space of the random access register of the data completely conforms to the size of the standard quantity.
Further, as shown in fig. 6, an embodiment of the present invention discloses a data calibration system 100, which includes: an upper computer 110, a lower computer 120, a random access memory 130 and a communication protocol 140.
The upper computer 110 is connected with the lower computer 120 through the communication protocol 140, after the connection is successful, the upper computer 110 sends a memory size instruction required for calibration to the random access memory 130, the random access memory 130 allocates a memory space with a corresponding size according to the memory size instruction required for calibration, the upper computer 110 maps parameters corresponding to the required calibration amount to the memory space, and the lower computer 120 writes parameters corresponding to the calibration amount mapped to the memory space to Flash, wherein the memory space is less than or equal to the storage space of the random access memory 130. The parameters corresponding to the required calibration quantity comprise the storage address, the size and the serial number of the calibration quantity.
The connection between the upper computer 110 and the lower computer 120 is established, for example, in the following manner: during initialization, the upper computer 110 sends a handshake command to the lower computer 120 through the communication protocol 140, after receiving the handshake command, the lower computer 120 performs internal logic processing and then sends a communication success command to the upper computer through the communication protocol 140, and at this time, the upper computer 110 and the lower computer 120 are successfully connected. And during the instruction interaction between the upper computer 110 and the lower computer 120, the operation of mapping all calibration data to the RAM is not performed.
The upper computer 110 is, for example, a computer, a PC, a cloud server, or the like. The lower computer 120 is, for example, a vehicle control unit, an engine control unit ECU, or the like.
Further, in an embodiment of the present invention, the random access memory 130 is further configured to release the memory space after flushing the parameter corresponding to the standard amount mapped to the memory space into Flash.
Further, in an embodiment of the present invention, assuming that the size of the memory space allocated by the ram 130 is N and the size of one required calibration amount is M, the number of calibration amounts that the upper computer 110 can calibrate at the same time is N/M. Examples are as follows: if the size of the memory space allocated by the mapped RAM is 2KB, that is, 2KB of calibration data can be calibrated in real time by the upper computer 110, and if the size of the calibration amount is 2Byte, then 2 × 1024/2 is calibrated into 1024 variables at the same time by the upper computer 110. That is, the present invention can completely calibrate a larger parameter through a smaller RAM space, and the present calibration technique must define RAMs of the same space according to the size of all calibration data, so that the RAM space of the controller can be flexibly utilized by using the data calibration method of the embodiment of the present invention.
In summary, according to the data calibration system of the embodiment of the present invention, after the upper computer and the lower computer successfully handshake, the upper computer sends a memory size instruction required for calibration to the random access memory, the random access memory allocates a memory space of a corresponding size according to the instruction, then the upper computer maps a parameter corresponding to the required calibration amount to the memory space, and finally the lower computer writes a parameter corresponding to the calibration amount mapped to the memory space to Flash. The system can release the memory space of the random access register to the maximum extent, improves the utilization rate of the random access register, further improves the running efficiency of the system, saves the development cost at the same time, and has higher flexibility because the mapping space of the random access register of the data completely conforms to the size of the standard quantity.
It should be noted that a specific implementation manner of the data calibration system in the embodiment of the present invention is similar to a specific implementation manner of the data calibration method in the embodiment of the present invention, and please refer to the description of the method part specifically, which is not described in detail in order to reduce redundancy.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.

Claims (6)

1. A data calibration method is characterized by comprising the following steps:
the method comprises the following steps that connection is established between an upper computer (110) and a lower computer (120), and after the connection is successful, the upper computer (110) sends a memory size instruction required by calibration to a random access memory of the lower computer (120);
the random access memory (130) allocates a memory space with a corresponding size according to the memory size instruction required by the calibration, wherein the memory space is less than or equal to the storage space of the random access memory (130);
the upper computer (110) maps the parameters corresponding to the required calibration quantity to the memory space; and
the lower computer (120) writes parameters corresponding to the calibration quantity mapped to the memory space into Flash;
releasing the memory space;
the size of the memory space is N, the size of the required calibration quantity is M, and the number of the calibration quantities which can be calibrated simultaneously by the upper computer (110) is N/M, wherein N is larger than M.
2. The data calibration method according to claim 1, wherein the parameters corresponding to the calibration quantity include a storage address, a size, and a serial number of the calibration quantity.
3. The data calibration method according to any one of claims 1-2, wherein the lower computer (120) is a vehicle control unit.
4. A data calibration system, comprising: an upper computer (110), a lower computer (120), a communication protocol (140) and a random access memory (130), wherein,
the upper computer (110) is connected with the lower computer (120) through the communication protocol (140), after the connection is successful, the upper computer (110) sends a memory size instruction required by calibration to the random access memory (130), the random access memory (130) allocates a memory space of a corresponding size according to the memory size instruction required for calibration, the upper computer (110) maps the parameters corresponding to the required calibration quantity to the memory space, the lower computer (120) writes parameters corresponding to the calibration quantity mapped to the memory space into Flash, wherein the memory space is less than or equal to the storage space of the random access memory (130), the random access memory (130) is also used for releasing the memory space after parameters corresponding to the calibration quantity mapped to the memory space are written into Flash; the size of the memory space is N, the size of the required calibration quantity is M, and the number of the calibration quantities which can be calibrated simultaneously by the upper computer (110) is N/M, wherein N is larger than M.
5. The data calibration system of claim 4, wherein the parameters corresponding to the calibration quantity comprise a storage address, a size and a serial number of the calibration quantity.
6. The data calibration system according to any one of claims 4-5, wherein the lower computer (120) is a vehicle control unit.
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