CN110262617B - LDO (low dropout regulator) pre-compensation circuit - Google Patents

LDO (low dropout regulator) pre-compensation circuit Download PDF

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Publication number
CN110262617B
CN110262617B CN201910661510.6A CN201910661510A CN110262617B CN 110262617 B CN110262617 B CN 110262617B CN 201910661510 A CN201910661510 A CN 201910661510A CN 110262617 B CN110262617 B CN 110262617B
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mos transistor
compensation circuit
operational amplifier
amplifier amp
varistor
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CN201910661510.6A
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Chinese (zh)
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CN110262617A (en
Inventor
陈海虹
张廉
林浩
孙化
王志红
冉承新
邓小群
吕德刚
梁延峰
林丰成
王保峰
杨海申
钟才明
杜世民
张力
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QED MICROELECTRONICS (SHENZHEN) Inc
Shaoxing Yuezhi Microelectronics Technology Co ltd
Tianjin Huaqing Energy Storage Equipment Management System Co ltd
Ningbo Xinneng Microelectronic Technology Co ltd
Original Assignee
QED MICROELECTRONICS (SHENZHEN) Inc
Shaoxing Yuezhi Microelectronics Technology Co ltd
Tianjin Huaqing Energy Storage Equipment Management System Co ltd
Ningbo Xinneng Microelectronic Technology Co ltd
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/625—Regulating voltage or current wherein it is irrelevant whether the variable actually regulated is ac or dc

Abstract

The invention discloses an LD0 pre-compensation circuit, which comprises a multi-stage pre-compensation circuit, a capacitor and an LDO chip; the output end V of the multistage pre-compensation circuitoutThe capacitor C is connected with the capacitor C, and the capacitor C is grounded; the output end V of the multistage pre-compensation circuitoutStill be connected with the input of LDO chip, the output ground of LDO chip. The invention compensates through the multistage pre-compensation circuit, and designs and improves the multistage pre-compensation circuit, so that the invention has the characteristics of stable system, convenient frequency compensation and high power supply rejection ratio, can offset the noise of the system at high frequency, and obtains excellent use effect.

Description

LDO (low dropout regulator) pre-compensation circuit
Technical Field
The invention relates to a pre-compensation circuit, in particular to an LDO pre-compensation circuit.
Background
An LDO is a linear regulator that uses a transistor or Field Effect Transistor (FET) operating in its linear region to subtract excess voltage from the applied input voltage, producing a regulated output voltage. By droop voltage is meant the minimum value of the difference between the input voltage and the output voltage required by the regulator to maintain the output voltage within 100mV above or below its nominal value. LDO (low dropout) regulators with a positive output voltage typically use a power transistor (also called pass device) as the PNP. This transistor allows saturation so the regulator can have a very low dropout voltage, typically around 200 mV; in contrast, the voltage drop of the conventional linear regulator using the NPN composite power transistor is about 2V. The negative output LDO uses an NPN as its pass device and its operation mode is similar to that of a PNP device of a positive output LDO in that LDO is a low dropout. Low-dropout (LDO) linear regulators have the outstanding advantages of low cost, low noise, and low quiescent current, and require few external components, usually only one or two bypass capacitors; but has a problem of relatively low power supply rejection.
Disclosure of Invention
The invention aims to provide an LDO pre-compensation circuit. The invention compensates through the multistage pre-compensation circuit, and designs and improves the multistage pre-compensation circuit, so that the invention has the characteristics of stable system, convenient frequency compensation and high power supply rejection ratio, can offset the noise of the system at high frequency, and obtains excellent use effect.
The technical scheme of the invention is as follows: the LDO pre-compensation circuit comprises a multi-stage pre-compensation circuit, a capacitor C and an LDO chip;
the output end V of the multistage pre-compensation circuitoutThe capacitor C is connected with the capacitor C, and the capacitor C is grounded; the output end V of the multistage pre-compensation circuitoutStill be connected with the input of LDO chip, the output ground of LDO chip.
In the above LDO predistortion circuit, the multistage predistortion circuit comprises a first operational amplifier AMP1A second operational amplifier AMP2A first MOS transistor M1A second MOS transistor M2And a third MOS transistor M3First varistor RP1Second varistor RP2A third varistor RP3A first resistor R1And a second resistor R2Wherein:
the first operational amplifier AMP1The positive phase input end of the voltage regulator is connected with the input voltage V of the pre-compensation circuitOD；
The first MOS transistor M1And the first operational amplifier AMP1Voltage output terminal Vout1Connected, the first MOS tube M1Source electrode of and the second MOS transistor M2OfElectrode connected, first MOS transistor M1The drain of (2) is grounded; the first MOS transistor M1Source electrode of and the second MOS transistor M2The grid electrodes are connected;
the second MOS transistor M2Grid and third MOS tube M3Is connected with the grid electrode of the second MOS tube M2Source electrode of and third MOS transistor M3The source electrodes of the two-way transistor are connected;
the second MOS transistor M2Source electrode of and first varistor RP1Is connected to one end of a first varistor RP1The other end of the voltage source is connected with a loading voltage VDD；
The second operational amplifier AMP2Positive phase input terminal of and the second varistor RP2Is connected at one end, a second varistor RP2One end of the first MOS transistor and the second MOS transistor M2Is connected to the source of the first operational amplifier AMP2The positive phase input end of the third varistor RP3Is connected at one end, a third varistor RP3The other end is grounded;
the second operational amplifier AMP2Voltage output terminal Vout2And a third MOS transistor M3The grid electrodes are connected; the second operational amplifier AMP2The inverting input terminal and the third MOS transistor M3The drain electrodes of the two electrodes are connected;
the second operational amplifier AMP2Is grounded, and a second operational amplifier AMP2And the negative electrode of the power supply and the second operational amplifier AMP2The inverting input ends of the two are connected;
the first resistor R1One end of the first MOS transistor and the third MOS transistor M3Is connected to the drain of the first resistor R1And the other end of the first resistor and a second resistor R2Connected to a second resistor R2Grounding;
the first operational amplifier AMP1And the second resistor R2The non-grounding ends of the two are connected;
the third MOS transistor M3The drain electrode of the transistor is connected with the output end V of the multistage pre-compensation circuitout。
Compared with the prior art, the invention has the following beneficial effects:
1. the invention compensates the system by arranging a multi-stage pre-compensation circuit, wherein the output end V of the multi-stage pre-compensation circuitoutThe capacitor C is connected with the capacitor C, and the capacitor C is grounded; output end V of multistage pre-compensation circuitoutThe output end of the LDO chip is grounded; the invention compensates through the multistage pre-compensation circuit, and designs and improves the multistage pre-compensation circuit, so that the invention has the characteristics of stable system, convenient frequency compensation and high power supply rejection ratio, can offset the noise of the system at high frequency, and obtains excellent use effect.
2. Preferably, the invention uses a first operational amplifier AMP1And a second operational amplifier AMP2And the two-stage gain compensation is carried out, so that the pre-compensation control of the LDO is realized, the control from input to output is directly carried out, and simultaneously, the noise cancellation can be carried out on the whole system at high frequency.
Drawings
FIG. 1 is a circuit diagram of the present invention;
fig. 2 is a circuit block diagram of a conventional LDO compensation circuit.
Detailed Description
The invention is further illustrated by the following figures and examples, which are not to be construed as limiting the invention.
Example (b): an LDO pre-compensation circuit, as shown in fig. 1: the device comprises a multistage pre-compensation circuit, a capacitor C and an LDO chip;
the output end V of the multistage pre-compensation circuitoutThe capacitor C is connected with the capacitor C, and the capacitor C is grounded; the output end V of the multistage pre-compensation circuitoutThe output end of the LDO chip is grounded;
the multistage pre-compensation circuit comprises a first operational amplifier AMP1A second operational amplifier AMP2A first MOS transistor M1A second MOS transistor M2And a third MOS transistor M3First varistor RP1Second varistor RP2A third varistor RP3A first resistor R1And a second resistor R2Wherein: the first operational amplifier AMP1The positive phase input end of the voltage regulator is connected with the input voltage V of the pre-compensation circuitOD(ii) a The first MOS transistor M1And the first operational amplifier AMP1Voltage output terminal Vout1Connected, the first MOS tube M1Source electrode of and the second MOS transistor M2Is connected with the drain electrode of the first MOS transistor M1The drain of (2) is grounded; the first MOS transistor M1Source electrode of and the second MOS transistor M2The grid electrodes are connected; the second MOS transistor M2Grid and third MOS tube M3Is connected with the grid electrode of the second MOS tube M2Source electrode of and third MOS transistor M3The source electrodes of the two-way transistor are connected; the second MOS transistor M2Source electrode of and first varistor RP1Is connected to one end of a first varistor RP1The other end of the voltage source is connected with a loading voltage VDD(ii) a The second operational amplifier AMP2Positive phase input terminal of and the second varistor RP2Is connected at one end, a second varistor RP2One end of the first MOS transistor and the second MOS transistor M2Is connected to the source of the first operational amplifier AMP2The positive phase input end of the third varistor RP3Is connected at one end, a third varistor RP3The other end is grounded; the second operational amplifier AMP2Voltage output terminal Vout2And a third MOS transistor M3The grid electrodes are connected; the second operational amplifier AMP2The inverting input terminal and the third MOS transistor M3The drain electrodes of the two electrodes are connected; the second operational amplifier AMP2Is grounded, and a second operational amplifier AMP2And the negative electrode of the power supply and the second operational amplifier AMP2The inverting input ends of the two are connected; the first resistor R1One end of the first MOS transistor and the third MOS transistor M3Is connected to the drain of the first resistor R1And the other end of the first resistor and a second resistor R2Connected to a second resistor R2Grounding; the first operational amplifier AMP1And the second resistor R2The non-grounding ends of the two are connected; the third MOS transistor M3The drain electrode of the transistor is connected with the output end V of the multistage pre-compensation circuitout。
As shown in FIG. 2, the basic frame structure of the conventional LDO circuit is composed of an operational amplifier AMP and a driving transistor M0Divider resistor RL，RrAnd (4) forming. By applying a reference voltage V to the non-inverting input of the transport amplifier AMPnDivider resistor RL，RrFor reference voltage VnThe signal is sampled and the operational amplifier AMP compares the resistance RL，RrDivided voltage and reference voltage VnThen adjusting the grid M of the driving tube0The voltage is high and low to stabilize the output voltage value. In different applications, a high power supply rejection ratio is generally required for the LDO circuit, that is, under a light load or a heavy load condition, the influence of power supply change on the output voltage is required to be as small as possible. The performance of the transport amplifier module in an LDO has a large impact on the performance of the entire LDO. The compensation gain of the conventional LDO circuit is small, and the performance of an LDO system is directly influenced, so that the power supply rejection ratio of the LDO system is small and the load regulation rate is poor.
The invention compensates the system by arranging a multi-stage pre-compensation circuit, wherein the output end V of the multi-stage pre-compensation circuitoutThe capacitor C is connected with the capacitor C, and the capacitor C is grounded; output end V of multistage pre-compensation circuitoutThe output end of the LDO chip is grounded; the invention compensates through the multistage pre-compensation circuit, and designs and improves the multistage pre-compensation circuit, so that the invention has the characteristics of stable system, convenient frequency compensation and high power supply rejection ratio, can offset the noise of the system at high frequency, and obtains excellent use effect.

Claims (1)

  1. The LDO pre-compensation circuit is characterized in that: the device comprises a multistage pre-compensation circuit, a capacitor C and an LDO chip;
    the output end V of the multistage pre-compensation circuitoutThe capacitor C is connected with the capacitor C, and the capacitor C is grounded; the output end V of the multistage pre-compensation circuitoutThe output end of the LDO chip is grounded;
    the multistage prepositionThe compensation circuit includes a first operational amplifier AMP1A second operational amplifier AMP2A first MOS transistor M1A second MOS transistor M2And a third MOS transistor M3First varistor RP1Second varistor RP2A third varistor RP3A first resistor R1And a second resistor R2Wherein:
    the first operational amplifier AMP1The positive phase input end of the voltage regulator is connected with the input voltage V of the pre-compensation circuitOD；
    The first MOS transistor M1And the first operational amplifier AMP1Voltage output terminal Vout1Connected, the first MOS tube M1Source electrode of and the second MOS transistor M2Is connected with the drain electrode of the first MOS transistor M1The drain of (2) is grounded; the first MOS transistor M1Source electrode of and the second MOS transistor M2The grid electrodes are connected;
    the second MOS transistor M2Grid and third MOS tube M3Is connected with the grid electrode of the second MOS tube M2Source electrode of and third MOS transistor M3The source electrodes of the two-way transistor are connected;
    the second MOS transistor M2Source electrode of and first varistor RP1Is connected to one end of a first varistor RP1The other end of the voltage source is connected with a loading voltage VDD；
    The second operational amplifier AMP2Positive phase input terminal of and the second varistor RP2Is connected at one end, a second varistor RP2One end of the first MOS transistor and the second MOS transistor M2Is connected to the source of the first operational amplifier AMP2The positive phase input end of the third varistor RP3Is connected at one end, a third varistor RP3The other end is grounded;
    the second operational amplifier AMP2Voltage output terminal Vout2And a third MOS transistor M3The grid electrodes are connected; the second operational amplifier AMP2The inverting input terminal and the third MOS transistor M3The drain electrodes of the two electrodes are connected;
    the second operational amplifier AMP2The positive electrode of the power supply is grounded, and the second operational amplification is carried outDevice AMP2And the negative electrode of the power supply and the second operational amplifier AMP2The inverting input ends of the two are connected;
    the first resistor R1One end of the first MOS transistor and the third MOS transistor M3Is connected to the drain of the first resistor R1And the other end of the first resistor and a second resistor R2Connected to a second resistor R2Grounding;
    the first operational amplifier AMP1And the second resistor R2The non-grounding ends of the two are connected;
    the third MOS transistor M3The drain electrode of the transistor is connected with the output end V of the multistage pre-compensation circuitout。
CN201910661510.6A 2019-07-22 2019-07-22 LDO (low dropout regulator) pre-compensation circuit Active CN110262617B (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN206162234U (en) * 2016-09-14 2017-05-10 成都旋极星源信息技术有限公司 Weighting current feedback's low dropout regulator
CN106959717A (en) * 2016-01-12 2017-07-18 上海和辉光电有限公司 Low-pressure linear voltage regulator circuit and mobile terminal
CN107885268A (en) * 2016-09-29 2018-04-06 联芯科技有限公司 Negative feedback current source circuit and electronic equipment
US10067519B2 (en) * 2011-09-02 2018-09-04 Rambus Inc. On-chip regulator with variable load compensation

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10067519B2 (en) * 2011-09-02 2018-09-04 Rambus Inc. On-chip regulator with variable load compensation
CN106959717A (en) * 2016-01-12 2017-07-18 上海和辉光电有限公司 Low-pressure linear voltage regulator circuit and mobile terminal
CN206162234U (en) * 2016-09-14 2017-05-10 成都旋极星源信息技术有限公司 Weighting current feedback's low dropout regulator
CN107885268A (en) * 2016-09-29 2018-04-06 联芯科技有限公司 Negative feedback current source circuit and electronic equipment

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
一种自给基准参考电压的前置稳压器设计与研究;冯伟等;《南开大学学报(自然科学版)》;20160630;第49卷(第3期);第59-64页 *

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