CN110262617A - LD0 pre-compensation circuit - Google Patents
LD0 pre-compensation circuit Download PDFInfo
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- CN110262617A CN110262617A CN201910661510.6A CN201910661510A CN110262617A CN 110262617 A CN110262617 A CN 110262617A CN 201910661510 A CN201910661510 A CN 201910661510A CN 110262617 A CN110262617 A CN 110262617A
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- 239000004065 semiconductor Substances 0.000 claims description 56
- 230000000694 effects Effects 0.000 abstract description 4
- 230000008901 benefit Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 230000006641 stabilisation Effects 0.000 description 2
- 238000011105 stabilization Methods 0.000 description 2
- 230000033228 biological regulation Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
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- 239000000203 mixture Substances 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
Classifications
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/625—Regulating voltage or current wherein it is irrelevant whether the variable actually regulated is AC or DC
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- Automation & Control Theory (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
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Abstract
The invention discloses a kind of LD0 pre-compensation circuits, it includes multistage pre-compensation circuit, capacitor and LDO chip；The output end V of the multistage pre-compensation circuitoutIt is connect with capacitor C, capacitor C ground connection；The output end V of the multistage pre-compensation circuitoutIt is also connect with the input terminal of LDO chip, the output end ground connection of LDO chip.The present invention is compensated by multistage pre-compensation circuit, and multistage pre-compensation circuit is designed and improved, so that the present invention has the characteristics that system is stable, frequency compensation is convenient and power supply rejection ratio is high, noise cancellation can be carried out to system in high frequency, achieve superior using effect.
Description
Technical field
The present invention relates to a kind of pre-compensation circuit, especially a kind of LD0 pre-compensation circuit.
Background technique
LD0 is a kind of linear voltage regulator, using the transistor or field-effect tube (FET) run in its linear region, from
The voltage of excess is subtracted in the input voltage of application, generates the output voltage through overregulating.So-called pressure drop voltage, refers to voltage-stablizer
The minimum value of input voltage and output voltage difference needed for output voltage is maintained within its rated value or more 100mV.Just
LD0 (low pressure drop) voltage-stablizer of output voltage is used as PNP usually using power transistor (also referred to as transmission equipment).This crystal
Pipe allows to be saturated, so voltage-stablizer can have a low-down pressure drop voltage, usually 200mV or so；In contrast, using
The pressure drop of the conventional linear voltage-stablizer of NPN composite power source transistor is 2V or so.Negative output LD0 uses transmitting of the NPN as it
Equipment, operational mode LD0 similar with the PNP equipment of positive output LD0 are the meanings of low pressure drop.Low pressure drop (LD0) linear voltage stabilization
The cost of device is low, and low noise, quiescent current is small, these are its outstanding advantages, and the outward element that it is needed is also seldom, usually only
Need one or two of shunt capacitance；But there is a problem of that power supply rejection ratio is lower.
Summary of the invention
The object of the present invention is to provide a kind of LD0 pre-compensation circuits.The present invention pass through multistage pre-compensation circuit into
Row compensation, and multistage pre-compensation circuit is designed and improved, so that the present invention has system stabilization, frequency compensation
The convenient and high feature of power supply rejection ratio can carry out noise cancellation to system in high frequency, achieve superior using effect.
Technical solution of the present invention: LD0 pre-compensation circuit, including
Including multistage pre-compensation circuit, capacitor C and LD0 chip；
The output end V of the multistage pre-compensation circuitoutIt is connect with capacitor C, capacitor C ground connection；The multistage is preposition
The output end V of compensation circuitoutIt is also connect with the input terminal of LD0 chip, the output end ground connection of LD0 chip.
In above-mentioned LD0 pre-compensation circuit, the multistage pre-compensation circuit includes the first operational amplifier AMP1、
Second operational amplifier AMP2, the first metal-oxide-semiconductor M1, the second metal-oxide-semiconductor M2, third metal-oxide-semiconductor M3, the first rheostat RP1, the second rheostat
RP2, third rheostat RP3, first resistor R1With second resistance R2, in which:
The first operational amplifier AMP1Normal phase input end access pre-compensation circuit input voltage VOD；
The first metal-oxide-semiconductor M1Grid and the first operational amplifier AMP1Voltage output end Vout1It is connected, described the
One metal-oxide-semiconductor M1Drain electrode and the second metal-oxide-semiconductor M2Source electrode be connected, the first metal-oxide-semiconductor M1Source electrode ground connection；The first metal-oxide-semiconductor M1's
Source electrode and the second metal-oxide-semiconductor M2Grid be connected；
The second metal-oxide-semiconductor M2Grid and third metal-oxide-semiconductor M3Grid be connected, the second metal-oxide-semiconductor M2Drain electrode and third
Metal-oxide-semiconductor M3Drain electrode be connected；
The second metal-oxide-semiconductor M2Drain electrode and the first rheostat RP1One end be connected, the first rheostat RP1The other end
Access on-load voltage VDD；
The second operational amplifier AMP2Normal phase input end and the second rheostat RP2One end be connected, the second variable resistance
Device RP2One end and the second metal-oxide-semiconductor M2Drain electrode be connected, second operational amplifier AMP2Normal phase input end also with third variable resistance
Device RP3One end be connected, third rheostat RP3Other end ground connection；
The second operational amplifier AMP2Voltage output end Vout2With third metal-oxide-semiconductor M3Grid be connected；Described
Second operational amplifier AMP2Inverting input terminal and third metal-oxide-semiconductor M3Source electrode be connected；
The second operational amplifier AMP2Positive pole ground connection, second operational amplifier AMP2Power cathode with
Second operational amplifier AMP2Inverting input terminal be connected；
The first resistor R1One end and third metal-oxide-semiconductor M3Source electrode be connected, first resistor R1The other end and second electricity
Hinder R2It is connected, second resistance R2Ground connection；
The first operational amplifier AMP1Reverse input end and second resistance R2Ungrounded end be connected；
The third metal-oxide-semiconductor M3Source electrode pick out the output end V of multistage pre-compensation circuitout。
Compared with prior art, the invention has the following advantages:
1, the present invention is opened by the multistage pre-compensation circuit of setting and is compensated to system, wherein multistage pre-compensation circuit
Output end VoutIt is connect with capacitor C, capacitor C ground connection；The output end V of multistage pre-compensation circuitoutAlso with the input of LD0 chip
End connection, the output end ground connection of LD0 chip；The present invention is compensated by multistage pre-compensation circuit, and to multistage preposition
Compensation circuit is designed and has been improved, so that the present invention has, system is stable, frequency compensation is convenient and power supply rejection ratio is high
Feature can carry out noise cancellation to system in high frequency, achieve superior using effect.
2, preferably, the present invention passes through the first operational amplifier AMP1With second operational amplifier AMP2Carry out two-stage increasing
Benefit compensation, realizes and carries out pre-compensating control to LD0, directly to be controlled from being input to output, while can be in high frequency
Noise cancellation is carried out to whole system.
Detailed description of the invention
Fig. 1 is circuit diagram of the invention；
Fig. 2 is the circuit block diagram of existing LD0 compensation circuit.
Specific embodiment
The present invention is further illustrated with reference to the accompanying drawings and examples, but be not intended as to the present invention limit according to
According to.
Embodiment: a kind of LD0 pre-compensation circuit includes multistage pre-compensation circuit, capacitor C and LD0 as shown in Figure 1:
Chip；
The output end V of the multistage pre-compensation circuitoutIt is connect with capacitor C, capacitor C ground connection；The multistage is preposition
The output end V of compensation circuitoutIt is also connect with the input terminal of LD0 chip, the output end ground connection of LD0 chip；
The multistage pre-compensation circuit includes the first operational amplifier AMP1, second operational amplifier AMP2, first
Metal-oxide-semiconductor M1, the second metal-oxide-semiconductor M2, third metal-oxide-semiconductor M3, the first rheostat RP1, the second rheostat RP2, third rheostat RP3, first
Resistance R1With second resistance R2, in which:
The first operational amplifier AMP1Normal phase input end access pre-compensation circuit input voltage VOD；It is described
The first metal-oxide-semiconductor M1Grid and the first operational amplifier AMP1Voltage output end Vout1It is connected, the first metal-oxide-semiconductor M1's
Drain electrode and the second metal-oxide-semiconductor M2Source electrode be connected, the first metal-oxide-semiconductor M1Source electrode ground connection；The first metal-oxide-semiconductor M1Source electrode and second
Metal-oxide-semiconductor M2Grid be connected；The second metal-oxide-semiconductor M2Grid and third metal-oxide-semiconductor M3Grid be connected, the second metal-oxide-semiconductor M2's
Drain electrode and third metal-oxide-semiconductor M3Drain electrode be connected；The second metal-oxide-semiconductor M2Drain electrode and the first rheostat RP1One end be connected,
First rheostat RP1The other end access on-load voltage VDD；The second operational amplifier AMP2Normal phase input end and
Two rheostat RP2One end be connected, the second rheostat RP2One end and the second metal-oxide-semiconductor M2Drain electrode be connected, the second operation amplifier
Device AMP2Normal phase input end also with third rheostat RP3One end be connected, third rheostat RP3Other end ground connection；Described
Two operational amplifier AMP2Voltage output end Vout2With third metal-oxide-semiconductor M3Grid be connected；The second operational amplifier
AMP2Inverting input terminal and third metal-oxide-semiconductor M3Source electrode be connected；The second operational amplifier AMP2Positive pole connect
Ground, second operational amplifier AMP2Power cathode and second operational amplifier AMP2Inverting input terminal be connected；First electricity
Hinder R1One end and third metal-oxide-semiconductor M3Source electrode be connected, first resistor R1The other end and second resistance R2It is connected, second resistance R2
Ground connection；The first operational amplifier AMP1Reverse input end and second resistance R2Ungrounded end be connected；The third
Metal-oxide-semiconductor M3Source electrode pick out the output end V of multistage pre-compensation circuitout。
As shown in Fig. 2, the basic frame structure of existing LD0 circuit is respectively by operational amplifier AMP, driving tube M0, point
Piezoresistance RL, RrComposition.By loading reference voltage V to the normal phase input end of operational amplifier AMPn, divider resistance RL, RrTo base
Quasi- voltage VnSignal is sampled, and operational amplifier AMP is by comparison resistance RL, RrPartial pressure and reference voltage VnSize, then adjust
The grid M of whole driving tube0Voltage levels stabilize the output voltage value.In different applications, LD0 circuit is usually required that
There is higher power supply rejection ratio, i.e., under light load or heavy load condition, influence of the power source change to output voltage, it is desirable that more
It is small better.Influence of the performance of operational amplifier module to the performance of entire LD0 is huge in LD0.And existing LD0 circuit
Compensating gain is small, directly affects the performance of LD0 system, so that LD0 system power supply inhibits poorer than small and load regulation.
The present invention is opened by the multistage pre-compensation circuit of setting and is compensated to system, wherein multistage pre-compensation circuit
Output end VoutIt is connect with capacitor C, capacitor C ground connection；The output end V of multistage pre-compensation circuitoutAlso with the input terminal of LD0 chip
Connection, the output end ground connection of LD0 chip；The present invention is compensated by multistage pre-compensation circuit, and to multistage preposition benefit
It repays circuit to be designed and improved, so that the present invention has the spy that system is stable, frequency compensation is convenient and power supply rejection ratio is high
Point can carry out noise cancellation to system in high frequency, achieve superior using effect.
Claims (2)
1.LD0 pre-compensation circuit, it is characterised in that: including multistage pre-compensation circuit, capacitor C and LDO chip；
The output end V of the multistage pre-compensation circuitoutIt is connect with capacitor C, capacitor C ground connection；The multistage pre-compensating
The output end V of circuitoutIt is also connect with the input terminal of LDO chip, the output end ground connection of LDO chip.
2. LD0 pre-compensation circuit according to claim 2, it is characterised in that: the multistage pre-compensation circuit packet
Include the first operational amplifier AMP1, second operational amplifier AMP2, the first metal-oxide-semiconductor M1, the second metal-oxide-semiconductor M2, third metal-oxide-semiconductor M3,
One rheostat RP1, the second rheostat RP2, third rheostat RP3, first resistor R1With second resistance R2, in which:
The first operational amplifier AMP1Normal phase input end access pre-compensation circuit input voltage VOD；
The first metal-oxide-semiconductor M1Grid and the first operational amplifier AMP1Voltage output end Vout1It is connected, described first
Metal-oxide-semiconductor M1Drain electrode and the second metal-oxide-semiconductor M2Source electrode be connected, the first metal-oxide-semiconductor M1Source electrode ground connection；The first metal-oxide-semiconductor M1Source
Pole and the second metal-oxide-semiconductor M2Grid be connected；
The second metal-oxide-semiconductor M2Grid and third metal-oxide-semiconductor M3Grid be connected, the second metal-oxide-semiconductor M2Drain electrode and the 3rd MOS
Pipe M3Drain electrode be connected；
The second metal-oxide-semiconductor M2Drain electrode and the first rheostat RP1One end be connected, the first rheostat RP1The other end access
On-load voltage VDD；
The second operational amplifier AMP2Normal phase input end and the second rheostat RP2One end be connected, the second rheostat
RP2One end and the second metal-oxide-semiconductor M2Drain electrode be connected, second operational amplifier AMP2Normal phase input end also with third rheostat
RP3One end be connected, third rheostat RP3Other end ground connection；
The second operational amplifier AMP2Voltage output end Vout2With third metal-oxide-semiconductor M3Grid be connected；Described second
Operational amplifier AMP2Inverting input terminal and third metal-oxide-semiconductor M3Source electrode be connected；
The second operational amplifier AMP2Positive pole ground connection, second operational amplifier AMP2Power cathode and second
Operational amplifier AMP2Inverting input terminal be connected；
The first resistor R1One end and third metal-oxide-semiconductor M3Source electrode be connected, first resistor R1The other end and second resistance R2
It is connected, second resistance R2Ground connection；
The first operational amplifier AMP1Reverse input end and second resistance R2Ungrounded end be connected；
The third metal-oxide-semiconductor M3Source electrode pick out the output end V of multistage pre-compensation circuitout。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910661510.6A CN110262617B (en) | 2019-07-22 | 2019-07-22 | LDO (low dropout regulator) pre-compensation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910661510.6A CN110262617B (en) | 2019-07-22 | 2019-07-22 | LDO (low dropout regulator) pre-compensation circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110262617A true CN110262617A (en) | 2019-09-20 |
| CN110262617B CN110262617B (en) | 2020-10-27 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910661510.6A Active CN110262617B (en) | 2019-07-22 | 2019-07-22 | LDO (low dropout regulator) pre-compensation circuit |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN206162234U (en) * | 2016-09-14 | 2017-05-10 | 成都旋极星源信息技术有限公司 | Weighting current feedback's low dropout regulator |
| CN106959717A (en) * | 2016-01-12 | 2017-07-18 | 上海和辉光电有限公司 | Low-pressure linear voltage regulator circuit and mobile terminal |
| CN107885268A (en) * | 2016-09-29 | 2018-04-06 | 联芯科技有限公司 | Negative feedback current source circuit and electronic equipment |
| US10067519B2 (en) * | 2011-09-02 | 2018-09-04 | Rambus Inc. | On-chip regulator with variable load compensation |
-
2019
- 2019-07-22 CN CN201910661510.6A patent/CN110262617B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10067519B2 (en) * | 2011-09-02 | 2018-09-04 | Rambus Inc. | On-chip regulator with variable load compensation |
| CN106959717A (en) * | 2016-01-12 | 2017-07-18 | 上海和辉光电有限公司 | Low-pressure linear voltage regulator circuit and mobile terminal |
| CN206162234U (en) * | 2016-09-14 | 2017-05-10 | 成都旋极星源信息技术有限公司 | Weighting current feedback's low dropout regulator |
| CN107885268A (en) * | 2016-09-29 | 2018-04-06 | 联芯科技有限公司 | Negative feedback current source circuit and electronic equipment |
Non-Patent Citations (1)
| Title |
|---|
| 冯伟等: "一种自给基准参考电压的前置稳压器设计与研究", 《南开大学学报(自然科学版)》 * |
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| CN110262617B (en) | 2020-10-27 |
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