CN107102674A - Low pressure difference linear voltage regulator - Google Patents
Low pressure difference linear voltage regulator Download PDFInfo
- Publication number
- CN107102674A CN107102674A CN201610097360.7A CN201610097360A CN107102674A CN 107102674 A CN107102674 A CN 107102674A CN 201610097360 A CN201610097360 A CN 201610097360A CN 107102674 A CN107102674 A CN 107102674A
- Authority
- CN
- China
- Prior art keywords
- voltage
- output
- input
- low pressure
- pressure difference
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
Abstract
The invention discloses a kind of low pressure difference linear voltage regulator, including：Bleeder circuit, for producing feedback voltage according to the output voltage of low pressure difference linear voltage regulator；Error amplifier, first voltage is exported for feedback voltage to be compared with the first reference voltage, and according to comparative result；Buffer, for entering row buffering to first voltage；Output transistor, its first end couples the output end of buffer, the second end coupling bleeder circuit；Differential circuit, its first input end is used to receive the second reference voltage, and its second input is used to receive first voltage, and second voltage is generated in its output；Between first capacitor, the first end for being coupled to the output end of the differential circuit and the output transistor.By the above-mentioned means, the low pressure difference linear voltage regulator of the present invention has faster response speed, it can quickly suppress the change of the output voltage of low pressure difference linear voltage regulator, to keep the steady of output voltage.
Description
Technical field
The present invention relates to technical field of power management, more particularly to a kind of low pressure difference linear voltage regulator
(Low Dropout Regulator,LDO)。
Background technology
Low pressure difference linear voltage regulator has low cost, output voltage stabilization, output ripple and low, low noise
Sound and the advantages of without electromagnetic interference, therefore it is widely used in communication equipment, automobile electronics
In medical instruments and equipment.
Fig. 1 is the schematic diagram of traditional low dropout linear regulator structure.As shown in figure 1, traditional
Low pressure difference linear voltage regulator include error amplifier EA1, bleeder circuit, output transistor T.
System is by bleeder circuit (including resistance R2 and R3) to output voltage VO' carry out partial pressure sampling
Generate feedback voltage VFB.An error amplifier EA1 input receives the feedback voltage VFB,
Another input receives reference voltage VREF, error amplifier EA1 output end connection output crystal
Pipe T grid.Error amplifier EA1 is by feedback voltage VFBWith reference voltage VREFIt is compared
Afterwards, outputting drive voltage V after its difference is amplifiedG' driving output transistor T.
When causing output voltage V due to loading condition or other conditionsO' when changing, error is put
Big device EA1 output voltage can also change therewith, and then control output transistor T conducting degree,
So that output voltage VO' keep constant.
However, when external condition change causes output voltage VO' change when, to the response of change speed
Degree is the important indicator for investigating low pressure difference linear voltage regulator performance.For example, occurring in load current anxious
During drastic change, output voltage VO' also can drastically change, this change is fed back to by divider resistance
Error amplifier EA1 input, and error amplifier EA1 response needs the regular hour,
Prevent output transistor T grid influences defeated from the drastically change of response output voltage quickly
Go out the stability of voltage and the response characteristic of low pressure difference linear voltage regulator.
The content of the invention
In view of this, the present invention provides a kind of low pressure difference linear voltage regulator, with faster response speed
Degree, can quickly suppress the change of the output voltage of low pressure difference linear voltage regulator.
Based on embodiments of the present invention, the present invention provides a kind of low pressure difference linear voltage regulator, and it is wrapped
Include：Bleeder circuit, for producing feedback voltage according to the output voltage of low pressure difference linear voltage regulator；
Error amplifier, for feedback voltage to be compared with the first reference voltage, and according to comparing knot
Fruit exports first voltage from the output end of error amplifier；Buffer, couples the defeated of error amplifier
Go out end, for entering row buffering to first voltage；Output transistor, its first end coupling buffer
Output end, the second end coupling bleeder circuit；Differential circuit, its first input end is used to receive second
Reference voltage, its second input is coupled to the output end of error amplifier to receive first voltage,
Second voltage is generated in its output；And first capacitor, its first end coupling differential circuit
Output end, the second end couple output transistor first end.
Based on embodiments of the present invention, the present invention also provides a kind of low pressure difference linear voltage regulator, wraps
Include：Bleeder circuit, for producing feedback electricity according to the output voltage of the low pressure difference linear voltage regulator
Pressure；First negative feedback loop, receives the feedback voltage and the first reference voltage, and will be described anti-
Feedthrough voltage and first reference voltage are compared, and generate first voltage, and to the described first electricity
Pressure carries out reversely buffering generation tertiary voltage；Second negative feedback loop, receive the first voltage and
Second reference voltage, generates second voltage；And output transistor, first end coupling described first
Negative feedback loop and second negative feedback loop are used to receive the tertiary voltage and described second
Voltage, the second end couples the bleeder circuit as the output end of the low pressure difference linear voltage regulator.
The low pressure difference linear voltage regulator that the present invention is provided has faster response speed, can quickly press down
The change of the output voltage of low pressure difference linear voltage regulator processed, to keep the defeated of low pressure difference linear voltage regulator
Go out the steady of voltage.
Brief description of the drawings
Fig. 1 is the schematic diagram of the low dropout linear regulator structure of prior art；
Fig. 2 is the structural representation of the low pressure difference linear voltage regulator in an embodiment of the present invention；
Fig. 3 changes over time for output transistor T output current Io, low voltage difference in the prior art
The output voltage V of linear voltage regulatorO' change over time and drive output transistor T driving voltage
VG' change over time, and differential circuit 11 and output are brilliant in low pressure difference linear voltage regulator of the present invention
Output voltage V during the T connections of body pipeOChange over time and drive output transistor T driving voltage
VGThe schematic diagram changed over time.
Embodiment
The invention discloses a kind of low pressure difference linear voltage regulator, as shown in Fig. 2 Fig. 2 is the present invention
The structural representation of low pressure difference linear voltage regulator in one embodiment.The low pressure difference linear voltage regulator
Including bleeder circuit 10, error amplifier EA1, buffer BF, output transistor T, differential
The capacitor C1 of circuit 11 and first.
Bleeder circuit 10 is according to the output voltage V of low pressure difference linear voltage regulatorOProduce feedback voltage
VFB.Specifically, bleeder circuit 10 includes second resistance device R2 and 3rd resistor device R3, second
Resistor R2 first end is connected with output transistor T the second end, and the of second resistance device R2
Two ends are connected with 3rd resistor device R3 first end, 3rd resistor device R3 the second end ground connection
GND.In the present embodiment, by second resistance device R2 the second end and 3rd resistor device R3
First end exports feedback voltage VFB, i.e. feedback voltage V is used as using 3rd resistor device R3 voltageFB。
Set it should be understood that second resistance device R2 and 3rd resistor device R3 resistance value are specific according to actual needs
Put.
Error amplifier EA1 is used for feedback voltage VFBWith the first reference voltage VREF1It is compared,
And first voltage V1 is exported from error amplifier EA1 output end according to comparative result.Specifically,
Error amplifier EA1 compares feedback voltage VFBWith the first reference voltage VREF1, and by the difference of the two
Output first voltage V1 after value amplification.
Buffer BF coupling error amplifiers EA1 output end, for entering to first voltage V1
Row buffering is so as to drive output transistor T.
In the present embodiment, buffer BF is reverse buffer, and error amplifier EA1's is anti-phase
Input receives the first reference voltage VREF1, error amplifier EA1 normal phase input end is coupled to
Between two resistor R2 the second end and 3rd resistor device R3 first end, to receive feedback voltage
VFB(as shown in Figure 2).Because buffer BF is reverse buffer, therefore buffer BF is to the
One voltage V1 has acting in opposition.Specifically, when output voltage Vo rises, feedback voltage VFB
During rising, the first voltage V1 of now error amplifier EA1 outputs rises, BF pairs of buffer
First voltage V1 is reversely buffered, the tertiary voltage V3 of buffer BF output end output because
And decline；Conversely, when output voltage Vo declines, feedback voltage VFBDuring decline, now error
The first voltage V1 of amplifier EA1 outputs declines, and buffer BF is carried out to first voltage V1
Reversely buffering, buffer BF output end output tertiary voltage V3 thus rise.
Output transistor T first end is connected with buffer BF output end, output transistor T
The second end coupling bleeder circuit 10 and export output voltage VO, i.e. the of output transistor T
Two ends are as the output end of low pressure difference linear voltage regulator, and output transistor T the 3rd end is used as low pressure
The input of difference linear constant voltage regulator, receives input voltage vin.
In the present embodiment, output transistor T can be N-type metal-oxide-semiconductor, output transistor T
First end be N-type metal-oxide-semiconductor grid, output transistor T the second end is N-type MOS
The source electrode of pipe, output transistor T the 3rd end is the drain electrode of N-type metal-oxide-semiconductor.
It should be understood that in other embodiments, output transistor T can be NPN type triode,
Output transistor T first end is the base stage of NPN type triode, the second of output transistor T
The emitter stage for NPN type triode is held, output transistor T the 3rd end is NPN type triode
Colelctor electrode.
The first input end of differential circuit 11 is used to receive the second reference voltage VREF2, its second input
End is coupled to error amplifier EA1 output end to receive first voltage V1, and in its output end
Place generation second voltage V2.Wherein, differential circuit 11 (amplifies including error amplifier EA2
Device), the second capacitor C2 and first resistor device R1.Error amplifier EA2 positive input
Receive the second reference voltage VREF2, i.e. the first input end of error amplifier EA2 is used as differential circuit
11 first input end, error amplifier EA2 reverse input end couples the second capacitor C2's
Second end, error amplifier EA2 output end as differential circuit 11 output end.Second electricity
Container C2 first end as differential circuit 11 the second input, for receiving first voltage
V1.First resistor device R1 is coupled between error amplifier EA2 reverse input end and output end.
First capacitor C1 first end couples the output end of differential circuit 11, and the coupling of the second end is defeated
Go out transistor T first end.According to the characteristic of capacitor, in the output end of differential circuit 11
When second voltage V2 changes, the first capacitor C1 enables to output transistor T first end
Voltage follow second voltage V2 synchronously change, to control output transistor T conducting degree.
Specifically, in normal operation, i.e. feedback voltage VFBKeep constant, itself and reference voltage
VREFIt is identical, the first capacitor C1 the first terminal voltage value and the first capacitor C1 the second end electricity
Pressure value is equal, output transistor T first end is now flowed in or out without electric current, equivalent to micro-
Parallel circuit 11 is disconnected with output transistor T.When working condition changes, i.e. output electricity
When pressing Vo changes, feedback voltage VFBAlso change so that the output end of differential circuit 11 exports
Two voltage V2 change, and can now cause the magnitude of voltage and the first electricity of the first capacitor C1 first end
The magnitude of voltage at container C1 the second end is unequal, thus has electric current from the output of differential circuit 11
End flows to output transistor T first end or has first end stream of the electric current from output transistor T
Go out, so as to control output transistor T conducting degree, and then change output voltage Vo, suppress defeated
Go out voltage Vo change.
In addition, in some embodiments, can also have in the output end of low pressure difference linear voltage regulator
There is the 3rd capacitor C3, the 3rd capacitor C3 one end connects output transistor T the second end,
The other end is grounded GND.3rd capacitor C3 is that important electric charge stores and provided device, can be had
Effect reduces because output voltage falls and overshooted when load current drastically changes.
Figure it is seen that error amplifier EA1, buffer BF, output transistor T and
Bleeder circuit 10 constitutes the first backfeed loop, error amplifier EA1, differential circuit 11, first
Capacitor C1, output transistor T and the composition of bleeder circuit 10 and the first backfeed loop it is parallel the
Two backfeed loops.The input signal that first backfeed loop is received is feedback voltage VFBWith first with reference to electricity
Press VREF1, the input signal that second feed back loop is received is first voltage V1 and the second reference voltage
VREF2。
In the present embodiment, feedback voltage VFBWith output voltage VOIt is linear ratio relation, tool
Body is shown below：
VFB=VO*R3/(R2+R3) (1)
Because error amplifier EA1 normal phase input end receives feedback voltage VFB, therefore the
One voltage V1 variation delta V1 and feedback voltage VFBWith the first reference voltage VREF1Difference
It is linearly proportional, shown in formula specific as follows：
Δ V1=a* [VFB-VREF1] (2)
Wherein, a is error amplifier EA1 multiplication factor, [VFB-VREF1] represent feedback
Voltage VFBWith the first reference voltage VREF1Difference.
Relation between output voltage and input voltage that differential circuit 11 is exported is formula specific as follows
It is shown：
Wherein, the v in above-mentioned formulai(t) input voltage of differential circuit is represented, in this embodiment
In, i.e. first voltage V1.vo(t) voltage of the output end of differential circuit is represented, in this embodiment
In, i.e. second voltage V2.R is first resistor device R1 resistance value, and C is the first capacitor C1
Capacitance.
Therefore, the differential relationship in formula (3), the second voltage that differential circuit 11 is exported
V2 changes immediately when its input voltage changes, i.e. the output voltage pair of differential circuit 11
The change of its input voltage is very sensitive.
Work as feedback voltage VFBDuring change, on the first backfeed loop, by error amplifier EA1
Amplification and export first voltage V1 in its output end, and carry out by reverse buffer BF reverse
Buffering, so as to be driven to output transistor T.Meanwhile, on second feed back loop, first
When voltage V1 is inputted to differential circuit 11, by differential circuit error amplifier EA2 it is fast
Speed is amplified and exports second voltage V2.Because the first capacitor C1 first end couples differential circuit
11 output end, the first capacitor C1 the second end coupling reverse buffer BF output end,
Now there is voltage difference in the first capacitor C1 first end with the second end so that the first capacitor C1
Turn on and produce electric current, and according to the first end for flowing to correspondingly change output transistor T of electric current
Magnitude of voltage.
Therefore, the first backfeed loop and second feed back loop collective effect, compared with prior art in only
There is the first backfeed loop, enhance the driving to output transistor T, so as to suppression faster
Output voltage VOChange, faster maintain output voltage VOStabilization.
The operation principle of the low pressure difference linear voltage regulator is illustrated with reference to Fig. 2 and Fig. 3.
Fig. 3 changes over time for output transistor T output current Io, low voltage difference in the prior art
The output voltage V of linear voltage regulatorO' change over time and drive output transistor T driving voltage
VG' change over time, and differential circuit 11 and output are brilliant in low pressure difference linear voltage regulator of the present invention
Output voltage V during the T connections of body pipeOChange over time and drive output transistor T driving voltage
VGThe schematic diagram changed over time.
Specifically, when before time t 1, output voltage VODuring in stable state, error is put
The feedback voltage V that big device EA1 two inputs are received respectivelyFBWith the first reference voltage VREF1Phase
Deng, now, its export first voltage V1 be depending on load current (i.e. output current) Io
A fixed value Vinitial.In the case where the load that the low pressure difference linear voltage regulator is connected is determined,
Voltage VinitialFor determination value.In output voltage VOWhen changing, error amplifier EA1
The first voltage V1 of output is its fixed voltage VinitialPlus its variation delta V1.
Likewise, ought before time t 1, output voltage VODuring in stable state, differential electricity
First voltage V1 (that is, the fixed value V that road 11 is receivedinitial) and the second reference voltage VREF2Phase
Deng, its output end second voltage V2 also with first voltage V1 and the second reference voltage VREF2It is equal.
Now the first capacitor C1 two ends are in stable state.That is, as output voltage VOIt is in
During stable state, equivalent to being off between second feed back loop and output transistor T,
That is, in normal work, the output voltage V of differential circuit 11 and low pressure difference linear voltage regulatorOIt is
Isolation.
When since time t1, output transistor T output current Io is gradually reduced, output is electric
Press VOWhen being begun to ramp up by stable state, feedback voltage VFBAlso proportionally rise, error amplification
The first voltage V1 of device EA1 output ends output is also rapid therewith to be risen.On second feed back loop,
Because the reverse input end of error amplifier EA2 in differential circuit 11 receives first voltage V1, because
The second voltage V2 of this differential circuit 11 declines rapidly, the electricity of the first capacitor C1 first end
Pressure value synchronously declines rapidly with second voltage V2.Meanwhile, on the first backfeed loop, error is put
Big device EA1 output first voltage V1 export tertiary voltage V3 by reverse buffer BF, this
When the first capacitor C1 the second end magnitude of voltage be tertiary voltage V3.Due to differential circuit 11
When the first voltage V1 that input is received rises, the second voltage V2 meetings that differential circuit 11 is exported
Rapid to decline, i.e. the voltage of the first capacitor C1 first ends declines rapidly, due to the first capacitor
The continuity of C1 both end voltages, when the voltage of the first capacitor C1 first ends declines rapidly, meeting
So that the voltage at first the second ends of capacitor C1 also followed by decline.So that output transistor T
The driving voltage of grid decline at faster speed.That is, the first backfeed loop and second
Backfeed loop causes the driving voltage V of output transistor T first end (grid) jointlyGRapidly
Decline and keep it turned off.Therefore, compared with the first backfeed loop not comprising differential circuit 11,
Present embodiment is under the first backfeed loop and second feed back loop collective effect, output transistor T
First end driving voltage VGDecline at faster speed, output voltage Vo climbing speed becomes
Slow, i.e. Vo change is inhibited.
As shown in figure 3, during time t1 to t2, with output transistor T's in the prior art
Driving voltage VG' change with time and compare, present embodiment is in the first backfeed loop and second
Under backfeed loop collective effect, output transistor T driving voltage VGThe slope declined with the time
It is bigger, output transistor T driving voltage VGThan the driving of output transistor T in the prior art
Voltage VG' decline degree enhancing, thus, can more obviously suppress in present embodiment output electricity
Press Vo rising.Further, with prior art output voltage VO' change over time and compare, this
In embodiment, output voltage Vo climbing speed becomes more slow, i.e., Vo change by
Stronger suppression.
To time t2, output voltage Vo value rising reaches to be started to return to stable state after maximum
Fall, from figure 3, it can be seen that during time t2 to time t3, in the first backfeed loop and
Under two backfeed loop collective effects, the output voltage Vo ratios in present embodiment are defeated in the prior art
Go out voltage Vo ', declined with faster speed and the state that tends towards stability.
When since time t4, output transistor T output current Io is gradually increasing, output is electric
Press VOWhen being gradually reduced by stable state, feedback voltage VFBAlso proportionally decline, meanwhile, by mistake
The first voltage V1 of poor amplifier EA1 output ends output also declines therewith.In second feed back loop
On, because the reverse input end of error amplifier EA2 in differential circuit 11 receives first voltage V1,
Therefore the second voltage V2 of the output end of differential circuit 11 rises rapidly.Meanwhile, the first backfeed loop
On, error amplifier EA1 output first voltage V1 export the 3rd by reverse buffer BF
Voltage V3, now the magnitude of voltage at the first capacitor C1 the second end is tertiary voltage V3.Due to
When the first voltage V1 that the input of differential circuit 11 is received declines, differential circuit 11 export the
Two voltage V2 can rise rapidly, i.e. the voltage of the first capacitor C1 first end can rise rapidly,
Due to the continuity of capacitor voltage at both ends, in the rapid rising of the first capacitor C1 first ends,
The voltage at first the second ends of capacitor C1 can be caused also to followed by rising.That is, first is anti-
Road and second feed back loop collective effect are fed back to so that output transistor T first end (grid)
Driving voltage VGIt is more rapid to rise.Due to the driving voltage V of output transistor T first endG
Output transistor T conducting degree is controlled, thus, since time t4, fed back to first
Under road and second feed back loop collective effect, driving voltage VGRise rapidly and cause output crystal
The electric current increase at pipe T the second end, so as to draw high the output voltage V tapered into upwardsO,
So as to limit output voltage VOFurther diminish.
As shown in figure 3, during time t4 to t5, with output transistor T's in the prior art
Driving voltage VG' change with time and compare, present embodiment is in the first backfeed loop and second
Under backfeed loop collective effect, output transistor T driving voltage VGThe slope changed over time
It is bigger, output transistor T driving voltage VGThan the driving of output transistor T in the prior art
Voltage VG' rise degree enhancing, thus, can more obviously suppress in present embodiment output electricity
Press Vo decline.Further, with prior art output voltage VO' change over time and compare, this
In embodiment, output voltage Vo fall off rate becomes more slow, i.e., Vo change by
Stronger suppression.
To time t5, output voltage Vo value, which drops to after minimum, to be started to fall after rise to stable state,
From figure 3, it can be seen that during time t5 to time t6, it is anti-in the first backfeed loop and second
It is fed back under the collective effect of road, the output voltage Vo ratios in present embodiment export electricity in the prior art
Press VO', gone up with faster speed and the state that tends towards stability.Thus, it is defeated in present embodiment
Stable state can be quickly restored to by going out voltage Vo, greatly reduce the response time of circuit.
Therefore, can be faster by the second feed back loop formation negative-feedback comprising differential circuit
Change to output voltage is responded, the quick output voltage for suppressing low pressure difference linear voltage regulator
Change, can effectively keep low pressure difference linear voltage regulator output voltage it is steady.And stable
Under state, second feed back loop disconnects the connection with output transistor, differential circuit and output circuit
It is isolated, it is to avoid interference to output voltage.
Embodiments of the invention are these are only, are not intended to limit the scope of the invention, it is every
The equivalent structure or equivalent flow conversion made using description of the invention and accompanying drawing content, or directly
Or other related technical fields are used in indirectly, similarly it is included in the patent protection model of the present invention
In enclosing.
Claims (9)
1. a kind of low pressure difference linear voltage regulator, it is characterised in that including：
Bleeder circuit, for producing feedback electricity according to the output voltage of the low pressure difference linear voltage regulator
Pressure；
Error amplifier, for the feedback voltage to be compared with the first reference voltage, and root
According to comparative result first voltage is exported from the output end of the error amplifier；
Buffer, couples the output end of the error amplifier, for being carried out to the first voltage
Buffering；
Output transistor, including it is coupled to the first end of the output end of the buffer, and coupling
To the bleeder circuit and export the second end of the output voltage；
Differential circuit, its first input end is used to receive the second reference voltage, its second input coupling
The output end of the error amplifier is connected to receive the first voltage, in the generation of its output
Second voltage；And
First capacitor, is coupled to the of the output end of the differential circuit and the output transistor
Between one end, wherein, by first capacitor, the first voltage after buffering is followed
The second voltage synchronously changes.
2. low pressure difference linear voltage regulator according to claim 1, it is characterised in that described micro-
Parallel circuit includes：
Amplifier, with first input end, the second input and output end, the of the amplifier
One input is as the first input end of the differential circuit, and the output end of the amplifier is used as institute
State the output end of differential circuit；
Second capacitor, its first end is used as the second input of the differential circuit, its second end
Couple the second input of the amplifier；And
First resistor device, is coupled in the output of the second input and the amplifier of the amplifier
Between end.
3. low pressure difference linear voltage regulator according to claim 2, it is characterised in that described micro-
The amplifier in parallel circuit is error amplifier, and the first input end of the amplifier is positive
Input, the second input of the amplifier is inverting input.
4. low pressure difference linear voltage regulator according to claim 1, it is characterised in that described
Buffer is reverse buffer, and the inverting input of the error amplifier receives first reference
Voltage, the normal phase input end of the error amplifier receives the feedback voltage.
5. low pressure difference linear voltage regulator according to claim 1, it is characterised in that described point
Volt circuit include second resistance device and 3rd resistor device, the first end of the second resistance device with it is described
The second end connection of output transistor, the second end of the second resistance device and the 3rd resistor device
First end connection, the second end ground connection of the 3rd resistor device, by the of the second resistance device
The first end of two ends and the 3rd resistor device exports the feedback voltage.
6. low pressure difference linear voltage regulator according to claim 1, it is characterised in that described defeated
Go out transistor for N-type metal-oxide-semiconductor, the first end of the output transistor is the N-type MOS
The grid of pipe, the second end of the output transistor is the source electrode of the N-type metal-oxide-semiconductor, described
3rd end of output transistor is the drain electrode of the N-type metal-oxide-semiconductor.
7. low pressure difference linear voltage regulator according to claim 1, it is characterised in that described defeated
Go out transistor for NPN type triode, the first end of the output transistor is the NPN type three
The base stage of pole pipe, the second end of the output transistor is the emitter stage of the NPN type triode,
3rd end of the output transistor is the colelctor electrode of the NPN type triode.
8. a kind of low pressure difference linear voltage regulator, it is characterised in that including：
Bleeder circuit, for producing feedback electricity according to the output voltage of the low pressure difference linear voltage regulator
Pressure；
First negative feedback loop, receives the feedback voltage and the first reference voltage, and will be described anti-
Feedthrough voltage and first reference voltage are compared, and generate first voltage, and to the described first electricity
It is pressed into row buffering generation tertiary voltage；
Second negative feedback loop, including differential circuit and capacitor, the differential circuit receive institute
First voltage and the second reference voltage are stated, second voltage is generated, the capacitor is coupled to described micro-
Between the output end of parallel circuit and the first end of the output transistor；And
Output transistor, first end couples first negative feedback loop and second negative-feedback is returned
Road is used to receive the tertiary voltage and the second voltage, and the second end is used as the low pressure difference linearity
The output end of voltage-stablizer, couples the bleeder circuit, wherein, by the capacitor, described the
Second voltage described in three voltage follows synchronously changes.
9. low pressure difference linear voltage regulator according to claim 8, it is characterised in that described micro-
Parallel circuit includes：
Amplifier, with first input end, the second input and output end, the of the amplifier
One input receives second reference voltage as the first input end of the differential circuit, described
The output end of amplifier as the differential circuit output end；
Second capacitor, its first end receives described the as the second input of the differential circuit
One voltage, its second end couples the second input of the amplifier；And
First resistor device, is coupled in the output of the second input and the amplifier of the amplifier
Between end.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610097360.7A CN107102674A (en) | 2016-02-22 | 2016-02-22 | Low pressure difference linear voltage regulator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610097360.7A CN107102674A (en) | 2016-02-22 | 2016-02-22 | Low pressure difference linear voltage regulator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107102674A true CN107102674A (en) | 2017-08-29 |
Family
ID=59658613
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610097360.7A Pending CN107102674A (en) | 2016-02-22 | 2016-02-22 | Low pressure difference linear voltage regulator |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107102674A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109274362A (en) * | 2018-12-03 | 2019-01-25 | 上海艾为电子技术股份有限公司 | Control circuit |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103440019A (en) * | 2013-08-20 | 2013-12-11 | 江苏大学 | Analogy control circuit capable of achieving photovoltaic cell maximum power point tracing |
-
2016
- 2016-02-22 CN CN201610097360.7A patent/CN107102674A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103440019A (en) * | 2013-08-20 | 2013-12-11 | 江苏大学 | Analogy control circuit capable of achieving photovoltaic cell maximum power point tracing |
Non-Patent Citations (1)
| Title |
|---|
| 汤骁: "基于系统芯片应用的高性能低压差线性稳压器设计", 《浙江大学硕士学位论文》 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109274362A (en) * | 2018-12-03 | 2019-01-25 | 上海艾为电子技术股份有限公司 | Control circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107102666A (en) | Low pressure difference linear voltage regulator | |
| CN101714817B (en) | Voltage converter with line loss compensation | |
| CN107102665A (en) | Low pressure difference linear voltage regulator | |
| US8283906B2 (en) | Voltage regulator | |
| CN107688366B (en) | LDO circuit and implementation method of LDO | |
| TWI441007B (en) | Capacitor-free low drop-out voltage regulator and voltage regulating method thereof | |
| US9323264B2 (en) | Voltage regulator apparatus with sensing modules and related operating method thereof | |
| US9379554B2 (en) | Current output circuit and two-wire transmitter | |
| CN110231851B (en) | Output voltage compensation circuit, method, voltage stabilizing circuit and display device | |
| CN109388173B (en) | Current compensation circuit | |
| CN103472882A (en) | Low dropout regulator of integrated slew rate enhancement circuit | |
| CN109388170A (en) | Voltage regulator | |
| CN104881070A (en) | Ultra-low power consumption LDO circuit applied to MEMS | |
| US8866553B2 (en) | Output stage with fast feedback for driving ADC | |
| CN107102668A (en) | Low pressure difference linear voltage regulator | |
| CN103941794A (en) | Series connection type transistor voltage stabilizing circuit with differential amplification function | |
| CN102393779B (en) | LDO circuit with compensation circuit | |
| CN107834850A (en) | DC linear voltage-stabilized power supply circuit | |
| CN107102674A (en) | Low pressure difference linear voltage regulator | |
| CN107102675A (en) | Low pressure difference linear voltage regulator | |
| CN107102667A (en) | Low pressure difference linear voltage regulator | |
| CN107102676A (en) | Low pressure difference linear voltage regulator | |
| CN112558680B (en) | Linear regulator and control circuit thereof | |
| CN113655837A (en) | Linear voltage stabilizer with fast transient response | |
| CN203326882U (en) | Simulation multiplier in switch voltage-stabilizer feedback loop |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20170829 |