CN110233719A - One kind being greater than the detection of 1 modulation index CPM signal clock false-lock and correcting method - Google Patents
One kind being greater than the detection of 1 modulation index CPM signal clock false-lock and correcting method Download PDFInfo
- Publication number
- CN110233719A CN110233719A CN201910535537.0A CN201910535537A CN110233719A CN 110233719 A CN110233719 A CN 110233719A CN 201910535537 A CN201910535537 A CN 201910535537A CN 110233719 A CN110233719 A CN 110233719A
- Authority
- CN
- China
- Prior art keywords
- error
- lock
- signal
- delay
- decision device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 title claims abstract description 17
- 238000000034 method Methods 0.000 title claims abstract description 16
- 238000005070 sampling Methods 0.000 claims description 11
- 238000007476 Maximum Likelihood Methods 0.000 claims description 8
- 230000001186 cumulative effect Effects 0.000 claims description 6
- 238000012545 processing Methods 0.000 claims description 4
- 230000005540 biological transmission Effects 0.000 claims description 3
- 238000011084 recovery Methods 0.000 claims description 3
- 241000208340 Araliaceae Species 0.000 claims 1
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 claims 1
- 235000003140 Panax quinquefolius Nutrition 0.000 claims 1
- 235000008434 ginseng Nutrition 0.000 claims 1
- 230000008569 process Effects 0.000 abstract description 2
- 230000004044 response Effects 0.000 description 7
- 238000009825 accumulation Methods 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000001364 causal effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000001427 coherent effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000013519 translation Methods 0.000 description 1
- 238000009827 uniform distribution Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
- H03L2207/14—Preventing false-lock or pseudo-lock of the PLL
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
One kind being greater than the detection of 1 modulation index CPM signal clock false-lock and correcting method, when the modulation index of CPM signal is the half-integer greater than 1, there are multiple positive slope zero crossings in half of symbol time by the S curve of delay lock loop for signal, it will lead to the wrong lock of delay lock loop, whether error lock occurs by introducing an error-detecting decision device come detecting and tracking ring, when error lock occurs, the output of error accumulator will be more than the thresholding of setting in error-detecting decision device, there are error locks for decision delay locking ring, suitable threshold value is being set, under conditions of weighting coefficient and propulsion interval, push time delay to correct lock-in regime by error detector and the value for resetting error accumulator is 0, so that tracking ring enters correctly tracking process.By being verified in Matlab platform, in the case of different modulation indexs, error-detecting decision device can be appropriately determined wrong lock and delay lock loop is made to reenter correct lock-in regime.
Description
Technical field
The invention belongs to digital communicating fields, and in particular to solve to work as and pass through delay lock greater than 1 modulation index CPM signal
There is caused error lock when multiple positive slope zero crossings in half of symbol in the S curve of ring.
Background technique
Continuous Phase Modulation (Continue Phase Modulation, CPM) is because its bandwidth efficiency is high and has constant
RF envelope and by high praise.The modulated signal of the type especially has in the radio channel with nonlinear amplifier
Attraction, because such modulated signal allows us to make full use of booster output.Although CPM signal has many advantages, such as,
The complexity height of to be the problem of thus bringing be receiver and the difficulty of synchronism are big.
Synchronize be digital communication system and using coherent demodulation analog communication system in an important practical problem.
Since sending and receiving end is not one, both ends distance is remote, and receiving-transmitting sides to be made to be able to carry out the co-ordination to act in agreement, it is necessary to have same
Step to guarantee, synchronize in include that code is synchronous and carrier synchronization, code is synchronous again comprising capturing and two parts of tracking, this patent are main
It is proposed for the error lock problem in code tracking loop.
Code tracking loop abbreviation code ring, major function are to maintain duplication PN (Pseudo-Noise Code) code and receive
Phase is consistent between PN code, to obtain to the code phase and its pseudo-range measurements for receiving signal.The way of realization of code ring is usual
Show as delay locked loop DLL (Delay Locked Loop).Code tracking loop precisely aligns input signal PN for guaranteeing
The position of code.Delay phase-locked loop DLL, also referred to as code be advanced-late tracking loop road.In the loop, pseudo-code generator generates advanced
(E), (P) and lag (L) 3 road signal immediately, they respectively differ 0.5 PN symbol, respectively with go the input signal after carrier wave into
Row is related.The back-and-forth motion of local PN code is judged by observing this 3 road correlation.
When the modulation index of CPM signal is half-integer greater than 1, the S curve of delay lock loop there are multiple zero crossings,
Therefore during being tracked, it may appear that the phenomenon that error lock, this patent proposes to use an inspiration deterministic condition,
Test whether to have occurred wrong lock by introducing error-detecting decision device.
Summary of the invention
The present invention aiming at the shortcomings in the prior art, provide it is a kind of be greater than the detection of 1 modulation index CPM signal clock false-lock and
Correcting method.When the modulation index of CPM signal is the half-integer greater than 1, the S curve of delay lock loop is in half of symbol time
Inside there are multiple zero crossings, whether error lock occurs by introducing an error-detecting decision device come detecting and tracking ring, work as mistake
When false-lock occurs surely, the output of error accumulator can be more than decision threshold after the accumulation of certain time, then determining to prolong at this time
There are error locks for slow locking ring, thus by error-detecting decision device time delay pushed to be correctly oriented with enter correctly with
Track process.
To achieve the above object, the invention adopts the following technical scheme:
One kind being greater than the detection of 1 modulation index CPM signal clock false-lock and correcting method, which is characterized in that including walking as follows
It is rapid:
Step 1: first determining whether that the S curve of delay lock loop is in half of symbol time when signal is by delay lock loop
Whether will appear many places zero crossing, then introduces error-detecting decision device if it exists and carry out detecting whether the feelings there are error lock
Condition;
Step 2: carrying out sampling processing to signal is received, obtain discrete signal;
Step 3: using maximum likelihood estimate, the parameter in discrete signal is estimated;
Step 4: only considering the estimation of time delay, likelihood function is simplified;
Step 5: according to simplified likelihood function, setting the output of error-detecting decision device as a result, carrying out in locking ring
When time restores, error-detecting decision device is started to work, and the cumulative errors by way of weighting;
Step 6: when accumulated error is more than the threshold value of setting, it is wrong that error-detecting decision device just determines that locking ring exists
Lock will push the circumferential correctly lock-in regime of locking to correct, and carry out next round judgement.
To optimize above-mentioned technical proposal, the concrete measure taken further include:
Further, in step 2, to reception signal in time t=kTsSampling processing is carried out, k is natural number, TsFor sampling
Interval, obtains following discrete signal:
Wherein, nR(k) and nI(k) the real and imaginary parts sampling of the received noise of receiver, E are respectively indicatedsIndicate symbol energy
Amount,For argument, α is the symbol of transmission, and θ is signal initial phase, and τ is time delay.
Further, in step 3, all parameters of signal all rely on α, θ and τ in formula 1, it is therefore desirable to from what is received
These parameters are estimated in signal;Using maximum likelihood estimate, three parameters in signal are estimated, formula is obtained
2:
Wherein, Λ indicates likelihood function,The estimated value of respectively α, θ, τ,For noise variance, NL0For subsequence
Length, N are over-sampling rate.
Further, in step 4, only consider time delay estimation, likelihood function is simplified, isolate carrier wave and
The estimated value for sending information symbol obtains formula 3:
Wherein,Indicate that the first order component of maximum likelihood function, A (1) indicate filter with 1/TsRate
Fourier transform after sampling square.
Further, in step 5, enabling the output result of error-detecting decision device is eτ(k)=- Im { A (1) }, is locking
When ring carries out time recovery, error-detecting decision device is just started to work, and passes through weighted cumulative error u (k), and weighted connections
It is as follows:
U (k+1)=(1- ξ) u (k)+ξ eτ(k+1) (4)
Wherein, ξ is weighting coefficient.
Further, in step 6, when locking ring mistake lock, error-detecting decision device is by output DC component, so that accumulation
Error rises, and when accumulated error is more than the threshold value of setting, error-detecting decision device just determines that locking ring has wrong lock, will push away
Dynamic locking ring enters correct lock-in regime, and carries out next step judgement;
If zero point is { z in half of symbol of S curve0, z1, z2...zn, z2kFor the zero crossing of positive slope, remaining zero point is
z2k+1;To make delay lock loop correctly work, need for time error to be pushed into correct section;Assuming that wrong lock point z2k, promote step-length
For step, then step need to meet step > max (z2m-z2m-1/2+z2m-2/ 2), 0≤m≤k, thus promote time gap be-
sgn(u(k))*step。
The beneficial effects of the present invention are: by being verified in Matlab platform, in the case of different modulation indexs, error
Detection decision device can be appropriately determined wrong lock and delay lock loop is made to reenter correct lock-in regime.
Detailed description of the invention
Fig. 1 is the S curve schematic diagram comprising error lock point.
Fig. 2 is delay lock loop used by timing tracking in the present invention.
Fig. 3 is modulation index h=0.5, and impulse response is the S curve that 4GAU signal passes through Fig. 2 delay lock loop.
Fig. 4 is modulation index h=2.5, and impulse response is the S curve that 4GAU signal passes through Fig. 2 delay lock loop.
Fig. 5 is modulation index h=4.5, and impulse response is the S curve that 4GAU signal passes through Fig. 2 delay lock loop.
Fig. 6 is present invention error-detecting decision device used in detection error.
Fig. 7 is the error-detecting decision device of error lock in solution delay lock loop of the present invention.
Fig. 8 is modulation index h=0.5, and it in initial error is 0.4T that impulse response, which is 4GAU signal,cUnder the conditions of tracking miss
The output of difference and error accumulator.
Fig. 9 is modulation index h=2.5, and it in initial error is 0.4T that impulse response, which is 4GAU signal,cUnder the conditions of tracking miss
The output of difference and error accumulator.
Figure 10 is modulation index h=4.5, and it in initial error is 0.4T that impulse response, which is 4GAU signal,cUnder the conditions of tracking
The output of error and error accumulator.
Specific embodiment
In conjunction with the accompanying drawings, the present invention is further explained in detail.
The method proposed by the present invention for solving delay lock loop mistake lock includes: when the modulation index of CPM signal is greater than 1
When half-integer, there are multiple zero crossings as shown in Figure 1 in the S curve of delay lock loop in half of symbol time, pass through introducing
One error-detecting decision device comes whether detecting and tracking ring occurs error lock and corrected.The present invention is in Matlab platform
It is verified, from simulation result as can be seen that there is no error locks and there are different modulating exponent pairs when error lock to miss
The difference detection decision device course of work has Different Effects.Fig. 2 is delay lock loop employed in the present invention.
Fig. 3, Fig. 4 and Fig. 5 respectively indicate the S curve of the delay lock loop in the case of three modulation indexs, it can be seen that with
The increase of modulation index, in half of symbol positive slope zero crossing number increase, lead to delay lock loop error lock
Number increases, and since the zero crossing of positive slope is not present in S curve in Fig. 3, thus, there is no error lock point, error accumulators
Close to 0, Fig. 4, Fig. 5 are respectively present the zero crossing of 1,2 positive slope, therefore, mistake will be generated in time tracking for output
Locking.
Error-detecting when Fig. 6, Fig. 7 are respectively in detection error and solve error lock in delay lock loop is adjudicated
Device.The specific steps that the present invention realizes are given below:
(1) in formula 2, we only focus on the estimation of time delay τ, without concern for the estimated value of carrier phase and data,
Therefore we use non-data aided and noncoherent mode is estimated.Maximum likelihood method clock synchronization is used in the present invention
Between postpone to be estimated.Sequence is divided into { x (k) } firstl(l=0,1,2 ...) and length are N*L0Subsequence, N were to adopt
Sample rate, each subsequence individually estimate time delay τ.In order to simplify the description in text, we only consider first
Subsequence, and ignore index l, enable x={ x (0), x (1), x (2) ... x (NL0- 1) it } indicates subsequence, obtains formula 2.
(2) likelihood function formula 2 is simplified first
We need to isolate the estimated value of carrier phase at this time, redefine maximum likelihood function, and willAsArgument,Assuming thatIt is obeyed on (- π, π) uniform
Distribution, Wo MenIt is averaged on domain to likelihood function, formula 6 can be obtained, wherein I0(λ) is the modified Bessel function of zeroth order.
(3) willIt is separated from likelihood function, directly carrying out calculating has certain difficulty, considers extremely low signal-to-noise ratio
Under the conditions of, use the approximate expression of zeroth order modified Bessel functionExpansion, and remove unrelated constant term
Obtain formula 7.
Use transmission symbolMarginal likelihood function, can will be rightEstimation separate so that in function only retain
Estimation to time delay.
WhereinIt is about the expression formula for sending symbolDesired value.pΔt=(t-iT) is related with the phase response of modulation, physical relationship pΔt(t)=q
(t)-q(t-Δt)。
In the expression formula of F (Δ t, t), other than i, all parameters are it is known that i meets condition-[L+int [Δ t/
T]]≤i≤0, integer of int [Δ t/T] expression no more than Δ t/T.It needs to find out so that 8 value of formula is maximumBy F (Δ t, t)
Write as the form of Fourier spaceIt is available further
Simplified formula 8 obtains formula 9.
WhereinExpression
Formula is
Since in most cases, observing time is far longer than the duration of a symbol, i.e. L0> > 1, for more
H in the case of kindm(k) duration is all shorter.From ym(k) expression formula can be seen that ymIt (k) is by x (k) ejπmk/NPass through one
Export after a real non-causal filter as a result, this filter can be by hm(k) carrying out ND translation to the right becomes cause and effect
Filter.For the calculating under binary condition, we only need to retain the first class number, therefore formula 9 is finally reduced to
The output for enabling error-detecting decision device is eτ(k)=- Im { A1, when locking ring carries out time recovery, error-detecting
Decision device is started to work, and error accumulator passes through weighted cumulative error u (k+1)=(1- ξ) u (k)+ξ eτ(k+1).Work as locking ring
Mistake lock when, error-detecting decision device will output DC component so that cumulative errors rise, once accumulated error be more than setting
When threshold value, error accumulator just determines that locking ring has wrong lock, and the circumferential correctly lock-in regime of locking will be pushed to correct.It crosses herein
Cheng Zhong, error accumulator will be zeroed, and carry out the detection of next step, such as Fig. 8,9,10.
Fig. 9 error-detecting decision device detects an error lock, and Figure 10 detects error lock twice, whenever detecting
Error lock, error accumulator output will will increase, until being more than our pre-set threshold values and the lock that misdeems produces
It is raw to which time tracking be promoted to being correctly oriented.As can be seen that when modulation index increases, it can be by adjusting accidentally
The case where difference detection decision device threshold value, weighting coefficient and propulsion interval are to adapt to different modulating index.
Threshold value and weighting coefficient ξ herein is can be configured according to specific CPM signal parameter, optimal to carry out
Signal trace.And the time interval promoted must assure that locking ring can enter correct time tracking direction, it is therefore desirable to be arranged
The correctness appropriate for promoting interval to guarantee following time tracking.
Since S curve is center symmetric figure, so the case where only considering x-axis positive axis.If zero in half of symbol of S curve
Point is { z0, z1, z2...zn, z2kFor the zero crossing of positive slope, remaining zero point is z2k+1.To make delay lock loop correctly work,
We need for time error to be pushed into correct section.Assuming that wrong lock point z2k, propulsion step-length is step, then step need to meet step >
max(z2m-z2m-1/2+z2m-2/ 2), 0≤m≤k, therefore the time gap promoted is-sgn (u (k)) * step.
It should be noted that the term of such as "upper", "lower", "left", "right", "front", "rear" cited in invention, also
Only being illustrated convenient for narration, rather than to limit the scope of the invention, relativeness is altered or modified, in nothing
Under essence change technology contents, when being also considered as the enforceable scope of the present invention.
The above is only the preferred embodiment of the present invention, protection scope of the present invention is not limited merely to above-described embodiment,
All technical solutions belonged under thinking of the present invention all belong to the scope of protection of the present invention.It should be pointed out that for the art
For those of ordinary skill, several improvements and modifications without departing from the principles of the present invention should be regarded as protection of the invention
Range.
Claims (6)
1. one kind is greater than the detection of 1 modulation index CPM signal clock false-lock and correcting method, which comprises the steps of:
Step 1: first determine whether when signal is by delay lock loop, the S curve of delay lock loop in half of symbol time whether
It will appear many places zero crossing, then introduce error-detecting decision device if it exists and carry out detecting whether the case where there are error locks;
Step 2: carrying out sampling processing to signal is received, obtain discrete signal;
Step 3: using maximum likelihood estimate, the parameter in discrete signal is estimated;
Step 4: only considering the estimation of time delay, likelihood function is simplified;
Step 5: according to simplified likelihood function, setting the output of error-detecting decision device as a result, carrying out the time in locking ring
When recovery, error-detecting decision device is started to work, and the cumulative errors by way of weighting;
Step 6: when accumulated error is more than the threshold value of setting, error-detecting decision device just determines that locking ring has wrong lock, will
It pushes the circumferential correctly lock-in regime of locking to correct, and carries out next round judgement.
2. as described in claim 1 a kind of greater than the detection of 1 modulation index CPM signal clock false-lock and correcting method, feature
It is: in step 2, to reception signal in time t=kTsSampling processing is carried out, k is natural number, TsFor the sampling interval, obtain as
Under discrete signal:
Wherein, nR(k) and nI(k) the real and imaginary parts sampling of the received noise of receiver, E are respectively indicatedsIndicate chip energies,
For argument, α is the symbol of transmission, and θ is signal initial phase, and τ is time delay.
3. as claimed in claim 2 a kind of greater than the detection of 1 modulation index CPM signal clock false-lock and correcting method, feature
Be: in step 3, all parameters of signal all rely on α, θ and τ, using maximum likelihood estimate, to three ginsengs in signal
Number is estimated:
Wherein, Λ indicates likelihood function,The estimated value of respectively α, θ, τ,For noise variance, NL0It is long for subsequence
Degree, N is over-sampling rate.
4. as claimed in claim 3 a kind of greater than the detection of 1 modulation index CPM signal clock false-lock and correcting method, feature
It is: in step 4, only considers the estimation of time delay, likelihood function is simplified, isolate carrier wave and sends information symbol
Estimated value obtain:
Wherein,Indicate that the first order component of maximum likelihood function, A (1) indicate filter with 1/TsPolydispersity index
Fourier transform later square.
5. as claimed in claim 4 a kind of greater than the detection of 1 modulation index CPM signal clock false-lock and correcting method, feature
Be: in step 5, enabling the output result of error-detecting decision device is sτ(k) it is extensive to carry out the time in locking ring by=- Im { A (1) }
When multiple, error-detecting decision device is just started to work, and by weighted cumulative error u (k), and weighted connections are as follows:
U (k+1)=(1- ξ) u (k)+ξ eτ(k+1) (4)
Wherein, ξ is weighting coefficient.
6. as claimed in claim 5 a kind of greater than the detection of 1 modulation index CPM signal clock false-lock and correcting method, feature
It is: in step 6, if zero point is { z in half of symbol of S curve0, z1, z2...zn, z2kFor the zero crossing of positive slope, remaining zero
Point is z2k+1;To make delay lock loop correctly work, need for time error to be pushed into correct section;Assuming that wrong lock point z2k, promote
Step-length is step, then step need to meet step > max (z2m-z2m-1/2+z2m-2/ 2), 0≤m≤k, therefore the time gap promoted
For-sgn (u (k)) * step.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910535537.0A CN110233719B (en) | 2019-06-19 | 2019-06-19 | Modulation index CPM signal clock false lock detection and correction method larger than 1 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910535537.0A CN110233719B (en) | 2019-06-19 | 2019-06-19 | Modulation index CPM signal clock false lock detection and correction method larger than 1 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN110233719A true CN110233719A (en) | 2019-09-13 |
CN110233719B CN110233719B (en) | 2020-08-04 |
Family
ID=67856307
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201910535537.0A Expired - Fee Related CN110233719B (en) | 2019-06-19 | 2019-06-19 | Modulation index CPM signal clock false lock detection and correction method larger than 1 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN110233719B (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112965090A (en) * | 2021-02-08 | 2021-06-15 | 南京航空航天大学 | Spread spectrum CPM signal capturing method with modulation index h >1 and h being half integer |
CN114285710A (en) * | 2021-12-28 | 2022-04-05 | 北京升哲科技有限公司 | Modulation index estimation method, device, equipment and storage medium of CPM signal |
CN114401176A (en) * | 2021-12-31 | 2022-04-26 | 北京升哲科技有限公司 | Signal arrival detection method and device, electronic equipment and storage medium |
CN118072692A (en) * | 2024-04-12 | 2024-05-24 | 北京数字光芯集成电路设计有限公司 | Processing method and system for unstable sampling value during MIPI skew correction |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20010033602A1 (en) * | 2000-04-10 | 2001-10-25 | Seiji Okubo | Delay lock loop, receiver, and spectrum spreading communication system |
CN101414990A (en) * | 2008-12-02 | 2009-04-22 | 北京韦加航通科技有限责任公司 | Method for capturing carrier frequency bias and time delay of single carrier frequency domain equalizing system |
CN102594338A (en) * | 2012-02-16 | 2012-07-18 | 中国电子科技集团公司第五十八研究所 | Counter control type delay-locked loop circuit with mistaken locking correction mechanism |
-
2019
- 2019-06-19 CN CN201910535537.0A patent/CN110233719B/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20010033602A1 (en) * | 2000-04-10 | 2001-10-25 | Seiji Okubo | Delay lock loop, receiver, and spectrum spreading communication system |
CN101414990A (en) * | 2008-12-02 | 2009-04-22 | 北京韦加航通科技有限责任公司 | Method for capturing carrier frequency bias and time delay of single carrier frequency domain equalizing system |
CN102594338A (en) * | 2012-02-16 | 2012-07-18 | 中国电子科技集团公司第五十八研究所 | Counter control type delay-locked loop circuit with mistaken locking correction mechanism |
Non-Patent Citations (2)
Title |
---|
JINGCHENG ZHUANG,QINGJIN DU: "Reduced in-lock error DLL-based clock synthesiser with novel charge pump phase comparator", 《ELECTRONICS LETTERS》 * |
叶云飞: "一种适用于三维芯片间时钟同步的全数字延时锁定环设计", 《微电子学与计算机》 * |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112965090A (en) * | 2021-02-08 | 2021-06-15 | 南京航空航天大学 | Spread spectrum CPM signal capturing method with modulation index h >1 and h being half integer |
CN114285710A (en) * | 2021-12-28 | 2022-04-05 | 北京升哲科技有限公司 | Modulation index estimation method, device, equipment and storage medium of CPM signal |
CN114285710B (en) * | 2021-12-28 | 2023-09-15 | 北京升哲科技有限公司 | CPM signal modulation index estimation method, device, equipment and storage medium |
CN114401176A (en) * | 2021-12-31 | 2022-04-26 | 北京升哲科技有限公司 | Signal arrival detection method and device, electronic equipment and storage medium |
CN114401176B (en) * | 2021-12-31 | 2023-05-09 | 北京升哲科技有限公司 | Signal arrival detection method and device, electronic equipment and storage medium |
CN118072692A (en) * | 2024-04-12 | 2024-05-24 | 北京数字光芯集成电路设计有限公司 | Processing method and system for unstable sampling value during MIPI skew correction |
Also Published As
Publication number | Publication date |
---|---|
CN110233719B (en) | 2020-08-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN110233719A (en) | One kind being greater than the detection of 1 modulation index CPM signal clock false-lock and correcting method | |
CN111095883B (en) | Synchronization in orthogonal time-frequency space signal receivers | |
CN101032139B (en) | Frame synchronization and initial symbol timing acquisition system and method | |
CN1630201B (en) | ASK demodulation device and wireless device using the same | |
CN102752097B (en) | Symbol clock recovery circuit | |
CN106998586B (en) | The synchronization acquiring method of wireless communication system in a kind of high dynamic environment | |
CN105187348B (en) | Arbitrary velocity CPFSK signal timing synchronous method | |
CN105277955A (en) | Baseband signal processing method used for GPS satellite navigation | |
CN105763500A (en) | Frequency deviation, time delay and phase deviation combined synchronization method of continuous phase modulation signals | |
CN104852876A (en) | Wireless aviation burst communication system | |
CN113447959B (en) | GNSS deception jamming detection method and related device based on Doppler frequency | |
CN104714241B (en) | A kind of rapid GPS bit synchronization method | |
TW200952342A (en) | System and method for implementing a digital phase-locked loop | |
CN112737570B (en) | PAM4 signal clock data recovery method based on software phase-locked loop | |
CN101419252A (en) | Modulation signature trigger | |
CN106603451A (en) | High dynamic doppler frequency offset and frequency offset change rate estimate method base on time-delay auto-correlation | |
CN103368896A (en) | Carrier recovery method in high order modulation-demodulation | |
CN103475612B (en) | A kind of recovery system of high-speed parallel OQPSK demodulation clock | |
CN106817333A (en) | High dynamic carrier synchronization method based on open-loop acquisition Yu Closed loop track | |
CN112399551A (en) | High-precision synchronization method for short-time burst signals | |
CN107367741A (en) | Open-loop Kalman method for GNSS signal intermittent tracking | |
CN109743075B (en) | Three-ring linkage non-homologous spread spectrum code tracking loop synchronization device and method | |
CN108418671A (en) | Modulus mixing high speed signal time measurement system based on clock and data recovery | |
CN102594543B (en) | Four frequency shift keying (4FSK) code element synchronizer applied to digital private mobile radio (dPMR) standard | |
CN101262287B (en) | Cluster pulse signal energy synchronization detection method in pulse ultra-broadband communication system |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20200804 |