CN110233615A - A kind of hardware waterproof capacitance touch button BUF circuit - Google Patents
A kind of hardware waterproof capacitance touch button BUF circuit Download PDFInfo
- Publication number
- CN110233615A CN110233615A CN201910429387.5A CN201910429387A CN110233615A CN 110233615 A CN110233615 A CN 110233615A CN 201910429387 A CN201910429387 A CN 201910429387A CN 110233615 A CN110233615 A CN 110233615A
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- grid
- pmos
- drain electrode
- source electrode
- buf
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- 230000005611 electricity Effects 0.000 claims 1
- 239000003990 capacitor Substances 0.000 abstract description 4
- 238000001514 detection method Methods 0.000 abstract description 3
- 238000005265 energy consumption Methods 0.000 abstract description 2
- 230000006698 induction Effects 0.000 abstract description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 abstract description 2
- 230000000630 rising effect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/94—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the way in which the control signals are generated
- H03K17/96—Touch switches
- H03K17/962—Capacitive touch switches
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- Electronic Switches (AREA)
Abstract
Capacitance touch button is a kind of common user interface apparatus, and sensor is by the capacitor of detection human body to determine whether there is finger touch action；Capacitance sensor appearance is beautiful compared with mechanical key, is easy to use, and the service life is long；But if there are moisture film or water droplets on touch interface, the capacitor of sensor will be changed, it may occur that mistaken touch induction；The present invention provides a kind of hardware waterproof capacitance touch button BUF circuit, which has the characteristics that structure is simple, low in energy consumption, fireballing.
Description
Technical field
The invention belongs to IC design fields, the waterproof applications for capacitance touch button.
Background technique
Capacitance touch button is a kind of common user interface apparatus, sensor by the capacitor of detection human body to determine whether
There is finger touch action；Capacitance sensor appearance is beautiful compared with mechanical key, is easy to use, and the service life is long；But if touching
There are moisture film or water droplets on interface, will change the capacitor of sensor, it may occur that mistaken touch induction；The present invention provides a kind of hard
Part waterproof capacitance touch button BUF circuit, the BUF circuit have the characteristics that structure is simple, low in energy consumption, fireballing.
Fig. 1 is the input signal of hardware waterproof BUF, and when CHAR signal is high, VIN is charged to VDD, when CHAR signal
When being low, VIN signal is between 0 ~ VDD/2；I.e. the input of BUF, output voltage variation range are 0 ~ VDD, it is desirable that BUF input,
Export track to track；And it inputs, export the amplifier of track to track structure is complicated；BUF is for driving Water-proof electrode, Water-proof electrode area
Greatly, parasitic capacitance is big, for the output response speed for improving BUF, improves the detection speed of capacitance touch button, using conventional knot
The Slew Rate that structure requires BUF big, the rate of putting on mean big power consumption；So if needing to design one big using conventional BUF structure
The BUF of Slew Rate, input and output track to track, structure is complicated, and power consumption is big.
Summary of the invention
The characteristics of present invention is applied according to hardware waterproof capacitance touch button BUF, there are two aspects for main technical point::
1. hardware waterproof capacitance touch button controls signal CHAR control PMOS tube pull-up, realize that rising edge accelerates and high level is defeated
Out；
2. accelerating failing edge speed using accelerating circuit.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
It obtains other drawings based on these drawings.
The input signal of Fig. 1 hardware waterproof BUF；
A kind of Fig. 2 hardware waterproof capacitance touch button BUF circuit disclosed by the invention.
Specific embodiment
Below in conjunction with attached drawing, the course of work of hardware waterproof capacitance touch button BUF of disclosure of the invention a kind of is described in detail.
Fig. 2 is a kind of circuit structure of the invention for hardware waterproof capacitance touch button BUF circuit；Circuit includes: fortune
Discharge road and accelerating circuit two parts；Operational amplifier circuit specifically: the source electrode of PMOS tail current pipe M0 meets VDD, and it is poor that drain electrode meets PMOS
Divide the source electrode to pipe M1, M2, grid meets bias voltage VB；The source electrode of PMOS differential pair pipe M1 connects the drain electrode of PMOS tail current pipe M0
With the source electrode of PMOS differential pair pipe M2, drain electrode is connected to node VGN2, and grid meets the output node OUT of BUF；PMOS differential pair pipe
The source electrode of M2 connects the drain electrode of PMOS tail current pipe M0 and the source electrode of PMOS differential pair pipe M1, and drain electrode is connected to node VGN1, grid
Meet the input node VIN of BUF；The source electrode of NMOS M3 is grounded, and drain electrode, grid are connected to node VGN2；The source electrode of NMOS M4 connects
Ground, drain electrode, grid are connected to node VGN1；The source electrode of NMOS M7 is grounded, drain electrode be connected to the drain electrode of PMOS M9, grid and
The grid of PMOS M10, grid are connected to node VGN2；The source electrode of NMOS M8 is grounded, and drain electrode is connected to the output node of BUF
OUT, grid are connected to node VGN1；The source electrode of PMOS M9 meets VDD, and drain electrode, grid meet drain electrode and the PMOS M10 of NMOS M7
Grid；The source electrode of PMOS M10 meets VDD, and drain electrode is connected to the output node OUT of BUF, and grid is connected to the grid of PMOS M9
Pole, drain electrode and NMOS M7 drain electrode；Accelerating circuit specifically: the source electrode of NMOS M11 is grounded, and drain electrode is connected to node VD, grid
Pole is connected to node VGN1；The source electrode of PMOS M5 meets VDD, and drain electrode is connected to node VD, and grid meets bias voltage VB；Phase inverter
The input of X1 is connected to node VD, and output node VG is connected to the grid of NMOS M12；The source electrode of NMOS M12 is grounded, and drain electrode connects
It is connected to the output node OUT of BUF, grid meets the output node VG of phase inverter X2；The input of phase inverter X2 meets control signal CHAR,
Output connects the grid of PMOS M13；The source electrode of PMOS M13 meets VDD, and drain electrode is connected to the output node OUT of BUF, and grid is reversed
The output of phase device X2；The output node OUT of a termination BUF of load resistance CL, other end ground connection.
Using conventional BUF structure, it is desirable that BUF meets input and output track to track, but the waveform of analysis chart 1, Ke Yiyong
CHAR signal controls M13 pipe, and when CHAR signal is high, M13 hales BUF output node OUT to vdd voltage, realization voltage with
The effect that amiable rising edge accelerates, BUF is only required to follow the voltage of 0 ~ VDD/2, therefore BUF can simplify as input
Output area is 0 ~ VDD/2, therefore only needs to meet the requirements using the differential pair tube structure of PMOS, simplifies circuit knot
Structure；NMOS M5, M11, M12, phase inverter X1 constitute failing edge accelerating circuit, and NMOS M4, M11 size are identical, PMOS M5 ruler
The very little half greater than PMOS M0 size, then when BUF stablizes and exports, node VD output is high, and NMOS M12 is closed；When under VIN
Drop, when VIN is less than BUF output node OUT, NMOS M4, M11 electric current increase, and node VD voltage is lower, and NMOS M12 is opened, and add
The decrease speed of fast BUF output node OUT；When VIN voltage is close to BUF output node OUT voltage, NMOS M4, M11 electric current
Reduce, node VD voltage is got higher, and NMOS M12 is closed, and accelerates to terminate；Keep the output Slew Rate of BUF no longer limited using accelerating circuit
In the bandwidth of BUF, design difficulty and quiescent dissipation are effectively reduced using the lower BUF of bandwidth.
In conclusion the present invention is used using the control sequential of waterproof capacitance touch button and the input signal feature of BUF
Simple PMOS differential pair pipe BUF is instead of complicated input, output track to track BUF circuit；Devise for rising edge, under
The accelerating circuit on edge drops, and the response speed for effectively raising BUF reduces the quiescent dissipation of BUF.
Claims (1)
1. a kind of circuit structure, comprising:
A kind of circuit structure is used for hardware waterproof capacitance touch button BUF circuit；Circuit includes: operational amplifier circuit and accelerating circuit two
Part；Operational amplifier circuit specifically: the source electrode of PMOS tail current pipe M0 meets VDD, and drain electrode connects the source electrode of PMOS differential pair pipe M1, M2,
Grid meets bias voltage VB；The source electrode of PMOS differential pair pipe M1 meets drain electrode and the PMOS differential pair pipe M2 of PMOS tail current pipe M0
Source electrode, drain electrode are connected to node VGN2, and grid meets the output node OUT of BUF；The source electrode of PMOS differential pair pipe M2 connects PMOS tail electricity
The drain electrode of flow tube M0 and the source electrode of PMOS differential pair pipe M1, drain electrode are connected to node VGN1, and grid meets the input node VIN of BUF；
The source electrode of NMOS M3 is grounded, and drain electrode, grid are connected to node VGN2；The source electrode of NMOS M4 is grounded, and drain electrode, grid are connected to knot
Point VGN1；The source electrode of NMOS M7 is grounded, and drain electrode is connected to the grid of the drain electrode of PMOS M9, grid and PMOS M10, and grid connects
It is connected to node VGN2；The source electrode of NMOS M8 is grounded, and drain electrode is connected to the output node OUT of BUF, and grid is connected to node VGN1；
The source electrode of PMOS M9 meets VDD, and drain electrode, grid connect the drain electrode of NMOS M7 and the grid of PMOS M10；The source electrode of PMOS M10 connects
VDD, drain electrode are connected to the output node OUT of BUF, and grid is connected to the drain electrode of the grid of PMOS M9, drain electrode and NMOS M7；Add
Fast circuit specifically: the source electrode of NMOS M11 is grounded, and drain electrode is connected to node VD, and grid is connected to node VGN1；PMOS M5's
Source electrode meets VDD, and drain electrode is connected to node VD, and grid meets bias voltage VB；The input of phase inverter X1 is connected to node VD, output knot
Point VG is connected to the grid of NMOS M12；The source electrode of NMOS M12 is grounded, and drain electrode is connected to the output node OUT of BUF, and grid connects
The output node VG of phase inverter X2；The input of phase inverter X2 meets control signal CHAR, and output connects the grid of PMOS M13；PMOS
The source electrode of M13 meets VDD, and drain electrode is connected to the output node OUT of BUF, and grid connects the output of phase inverter X2；The one of load resistance CL
Terminate the output node OUT of BUF, other end ground connection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910429387.5A CN110233615A (en) | 2019-05-22 | 2019-05-22 | A kind of hardware waterproof capacitance touch button BUF circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910429387.5A CN110233615A (en) | 2019-05-22 | 2019-05-22 | A kind of hardware waterproof capacitance touch button BUF circuit |
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| Publication Number | Publication Date |
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| CN110233615A true CN110233615A (en) | 2019-09-13 |
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|---|---|---|---|
| CN201910429387.5A Pending CN110233615A (en) | 2019-05-22 | 2019-05-22 | A kind of hardware waterproof capacitance touch button BUF circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113054983A (en) * | 2021-03-25 | 2021-06-29 | 深圳前海维晟智能技术有限公司 | Dense capacitive touch key circuit supporting hardware waterproofing |
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| US6252435B1 (en) * | 2000-10-05 | 2001-06-26 | Pericom Semiconductor Corp. | Complementary differential amplifier with resistive loads for wide common-mode input range |
| CN101917168A (en) * | 2010-06-30 | 2010-12-15 | 西安电子科技大学 | High switching rate transconductance amplifier for active power factor corrector |
| JP2011118602A (en) * | 2009-12-02 | 2011-06-16 | Renesas Electronics Corp | Semiconductor device |
| CN202856608U (en) * | 2012-05-24 | 2013-04-03 | 意法半导体研发(深圳)有限公司 | Power drive circuit |
| US20130313993A1 (en) * | 2012-05-24 | 2013-11-28 | Stmicroelectronics (Shenzhen) R&D Co. Ltd. | Voltage slope control method and apparatus for power driver circuit application |
| CN104020339A (en) * | 2014-06-25 | 2014-09-03 | 电子科技大学 | Programmable current detection circuit |
| CN104729724A (en) * | 2015-04-09 | 2015-06-24 | 中国电子科技集团公司第四十四研究所 | Single-photon avalanche diode quenching circuit based on offset control differential amplification structure |
| CN105763172A (en) * | 2016-02-03 | 2016-07-13 | 中国电子科技集团公司第二十四研究所 | Trigger of high speed and low power consumption |
| WO2017124576A1 (en) * | 2016-01-21 | 2017-07-27 | 中国电子科技集团公司第二十四研究所 | Transconductance amplifier based on self-biased cascode structure |
-
2019
- 2019-05-22 CN CN201910429387.5A patent/CN110233615A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6252435B1 (en) * | 2000-10-05 | 2001-06-26 | Pericom Semiconductor Corp. | Complementary differential amplifier with resistive loads for wide common-mode input range |
| JP2011118602A (en) * | 2009-12-02 | 2011-06-16 | Renesas Electronics Corp | Semiconductor device |
| CN101917168A (en) * | 2010-06-30 | 2010-12-15 | 西安电子科技大学 | High switching rate transconductance amplifier for active power factor corrector |
| CN202856608U (en) * | 2012-05-24 | 2013-04-03 | 意法半导体研发(深圳)有限公司 | Power drive circuit |
| US20130313993A1 (en) * | 2012-05-24 | 2013-11-28 | Stmicroelectronics (Shenzhen) R&D Co. Ltd. | Voltage slope control method and apparatus for power driver circuit application |
| CN104020339A (en) * | 2014-06-25 | 2014-09-03 | 电子科技大学 | Programmable current detection circuit |
| CN104729724A (en) * | 2015-04-09 | 2015-06-24 | 中国电子科技集团公司第四十四研究所 | Single-photon avalanche diode quenching circuit based on offset control differential amplification structure |
| WO2017124576A1 (en) * | 2016-01-21 | 2017-07-27 | 中国电子科技集团公司第二十四研究所 | Transconductance amplifier based on self-biased cascode structure |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113054983A (en) * | 2021-03-25 | 2021-06-29 | 深圳前海维晟智能技术有限公司 | Dense capacitive touch key circuit supporting hardware waterproofing |
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Application publication date: 20190913 |
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