CN110190004A - 一种用于大电流电源模块键合的焊接工艺 - Google Patents

一种用于大电流电源模块键合的焊接工艺 Download PDF

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CN110190004A
CN110190004A CN201910498835.7A CN201910498835A CN110190004A CN 110190004 A CN110190004 A CN 110190004A CN 201910498835 A CN201910498835 A CN 201910498835A CN 110190004 A CN110190004 A CN 110190004A
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welding
chip
supply module
current supply
sheet metal
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王培洲
李广益
李鹏军
李睿
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Shenzhen Shunyi Microelectronics Co., Ltd.
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Shandong Haisheng Nick Microelectronics Co Ltd
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005—Shape
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/8321—Applying energy for connecting using a reflow oven
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/842—Applying energy for connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848—Bonding techniques
    • H01L2224/84801—Soldering or alloying

Abstract

本发明公开了一种用于大电流电源模块键合的焊接工艺，所述一种用于大电流电源模块键合的焊接工艺包括：（a）芯片贴膜、划片；（b）芯片粘片；（c）焊接；（d）塑封、固化；（e）激光打标；（f）去溢胶、引脚镀锡；（g）切筋、整形；（h）测试、包装、入库；所述（c）焊接工序中采用金属薄片将芯片上的电极跟管脚连接起来，焊接后芯片上与金属薄片上表面垂直高度≤0.5MM。本发明的有益效果是：提高生产效率，降低成本，减少一次性投入，通过回流焊固化，不会在芯片表面附加压力及超声功率，对芯片表面不造成损伤，具有空间优势和成本优势。

Description

一种用于大电流电源模块键合的焊接工艺
技术领域
本发明涉及半导体封装领域，尤其涉及半导体封装技术中键合技术的一种用于大电流电源模块键合的焊接工艺。
背景技术
引线键合是当前最重要的微电子封装技术之一，目前90%以上的芯片均采用这种技术进行封装。按照原理的不同，引线键合可以分为热压键合、超声键合和热压超声键合3种方式；根据键合点形状，又可分为球形键合和楔形键合；在电流电源模块中，最常见的互连方法是引线键合法，电流电源模块的单芯片电流高达数十安培，目前业界通用的粗铝线或铝带超声键合工艺，主要存在以下几方面缺陷：
1.效率低下， 成本高昂，设备一次性投入很大。 键合设备以市场上最通用、最成熟的OE-7200 PLUS 为例， 单台售价25-30万美元（双头），按每颗芯片打两根20mils 铝线（电流能力60A 左右）算， 每小时产出800—1000颗；
2.铝线键合工艺为超声波+压力键合，对芯片表面有很大的损伤隐患（弹坑），越粗的铝线因为使用的参数越大， 引发芯片弹坑损伤的隐患越大，造成产品参数不良或可靠性失效；
3.粗铝线键合，需产生一定的线弧高，占用很大封装空间，与功率器件散热形成矛盾，热阻增加，同时线弧会产生一定量的寄生电感，影响器件的高频性能。
针对上述技术缺陷，迫切需要一种更好键合工艺来解决上述技术问题。
发明内容
为克服上述现有技术缺陷，本发明提供一种用于大电流电源模块键合的焊接工艺。
本发明所采用的具体技术方案为：
一种用于大电流电源模块键合的焊接工艺，所述一种用于大电流电源模块键合的焊接工艺包括：
（a）芯片贴膜、划片；
（b）芯片粘片；
（c）焊接；
（d）塑封、固化；
（e）激光打标；
（f）去溢胶、引脚镀锡；
（g）切筋、整形；
（h）测试、包装、入库；
上述工艺工序中除工序（c）外，其他各工序均为现有常规工艺技术，所述（c）焊接工序中采用金属薄片将芯片上的电极跟管脚连接起来，焊接后芯片上与金属薄片上表面垂直高度≤0.5MM，采用这种焊接方法，完成焊接后芯片上方的元件厚度仅为金属薄片的厚度和焊膏厚度之和，对于超薄贴片器件封装及产品散热效果具有很大的空间优势和成本优势。
作为本发明的进一步改进，所述（c）焊接工序中采用的金属薄片为铜片，焊接使用高温焊膏来实现，铜片相对金银材质的导体成本相对较低，其具有良好的导电性，此外，常见锡膏的熔点138°的低温焊膏和熔点为217°的高温焊膏，低温是锡铋组成，高温锡膏的合金成分一般为锡、银、铜（简称SAC），在市场上很容易买到，高温焊膏的焊接性较好，坚硬牢固，焊点少且光亮，高温焊膏相对于低温焊膏具有如下优点：
1.下锡性好，粘性变化极小，对低至0.3mm间距焊盘也能完成精确的焊接；
2.焊后数小时仍保持原来的形状、无坍塌，贴片元件不会产生偏移；
3.具有极佳的焊接性能，可在不同部位表现出适当的润湿性；
4.可适应不同档次焊接设备的要求，无需在充氮环境下完成焊接，在较宽的回流焊炉温范围内仍可表现出良好的焊接性能；
5.高温锡膏焊接后残留物极少，无色且具有较高的绝缘阻抗，不会腐蚀pcb板，可达到免清洗的要求；
6.具有较佳的ICT测试性能，不会产生误判；
7.锡银铜锡膏熔点相对较高，对炉子要求较高，但是锡银铜锡膏焊接效果很好，机械强度高，松香残留物少，且为白色透明。高温锡膏印刷时，保湿性好，可获得稳定的印刷性，脱模性极佳，在钢网上可连续印刷8小时，可焊性好，爬锡好，焊点饱满光亮。
作为本发明的又一改进，所述（c）焊接工序采用回流焊实现，回流焊是指在焊接设备的内部有一个加热电路，将空气或氮气加热到足够高的温度后吹向已经贴好元件的线路板，让元件两侧的焊料融化后与主板粘结，这种工艺的优势是温度易于控制，焊接过程中还能避免氧化，制造成本也更容易控制，本改进中焊接工艺采用铜片通过高温焊膏与芯片电极连接再通过回流焊固化，不在芯片表面附加压力及超声功率，对芯片表面不造成任何损伤。
优选的，所述金属薄片的形状为矩形。
优选的，焊接后芯片上与金属薄片上表面垂直高度为0.3mm至0.35mm。
本发明的积极效果是：提高生产效率，降低成本， 减少一次性投入，铜片焊接工艺采用铜片通过高温焊膏与芯片电极连接再通过回流焊固化，不在芯片表面附加压力及超声功率， 对芯片表面不造成任何损伤，铜片焊接工艺对于超薄贴片器件封装及产品散热效果具有很大的空间优势和成本优势。
附图说明
图1是本发明一种用于大电流电源模块键合的焊接工艺所应用产品的正视图；
图2是本发明一种用于大电流电源模块键合的焊接工艺所应用产品的俯视图；
图例说明：1—管脚，2—金属薄片，3—高温焊膏，4—芯片，5—软焊料，6—载片区，7—垂直高度。
具体实施方式
下面结合附图和具体实施例对本发明进行详细描述：
具体实施例一：
一种用于大电流电源模块键合的焊接工艺，所述一种用于大电流电源模块键合的焊接工艺包括：
（a）芯片贴膜、划片：将原片切割成单个分离的芯片4，所用设备日本DISCO划片机；
（b）芯片粘片：自动粘片机，芯片4和引线框架载片区6的通过软焊料5连接在一起，操作过程需有氮氢气体保护，避免高温下材料氧化；
（c）焊接:将厚度为0.35mm铜片即金属薄片2通过高温焊膏3与芯片4电极和管脚1连接再通过回流焊固化，采用设备台式回流焊炉，焊后芯片4上表面与金属薄片2上表面垂直高度7为0.5mm；
（d）塑封、固化；
（e）激光打标；
（f）去溢胶、引脚镀锡；
（g）切筋、整形；
（h）测试、包装、入库；
具体实施例二：
一种用于大电流电源模块键合的焊接工艺，所述一种用于大电流电源模块键合的焊接工艺包括：
（a）芯片贴膜、划片：将原片切割成单个分离的芯片4，所用设备日本DISCO划片机；
（b）芯片粘片：自动粘片机，芯片4和引线框架载片区6的通过软焊料5连接在一起，操作过程需有氮氢气体保护，避免高温下材料氧化；
（c）焊接:将厚度为0.2mm矩形铜片即金属薄片2通过高温焊膏3与芯片4电极和管脚1连接再通过回流焊固化，采用设备台式回流焊炉，焊后后芯片4上与金属薄片2上表面垂直高度7为0.35MM；
（d）塑封、固化；
（e）激光打标；
（f）去溢胶、引脚镀锡；
（g）切筋、整形；
（h）测试、包装、入库；
上述实施例对本发明做了详细说明。当然，上述说明并非对本发明的限制，本发明也不仅限于上述例子，相关技术人员在本发明的实质范围内所作出的变化、改型、添加或减少、替换，也属于本发明的保护范围。

Claims (5)

1.一种用于大电流电源模块键合的焊接工艺，所述一种用于大电流电源模块键合的焊接工艺包括：
（a）芯片贴膜、划片；
（b）芯片粘片；
（c）焊接；
（d）塑封、固化；
（e）激光打标；
（f）去溢胶、引脚镀锡；
（g）切筋、整形；
（h）测试、包装、入库；
其特征在于，所述（c）焊接工序中采用金属薄片将芯片上的电极跟管脚连接起来，焊接后芯片上与金属薄片上表面垂直高度≤0.5MM。
2.根据权利要求1所述一种用于大电流电源模块键合的焊接工艺，其特征在于，所述（c）焊接工序中采用的金属薄片为铜片，焊接使用高温焊膏来实现。
3.根据权利要求2所述一种用于大电流电源模块键合的焊接工艺，其特征在于，所述（c）焊接工序采用回流焊实现。
4.根据权利要求1至3之一所述一种用于大电流电源模块键合的焊接工艺，其特征在于，所述金属薄片的形状为矩形。
5.根据权利要求4所述一种用于大电流电源模块键合的焊接工艺，其特征在于,焊接后芯片上与金属薄片上表面垂直高度为0.3mm至0.35mm。
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