CN110189703A - A kind of display panel and display device - Google Patents

A kind of display panel and display device Download PDF

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Publication number
CN110189703A
CN110189703A CN201910579039.6A CN201910579039A CN110189703A CN 110189703 A CN110189703 A CN 110189703A CN 201910579039 A CN201910579039 A CN 201910579039A CN 110189703 A CN110189703 A CN 110189703A
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China
Prior art keywords
burn
signal line
potential signal
test
test terminal
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Granted
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CN201910579039.6A
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Chinese (zh)
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CN110189703B (en
Inventor
高娅娜
周星耀
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Wuhan Tianma Microelectronics Co Ltd
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Shanghai Tianma AM OLED Co Ltd
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Priority to CN201910579039.6A priority Critical patent/CN110189703B/en
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen

Abstract

The embodiment of the invention discloses a kind of display panel and display device, display panel includes viewing area and periphery circuit region；Viewing area is provided with the pixel circuit of multi-strip scanning signal wire, a plurality of LED control signal line, a plurality of reference signal line and the arrangement of multiple matrixes；Periphery circuit region is provided with multiple scan drive circuits, multiple emission control circuits, low-potential signal line, high potential signal line and reference signal bus；Periphery circuit region further includes multiple burn-in test terminals, at least one of low-potential signal line, high potential signal line and reference signal bus are electrically connected with two burn-in test terminals respectively, different burn-in test signals is connected on two burn-in test terminals, guarantee in the burn-in test stage, pixel unit light emission luminance on the different location of viewing area is same or similar, pixel unit aging speed on different location is same or similar, guarantees that the pixel unit on the different location of viewing area shows that homogeneity is good in the display stage.

Description

A kind of display panel and display device
Technical field
The present embodiments relate to field of display technology more particularly to a kind of display panel and display devices.
Background technique
Organic light emitting display (Organic Light Emitting Diode OLED) is current flat-panel monitor research One of the hot spot in field is compared with liquid crystal display (Liquid Crystal Display, LCD), and OLED has low energy consumption, life The advantages that at low cost, self-luminous, fast wide viewing angle and corresponding speed, currently, being led in FPD such as mobile phone, PDA, digital cameras Domain, OLED, which has begun, replaces traditional LCD.
But there are certain Decay Rates for the luminescent material of OLED display, therefore in the previous of OLED display factory As will do it burn-in test, input biggish luminous signal, accelerated luminescence material to OLED display during burn-in test Attenuation process.But it since the resistance on the conducting wire of transmission test electric current will cause the voltage drop of luminous signal, causes to show The luminous signal that area's different zones receive is different, and the attenuation degree of viewing area different zones luminescent material is different, causes to show The display brightness of the subsequent display stage different zones of device is different, influences display device and shows homogeneity.
Summary of the invention
In view of this, the embodiment of the present invention provides a kind of display panel and display device, to solve in the prior art old It is different to change test phase display panel different zones degree of aging, causes display panel in display stage different zones display brightness Difference, the poor technical problem of display homogeneity.
In a first aspect, the embodiment of the invention provides a kind of display panels, comprising:
Viewing area and periphery circuit region；
The viewing area is provided with multi-strip scanning signal wire, a plurality of LED control signal line, a plurality of reference signal line and more The pixel circuit of a matrix arrangement；
The periphery circuit region is provided with multiple scan drive circuits, multiple emission control circuits, low-potential signal line, height Electric potential signal line and reference signal bus；
The scanning signal input terminal of the scan drive circuit is believed with the low-potential signal line and the high potential respectively The electrical connection of number line, the scanning signal output end of the scan drive circuit are electrically connected with the scan signal line；
The LED control signal input terminal of the emission control circuit is electric with the low-potential signal line and the height respectively Position signal wire electrical connection, the LED control signal output end of the emission control circuit are electrically connected with the LED control signal line It connects；
The reference signal bus is electrically connected with a plurality of reference signal line；
The periphery circuit region further includes multiple burn-in test terminals, the low-potential signal line, the high potential signal At least one of line and the reference signal bus are electrically connected with two burn-in test terminals respectively.
Second aspect, the embodiment of the invention also provides a kind of display devices, including display panel described in first aspect.
Display panel provided in an embodiment of the present invention and display device, by the way that low-potential signal line, high potential signal is arranged At least one of line and reference signal bus are electrically connected with two burn-in test terminals respectively, receive two different agings Signal is tested, guarantees that the pixel circuit of display panel difference display area can receive same or similar luminous signal, It drives corresponding pixel unit light emission luminance same or similar, guarantees the pixel unit of display panel difference display area Same or similar in the degree of aging in burn-in test stage, the pixel unit of different zones is shown in the subsequent display stage Brightness is same or similar, guarantees that display panel display brightness homogeneity is good, display panel display effect is good.
Detailed description of the invention
By reading a detailed description of non-restrictive embodiments in the light of the attached drawings below, of the invention other Feature, objects and advantages will become more apparent upon:
Fig. 1 is a kind of structural schematic diagram of display panel in the prior art；
Fig. 2 is a kind of structural schematic diagram of display panel provided in an embodiment of the present invention；
Fig. 3 is the structural schematic diagram of another display panel provided in an embodiment of the present invention；
Fig. 4 is a kind of structural schematic diagram of pixel circuit provided in an embodiment of the present invention；
Fig. 5 is the structural schematic diagram of another display panel provided in an embodiment of the present invention；
Fig. 6 is the structural schematic diagram of another pixel circuit provided in an embodiment of the present invention；
Fig. 7 is the structural schematic diagram of another display panel provided in an embodiment of the present invention；
Fig. 8 is the structural schematic diagram of another display panel provided in an embodiment of the present invention；
Fig. 9 is the structural schematic diagram of another display panel provided in an embodiment of the present invention；
Figure 10 is the structural schematic diagram of another display panel provided in an embodiment of the present invention；
Figure 11 is the structural schematic diagram of another display panel provided in an embodiment of the present invention；
Figure 12 is a kind of structural schematic diagram of display device provided in an embodiment of the present invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below with reference to attached in the embodiment of the present invention Figure, by specific embodiment, is fully described by technical solution of the present invention.Obviously, described embodiment is of the invention A part of the embodiment, instead of all the embodiments, based on the embodiment of the present invention, those of ordinary skill in the art are not doing The every other embodiment obtained under the premise of creative work out, falls within the scope of protection of the present invention.
Since there are certain Decay Rates for the luminescent material of OLED display, and initial service stage rate of decay compared with Greatly, in subsequent service stage rate of decay regional stability, therefore it generally will do it burn-in test before OLED display factory, Filter out the luminescent material rapid decay stage.Fig. 1 is a kind of structural schematic diagram of display panel in the prior art, as shown in Figure 1, Display panel includes viewing area 11 and periphery circuit region 12, and integrated drive electronics 13 is located in periphery circuit region 12 and is located at display 11 side of area, since luminous signal is the pixel unit 14 for being input to 11 different zones of viewing area by integrated drive electronics 13 In, and for accelerated ageing test process, luminous signal is generally large, therefore luminous signal in transmission process in luminous signal There are biggish voltage drop on transmission line 15 (such as PVDD signal wire, PVEE signal wire etc.), cause close to integrated region circuit The luminous signal that the pixel unit 14 of 13 sides receives is larger, and the pixel unit 14 far from 13 side of integrated drive electronics receives The luminous signal arrived is smaller.So after burn-in test, close to the pixel unit 14 of 13 side of integrated region circuit and remote The degree of aging of pixel unit 14 from 13 side of integrated drive electronics is different, is will cause during subsequent display close to integrated The pixel unit 14 of 13 side of area circuit is different from far from the light emission luminance of pixel unit 14 of 13 side of integrated drive electronics, Display panel light emission luminance homogeneity is influenced, the display effect of display panel is influenced.
Based on above-mentioned technical problem, the embodiment of the present invention provides a kind of viewing area and periphery circuit region；Viewing area is provided with The pixel circuit that multi-strip scanning signal wire, a plurality of LED control signal line, a plurality of reference signal line and multiple matrixes are arranged；Periphery Circuit region is provided with multiple scan drive circuits, multiple emission control circuits, low-potential signal line, high potential signal line and reference Signal bus；The scanning signal input terminal of scan drive circuit is electrically connected with low-potential signal line and high potential signal line respectively, The scanning signal output end of scan drive circuit is electrically connected with scan signal line；The LED control signal of emission control circuit inputs End is electrically connected with low-potential signal line and high potential signal line respectively, the LED control signal output end and hair of emission control circuit The electrical connection of optical control signal line；Reference signal bus is electrically connected with a plurality of reference signal line；Periphery circuit region further includes multiple old Change calibrating terminal, at least one of low-potential signal line, high potential signal line and reference signal bus are old with two respectively Change calibrating terminal electrical connection.By adopting the above technical scheme, by setting low-potential signal line, high potential signal line and with reference to letter At least one of number bus is electrically connected with two burn-in test terminals respectively, receives two different burn-in test signals, is protected The pixel circuit of card display panel difference display area can receive same or similar luminous signal, drive corresponding Pixel unit light emission luminance it is same or similar, guarantee display panel difference display area pixel unit in burn-in test rank Section degree of aging it is same or similar, in the subsequent display stage pixel unit display brightness of different zones it is identical or It is close, guarantee that display panel display brightness homogeneity is good, display panel display effect is good.
It is core of the invention thought above, following will be combined with the drawings in the embodiments of the present invention, to the embodiment of the present invention In technical solution be clearly and completely described.Based on the embodiments of the present invention, those of ordinary skill in the art are not having Under the premise of making creative work, every other embodiment obtained belongs to the range of protection of the embodiment of the present invention.
Fig. 2 is a kind of structural schematic diagram of display panel provided in an embodiment of the present invention, as shown in Fig. 2, the present invention is implemented The display panel that example provides includes: viewing area 11 and periphery circuit region 12；Viewing area 11 be provided with multi-strip scanning signal wire 111, The pixel circuit 114 of a plurality of LED control signal line 112, a plurality of reference signal line 113 and the arrangement of multiple matrixes；Periphery circuit region 12 are provided with multiple scan drive circuits 121, multiple emission control circuits 122, low-potential signal line 123, high potential signal line 124 and reference signal bus 125；The scanning signal input terminal of scan drive circuit 121 respectively with low-potential signal line 123 and height Electric potential signal line 124 is electrically connected, and the scanning signal output end of scan drive circuit 121 is electrically connected with scan signal line 111；It shines The LED control signal input terminal of control circuit 122 is electrically connected with low-potential signal line 123 and high potential signal line 124 respectively, The LED control signal output end of emission control circuit 122 is electrically connected with LED control signal line 112；Reference signal bus 125 It is electrically connected with a plurality of reference signal line 113；Periphery circuit region 12 further includes multiple burn-in test terminals 20, low-potential signal line 123, at least one of high potential signal line 124 and reference signal bus 125 are electric with two burn-in test terminals 20 respectively Connection.
As shown in Fig. 2, viewing area 11 is provided with multi-strip scanning signal wire 111, a plurality of LED control signal line 112, a plurality of The pixel circuit 114 of reference signal line 113 and the arrangement of multiple matrixes, the pixel circuit 114 for arrangement of going together connect same scanning Signal wire 111, same LED control signal line 112 and same reference signal line 113, receive identical scanning signal, hair Optical control signal and reference signal.
Periphery circuit region 12 be provided with it is multiple cascade setting scan drive circuits 121, as illustrated in the drawing scan1, Scan2 ..., scan6, the first scanning signal input terminal of scan drive circuit 121 is electrically connected with low-potential signal line 123, Second scanning signal input terminal is electrically connected with high potential signal line 124, and scanning signal output end is electrically connected with scan signal line 111 It connects, provides the scanning signal including low-potential signal and high potential signal to pixel circuit 114 by scan signal line 111.Week Side circuit region 12 be additionally provided with it is multiple cascade setting emission control circuits 122, as illustrated in the drawing emit1, emit2 ..., The first LED control signal input terminal of emit6, emission control circuit 122 are electrically connected with low-potential signal line 123, and second shines Control signal input is electrically connected with high potential signal line 124,112 electricity of LED control signal output end and LED control signal line Connection provides the luminous control including low-potential signal and high potential signal to pixel circuit 114 by LED control signal line 112 Signal processed.Reference signal bus 125 is electrically connected with a plurality of reference signal line 113, by reference to signal wire 113 to pixel circuit 114 provide reference signal.
Multiple burn-in test terminals 20 are additionally provided in periphery circuit region 12, multiple burn-in test terminals 20 are used in aging In test process, burn-in test is provided into low-potential signal line 123, high potential signal line 124 and reference signal bus 125 Signal completes burn-in test process.Specifically, low-potential signal line 123, high potential signal line 124 and reference signal bus At least one of 125 are electrically connected with two burn-in test terminals 20 respectively, such low-potential signal line 123, high potential signal At least one of line 124 and reference signal bus 125 can receive two burn-in test letters of different sizes simultaneously Number, guarantee that the pixel circuit 114 in display panel viewing area 11 at different location can receive same or similar shine Signal drives corresponding pixel unit light emission luminance same or similar, guarantees different positions in display panel viewing area 11 The pixel unit for setting place is same or similar in the degree of aging in burn-in test stage, the different location in the subsequent display stage The pixel unit display brightness at place is same or similar, guarantees that display panel display brightness homogeneity is good, display panel is shown It works well.Specifically, being carried out so that low-potential signal line 123 shown in Fig. 2 is electrically connected with two burn-in test terminals 20 as an example Illustrate, low-potential signal line 123 receive two burn-in test signals of different sizes, in this way pass through scan drive circuit 121 to The pixel circuit 114 of display panel different location provides different scanning signals, or passes through emission control circuit 122 to display The pixel circuit 114 of panel different location provides different LED control signals, passes through different scanning signals or the control that shines Signal processed controls the display panel the shining during burn-in test of the corresponding pixel unit of pixel circuit 114 on different location Degree is same or similar, and degree of aging is same or similar, guarantees display rank of the display panel after the burn-in test stage The luminous degree of Duan Zhong, the pixel unit of different location are identical, and display panel shows that homogeneity is good.
Optionally, at least one of low-potential signal line 123, high potential signal line 124 and reference signal bus 125 It is electrically connected respectively with two burn-in test terminals 20, can specifically include a variety of implementations.One of implementation can be with Refering to what is shown in Fig. 2, burn-in test terminal 20 includes the first calibrating terminal part 21 and the second calibrating terminal part 22, the first test Terminal part 21 and the second calibrating terminal part 22 are located at the two sides that viewing area 11 is oppositely arranged, and this setup only needs The first calibrating terminal part 21 and the second calibrating terminal part 22, low potential is respectively set in the two sides that viewing area 11 is oppositely arranged At least one of signal wire 123, high potential signal line 124 and reference signal bus 125 respectively with the first test lead sub-portion Points 21 and second calibrating terminal part 22 be electrically connected, implementation is simple.Another implementation can refer to Fig. 3 institute Show, Fig. 3 is the structural schematic diagram of another display panel provided in an embodiment of the present invention, and Fig. 3 is with low-potential signal line 123 and always Change test signal wire 30 to be illustrated for the side electrical connection far from burn-in test terminal 20.As shown in figure 3, multiple agings Calibrating terminal 20 is located at the same side of viewing area 11, and display panel further includes at least one burn-in test signal wire 30, and aging is surveyed One end of trial signal line 30 connects a burn-in test terminal 20, the other end and low-potential signal line 123, high potential signal line 124 Or reference signal bus 125 is electrically connected in the side far from burn-in test terminal 20, realizes low-potential signal line 123, high electricity Position at least one of signal wire 124 or reference signal bus 125 can connect two burn-in test signals simultaneously, this to set The mode of setting only can input burn-in test signal from the side of viewing area 11, and burn-in test signal supplying formula is simple.The present invention Embodiment to how to realize in low-potential signal line 123, high potential signal line 124 and reference signal bus 125 at least one It is a to be electrically connected with two burn-in test terminals 20 respectively without limiting, it need to only guarantee low-potential signal line 123, high potential signal At least one of line 124 or reference signal bus 125 can connect two different burn-in test signals simultaneously, guarantee aobvious Show that the pixel circuit 114 in Display panel area 11 at different location can receive same or similar burn-in test signal, Pixel unit in display panel viewing area 11 at different location is same or similar i.e. in the degree of aging in burn-in test stage It can.
Next to how by low-potential signal line 123, high potential signal line 124 and reference signal bus 125 At least one be electrically connected respectively with two burn-in test terminals 20, can realize different location in display panel viewing area 11 The pixel circuit 114 at place can receive same or similar luminous signal and be illustrated.
Fig. 4 is a kind of structural schematic diagram of pixel circuit provided in an embodiment of the present invention, and Fig. 5 is that the embodiment of the present invention provides Another display panel structural schematic diagram, as shown in Figure 4 and Figure 5, pixel circuit 114 include the first P-type TFT T1 and the second P-type TFT T2, LED control signal line 112 are thin with the first P-type TFT T1 and the second p-type respectively The control terminal of film transistor T2 is electrically connected；Low-potential signal line 123 is surveyed with the first burn-in test terminal 201 and the second aging respectively Terminal 202 is tried to be electrically connected；Low-potential signal line 123 includes the first sub- low-potential signal line 1231 and the second sub- low-potential signal line 1232, wherein one end of the first sub- low-potential signal line 1231 and the second sub- low-potential signal line 1232 respectively with the first aging Calibrating terminal 201 is electrically connected, and the other end of the first sub- low-potential signal line 1231 is electrically connected with the second burn-in test terminal 202； First sub- low-potential signal line 1231 is electrically connected with multiple LED control signal input terminals, the second sub- low-potential signal line 1232 with Multiple scanning signal input terminal electrical connections；Display panel includes the ageing step, in the ageing step, the first burn-in test terminal It is connected with the first low-potential signal VGL1 on 201, is connected with the second low-potential signal VGL2 on the second burn-in test terminal 202, Wherein, VGL2 < VGL1 < 0.
Illustratively, when pixel circuit 114 include the first P-type TFT T1 and the second P-type TFT T2, and When the driving control signal of first P-type TFT T1 and the second P-type TFT T2 are less than 0, the first p-type film crystal Pipe T1 and the second P-type TFT T2 conducting；And in the ageing step, the first P-type TFT T1 and the second p-type film are brilliant Body pipe T2 works in linear zone.
As shown in figure 5, since the second aging terminal 202 is close to the side emission control circuit emit1, the first aging terminal 201 close to the side emission control circuit emit6, therefore the EMIT1 signal of emission control circuit emit1 output is old closer to second Change the second low-potential signal VGL2 that terminal 202 connects, the EMIT6 signal of emission control circuit emit6 output is closer to first The second low-potential signal VGL1 that aging terminal 201 connects, therefore, when connected on the first burn-in test terminal 201 first low When the second low-potential signal VGL2 connected on electric potential signal VGL1 and the second burn-in test terminal 202 meets VGL2 < VGL1 < 0, The LED control signal of LED control signal EMIT1 and emission control circuit the emit6 output of emission control circuit emit1 output EMIT6 meets EMIT1 < EMIT6 < 0.Simultaneously as the first P-type TFT T1 and the second p-type film are brilliant in the ageing step Body pipe T2 works in linear zone, therefore, in the entire row of pixels circuit 114 of LED control signal EMIT1 control, the first p-type film The opening degree of transistor T1 and the second P-type TFT T2 are larger, the entire row of pixels electricity of LED control signal EMIT6 control In road 114, the opening degree of the first P-type TFT T1 and the second P-type TFT T2 are smaller.
As shown in figure 4, since the first P-type TFT T1 and the second P-type TFT T2 are located at PVDD signal On transmission line, therefore, LED control signal EMIT1 control entire row of pixels circuit 114 in the first P-type TFT T1 and The opening degree of second P-type TFT T2 is larger, and more luminous signals (PVDD signal) can be transmitted to pixel unit (OLED) it on, can so make up because the entire row of pixels circuit 114 of LED control signal EMIT1 control is located remotely from integrated driving The larger problem of voltage drop caused by the side of circuit 13 guarantees the entire row of pixels circuit 114 of LED control signal EMIT1 control The luminous signal received is identical as the luminous signal that the entire row of pixels circuit 114 that LED control signal EMIT6 is controlled receives Or it is close, guarantee that pixel circuit 114 of the entire display panel at 13 different location of integrated drive electronics can receive Same or similar luminous signal guarantees that the light emission luminance of the pixel unit in entire display panel is same or similar, as Plain unit is same or similar in the degree of aging of ageing step, and then guarantees in the display stage after the ageing step, whole The light emission luminance of pixel unit in a display panel is identical, guarantees that the display homogeneity of display panel is good.
Optionally, with continued reference to shown in Fig. 5, in display panel provided in an embodiment of the present invention, periphery circuit region 12 is also set Multiple display calibrating terminals 40 are equipped with, low-potential signal line 123, high potential signal line 124 and reference signal bus 125 connect respectively A display calibrating terminal 40 is connect, for receiving display test signal, wherein burn-in test terminal 20 is multiple in display test phase Calibrating terminal 40 is shown with part.
Illustratively, before or after the ageing step, it is also necessary to carry out display test (VT to display panel Test), the display performance of display panel is detected.Wherein, burn-in test terminal 20 can show calibrating terminal 40 with multiplexing part, or Person shows that calibrating terminal 40 can be multiplexed burn-in test terminal 20, guarantees various signal terminals in display panel periphery circuit region 12 Set-up mode is simple, reduces the quantity of various signal terminals, reduces the area of periphery circuit region 12, is advantageously implemented display panel Narrow frame design.
Further, in display test phase, current potential and the first burn-in test end on the second burn-in test terminal 202 Current potential on son 201 is identical, alternatively, the current potential on the second burn-in test terminal 202 is floating.
Illustratively, display panel provided in an embodiment of the present invention only needed to require the first burn-in test in the ageing step Terminal 201 and burn-in test signal on the second burn-in test terminal 202 are different, by low-potential signal line 123, high potential At least one of signal wire 124 and reference signal bus 125 input different burn-in test signals, guarantee in display panel The specific pixel circuit 114 of specific 13 difference of integrated drive electronics can receive same or similar luminous signal；At it His, such as display calibrating terminal, on the current potential and the first burn-in test terminal 201 on the second burn-in test terminal 202 in stage Current potential is identical, alternatively, the current potential on the second burn-in test terminal 202 is floating, no setting is required the first burn-in test terminal 201 Different with the display test signal on the second burn-in test terminal 202, display test method is simple.
Fig. 6 is the structural schematic diagram of another pixel circuit provided in an embodiment of the present invention, and Fig. 7 is that the embodiment of the present invention mentions The structural schematic diagram of another display panel supplied, as shown in Figure 6 and Figure 7, pixel circuit 114 include the first N-type film crystal Pipe T1 ' and the second N-type TFT T2 ', LED control signal line 112 respectively with the first N-type TFT T1 ' and second The control terminal of N-type TFT T2 ' is electrically connected；High potential signal line 124 respectively with third burn-in test terminal 203 and the 4th Burn-in test terminal 204 is electrically connected；High potential signal line 124 includes the first sub- high potential signal line 1241 and the second sub- high potential Signal wire 1242, wherein one end of the first sub- high potential signal line 1241 and the second sub- high potential signal line 1242 is respectively with The electrical connection of three burn-in test terminals 203,204 electricity of the other end and the 4th burn-in test terminal of the first sub- high potential signal line 1241 Connection；First sub- high potential signal line 1241 is electrically connected with multiple LED control signal input terminals, the second sub- high potential signal line 1242 are electrically connected with multiple scanning signal input terminals；Display panel includes the ageing step, in the ageing step, third burn-in test It is connected with the first high potential signal VGH1 on terminal 203, is connected with the second high potential signal on the 4th burn-in test terminal 204 VGH2, wherein VGH2 > VGH1 > 0.
Illustratively, when pixel circuit 114 include the first N-type TFT T1 ' and the second N-type TFT T2 ', And first N-type TFT T1 ' and the second N-type TFT T2 ' driving control signal be greater than 0 when, the first N-type film Transistor T1 ' and the second N-type TFT T2 ' conducting；And in ageing step, the first N-type TFT T1 ' and the 2nd N Type thin film transistor (TFT) T2 ' works in linear zone.
As shown in fig. 7, since the 4th aging terminal 204 is close to the side emission control circuit emit1, third aging terminal 203 close to the side emission control circuit emit6, therefore the EMIT1 signal of emission control circuit emit1 output is old closer to the 4th Change the second high potential signal VGH2 that terminal 204 connects, the EMIT6 signal of emission control circuit emit6 output is closer to third The first high potential signal VGH1 that aging terminal 203 connects, therefore, when connected on third burn-in test terminal 203 first high When the second high potential signal VGH2 connected on electric potential signal VGH1 and the 4th burn-in test terminal 204 meets VGH2 > VGH1 > 0, The LED control signal of LED control signal EMIT1 and emission control circuit the emit6 output of emission control circuit emit1 output EMIT6 meets EMIT1 > EMIT6 > 0.Simultaneously as in the ageing step, the first N-type TFT T1 ' and the second N-type film Transistor T2 ' works in linear zone, and therefore, in the entire row of pixels circuit 114 of LED control signal EMIT1 control, the first N-type is thin The opening degree of film transistor T1 ' and the second N-type TFT T2 ' are larger, the full line picture of LED control signal EMIT6 control In plain circuit 114, the opening degree of the first N-type TFT T1 ' and the second N-type TFT T2 ' are smaller.
As shown in fig. 6, since the first N-type TFT T1 ' and the second N-type TFT T2 ' are located at PVDD signal Transmission line on, therefore, LED control signal EMIT1 control entire row of pixels circuit 114 in the first N-type TFT The opening degree of T1 ' and the second N-type TFT T2 ' are larger, and more luminous signals (PVDD signal) can be transmitted to picture On plain unit (OLED), it can make up because the entire row of pixels circuit 114 of LED control signal EMIT1 control is located remotely from integrated drive The larger problem of voltage drop caused by the side of dynamic circuit 13, guarantees the entire row of pixels circuit of LED control signal EMIT1 control The luminous signal phase that the entire row of pixels circuit 114 that 114 luminous signals received are controlled with LED control signal EMIT6 receives It is same or close, guarantee that pixel circuit 114 of the entire display panel at 13 different location of integrated drive electronics can receive To same or similar luminous signal, guarantee that the light emission luminance of the pixel unit in entire display panel is same or similar, Pixel unit is same or similar in the degree of aging of ageing step, and then guarantees in the display stage after the ageing step, The light emission luminance of pixel unit in entire display panel is identical, guarantees that the display homogeneity of display panel is good.
Further, current potential and third burn-in test end in display test phase, on the 4th burn-in test terminal 204 Current potential on son 203 is identical, alternatively, the current potential on the 4th burn-in test terminal 204 is floating.
Illustratively, display panel provided in an embodiment of the present invention only needed to require third burn-in test in the ageing step Terminal 203 and burn-in test signal on the 4th burn-in test terminal 204 are different, by low-potential signal line 123, high potential At least one of signal wire 124 and reference signal bus 125 input different burn-in test signals, guarantee in display panel The specific pixel circuit 114 of specific 13 difference of integrated drive electronics can receive same or similar luminous signal；At it His, such as display calibrating terminal, on the current potential and third burn-in test terminal 203 on the 4th burn-in test terminal 204 in stage Current potential is identical, alternatively, the current potential on the 4th burn-in test terminal 204 is floating, no setting is required third burn-in test terminal 203 Different with the display test signal on the 4th burn-in test terminal 204, display test mode is simple.
Fig. 8 is the structural schematic diagram of another display panel provided in an embodiment of the present invention, in conjunction with shown in Fig. 4 and Fig. 8, as Plain circuit 114 includes third P-type TFT T3 and storage capacitance Cst, the drain electrode of third P-type TFT T3 and is deposited The first electrode plate that storage holds Cst is electrically connected in first node N1；Scan signal line 111 and third P-type TFT T3's Control terminal electrical connection；High potential signal line 124 is electric with the 5th burn-in test terminal 205 and the 6th burn-in test terminal 206 respectively Connection；High potential signal line includes the first sub- high potential signal line 1241 and the second sub- high potential signal line 1242, wherein first One end of sub- high potential signal line 1241 and the second sub- high potential signal line 1242 is electrically connected with the 6th burn-in test terminal 206 respectively It connects, the other end of the second sub- high potential signal line 1242 is electrically connected with the 5th burn-in test terminal 205；First sub- high potential signal Line 1241 is electrically connected with multiple LED control signal input terminals, and the second sub- high potential signal line 1242 is inputted with multiple scanning signals End electrical connection；Display panel includes the ageing step, in the ageing step, is connected with third height on the 5th burn-in test terminal 205 Electric potential signal VGH3 is connected with the 4th high potential signal VGH4 on the 6th burn-in test terminal 206, wherein VGH4 > VGH3 > 0.
The working principle of pixel circuit 114 is briefly described first: in initial phase, the 6th thin film transistor (TFT) T6 It opens, reference signal is filled with storage capacitance Cst.It is the 4th thin film transistor (TFT) T4, the 5th thin in data write-in and compensated stage stage Film transistor T5 and third thin film transistor (TFT) T3 is opened, and Vdata is filled with storage capacitance Cst, the voltage VN1=of first node N1 Vdata- | Vth |, wherein | Vth | it is the threshold voltage of the 5th thin film transistor (TFT) T5.At the arrival moment of light emitting phase, due to sweeping The scanning signal retouched on signal wire 111 is mutated to high potential signal, change amount signal VGH-VGL, generally from low-potential signal There are coupled capacitor Cg between first node N1 and scan signal line 111, influence first segment since scanning signal jumps at this time Point N1 node potential changes delta V=Cg/ (Cg+Cst) * (VGH-VGL), makes first node N1 potential change to VN1+ Δ V.It is sending out Photophase, the glow current I=K (PVDD-Vdata- Δ V) of OLED2, wherein K is constant.Therefore different burn-in test ends are set High potential signal on son 20 is different, can influence first node N1 node potential changes delta V, and then influence the luminous electricity of OLED Stream, influences the degree of aging of OLED.
Specifically, since the 5th burn-in test terminal 205 is close to the side scan drive circuit scan1, the 6th burn-in test Terminal 206 is close to the side scan drive circuit scan6, therefore the SCAN1 signal of scan drive circuit scan1 output is closer to the The SCAN6 signal of third high potential signal VGH3, scan drive circuit the scan6 output of five burn-in test terminals 205 connection is more The 4th high potential signal VGH4 connected close to the 6th burn-in test terminal 206, therefore, when on the 5th burn-in test terminal 205 The 4th high potential signal VGH4 connected on the third high potential signal VGH3 and the 6th burn-in test terminal 206 of connection meets When VGH4 > VGH3 > 0, the SCAN1 signal of scan drive circuit scan1 output and the SCAN6 of scan drive circuit scan6 output Signal meets SCAN6 > SCAN1 > 0.Therefore SCAN1 signal control entire row of pixels circuit 114 in scanning signal jump when The full line picture that first node N1 node potential changes delta V1 is controlled closer to Cg/ (Cg+Cst) * (VGH3-VGL), SCAN6 signal In plain circuit 114 when scanning signal is jumped in first node N1 node potential changes delta V6 closer to Cg/ (Cg+Cst) * (VGH4-VGL), therefore, Δ V1 < Δ V6, therefore the corresponding pixel unit of entire row of pixels circuit 114 of SCAN1 signal control Luminescence unit I1=K (PVDD-Vdata- Δ V1) pixel unit corresponding with the entire row of pixels circuit 114 that SCAN6 signal controls Luminescence unit I6=K (PVDD-Vdata- Δ V6) meets I1>I6.I.e. by being connected on the 5th burn-in test terminal 205 of setting Third high potential signal VGH3 and the 6th burn-in test terminal 206 on the 4th high potential signal VGH4 that connects meet VGH4 > VGH3 > 0, it is ensured that the luminous signal and SCAN6 signal that the entire row of pixels circuit 114 of SCAN1 signal control receives control The luminous signal that receives of entire row of pixels circuit 114 it is same or similar, guarantee entire display panel apart from integrated driving electricity Pixel circuit 114 at 13 different location of road can receive same or similar luminous signal, guarantee entire display panel In pixel unit light emission luminance it is same or similar, pixel unit is same or similar in the degree of aging of ageing step, And then guarantee in the display stage after the ageing step, the light emission luminance of the pixel unit in entire display panel is identical, protects The display homogeneity for demonstrate,proving display panel is good.
Further, in display test phase, current potential and the 6th burn-in test end on the 5th burn-in test terminal 205 Current potential on son 206 is identical, alternatively, the current potential on the 5th burn-in test terminal 205 is floating.
Illustratively, display panel provided in an embodiment of the present invention only needed to require the 5th burn-in test in the ageing step Terminal 205 and burn-in test signal on the 6th burn-in test terminal 206 are different, by low-potential signal line 123, high potential At least one of signal wire 124 and reference signal bus 125 input different burn-in test signals, guarantee in display panel The specific pixel circuit 114 of specific 13 difference of integrated drive electronics can receive same or similar luminous signal；At it His, such as display calibrating terminal, on the current potential and the 6th burn-in test terminal 206 on the 5th burn-in test terminal 205 in stage Current potential is identical, alternatively, the current potential on the 5th burn-in test terminal 205 is floating, no setting is required the 5th burn-in test terminal 205 Different with the display test signal on the 6th burn-in test terminal 206, display test mode is simple.
Fig. 9 is the structural schematic diagram of another display panel provided in an embodiment of the present invention, in conjunction with shown in Fig. 6 and Fig. 9, as Plain circuit 114 include third N-type TFT T3 ' and storage capacitance Cst, the source electrode of third N-type TFT T3 ' and The first electrode plate of storage capacitance Cst is electrically connected in first node N1；Scan signal line 111 and third N-type TFT T3 ' Control terminal electrical connection；Low-potential signal line 123 respectively with the 7th burn-in test terminal 207 and the 8th burn-in test terminal 208 Electrical connection；Low-potential signal line includes the first sub- low-potential signal line 1231 and the second sub- low-potential signal line 1232, wherein the One end of one sub- low-potential signal line 1231 and the second sub- low-potential signal line 1232 is electric with the 8th burn-in test terminal 208 respectively Connection, the other end of the second sub- low-potential signal line 1232 are electrically connected with the 7th burn-in test terminal 207；First sub- low potential letter Number line 1231 is electrically connected with multiple LED control signal input terminals, and the second sub- low-potential signal line 1232 and multiple scanning signals are defeated Enter end electrical connection；Display panel includes the ageing step, in the ageing step, is connected with third on the 7th burn-in test terminal 207 Low-potential signal VGL3 is connected with the 4th low-potential signal VGL4 on the 8th burn-in test terminal 208, wherein and VGL4 < VGL3 < 0。
The working principle of pixel circuit 114 is briefly described first: in initial phase, the 6th thin film transistor (TFT) T6 ' is opened, and reference signal is filled with storage capacitance Cst.In data write-in and compensated stage stage, the 4th thin film transistor (TFT) T4 ', the Five thin film transistor (TFT) T5 ' and third thin film transistor (TFT) T3 ' are opened, and Vdata is filled with storage capacitance Cst, the voltage of first node N1 VN1=Vdata- | Vth |, wherein | Vth | it is the threshold voltage of the 5th thin film transistor (TFT) T5 '.At the arrival moment of light emitting phase, Since the scanning signal on scan signal line 111 is mutated from high potential signal to low-potential signal, change amount signal VGH- VGL, there are coupled capacitor Cg generally between first node N1 and scan signal line 111, at this time since scanning signal jumps shadow First node N1 node potential changes delta V=Cg/ (Cg+Cst) * (VGH-VGL) is rung, makes first node N1 potential change to VN1+ ΔV.In light emitting phase, the glow current I=K (PVDD-Vdata- Δ V) of OLED, wherein K is constant.Therefore it is arranged different old The low-potential signal changed on calibrating terminal 20 is different, can influence first node N1 node potential changes delta V, and then influence OLED Glow current, influence the degree of aging of OLED.
Specifically, since the 7th burn-in test terminal 207 is close to the side scan drive circuit scan1, the 8th burn-in test Terminal 208 is close to the side scan drive circuit scan6, therefore the SCAN1 signal of scan drive circuit scan1 output is closer to the The SCAN6 signal of third low-potential signal VGL3, scan drive circuit the scan6 output of seven burn-in test terminals 207 connection is more The 4th low-potential signal VGL4 connected close to the 8th burn-in test terminal 208, therefore, when on the 7th burn-in test terminal 207 The 4th low-potential signal VGL4 connected on the third low-potential signal VGL3 and the 8th burn-in test terminal 208 of connection meets When VGL4 < VGL3 < 0, the SCAN1 signal of scan drive circuit scan1 output and the SCAN6 of scan drive circuit scan6 output Signal meets SCAN6 < SCAN1 < 0.Therefore SCAN1 signal control entire row of pixels circuit 114 in scanning signal jump when The full line picture that first node N1 node potential changes delta V1 is controlled closer to Cg/ (Cg+Cst) * (VGH-VGL3), SCAN6 signal In plain circuit 114 when scanning signal is jumped in first node N1 node potential changes delta V6 closer to Cg/ (Cg+Cst) * (VGH-VGL4), therefore, Δ V1 < Δ V6, therefore the corresponding pixel unit of entire row of pixels circuit 114 of SCAN1 signal control Luminescence unit I1=K (PVDD-Vdata- Δ V1) pixel unit corresponding with the entire row of pixels circuit 114 that SCAN6 signal controls Luminescence unit I6=K (PVDD-Vdata- Δ V6) meets I1>I6.I.e. by being connected on the 7th burn-in test terminal 207 of setting Third low-potential signal VGL3 and the 8th burn-in test terminal 208 on the 4th low-potential signal VGL4 that connects meet VGL4 < VGL3 < 0, it is ensured that the luminous signal and SCAN6 signal that the entire row of pixels circuit 114 of SCAN1 signal control receives control The luminous signal that receives of entire row of pixels circuit 114 it is same or similar, guarantee entire display panel apart from integrated driving electricity Pixel circuit 114 at 13 different location of road can receive same or similar luminous signal, guarantee entire display panel In pixel unit light emission luminance it is same or similar, pixel unit is same or similar in the degree of aging of ageing step, And then guarantee in the display stage after the ageing step, the light emission luminance of the pixel unit in entire display panel is identical, protects The display homogeneity for demonstrate,proving display panel is good.
Further, in display test phase, current potential and the 8th burn-in test end on the 7th burn-in test terminal 207 Current potential on son 208 is identical, alternatively, the current potential on the 7th burn-in test terminal 207 is floating.
Illustratively, display panel provided in an embodiment of the present invention only needed to require the 7th burn-in test in the ageing step Terminal 207 and burn-in test signal on the 8th burn-in test terminal 208 are different, by low-potential signal line 123, high potential At least one of signal wire 124 and reference signal bus 125 input different burn-in test signals, guarantee in display panel The specific pixel circuit 114 of specific 13 difference of integrated drive electronics can receive same or similar luminous signal；At it His, such as display calibrating terminal, on the current potential and the 8th burn-in test terminal 208 on the 7th burn-in test terminal 207 in stage Current potential is identical, alternatively, the current potential on the 7th burn-in test terminal 207 is floating, no setting is required the 7th burn-in test terminal 207 Different with the display test signal on the 8th burn-in test terminal 208, display test mode is simple.
Figure 10 is the structural schematic diagram of another display panel provided in an embodiment of the present invention, with reference to Fig. 4, Fig. 6 and Figure 10 Shown, pixel circuit 114 includes third thin film transistor (TFT), the 4th thin film transistor (TFT), the 5th thin film transistor (TFT) and storage capacitance, ginseng The first electrode plate for examining signal wire 113, third thin film transistor (TFT) and storage capacitance is electrically connected in first node；4th film is brilliant Body pipe and the 5th thin film transistor (TFT) are electrically connected in second node, scan signal line 111 and third thin film transistor (TFT) and the described 4th The control terminal of thin film transistor (TFT) is electrically connected；The both ends of reference signal bus 125 respectively with the 9th burn-in test terminal 209 and the tenth Burn-in test terminal 210 is electrically connected；Display panel includes the ageing step, in the ageing step, on the 9th burn-in test terminal 209 It is connected with the first reference signal VREF1, is connected with the second reference signal VREF2 on the tenth burn-in test terminal 210, | VREF2 | > | VREF1 |, wherein the first reference signal VREF1 is identical with the polarity of the second reference signal VREF2.
When the thin film transistor (TFT) for including in pixel circuit 114 is P-type TFT, VREF2 < VREF1 < 0 at this time； When the thin film transistor (TFT) for including in pixel circuit 114 is N-type TFT, VREF2 > VREF1 > 0 at this time.
Specifically, when the thin film transistor (TFT) for including in pixel circuit 114 is P-type TFT, as shown in figure 4, Third thin film transistor (TFT) and the first electrode plate of storage capacitance are electrically connected in first node can be understood as third p-type film crystalline substance The drain electrode of body pipe T3 and the first electrode plate of storage capacitance Cst are electrically connected in first node N1；4th thin film transistor (TFT) and Five thin film transistor (TFT)s can be understood as drain electrode and the 5th p-type film of the 4th P-type TFT T4 in second node electrical connection The source electrode of transistor T5 is electrically connected in second node N2.When the thin film transistor (TFT) for including in pixel circuit 114 is that N-type film is brilliant When body pipe, the first electrode plate of third thin film transistor (TFT) and storage capacitance can be understood as the 3rd N in first node electrical connection The source electrode of type thin film transistor (TFT) T3 ' and the first electrode plate of storage capacitance Cst are electrically connected in first node N1；4th film is brilliant Body pipe and the 5th thin film transistor (TFT) can be understood as the source electrode and the of the 4th N-type TFT T4 ' in second node electrical connection The drain electrode of five N-type TFT T5 ' is electrically connected in second node N2.
Next it is illustrated so that the thin film transistor (TFT) in pixel circuit 114 is P-type TFT as an example.
According to the working principle introduction of above-mentioned pixel circuit 114, after the initial stage, the voltage of first node N1 For VREF；In data write-in and compensated stage, the 4th thin film transistor (TFT) T4, the 5th thin film transistor (TFT) T5 and third thin film transistor (TFT) T3 is opened, and the voltage of second node N2 node is VN2=Vdata, and capacitor charging, N1 point current potential become larger at this time；It is grabbed in threshold value In the stage, NI point potential change △ N1, at the end of threshold value stage of gripping, N1 point current potential is VN1=VREF+ △ N1.So logical It crosses and different VREF is set, available different N1 point current potential, the i.e. grid potential of the 5th thin film transistor (TFT) T5.In luminous rank Section, the glow current I=K (Vgs-Vth) of OLED2, wherein the breadth length ratio of channel region in K thin film transistor (TFT) is constant, Vgs the The gate source voltage of five thin film transistor (TFT) T5, the source voltage of the 5th thin film transistor (TFT) T5 are definite value Vdata；Vth is the 5th film The threshold voltage of transistor T5 is definite value, and therefore, by the way that different VREF current potentials is arranged, available the 5th different film is brilliant The grid potential of body pipe T5, and then the different glow current of OLED is obtained, corresponding OLED different degree of agings.
The first reference due to the second reference signal VREF2 on the tenth aging terminal 210 and on the 9th aging terminal 209 Signal VREF1 meets VREF2 < VREF1 < 0, therefore, the OLED in the pixel circuit 114 of 210 side of the tenth aging terminal Glow current I1=K (Vgs-Vth)2With the glow current of the OLED in the pixel circuit 114 of 209 side of the 9th aging terminal I2=K (Vgs-Vth)2Meet I1>I2.Since the tenth aging terminal 210 is located remotely from the side of integrated drive electronics 10, The second reference signal VREF2 on tenth aging terminal 210 and the first reference signal on the 9th aging terminal 209 are set VREF1 meets caused by VREF2 < VREF1 < 0 can make up the pixel circuit 114 far from 13 side of integrated drive electronics because of voltage drop The small problem of luminous signal, guarantee luminous signal that the pixel circuit 114 far from 13 side of integrated drive electronics receives with The luminous signal that pixel circuit 114 close to 13 side of integrated drive electronics receives is same or similar, guarantees entire display Pixel circuit 114 of the panel at 13 different location of integrated drive electronics can receive same or similar luminous letter Number, guarantee that the light emission luminance of the pixel unit in entire display panel is same or similar, pixel unit is old the ageing step Change degree is same or similar, and then guarantees in the display stage after the ageing step, the pixel list in entire display panel The light emission luminance of member is identical, guarantees that the display homogeneity of display panel is good.
Further, in display test phase, current potential and the 9th burn-in test end on the tenth burn-in test terminal 210 Current potential on son 209 is identical, alternatively, the current potential on the tenth burn-in test terminal 210 is floating.
Illustratively, display panel provided in an embodiment of the present invention only needed to require the tenth burn-in test in the ageing step Terminal 210 and burn-in test signal on the 9th burn-in test terminal 209 are different, by low-potential signal line 123, high potential At least one of signal wire 124 and reference signal bus 125 input different burn-in test signals, guarantee in display panel The specific pixel circuit 114 of specific 13 difference of integrated drive electronics can receive same or similar luminous signal；At it His, such as display calibrating terminal, on the current potential and the 9th burn-in test terminal 209 on the tenth burn-in test terminal 210 in stage Current potential is identical, alternatively, the current potential on the tenth burn-in test terminal 210 is floating, no setting is required the tenth burn-in test terminal 210 Different with the display test signal on the 9th burn-in test terminal 209, display test mode is simple.
To sum up, above-described embodiment to how pass through low-potential signal line 123, high potential signal line 124 and reference signal At least one of bus 125 is electrically connected with two burn-in test terminals 20 respectively, can realize display panel viewing area 11 Pixel circuit 114 at interior different location can receive same or similar luminous signal and be described in detail, based on upper It states bright it is recognised that by setting low-potential signal line 123, high potential signal line 124 and reference signal bus 125 At least one is electrically connected with two burn-in test terminals 20 respectively, receives two different burn-in test signals, guarantees display surface The pixel circuit of plate difference display area can receive same or similar luminous signal, drive corresponding pixel list First light emission luminance is same or similar, guarantees aging of the pixel unit in the burn-in test stage of display panel difference display area Degree is same or similar, and the pixel unit display brightness of different zones is same or similar in the subsequent display stage, protects Card display panel display brightness homogeneity is good, and display panel display effect is good.Above-described embodiment also detects display simultaneously Stage, the semaphore request on each burn-in test terminal are illustrated, and guarantee that display test mode is simple.It needs to illustrate It is that the embodiment of the present invention is only with one in low-potential signal line 123, high potential signal line 124 and reference signal bus 125 It is electrically connected, is illustrated for two different burn-in test signals of reception, Ke Yili with two burn-in test terminals 20 respectively Solution, two or three points in low-potential signal line 123, high potential signal line 124 and reference signal bus 125 When not being electrically connected with two burn-in test terminals 20, identical technical effect equally can achieve, which is not described herein again.
Optionally, provided in an embodiment of the present invention aobvious with continued reference to shown in Fig. 2, Fig. 3, Fig. 5, Fig. 7, Fig. 8, Fig. 9 and Figure 10 Show and is additionally provided with integrated drive electronics 13 in panel in periphery circuit region 12；Wherein, low-potential signal line 123 and integrated driving electricity Road 13 is electrically connected, for receiving low-potential signal in the display stage；High potential signal line 124 is electrically connected with integrated drive electronics 13 It connects, for receiving high potential signal in the display stage；Reference signal bus 125 is electrically connected with integrated drive electronics 13, is used for The display stage receives reference signal, guarantees that display panel may be implemented normally to show.
Optionally, it is respectively positioned on the same side of viewing area 11 for burn-in test terminal 20, shows in periphery circuit region 12 also Include the case where burn-in test signal wire 30, burn-in test signal wire 30 and the low-potential signal line 123 being connected electrically, high electricity Position signal wire 124 or reference signal bus 125 are located at the same side of viewing area 11, as shown in Figure 3；Alternatively, may be located on The two sides that viewing area 11 is oppositely arranged are located at, as shown in figure 11, the embodiment of the present invention is to this without limiting.
Based on same inventive concept, the embodiment of the invention also provides a kind of display device, Figure 12 is implementation of the present invention The schematic diagram for the display device that example provides, display device 100 provided in an embodiment of the present invention include any embodiment of that present invention institute The display panel 101 stated.Optionally, the embodiment of the present invention, which provides display device, to be mobile phone shown in Figure 12, or Computer, television set, intelligence wearing display device etc., the embodiment of the present invention is not particularly limited this.
Note that the above is only a better embodiment of the present invention and the applied technical principle.It will be appreciated by those skilled in the art that The invention is not limited to the specific embodiments described herein, and the feature of each embodiment of the invention can be partially or entirely Ground is coupled to each other or combination, and coordination with one another and can technically be driven in various ways.To those skilled in the art For be able to carry out and various apparent change, readjust, be combined with each other and substitute without departing from protection scope of the present invention. Therefore, although the present invention has been described in more detail through the above examples, the present invention is not limited only to above Embodiment can also include without departing from the inventive concept more other equivalent embodiments, and the scope of the present invention It is determined by the scope of the appended claims.

Claims (16)

1. a kind of display panel characterized by comprising
Viewing area and periphery circuit region；
The viewing area is provided with multi-strip scanning signal wire, a plurality of LED control signal line, a plurality of reference signal line and multiple squares The pixel circuit of battle array arrangement；
The periphery circuit region is provided with multiple scan drive circuits, multiple emission control circuits, low-potential signal line, high potential Signal wire and reference signal bus；
The scanning signal input terminal of the scan drive circuit respectively with the low-potential signal line and the high potential signal line Electrical connection, the scanning signal output end of the scan drive circuit are electrically connected with the scan signal line；
The LED control signal input terminal of the emission control circuit is believed with the low-potential signal line and the high potential respectively The electrical connection of number line, the LED control signal output end of the emission control circuit are electrically connected with the LED control signal line；
The reference signal bus is electrically connected with a plurality of reference signal line；
The periphery circuit region further includes multiple burn-in test terminals, the low-potential signal line, the high potential signal line with And at least one of described reference signal bus is electrically connected with two burn-in test terminals respectively.
2. display panel according to claim 1, which is characterized in that the pixel circuit includes the first p-type film crystal Pipe and the second P-type TFT, the LED control signal line respectively with first P-type TFT and the second p-type The control terminal of thin film transistor (TFT) is electrically connected；The low-potential signal line respectively with the first burn-in test terminal and the second burn-in test Terminal electrical connection；
The low-potential signal line includes the first sub- low-potential signal line and the second sub- low-potential signal line, wherein described first One end of sub- low-potential signal line and the second sub- low-potential signal line is electrically connected with the first burn-in test terminal respectively, The other end of the first sub- low-potential signal line is electrically connected with the second burn-in test terminal；
The first sub- low-potential signal line is electrically connected with multiple LED control signal input terminals, the second sub- low potential Signal wire is electrically connected with multiple scanning signal input terminals；
The display panel includes the ageing step, and in the ageing step, is connected on the first burn-in test terminal One low-potential signal VGL1 is connected with the second low-potential signal VGL2 on the second burn-in test terminal, wherein and VGL2 < VGL1<0。
3. display panel according to claim 2, which is characterized in that the display panel further includes display test phase, The electricity on current potential and the first burn-in test terminal in the display test phase, on the second burn-in test terminal Position is identical, alternatively, the current potential on the second burn-in test terminal is floating.
4. display panel according to claim 1, which is characterized in that the pixel circuit includes the first N-type film crystal Pipe and the second N-type TFT, the LED control signal line respectively with first N-type TFT and the second N-type The control terminal of thin film transistor (TFT) is electrically connected；
The high potential signal line is electrically connected with third burn-in test terminal and the 4th burn-in test terminal respectively；
The high potential signal line includes the first sub- high potential signal line and the second sub- high potential signal line, wherein described first One end of sub- high potential signal line and the second sub- high potential signal line is electrically connected with the third burn-in test terminal respectively, described The other end of first sub- high potential signal line is electrically connected with the 4th burn-in test terminal；
The first sub- high potential signal line is electrically connected with multiple LED control signal input terminals, the second sub- high potential Signal wire is electrically connected with multiple scanning signal input terminals；
The display panel includes the ageing step, and in the ageing step, is connected on the third burn-in test terminal One high potential signal VGH1 is connected with the second high potential signal VGH2 on the 4th burn-in test terminal, wherein and VGH2 > VGH1>0。
5. display panel according to claim 4, which is characterized in that the display panel further includes display test phase, The electricity on current potential and the third burn-in test terminal in the display test phase, on the 4th burn-in test terminal Position is identical, alternatively, the current potential on the 4th burn-in test terminal is floating.
6. display panel according to claim 1, which is characterized in that the pixel circuit includes third p-type film crystal Pipe and storage capacitance, the drain electrode of the third P-type TFT and the first electrode plate of the storage capacitance are in first segment Point electrical connection；
The scan signal line is electrically connected with the control terminal of the third P-type TFT；
The high potential signal line is electrically connected with the 5th burn-in test terminal and the 6th burn-in test terminal respectively；
The high potential signal line includes the first sub- high potential signal line and the second sub- high potential signal line, wherein described first One end of sub- high potential signal line and the second sub- high potential signal line is electrically connected with the 6th burn-in test terminal respectively, described The other end of second sub- high potential signal line is electrically connected with the 5th burn-in test terminal；
The first sub- high potential signal line is electrically connected with multiple LED control signal input terminals, the second sub- high potential Signal wire is electrically connected with multiple scanning signal input terminals；
The display panel includes the ageing step, and in the ageing step, is connected on the 5th burn-in test terminal Three high potential signal VGH3 are connected with the 4th high potential signal VGH4 on the 6th burn-in test terminal, wherein and VGH4 > VGH3>0。
7. display panel according to claim 6, which is characterized in that the display panel further includes display test phase, The electricity on current potential and the 6th burn-in test terminal in the display test phase, on the 5th burn-in test terminal Position is identical, alternatively, the current potential on the 5th burn-in test terminal is floating.
8. display panel according to claim 1, which is characterized in that the pixel circuit includes third N-type film crystal Pipe and storage capacitance, the source electrode of the 3rd N thin film transistor (TFT) and the first electrode plate of the storage capacitance are in first segment Point electrical connection；
The scan signal line is electrically connected with the control terminal of the third N-type TFT；
The low-potential signal line is electrically connected with the 7th burn-in test terminal and the 8th burn-in test terminal respectively；
The low-potential signal line includes the first sub- low-potential signal line and the second sub- low-potential signal line, wherein described first One end of sub- low-potential signal line and the second sub- low-potential signal line is electrically connected with the 8th burn-in test terminal respectively, described The other end of second sub- low-potential signal line is electrically connected with the 7th burn-in test terminal；
The first sub- low-potential signal line is electrically connected with multiple LED control signal input terminals, the second sub- low potential Signal wire is electrically connected with multiple scanning signal input terminals；
The display panel includes the ageing step, and in the ageing step, is connected on the 7th burn-in test terminal Three low-potential signal VGL3 are connected with the 4th low-potential signal VGL4 on the 8th burn-in test terminal, wherein and VGL4 < VGL3<0。
9. display panel according to claim 8, which is characterized in that the display panel further includes display test phase, The electricity on current potential and the 8th burn-in test terminal in the display test phase, on the 7th burn-in test terminal Position is identical, alternatively, the current potential on the 7th burn-in test terminal is floating.
10. display panel according to claim 1, which is characterized in that the pixel circuit include third thin film transistor (TFT), 4th thin film transistor (TFT), the 5th thin film transistor (TFT) and storage capacitance, the reference signal line, the third thin film transistor (TFT) and The first electrode plate of the storage capacitance is electrically connected in first node；4th thin film transistor (TFT) and the 5th thin film transistor (TFT) exist Second node electrical connection, the control terminal of the scan signal line and the third thin film transistor (TFT) and the 4th thin film transistor (TFT) Electrical connection；
The both ends of the reference signal bus are electrically connected with the 9th burn-in test terminal and the tenth burn-in test terminal respectively；
The display panel includes the ageing step, and in the ageing step, is connected on the 9th burn-in test terminal One reference signal VREF1 is connected with the second reference signal VREF2 on the tenth burn-in test terminal, | VREF2 | > | VREF1 |, wherein the first reference signal VREF1 is identical with the polarity of the second reference signal VREF2.
11. display panel according to claim 10, which is characterized in that the display panel further includes display test rank Section, in the display test phase, on the current potential and the 9th burn-in test terminal on the tenth burn-in test terminal Current potential it is identical, alternatively, the current potential on the tenth burn-in test terminal is floating.
12. display panel according to claim 1, which is characterized in that the multiple burn-in test terminal is located at described aobvious Showing the same side in area, the display panel further includes at least one burn-in test signal wire, and the one of the burn-in test signal wire The one burn-in test terminal of end connection, the other end and the low-potential signal line, the high potential signal line or the ginseng Signal bus is examined to be electrically connected in the side far from the burn-in test terminal；
Alternatively, the burn-in test terminal includes the first calibrating terminal part and the second calibrating terminal part, first test Terminal part and second calibrating terminal part are located at the two sides that the viewing area is oppositely arranged.
13. display panel according to claim 12, which is characterized in that the burn-in test signal wire and be connected electrically The low-potential signal line, the high potential signal line or the reference signal bus be located at the same of the viewing area Side, or it is located at the two sides that the viewing area is oppositely arranged.
14. display panel according to claim 1, which is characterized in that the periphery circuit region is additionally provided with integrated driving Circuit；
The low-potential signal line is electrically connected with the integrated drive electronics, for receiving low-potential signal in the display stage；
The high potential signal line is electrically connected with the integrated drive electronics, for receiving high potential letter in the display stage Number；
The reference signal bus is electrically connected with the integrated drive electronics, for receiving reference signal in the display stage.
15. display panel according to claim 1, which is characterized in that the periphery circuit region is additionally provided with multiple displays Calibrating terminal, the low-potential signal line, the high potential signal line and the reference signal bus are separately connected display survey Terminal is tried, for receiving display test signal in display test phase；
The burn-in test terminal multiplexing shows calibrating terminal described in part.
16. a kind of display device, which is characterized in that including the described in any item display panels of claim 1-15.
CN201910579039.6A 2019-06-28 2019-06-28 Display panel and display device Active CN110189703B (en)

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