CN110176388A - 电介质元件的制造方法和电介质元件 - Google Patents

电介质元件的制造方法和电介质元件 Download PDF

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Publication number
CN110176388A
CN110176388A CN201910119218.1A CN201910119218A CN110176388A CN 110176388 A CN110176388 A CN 110176388A CN 201910119218 A CN201910119218 A CN 201910119218A CN 110176388 A CN110176388 A CN 110176388A
Authority
CN
China
Prior art keywords
oxide
layer
insulator layer
dielectric
dielectric layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201910119218.1A
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English (en)
Chinese (zh)
Inventor
座间秀昭
小林忠正
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ulvac Inc
Original Assignee
Ulvac Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ulvac Inc filed Critical Ulvac Inc
Publication of CN110176388A publication Critical patent/CN110176388A/zh
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)
CN201910119218.1A 2018-02-21 2019-02-15 电介质元件的制造方法和电介质元件 Pending CN110176388A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018028925A JP2019145682A (ja) 2018-02-21 2018-02-21 誘電体素子の製造方法、および、誘電体素子
JP2018-028925 2018-02-21

Publications (1)

Publication Number Publication Date
CN110176388A true CN110176388A (zh) 2019-08-27

Family

ID=67689022

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910119218.1A Pending CN110176388A (zh) 2018-02-21 2019-02-15 电介质元件的制造方法和电介质元件

Country Status (2)

Country Link
JP (1) JP2019145682A (ja)
CN (1) CN110176388A (ja)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH104089A (ja) * 1996-06-17 1998-01-06 Sony Corp 低誘電率酸化シリコン系絶縁膜の形成方法およびこれを用いた半導体装置
WO2011010726A1 (ja) * 2009-07-24 2011-01-27 株式会社ユーテック プラズマCVD装置、SiO2膜又はSiOF膜及びその成膜方法
US20110309355A1 (en) * 2010-06-18 2011-12-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
CN103681655A (zh) * 2012-08-31 2014-03-26 株式会社半导体能源研究所 半导体装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH104089A (ja) * 1996-06-17 1998-01-06 Sony Corp 低誘電率酸化シリコン系絶縁膜の形成方法およびこれを用いた半導体装置
WO2011010726A1 (ja) * 2009-07-24 2011-01-27 株式会社ユーテック プラズマCVD装置、SiO2膜又はSiOF膜及びその成膜方法
US20110309355A1 (en) * 2010-06-18 2011-12-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
CN103681655A (zh) * 2012-08-31 2014-03-26 株式会社半导体能源研究所 半导体装置

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Publication number Publication date
JP2019145682A (ja) 2019-08-29

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Application publication date: 20190827