CN110166035A - Current compensation circuit and analog switching circuit - Google Patents
Current compensation circuit and analog switching circuit Download PDFInfo
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- CN110166035A CN110166035A CN201910562001.8A CN201910562001A CN110166035A CN 110166035 A CN110166035 A CN 110166035A CN 201910562001 A CN201910562001 A CN 201910562001A CN 110166035 A CN110166035 A CN 110166035A
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- switch
- parasitic capacitance
- electric capacity
- compensating electric
- switching circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
Abstract
In current compensation circuit and analog switching circuit disclosed by the invention, when third switch and the 4th switch disconnect, when first switch and the second switch is closed, charge needed for compensating electric capacity compensates the first parasitic capacitance of charging capacitor both ends and the second parasitic capacitance in analog switching circuit.The present invention utilizes the charge-discharge characteristic of capacitor, it is individually for parasitic capacitance and establishes current compensation circuit, parasitic capacitance by compensating electric capacity for the charging capacitor both ends in analog switching circuit provides charge, it is opened in analog switch, when i.e. charging capacitor provides gate source voltage for N-type metal-oxide semiconductor (MOS) NMOS tube, charging capacitor in analog switching circuit is no longer the parasitic capacitance power supply at its both ends, and the generation of leakage current is greatly reduced.
Description
Technical field
The present invention relates to technical field of circuit design, specially a kind of current compensation circuit and analog switching circuit.
Background technique
Analog switch is a kind of common circuit devcie, is made of analog switching circuit, is mainly used for being connected to and disconnects it
The signal path of connection.Some signals are fainter or the higher application scenarios of capacitor port Impedance in, need to simulate and open
The leakage current for closing capacitor port in the on-state is small as far as possible, does not influence the transmission of signal.If analog switch is on state
There is larger leakage current in lower capacitor port, then will make transmitted signal change even complete mistake.
Specifically, existing analog switching circuit is by main switch NMOS, capacitor C and auxiliary switch S1, S2, S3, S3 group
At.Wherein, since capacitor C realization is that in the chips, there are natural parasitic capacitance CA and CB at both ends to ground connection.And almost
It can not eliminate.When S1 and S2 is closed, and S3 and S4 are disconnected, signal path PA-M0-PB fills CA and CB by S1 and S2
Electricity causes charge leakage, shows a kind of leakage current to external signal.
The method for not finding preferably solve analog switch current leakage currently on the market.
Summary of the invention
The present invention provides a kind of current compensation circuit and analog switching circuits, can substantially reduce the electric leakage of analog switch
Stream, can adapt to a variety of pairs of stringent application scenarios of analog switch port leakage current requirement.
In order to achieve the above objectives, the present invention provides the following technical scheme that
A kind of current compensation circuit, comprising:
Operational amplifier and compensating electric capacity；
First end is connected with the charging capacitor of the analog switching circuit, the first end phase of second end and the compensating electric capacity
First switch even；The charging capacitor provides for the N-type metal-oxide semiconductor (MOS) NMOS tube to the analog switching circuit
The capacitor of gate source voltage；
First end is connected with the second end of the compensating electric capacity, and second end is connected with the output end of the operational amplifier
Second switch；
First end is connected with the negative input end of the operational amplifier, and second end is connected with the first end of the compensating electric capacity
Third switch；
First end is connected with the second end of the compensating electric capacity, the 4th switch of second end ground connection；
The positive input terminal of the operational amplifier is connected with the source electrode of the N-type metal-oxide semiconductor (MOS) NMOS tube；
Wherein, the charging capacitor both ends have the first parasitic capacitance and the second parasitic capacitance, when the third switch and
4th switch disconnects, and when the first switch and the second switch are closed, the compensating electric capacity compensation described first is posted
Charge needed for raw capacitor and second parasitic capacitance.
Optionally, the size of the compensating electric capacity is equal to the sum of first parasitic capacitance and second parasitic capacitance.
Optionally, the size of the compensating electric capacity is greater than the sum of first parasitic capacitance and second parasitic capacitance,
And the compensating electric capacity, the difference with the sum of first parasitic capacitance and second parasitic capacitance is in preset threshold range
It is interior.
A kind of analog switching circuit, comprising:
N-type metal-oxide semiconductor (MOS) NMOS tube；
First end is connected with the grid of N-type metal-oxide semiconductor (MOS) NMOS tube, the first end of second end and charging capacitor
The 5th connected switch；The charging capacitor is to mention to the N-type metal-oxide semiconductor (MOS) NMOS tube of the analog switching circuit
For the capacitor of gate source voltage；
First end is connected with the second end of the charging capacitor, second end and the N-type metal-oxide semiconductor (MOS) NMOS
The 6th switch that the source electrode of pipe is connected；
First end is connected with power supply, the 7th switch that second end is connected with the first end of the charging capacitor；
First end is connected with the second end of the charging capacitor, the 8th switch of second end ground connection；
Current compensation circuit as described in claim 1；
Wherein, when the third switch and the 4th of the 7th switch, the 8th switch and the current compensation circuit
Switch disconnects, and the first switch and the second switch of the 5th switch, the 6th switch and the current compensation circuit is closed
When conjunction, electricity needed for the compensating electric capacity of the current compensation circuit compensates first parasitic capacitance and second parasitic capacitance
Lotus.
Optionally, the first switch, second switch, the 5th switch, the 6th switch are simultaneously switched off or are closed, the third
Switch, the 4th switch, the 7th switch, the 8th switch are simultaneously switched off or are closed.
Optionally, the size of the compensating electric capacity is equal to the sum of first parasitic capacitance and second parasitic capacitance.
Optionally, the size of the compensating electric capacity is greater than the sum of first parasitic capacitance and second parasitic capacitance,
And the compensating electric capacity, the difference with the sum of first parasitic capacitance and second parasitic capacitance is in preset threshold range
It is interior.
As can be seen from the above technical solutions, working as third in current compensation circuit disclosed by the invention and analog switching circuit
Switch and the 4th switch disconnect, and when first switch and the second switch is closed, compensating electric capacity compensates the charging in analog switching circuit
Charge needed for the first parasitic capacitance of capacitor both ends and the second parasitic capacitance.The present invention utilizes the charge-discharge characteristic of capacitor, individually
Current compensation circuit is established for parasitic capacitance, passes through the parasitism electricity that compensating electric capacity is the charging capacitor both ends in analog switching circuit
Hold and charge is provided, is opened in analog switch, i.e., charging capacitor provides gate source voltage for N-type metal-oxide semiconductor (MOS) NMOS tube
When, the charging capacitor in analog switching circuit is no longer the parasitic capacitance power supply at its both ends, and the generation of leakage current is greatly reduced.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
The embodiment of invention for those of ordinary skill in the art without creative efforts, can also basis
The attached drawing of offer obtains other attached drawings.
Fig. 1 is a kind of structural schematic diagram of current compensation circuit disclosed by the embodiments of the present invention；
Fig. 2 is a kind of structural schematic diagram of analog switching circuit disclosed by the embodiments of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
The present invention provides a kind of current compensation circuit and analog switching circuits, can substantially reduce the electric leakage of analog switch
Stream, can adapt to a variety of pairs of stringent application scenarios of analog switch port leakage current requirement.
As shown in Figure 1, the embodiment of the invention discloses a kind of current compensation circuits, comprising:
Operational amplifier OP and compensating electric capacity C2.
First end is connected with the charging capacitor C1 of the analog switching circuit, and the first of second end and the compensating electric capacity C2
The connected first switch S1 in end；The charging capacitor C1 is to the N-type metal-oxide semiconductor (MOS) (N- of the analog switching circuit
Metal-Oxide-Semiconductor, NMOS) pipe provide gate source voltage capacitor.
It should be noted that there are many structures of analog switching circuit, but wherein in certainly exist NMOS tube as circuit
The switch of on-off, the characteristic of NMOS tube is that circuit is connected when grid and source electrode are by gate source voltage, to be acted on then by voltage
Circuit disconnects, and in this, as switching device, and the mode for providing gate source voltage to NMOS tube is also varied, in the present embodiment
Analog switching circuit provides gate source voltage to NMOS tube using charging capacitor.
First end is connected with the second end of the compensating electric capacity C2, the output end phase of second end and the operational amplifier OP
Second switch S2 even.
First end is connected with the negative input end of the operational amplifier OP, the first end of second end and the compensating electric capacity C2
Connected third switch S3.
First end is connected with the second end of the compensating electric capacity C2, the 4th switch S4 of second end ground connection.
The positive input terminal of the operational amplifier OP is connected with the source electrode PB of the NMOS tube of the analog switching circuit.
Wherein, the charging capacitor both ends have the first parasitic capacitance CA and the second parasitic capacitance CB, when the third is opened
S3 and the 4th switch S4 is closed to disconnect, when the first switch S1 and the second switch S2 are closed, the compensating electric capacity C2
Charge needed for compensating the first parasitic capacitance CA and the second parasitic capacitance CB.
It should be noted that operational amplifier OP is connected with the source electrode PB of the NMOS tube of analog switching circuit, when simulation is opened
When charging capacitor C1 in powered-down road is that NMOS tube applies gate source voltage, while voltage can be provided to operational amplifier OP, from Fig. 1
The connection type of middle operational amplifier OP is it is found that the output voltage of operational amplifier OP is identical as voltage is entered and left, i.e. operation amplifier
The output voltage of device OP is the voltage of source electrode PB, and when the third switch S3 and the 4th switch S4 is closed, described first is opened
When closing S1 and second switch S2 disconnection, the both end voltage of compensating electric capacity C2 is the output source electrode PB voltage of operational amplifier OP
And ground connection, voltage difference is formed, is charged for compensating electric capacity C2.
It should be noted that when the charging capacitor C1 in analog switching circuit is that NMOS tube applies gate source voltage, electric current
The S3 of third switch described in compensation circuit and the 4th switch S4 is disconnected, and the first switch S1 and the second switch S2 are closed
It closes, charge needed for the compensating electric capacity C2 compensates the first parasitic capacitance CA and the second parasitic capacitance CB；It is simulating
When switching circuit is that charging capacitor C1 charges, the S3 of third switch described in current compensation circuit and the 4th switch S4 closure,
The first switch S1 and second switch S2 is disconnected, and is charged for compensating electric capacity C2.
In current compensation circuit disclosed in the present embodiment, when third switch and the 4th switch disconnection, first switch and second
When closing the switch, compensating electric capacity compensates the first parasitic capacitance of charging capacitor both ends and the second parasitic capacitance in analog switching circuit
Required charge.The present invention utilizes the charge-discharge characteristic of capacitor, is individually for parasitic capacitance and establishes current compensation circuit, passes through compensation
Capacitor provides charge for the parasitic capacitance at the charging capacitor both ends in analog switching circuit, opens in analog switch, i.e. charging electricity
When appearance provides gate source voltage for N-type metal-oxide semiconductor (MOS) NMOS tube, the charging capacitor in analog switching circuit is no longer it
The parasitic capacitance at both ends is powered, and the generation of leakage current is greatly reduced.
Optionally, the size of the compensating electric capacity C2 is equal to the first parasitic capacitance CA and the second parasitic capacitance CB
The sum of.
It should be noted that since the effect of compensating electric capacity C2 is intended merely to the first parasitic capacitance CA of filling and described the
Charge needed for two parasitic capacitance CB, to reduce the generation of leakage current, then the size of compensating electric capacity C2 is only needed equal to described
The sum of capacitor needed for first parasitic capacitance CA and the second parasitic capacitance CB, in order to avoid cause additional cost of idleness.
Optionally, the size of the compensating electric capacity C2 is greater than the first parasitic capacitance CA and the second parasitic capacitance CB
The sum of, and the compensating electric capacity C2, the difference with the sum of the first parasitic capacitance CA and the second parasitic capacitance CB is pre-
If in threshold range.
It should be noted that since the both ends compensating electric capacity C2 can also have a pair of lesser parasitic capacitance, in order to ensure mending
Repaying capacitor C2 can supplement needed for the two completely when carrying out charge compensation for the first parasitic capacitance CA and the second parasitic capacitance CB
Charge, reduce the generation of leakage current as far as possible, can be using slightly larger than the first parasitic capacitance CA and described second parasitic
As compensating electric capacity, the charge having more is used to provide electricity to the small parasitic capacitance at compensating electric capacity both ends the capacitor of the sum of capacitor CB
Lotus, and specific difference threshold range can be determined with reference to the size of the small parasitic capacitance at the both ends compensating electric capacity C2.
Based on current compensation circuit disclosed in the embodiments of the present invention, Fig. 2 is specifically disclosed using current compensation electricity
The analog switching circuit on road.
As shown in Fig. 2, another embodiment of the present invention discloses a kind of analog switching circuit, comprising:
NMOS tube M0.
First end is connected with the grid G ATE of NMOS tube M0, and what second end was connected with the first end of charging capacitor C1 the 5th opens
Close S5；The charging capacitor C1 provides the capacitor of gate source voltage for the NMOS tube M0 to the analog switching circuit.
First end is connected with the second end of the charging capacitor C1, and second end is connected with the source electrode PB of the NMOS tube M0
6th switch S6.
First end is connected with power supply VCC, the 7th switch S7 that second end is connected with the first end of the charging capacitor C1.
First end is connected with the second end of the charging capacitor C1, the 8th switch S8 of second end ground connection.
And current compensation circuit.
Specifically, current compensation circuit includes:
Operational amplifier OP and compensating electric capacity C2.
First end is connected with the charging capacitor C1 of the analog switching circuit, and the first of second end and the compensating electric capacity C2
The connected first switch S1 in end；The charging capacitor C1 is provides the electricity of gate source voltage to the NMOS tube of the analog switching circuit
Hold.
First end is connected with the second end of the compensating electric capacity C2, the output end phase of second end and the operational amplifier OP
Second switch S2 even.
First end is connected with the negative input end of the operational amplifier OP, the first end of second end and the compensating electric capacity C2
Connected third switch S3.
First end is connected with the second end of the compensating electric capacity C2, the 4th switch S4 of second end ground connection.
The positive input terminal of the operational amplifier OP is connected with the source electrode PB of the NMOS tube of the analog switching circuit.
Wherein, the charging capacitor both ends have the first parasitic capacitance CA and the second parasitic capacitance CB, open when the described 7th
The third switch S3 and the 4th switch S4 for closing S7, the 8th switch S8 and the current compensation circuit are disconnected, and the described 5th
It is described when the first switch S1 and second switch S2 of switch S5, the 6th switch S6 and the current compensation circuit are closed
Charge needed for the compensating electric capacity C2 of current compensation circuit compensates the first parasitic capacitance CA and the second parasitic capacitance CB.
In analog switching circuit disclosed in the present embodiment, when the of the 7th switch, the 8th switch and current compensation circuit
Three switches and the 4th switch disconnect, and the first switch and the second switch of the 5th switch, the 6th switch and current compensation circuit is closed
When conjunction, charge needed for the compensating electric capacity of current compensation circuit compensates the first parasitic capacitance and the second parasitic capacitance.Benefit of the invention
It with the charge-discharge characteristic of capacitor, is individually for parasitic capacitance and establishes current compensation circuit, be analog switching circuit by compensating electric capacity
In the parasitic capacitance at charging capacitor both ends charge is provided, opened in analog switch, i.e., charging capacitor is N-type metal oxide half
When conductor NMOS tube provides gate source voltage, the charging capacitor in analog switching circuit is no longer the parasitic capacitance power supply at its both ends,
The generation of leakage current is greatly reduced.
Optionally, the first switch S1, second switch S2, the 5th switch S5, the 6th switch S6 are simultaneously switched off or are closed,
The third switch S3, the 4th switch S4, the 7th switch S7, the 8th switch S8 are simultaneously switched off or are closed.
It should be noted that the 7th switch S7 and the 8th switch S8 are disconnected when the 5th switch S5 and the 6th switch S6 is closed
When, the charging capacitor C1 in analog switching circuit is that NMOS tube M0 applies gate source voltage, while the described in current compensation circuit
Three switch S3 and the 4th switch S4 are disconnected, the first switch S1 and second switch S2 closure, the compensating electric capacity
Charge needed for C2 compensates the first parasitic capacitance CA and the second parasitic capacitance CB.
When the 5th switch S5 and the 6th switch S6 is disconnected, and the 7th switch S7 and the 8th switch S8 are closed, analog switch electricity
Road is charging capacitor C1 charging, while the S3 of third switch described in current compensation circuit and the 4th switch S4 is closed, described
The first switch S1 and second switch S2 is disconnected, and is charged for compensating electric capacity C2.
Optionally, the size of the compensating electric capacity C2 is equal to the first parasitic capacitance CA and the second parasitic capacitance CB
The sum of.
It should be noted that since the effect of compensating electric capacity C2 is intended merely to the first parasitic capacitance CA of filling and described the
Charge needed for two parasitic capacitance CB, to reduce the generation of leakage current, then the size of compensating electric capacity C2 is only needed equal to described
The sum of capacitor needed for first parasitic capacitance CA and the second parasitic capacitance CB, in order to avoid cause additional cost of idleness.
Optionally, the size of the compensating electric capacity C2 is greater than the first parasitic capacitance CA and the second parasitic capacitance CB
The sum of, and the compensating electric capacity C2, the difference with the sum of the first parasitic capacitance CA and the second parasitic capacitance CB is pre-
If in threshold range.
It should be noted that since the both ends compensating electric capacity C2 can also have a pair of lesser parasitic capacitance, in order to ensure mending
Repaying capacitor C2 can supplement needed for the two completely when carrying out charge compensation for the first parasitic capacitance CA and the second parasitic capacitance CB
Charge, reduce the generation of leakage current as far as possible, can be using slightly larger than the first parasitic capacitance CA and described second parasitic
As compensating electric capacity, the charge having more is used to provide electricity to the small parasitic capacitance at compensating electric capacity both ends the capacitor of the sum of capacitor CB
Lotus, and specific difference threshold range can be determined with reference to the size of the small parasitic capacitance at the both ends compensating electric capacity C2.
It should also be noted that, the terms "include", "comprise" or its any other variant are intended to nonexcludability
It include so that the process, method, commodity or the equipment that include a series of elements not only include those elements, but also to wrap
Include other elements that are not explicitly listed, or further include for this process, method, commodity or equipment intrinsic want
Element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that including element
There is also other identical elements in process, method, commodity or equipment.
It will be understood by those skilled in the art that embodiments herein can provide as method, system or computer program product.
Therefore, complete hardware embodiment, complete software embodiment or embodiment combining software and hardware aspects can be used in the application
Form.It is deposited moreover, the application can be used to can be used in the computer that one or more wherein includes computer usable program code
The shape for the computer program product implemented on storage media (including but not limited to magnetic disk storage, CD-ROM, optical memory etc.)
Formula.
The above is only embodiments herein, are not intended to limit this application.To those skilled in the art,
Various changes and changes are possible in this application.It is all within the spirit and principles of the present application made by any modification, equivalent replacement,
Improve etc., it should be included within the scope of the claims of this application.
Claims (7)
1. a kind of current compensation circuit characterized by comprising
Operational amplifier and compensating electric capacity；
First end is connected with the charging capacitor of the analog switching circuit, and second end is connected with the first end of the compensating electric capacity
First switch；The charging capacitor provides grid source for the N-type metal-oxide semiconductor (MOS) NMOS tube to the analog switching circuit
The capacitor of voltage；
First end is connected with the second end of the compensating electric capacity, second end be connected with the output end of the operational amplifier second
Switch；
First end is connected with the negative input end of the operational amplifier, second end be connected with the first end of the compensating electric capacity
Three switches；
First end is connected with the second end of the compensating electric capacity, the 4th switch of second end ground connection；
The positive input terminal of the operational amplifier is connected with the source electrode of the N-type metal-oxide semiconductor (MOS) NMOS tube；
Wherein, the charging capacitor both ends have the first parasitic capacitance and the second parasitic capacitance, when the third switch and it is described
4th switch disconnects, when the first switch and the second switch are closed, the parasitic electricity of the compensating electric capacity compensation described first
Hold and charge needed for second parasitic capacitance.
2. current compensation circuit according to claim 1, which is characterized in that the size of the compensating electric capacity is equal to described the
The sum of one parasitic capacitance and second parasitic capacitance.
3. current compensation circuit according to claim 1, which is characterized in that the size of the compensating electric capacity is greater than described the
The sum of one parasitic capacitance and second parasitic capacitance, and the compensating electric capacity, with first parasitic capacitance and described second
The difference of the sum of parasitic capacitance is in preset threshold range.
4. a kind of analog switching circuit characterized by comprising
N-type metal-oxide semiconductor (MOS) NMOS tube；
First end is connected with the grid of N-type metal-oxide semiconductor (MOS) NMOS tube, and second end is connected with the first end of charging capacitor
The 5th switch；The charging capacitor provides grid for the N-type metal-oxide semiconductor (MOS) NMOS tube to the analog switching circuit
The capacitor of source voltage；
First end is connected with the second end of the charging capacitor, second end and the N-type metal-oxide semiconductor (MOS) NMOS tube
The 6th switch that source electrode is connected；
First end is connected with power supply, the 7th switch that second end is connected with the first end of the charging capacitor；
First end is connected with the second end of the charging capacitor, the 8th switch of second end ground connection；
Current compensation circuit as described in claim 1；
Wherein, when the third switch and the 4th switch of the 7th switch, the 8th switch and the current compensation circuit
It disconnects, when the first switch and the second switch of the 5th switch, the 6th switch and the current compensation circuit is closed,
Charge needed for the compensating electric capacity of the current compensation circuit compensates first parasitic capacitance and second parasitic capacitance.
5. analog switching circuit according to claim 4, which is characterized in that the first switch, second switch, the 5th open
Pass, the 6th switch are simultaneously switched off or are closed, and the third switch, the 4th switch, the 7th switch, the 8th, which switch, to be simultaneously switched off or close
It closes.
6. analog switching circuit according to claim 4, which is characterized in that the size of the compensating electric capacity is equal to described the
The sum of one parasitic capacitance and second parasitic capacitance.
7. analog switching circuit according to claim 4, which is characterized in that the size of the compensating electric capacity is greater than described the
The sum of one parasitic capacitance and second parasitic capacitance, and the compensating electric capacity, with first parasitic capacitance and described second
The difference of the sum of parasitic capacitance is in preset threshold range.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910562001.8A CN110166035B (en) | 2019-06-26 | 2019-06-26 | Current compensation circuit and analog switch circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910562001.8A CN110166035B (en) | 2019-06-26 | 2019-06-26 | Current compensation circuit and analog switch circuit |
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| Publication Number | Publication Date |
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| CN110166035A true CN110166035A (en) | 2019-08-23 |
| CN110166035B CN110166035B (en) | 2023-03-21 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201910562001.8A Active CN110166035B (en) | 2019-06-26 | 2019-06-26 | Current compensation circuit and analog switch circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111650441A (en) * | 2020-06-11 | 2020-09-11 | 上海艾为电子技术股份有限公司 | Capacitance detection circuit, capacitance detection method and electronic equipment |
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| CN2598227Y (en) * | 2002-12-23 | 2004-01-07 | 陈国强 | Power capacitance intelligent compensator |
| CN101677022A (en) * | 2008-09-18 | 2010-03-24 | 电力集成公司 | Leakage compensation for sample and hold devices |
| CN107707103A (en) * | 2017-10-30 | 2018-02-16 | 电子科技大学 | A kind of sectional slope compensation circuit suitable for BUCK converters |
| CN109379070A (en) * | 2018-12-20 | 2019-02-22 | 上海艾为电子技术股份有限公司 | A kind of analog switch start-up circuit and method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2598227Y (en) * | 2002-12-23 | 2004-01-07 | 陈国强 | Power capacitance intelligent compensator |
| CN101677022A (en) * | 2008-09-18 | 2010-03-24 | 电力集成公司 | Leakage compensation for sample and hold devices |
| CN107707103A (en) * | 2017-10-30 | 2018-02-16 | 电子科技大学 | A kind of sectional slope compensation circuit suitable for BUCK converters |
| CN109379070A (en) * | 2018-12-20 | 2019-02-22 | 上海艾为电子技术股份有限公司 | A kind of analog switch start-up circuit and method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111650441A (en) * | 2020-06-11 | 2020-09-11 | 上海艾为电子技术股份有限公司 | Capacitance detection circuit, capacitance detection method and electronic equipment |
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| CN110166035B (en) | 2023-03-21 |
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