CN110162483A - Static memory scrap cleaning method, device, computer equipment and storage medium - Google Patents
Static memory scrap cleaning method, device, computer equipment and storage medium Download PDFInfo
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- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0253—Garbage collection, i.e. reclamation of unreferenced memory
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Abstract
The present invention relates to method for sorting, device, computer equipment and the storage mediums of a kind of static memory fragment, memory fragmentation arrangement can be carried out in quiescent period, include the following steps: to obtain multiple resources of memory and the current address of multiple resource when access is the static memory defragmentation instruction in instruction list first;The destination address redistributed later for each resource in default region of memory;Each resource is finally moved to destination address from current address, and records the destination address reference period corresponding with the destination address in the resource address list of each resource.Method for sorting, device, computer equipment and the storage medium of above-mentioned static memory fragment can be such that the utilization efficiency of memory improves.
Description
Technical field
The present invention relates to information technology field of computer technology, more particularly to a kind of static memory scrap cleaning method,
Device, computer equipment and storage medium.
Background technique
With the rapid development of computer technology, there is such as multi-core processor computer system (Multi-core
Processor Computing System), heterogeneous computer system (Heterogeneous Computing System) etc.
It include the multiprocessor computer system (Multi-processor Computing System) of multiple processors.Above-mentioned
Multiple processors of computer system can be different according to the corresponding instruction list parallel processing of multiple processors instruction, improve
The treatment effeciency of the computer system.
But multiple processors of above-mentioned computer system according to instruction list quote resource execute corresponding operating when,
May be due to, there are memory fragmentation, causing in the case of theoretical memory is sufficient on memory, program executes failure.
Therefore, the technical issues of utilization efficiency of Installed System Memory becomes as urgent need to resolve how is improved.
Summary of the invention
Based on this, it is necessary to for the low problem of utilization efficiency of memory, provide a kind of static memory scrap cleaning method, dress
It sets, computer equipment and storage medium.
A kind of static memory scrap cleaning method, includes the following steps:
Judge the instruction type of the instruction in the instruction list of current accessed;
If the instruction type of the instruction of current accessed is the instruction of static memory defragmentation, multiple moneys on memory are obtained
The current address of each resource in source and the multiple resource;
Destination address is redistributed in default storage region for each resource;
By each resource from the destination address of the mobile most each resource allocation in current address, and arranged in the resource address of each resource
Corresponding destination address and the destination address corresponding reference period are recorded in table.
Include: in one of the embodiments,
If the instruction type of the instruction of current accessed is not the instruction of static memory defragmentation, the finger of current accessed is inquired
The resource address list for enabling reference resource obtains the current address of the instruction reference resource of current accessed;
The corresponding operating of the instruction of current accessed is executed on the current address of the instruction reference resource of the current accessed.
Each money in obtaining multiple resources and the multiple resource on memory in one of the embodiments,
Before the step of current address in source, include the following steps:
If the corresponding all instructions of a certain resource completes corresponding operating, the resource for completing corresponding operating is discharged described interior
The respective memory regions deposited.
Described in one of the embodiments, is that each resource is presetting the destination address that storage region is redistributed
Step includes:
Obtain the life cycle of each resource;
According to the length of each resource life cycle, the default storage region be each resource from low address to high address according to
Sub-distribution destination address, or the default storage region be each resource from high address to low address with being sequentially allocated target
Location.
Described in one of the embodiments, is each resource the step of presetting the destination address that region of memory is redistributed
Include:
The life of each resource on the life cycle of each resource on the first region of memory and/or the second region of memory is obtained respectively
Period;
It is in described first on the first region of memory according to the life cycle of each resource on first region of memory
Each resource deposited on region is sequentially allocated destination address from low address to high address;
It is in described second on the second region of memory according to the life cycle of each resource on second region of memory
Each resource deposited on region is sequentially allocated destination address from high address to low address;
Wherein, first region of memory corresponds to the low address region of the memory, and second region of memory corresponds to institute
State the high address region of memory.
The destination address that each resource is moved to most each resource allocation from current address in one of the embodiments,
The step of include:
The difference between the current address of each resource and the destination address of each resource is calculated, and corresponding according to the difference
The space size of storage region splits the resource, obtains multiple resource fragmentations less than or equal to the space size;
If the corresponding storage region of the destination address of a certain resource fragmentation is idle, the corresponding memory block of destination address is moved
The resource fragmentation of domain free time to the free time storage region;
It is mobile to remove a certain resource fragmentation if the corresponding storage region of the destination address of a certain resource fragmentation is occupied
Except other resource fragmentations to corresponding storage region.
In one of the embodiments, the method also includes:
The corresponding reference of destination address of each resource on the memory is set according to static memory defragmentation instruction
Period.
Described be arranged on the memory according to static memory defragmentation instruction respectively provides in one of the embodiments,
The destination address in source includes: the step of corresponding reference period
The target of each resource on the memory is set at the time of finishing according to the instruction access of each static memory defragmentation
The address corresponding reference period, or each resource on the memory is arranged according to the number of access static memory defragmentation instruction
The destination address corresponding reference period.
In one of the embodiments, the described method includes:
When the instruction type of the instruction of access is that Memory Allocation instructs, if Memory Allocation operation failure, in the visit
Insertion static memory defragmentation instruction after the Memory Allocation instruction asked;
Access the static memory defragmentation instruction of the insertion, the memory after being arranged;
Again the Memory Allocation instruction is accessed.
If the Memory Allocation instruction execution failure in the instruction list in one of the embodiments, described interior
Deposit distribution instruction includes: the step of insertion static memory defragmentation instructs later
Calculate current theoretical free memory;
If the size of the resource to be allocated is not more than the theoretical free memory, and the resource allocation memory to be allocated
The static memory defragmentation instruction is then inserted into failure after Memory Allocation instruction.
In one of the embodiments, the described method includes: the predeterminated position in the instruction list of the current accessed is inserted
Enter the static memory defragmentation to instruct to obtain new command list.
The predeterminated position in instruction list is inserted into and executes the static memory fragment in one of the embodiments,
The step of housekeeping instruction includes:
The static memory defragmentation is inserted into before the Memory Allocation instruction in the instruction list of the current accessed
Instruction, obtains new command list.
A kind of static memory collating unit, comprising:
Access modules for the instruction in access instruction list, and judge the type of described instruction;
Module is obtained, when for being the static memory defragmentation instruction in instruction list in access, acquisition instruction column
The current address of each resource in the multiple resources and the multiple resource that a plurality of instruction is quoted in table;
Memory allocating module, the destination address for being redistributed for each resource in default region of memory;
Resource mobile module, for each resource to be moved to the destination address of most each resource allocation from the current address,
And corresponding destination address and the destination address corresponding reference period are recorded in the resource address list of each resource.
A kind of computer equipment, including memory, processor are stored with the computer run on a processor on memory
The step of program, the processor realizes the above method when executing the computer program.
A kind of computer readable storage medium, is stored thereon with computer program, and the computer program is held by processor
The step of above-mentioned method is realized when row.
A kind of method for sorting device, computer equipment and the storage medium of static memory fragment can be carried out in quiescent period
Memory fragmentation arranges, and includes the following steps: to obtain first when access is the static memory defragmentation instruction in instruction list
Multiple resources of memory and the current address of multiple resource;Divide again for each resource in default region of memory later
The destination address matched;Each resource is finally moved to destination address from current address, and in the resource address list of each resource
Record the destination address reference period corresponding with the destination address.This method may be implemented processor and hold according to list is executed instruction
In the relevant operating process of row, memory fragmentation is arranged, is effectively reduced in program process since memory is broken
The problem of presence of piece causes program in the case of theoretical memory is sufficient, executes failure, improve the utilization efficiency of memory.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of the computer system proposed in one embodiment;
Fig. 2 is the internal storage structure schematic diagram proposed in one embodiment;
Fig. 3 is a kind of step flow chart of the static memory scrap cleaning method proposed in one embodiment;
Fig. 4 is a certain address list figure of resource A proposed in one embodiment;
Fig. 5 is a certain address list figure of resource A proposed in one embodiment;
Fig. 6 is the resource map on certain the moment memory proposed in one embodiment;
Fig. 7 is the resource map on certain the moment memory proposed in one embodiment;
Fig. 8 is the resource map on certain the moment memory proposed in one embodiment;
Fig. 9 is a certain address list figure of the resource A proposed in one embodiment, resource B;
Figure 10 is a certain address list figure of the resource A proposed in one embodiment, resource B;
Figure 11 is the static memory defragmentation apparatus structure schematic diagram proposed in one embodiment;
Figure 12 is the computer equipment internal structure chart proposed in one embodiment.
Specific embodiment
In order to which goal of the invention of the invention, technical solution and technical effect is more clearly understood, below in conjunction with attached drawing pair
Specific embodiments of the present invention are described.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention,
It is not intended to limit the present invention.It should be noted that in the absence of conflict, in the embodiment and embodiment in the application
Feature can be combined with each other.It should understand it is " first ", " second " in the present embodiment etc., it is described right to be only used for distinguishing
As not having any sequence or art-recognized meanings.
As shown in Figure 1, the computer system of one embodiment of the invention can be multi-core processor computer system (Multi-
Core processor Computing System), heterogeneous computer system (Heterogeneous Computing
It) etc. System include multiprocessor computer system (the Multi-processor Computing of multiple processors
System).Optionally, which can specifically include: multiple processors 110 and memory 120.Multiple processors
110 are connected to memory 120, and multiple processors 110 can share the memory 120.Optionally, which can be divided into more
A memory block, each memory block are corresponding with memory address, which distributes the corresponding memory address of a certain memory block
When to a certain resource, which can occupy the memory block.Wherein, which refers to the instruction reference that computer system is read
Resource, and the resource of instruction reference specifically can be virtual memory object, or physical memory object.The virtual memory
It is empty that object can be the virtual memory of memory block, register or other data-storable storage devices on software logic
Between.Optionally, processor 110 includes: access modules, obtains module, memory allocating module, resource mobile module, computing module
And control module etc..Wherein, which can be the hardware modules such as I/O (Input input/Output output) interface,
Computing module and control module are hardware module.
Optionally, the instruction in the accessible instruction list of access modules of multiple processors 110.It is accessed in access modules
When instruction in instruction list, the corresponding resource that can be quoted on memory 120 executes corresponding operation.Optionally, instruction column
It may include one or more instruction in table, each instruction contains one group of referencing operation to resource, by instruction
It reads or runs, can know the resource of the reference of the instruction.I.e. when access modules access a certain instruction, processor 110 can
With the resource for calling the instruction to quote, specific operation is realized.Optionally, access modules are in access instruction according to instruction execution
Time determines the reference period locating for resource cited in each instruction.For example, the instruction can be load instruction (Load), calculating refers to
(computing) or store instruction (store) etc. are enabled, certain instruction is also possible to neural network algorithm dependent instruction, example
If the N layer of neural network calculates, N > 0, N can be integer, or non-integer.Certainly, which can also be that memory is broken
Piece housekeeping instruction when access modules access memory fragmentation housekeeping instruction, carries out the operation of memory fragmentation arrangement.
The process that memory fragmentation in the present embodiment arranges, the as resource deallocation on memory 120, and according to
The address redistributed carries out the mobile process of resource.Such as there are resource A, addresses 7 for the address 5 of memory 120 there are resource B,
The process of memory fragmentation arrangement is carried out to memory 120 are as follows: be again that resource A, B distributes address 0 and 1, and according to redistributing
Resource A is moved to address 0 from the address of memory 5 by address, and resource B is moved to the mistake of address 1 from the address of memory 7
Journey.
Therefore, access modules access memory fragmentation housekeeping instruction, after the operation for carrying out memory fragmentation arrangement, the money on memory
The address in source may change.In order to accurately quote correlation when guaranteeing that processor executes instruction the instruction in list again
Resource, each resource on memory correspond to a resource address list, record each of resource in the resource address list and draw
Period corresponding address is respectively quoted with period and the resource, it should be apparent that, the reference period is used to describe in computer journey
The reference period in program process.
Memory 120 can be divided into the first region of memory and the second region of memory, optionally, in the first region of memory and second
It deposits region and stores identical resource, so that the I/O unit and computing unit of multiple processors can be quoted in first simultaneously
Corresponding resource on region and the second region of memory is deposited, is instructed accordingly with parallel processing, the processing of the computer system is improved
Efficiency.For example, comprising from 0-16383 address, address 0-8191 on memory 120 is corresponded to storage on memory as shown in Figure 2
Space corresponds to memory space as the second region of memory as the first region of memory, using address 8192-16383 on memory 120.
The memory allocating module of processor 110 when being resource deallocation on the first region of memory, out of first
The low address for depositing region is sequentially allocated to high address (such as from address 0 to address 8191).Optionally, it is on the second region of memory
When resource deallocation, divide from the high address of the second region of memory to low address (such as from address 16383 to address 8192)
Match.
It optionally, can be by life cycle when distributing resource on the first region of memory of memory 120 and the second region of memory
Long resource is distributed close to the edge of default storage region, such as can be by the long resource allocation of life cycle to the first region of memory
Low address region and the second region of memory high address region.It should be understood that life cycle herein refers to computer
Life cycle in program level is only the estimation to the life cycle of each resource, and is not fully equal to each
Practical life cycle of the resource in physics realization level.
As shown in figure 3, for a kind of step process of the static memory scrap cleaning method proposed in one embodiment
Figure.This method can be applied in above-mentioned computer system.Above-mentioned computer system may include: memory 120 and multiple
Processor 110, multiple processor 110 share the memory 120, and specific structure is referring to Fig. 1.The static memory scrap cleaning method
Static memory defragmentation is carried out to above-mentioned computer system to realize, to improve the memory utilization efficiency of computer system.
The above method may include steps of:
Step S301: judge the instruction type of the instruction in the instruction list of current accessed.Specifically, processor 110
Instruction in access modules access instruction list, to realize operation corresponding with each instruction.Access modules are first in access instruction
First judge the instruction type of current accessed instruction, then executes corresponding operation further according to the instruction type of the instruction of access.It can
Choosing, instruction type includes the instruction of static memory defragmentation, computations, Memory Allocation instruction, nerve in the instruction list
One or more of network algorithm instruction etc..It optionally, include at least one static memory defragmentation in the instruction list
Instruction.
Step S302: if the instruction type of the instruction of current accessed is the instruction of static memory defragmentation, memory is obtained
On multiple resources and multiple resource in each resource current address.Optionally, processor acquisition is to own on memory
Resource.Optionally, according to cited in instruction in all corresponding each instruction lists of multiple instruction list query of processor 110
Resource, obtain multiple resources on memory.The resource address list further according to each resource of acquisition obtains each resource later
Current address.It is instructed in its corresponding instruction list specifically, the access modules of a certain processor 110 successively access, works as access
When module accesses are to memory fragmentation housekeeping instruction in current instruction list, obtain module and obtain in current instruction list
Multiple moneys of a plurality of instruction reference in multiple resources of a plurality of instruction reference and other corresponding instruction lists of processor 110
Source obtains multiple resources on memory 120.In finally being inquired according to the current memory fragment instruction locating reference period
The resource address list for the multiple resources deposited, finally obtains the current address of each resource.Optionally, it obtains module and first obtains and work as
The preceding static memory defragmentation instruction locating reference period, further according to a certain resource on the reference period audit memory 120
Resource address list obtains address corresponding with the reference period obtained, address corresponding with the acquisition reference period that is obtaining
The as current address of the resource similarly obtains the current address of other resources.Optionally, which can be interior
Deposit block, register or other virtual memory spaces of data-storable storage device on software logic.Optionally, locate
Reason device 110 reference period according to locating for the time for executing present instruction inquires the resource address list of each instruction reference resource,
Obtain the current address of each instruction reference resource.
Step is 303: redistributing destination address in default storage region for each resource.Specifically, the memory of processor
Distribution module executes resource deallocation in predeterminable area that corresponding memory allocation algorithm is every instruction reference, obtains
To the destination address of each resource.Optionally, storage region is preset preferably adjacent to the storage region at memory edge, such as is wrapped on memory
Containing from 0-16383 address, default storage region can be the storage region close to memory address 0, or close to memory address
16383 storage region.
Step S304: by each resource from the destination address of the mobile most each resource allocation in current address, and in each resource
The corresponding destination address reference period corresponding with the destination address is recorded in resource address list.Wherein, the reference period is used to
The reference period in Computer Program Implementation Process is described.Specifically, the resource mobile module of processor 110 by each resource from
Current address is moved to the corresponding destination address of each resource, and record in the address list of each resource corresponding destination address and
The reference period of destination address.Such as: the current address resource A be Address of E1, memory allocating module be resource A again
The address of distribution is Address of E2;The current address list of resource A as shown in figure 4, comprising Address of E0,
Resource A is moved to Address of E2 by address Address of E1 first by Address of E1, resource mobile module,
The description for increasing " Address of E2 " in the resource address list of resource A later, forms resource address as shown in Figure 5
List, wherein E0, E1, E2 describe each address corresponding reference period.
It is whole can to carry out memory fragmentation in quiescent period for a kind of method for sorting for static memory fragment that the present embodiment proposes
Reason, this method comprises: obtaining multiple moneys of memory first when the static memory defragmentation instruction being accessed in instruction list
The current address of each resource in source and multiple resource;Then each resource to obtain is redistributed in default region of memory
Destination address;Finally by each resource from the destination address of the mobile most each resource allocation in current address, and in the money of each resource
The corresponding destination address reference period corresponding with the destination address is recorded in source address list.Since processor access instruction arranges
, can be because certain resources generate resource fragmentation on releasing memory during instruction in table, and the presence of memory fragmentation can be led
Cause memory conducive to efficiency reduction.A kind of method for sorting for static memory fragment that the present embodiment proposes, can carry out in quiescent period
Memory fragmentation arranges, i.e., arranges to the memory fragmentation generated in program process, and memory fragmentation arrangement can make memory
Upper continuously available memory space increases compared with before arranging, to improve memory utilization efficiency.
As an alternative embodiment, above-mentioned static memory scrap cleaning method can also include the following steps:
Step S305: if the instruction type of the instruction of current accessed is not the instruction of static memory defragmentation, inquiry is worked as
The resource address list of the instruction reference resource of preceding access obtains the current address of the instruction reference resource of current accessed.Specifically
, the access modules of processor 110 successively instruct in access instruction list, when the instruction in instruction list is accessed in access modules
When not being the instruction of static memory defragmentation, first with inquiring its resource for quoting resource according to the instruction corresponding reference period
Location list obtains the current address of instruction reference resource.
Step S305: the instruction of current accessed is executed on the current address of the instruction reference resource of the current accessed
Corresponding operating.
The static memory scrap cleaning method that the present embodiment proposes, it is ensured that multiple processors carried out above-mentioned in access
When resource on the memory that static memory defragmentation is crossed, accurately quotes related resource and realize specific operation.
As an alternative embodiment, each institute in obtaining multiple resources and the multiple resource on memory
Before the step of stating the current address of resource, comprising: if the corresponding all instructions of a certain resource completes corresponding operating, release
At respective memory regions of the resource of corresponding operating on the memory.Specifically, if processor 110 can be in a certain resource pair
When all instructions answered completes corresponding operating, respective memory regions of the resource on memory 120 are discharged.It in this way can be to avoid working as
The memory space of preceding resource long-term committed memory, influences the treatment effeciency of computer system.
As an alternative embodiment, step is the destination address packet that each resource is redistributed in default storage region
It includes: obtaining the life cycle of each resource;It is each money in the default storage region according to the length of each resource life cycle
Source is sequentially allocated destination address from low address to high address, or in the default region of memory is each resource from high address
Destination address is sequentially allocated to low address.Optionally, if default storage region is close to memory address 0, according to each resource
The length of life cycle distributes destination address from low address to high address for each resource;If presetting storage region close to memory
Highest address is then that each resource from high address to low address distributes target according to the length of each resource life cycle
Location.For example, obtaining the resource on memory 120 is resource A, resource B, resource C, life cycle resource A < resource B < resource C is interior
Resource can be stored by depositing the corresponding memory headroom of address 0-100, then can be the address 0-32 of resource C distribution, the ground of resource B distribution
The address 89-95 of location 33-88, resource A distribution.
As an alternative embodiment, when memory 120 is divided into the first region of memory and the second region of memory, it should
First region of memory corresponds to the low address region of the memory, when which corresponds to the high address area of the memory,
Step is that each resource includes: in the destination address that default storage region is redistributed
Step 3021: obtaining on the first region of memory respectively each on the life cycle of each resource and/or the second region of memory
The life cycle of resource.Specifically, the acquisition module of processor 110 obtains the life cycle of resource on the first region of memory respectively
And/or second resource on region of memory life cycle.Such as: for example: it include 0-16383 address on memory 120, wherein
Location 0-8191 corresponds to memory space as the first region of memory, and address 8192-16383 corresponds to memory space as the second memory field
Domain.Obtain all resources on module the first region of memory of acquisition: resource A, resource B, resource C;It obtains on the second region of memory
All resources: resource A, resource B, resource C, wherein life cycle resource A < resource B < resource C.It should be understood that the
It can store identical resource on one region of memory and the second region of memory, also can store different resources.
Step 3022: according to the life cycle of each resource on first region of memory, on the first region of memory
Destination address is sequentially allocated from low address to high address for each resource on first region of memory.Such as: in current first
Resource can be stored by depositing the corresponding memory headroom of 100-200 on region, then can be the ground that resource C is distributed on the first region of memory
The address 133-188 that location 100-132, resource B are distributed on the first region of memory, what resource A was distributed on the first region of memory
Address 189-195.
Step 3023: being institute in the second region of memory according to the life cycle of each resource on second region of memory
Each resource stated on the second region of memory is sequentially allocated destination address from high address to low address.Such as: current second memory field
16183-16283 corresponding memory headroom in domain can store resource, can be the address that resource C is distributed on the second region of memory
The address 16216-16271 that 16272-16278, resource B are distributed on the first region of memory, resource A is on the first region of memory
The address 16183-16215 of distribution.
It is that resource carries out Memory Allocation, and then when progress memory fragmentation arrangement, can make according to the method described in this implementation
Memory 120 is after the respective memory regions of release resource occupation every time, and not only the available space on memory concentrates (central area),
And the generation of memory fragmentation can be reduced, improve the execution efficiency of computer system.
As an alternative embodiment, each resource is moved the target of most each resource allocation by step from current address
Address includes:
Step S3031: the difference between each resource current address and the destination address of each resource is calculated, and according to the difference
The space size for being worth corresponding storage region splits the resource, obtains broken less than or equal to multiple resources of the space size
Piece.
Step S3032: if the corresponding storage region of the destination address of a certain resource fragmentation is idle, destination address pair is moved
The resource fragmentation for the storage region free time answered to the free time storage region.
Step S3033: if the corresponding storage region of the destination address of a certain resource fragmentation is occupied, certain described in removing is moved
Other resource fragmentations except one resource fragmentation are to corresponding storage region.
For example, as shown in Figure 6 including address continuous resource A, resource B, resource C, resource D, resource E, money on memory 120
Source F, current operation are that resource A, resource B, resource C, resource D, resource E, resource F are moved to 4-9 from address 0-5.Processor
110 differences calculated between the current address of resource and destination address first are 4, and know resource C, resource D, resource E, money
The corresponding storage region of the destination address 6-9 of source F is idle, resource A, and the corresponding storage region of resource B destination address 4-5 is occupied
With obtaining as shown in Figure 7 at this point, resource C, resource D, resource E, resource F are first moved to the corresponding storage region of address 6-9
State, resource A, resource B are moved to the corresponding storage region of address 4-5 again later, obtain result as shown in Figure 8.
The resource moving method that the present embodiment proposes, it is ensured that each resource is accurately moved to destination address, prevents
There is the resource that resource is newly written in certain storage region in moving process in moving process due to resource and covers region original
The problem of having resource, leading to resource storage mistake, lose.
As an alternative embodiment, above-mentioned static memory scrap cleaning method can also include the following steps: root
The destination address corresponding reference period of each resource on setting memory is instructed according to the static memory defragmentation.Specifically, place
The destination address that each resource is arranged according to static memory defragmentation instruction in the resource mobile module for managing device 110 is corresponding to draw
Use the period.Specifically, resource mobile module each time access static memory defragmentation instruction when, all in accordance with current accessed
The newly assigned destination address corresponding reference period of each resource is arranged in the instruction of static memory defragmentation.
Since after the static memory defragmentation instruction in 110 access modules access instruction list of processor, resource exists
Address on memory can change, i.e. the reference address of resource is changed, in the subsequent visit of the access modules of processor 110
When resource is quoted in the instruction asked again, need using obtaining the memory address of each resource after static memory defragmentation.And other
The execution process instruction of type is not related to changing the address this operation of resource on memory, therefore, according to static memory fragment
The housekeeping instruction setting destination address corresponding reference period can guarantee the changed mistake of entire teachings resource address
Journey.
As an alternative embodiment, step is according to the static memory defragmentation instruction setting target
The location corresponding reference period includes: to be arranged on the memory at the time of being finished according to each static memory defragmentation instruction execution
The destination address of each resource corresponding reference period.Specifically, the every access of all processors 110 of computer system is primary static
Memory fragmentation housekeeping instruction, what the resource mobile module of respective processor was finished according to its static memory defragmentation instruction execution
The destination address corresponding reference period of each resource on memory is arranged in moment.For example, a certain processor has accessed in current static
The time for depositing defragmentation instruction is 00:08:52, and instruction one operation is that resource A is mobile by address Address of E1
To Address of E2.Address list of the resource A before executing memory fragmentation housekeeping instruction as shown in figure 4, comprising:
Two addresses Address of E0, Address of E1, wherein E0, E1 describe each address corresponding reference period, and quote
Period E0 describes period 00:00:00-00:03:08;Reference period E1 describes period 00:03:09-XX:XX:XX.Then provide
Source mobile module can set 00:03:08-00:08:52 for the reference period of Address of E1;By Address of
The reference period E2 of E2 is set as 00:08:53-XX:XX:XX.Similarly, other processors execute the instruction of static memory defragmentation
Repeat aforesaid operations.Based on this, if whole comprising memory fragmentation in the corresponding instruction list of multiple processors of computer system
Reason instruction all can carry out static memory defragmentation to the resource on memory, update the operation of the resource address list of each resource.
Since the execution time that multiple processors access each instruction can be evaluated whether to obtain, and then computer system can be obtained
It executes two adjacent static memory defragmentations and instructs the time being separated by.It therefore can also be by above-mentioned " according in each static state
Deposit the destination address corresponding reference period that each resource on the memory is set at the time of defragmentation instruction execution finishes " replacement
" the corresponding reference of destination address of each resource on the memory to be arranged according to the number of access static memory defragmentation instruction
Period ".
As an alternative embodiment, above-mentioned static memory scrap cleaning method can also include the following steps: root
The resource address list of each resource on memory is updated according to every instruction of access.Specifically, all processors of computer system
Instruction in the 110 corresponding instruction lists of access.In one static memory defragmentation instruction of the every access of processor 110
Afterwards, each resource is redistributed when being recorded as accessing static memory defragmentation instruction in the instruction list of each resource of memory
Destination address, and the target of each resource on the time setting memory finished using the static memory defragmentation instruction execution
The reference period of location.After the every access one of processor 110 is not the instruction of static memory defragmentation instruction, then on memory
The resource address in a primary upper epoch was replicated in the resource address list of each resource, and was not static memory defragmentation using this
The resource address in a upper epoch for the time setting duplication that the instruction execution of instruction finishes.Such as: the instruction of a certain processor 110
It being instructed in list comprising N item, each instruction in N item instruction corresponds to a resource address list, wherein Article 2, and the 5th
Item is the instruction of static memory defragmentation, while not including static memory defragmentation in the instruction list of other processors 110
Instruction, wherein include resource A, resource B, and resource A on memory, resource B does not complete corresponding operating from start to finish.The original of resource A
Beginning address is Address of A0.E1, and the original address of resource B is Address of B0.E1, wherein Address of
A0, Address of B0 are resource memory address, E1 description reference period.The processor 110 accesses access modules first finger
It enables, and the instruction is first instruction of multiple processors access of computer system, instruction reference resource A executes corresponding
After operation, resource mobile module, such as will be in the address list of resource A by the resource address list of resources all on memory 120
The description for increasing " Address of A0.E2 " will increase the description of " Address of B0.E2 " in the address list of resource B,
Wherein, E2 describes the execution time of first instruction;Access modules access Article 2 instruction, which is the multiple of calculation machine system
The Article 3 instruction of processor access, after executing the instruction of static memory defragmentation, resource A is moved to by Address of A0
Address of A1, resource B are moved to Address of B1 by Address of B0, and resource mobile module will be on memory 120
The resource address list of all resources, such as the description that will increase " Address of A1.E4 " in the address list of resource A, will
Increase the description of " Address of B1.E4 " in the address list of resource B, wherein when E4 describes the execution of Article 2 instruction
Between;Similarly access modules successively access Article 3 instruction, Article 4 instruction, and update the resource address list of each resource.It is visiting
After having asked Article 4 instruction, it is as shown in Figure 9 to obtain resource A, the address list of resource B.Later, access modules access Article 5 refers to
It enables, and executes the operation of static memory defragmentation, and update the resource address list of each resource based on the operation, such as providing
Increase the description of " Address of A2.EX " in the resource address list of source A, and increases in the resource address list of resource B
Add the description of " Address of B2.EX ", wherein EX describes the execution time of Article 5 instruction, and X indicates calculating and system
Multiple processors accessed X-1 item instruction, finally obtain resource address list as shown in Figure 10.In which case, appoint
Drawing at this time is obtained at the time of need to be according to access present instruction when resource executes corresponding operation on one processor 110 reference memory
With the period, reusing the reference period inquires corresponding resource address list, obtains the current of present instruction reference resource, then
Corresponding operation is executed on the address.
As an alternative embodiment, above-mentioned static memory scrap cleaning method, can also include the following steps:
Step S306: when the instruction type of the instruction of access is that Memory Allocation instructs, if Memory Allocation fails, in institute
It states Memory Allocation instruction and is inserted into the static memory defragmentation instruction later.Specifically, the access modules of processor 110 are successively
It is instructed in access instruction list, when the instruction type for the instruction that access modules are accessed is that Memory Allocation instructs, if in distribution
It is saved as function, then continues to access next instruction;If storage allocation fails, it was demonstrated that there may be memory fragmentations on memory at this time, therefore
It is inserted into a static memory defragmentation instruction at this moment to carry out memory fragmentation arrangement.
Step S307: the static memory defragmentation instruction of the insertion, the memory after being arranged are accessed.
Step S308: the Memory Allocation instruction is accessed again.
As an alternative embodiment, leading to memory point to exclude theoretical low memory during Memory Allocation
The situation matched, the above method can also include: to calculate current theoretical free memory;If the size of the resource to be allocated is not more than
The remaining theoretical memory, and the resource allocation memory failure to be allocated, then be inserted into institute after Memory Allocation instruction
State the instruction of static memory defragmentation.
Above-mentioned static memory scrap cleaning method, can solve in memory assigning process, when theoretical memory is enough, but point
The problem of with failure, improve the utilization efficiency of memory.
As an alternative embodiment, in order to guarantee processor on limited memory according to the instruction in instruction list
Resource is quoted, the fluency of the process of corresponding operation is executed, it can be in advance in the predeterminated position of the instruction list of current accessed
The static memory defragmentation is inserted into instruct to obtain new command list.The biggish instruction of the preferred committed memory of the predeterminated position,
Such as the N layer computations of neural network, N > 0, N can be integer, or non-integer.
As an alternative embodiment, in order to guarantee that Memory Allocation under the premise of theoretical memory is sufficient, is smoothly held
Row is preferably inserted into the static memory defragmentation before the Memory Allocation instruction in the instruction list of the current accessed and refers to
It enables, obtains new command list.Preprocessor 110 successively access each instruction according to new command list.
Although should be understood that each step in the flow chart of Fig. 3 is shown according to the instruction of arrow, these steps
It suddenly is not that the inevitable sequence according to arrow instruction executes.Unless expressly stating otherwise herein, the execution of these steps is not
There is stringent sequence limitation, these steps can execute in other order.Moreover, at least part step in Fig. 3 can be with
Including multiple sub-steps perhaps these sub-steps of multiple stages or stage be not necessarily execute completion in synchronization, and
It is to execute at different times, the execution sequence in these sub-steps or stage, which is also not necessarily, sequentially to be carried out, but can
It is executed in turn or alternately at least part of sub-step or stage with other steps or other steps.
It is the static memory defragmentation apparatus structure schematic diagram proposed in one of the embodiments shown in Figure 11, it should
Device includes:
Access modules 100 for the instruction in access instruction list, and judge the type of described instruction;
Module 200 is obtained, when for being the static memory defragmentation instruction in instruction list in access, acquisition instruction
The current address of each resource in the multiple resources and the multiple resource that a plurality of instruction is quoted in list;
Memory allocating module 300, for redistributing destination address in default region of memory for each resource;
Resource mobile module 400, for by each resource from the target of the mobile most each resource allocation in the current address
Location, and corresponding destination address and the destination address corresponding reference period are recorded in the resource address list of each resource.
Access modules 100 in one of the embodiments, if the instruction type for being also used to the instruction of current accessed is not quiet
State memory fragmentation housekeeping instruction then inquires the resource address list of the instruction reference resource of current accessed, obtains current accessed
The current address of instruction reference resource;Current accessed is executed on the current address of the instruction reference resource of the current accessed
The corresponding operating of instruction.
The static memory defragmentation device in one of the embodiments, further include: resource management module, at certain
When the corresponding all instructions of one resource completes corresponding operating, the resource of corresponding operating accordingly depositing on the memory is completed in release
Storage area domain.
Module is obtained in one of the embodiments, for obtaining the life cycle of each resource;Memory allocating module is used
In the length according to each resource life cycle, it is sequentially allocated for each resource from low address to high address in the default storage region
Destination address, or destination address is sequentially allocated from high address to low address in the default storage region for each resource.
Module is obtained in one of the embodiments, for obtaining the Life Cycle of each resource on the first region of memory respectively
The life cycle of each resource on phase and/or the second region of memory;Memory allocating module, for according to first region of memory
Each resource life cycle, be each resource on first region of memory on the first region of memory from low address to height
Address is sequentially allocated destination address;According to the life cycle of each resource on second region of memory, in the second region of memory
Destination address is sequentially allocated from high address to low address for each resource on second region of memory;Wherein, in described first
The low address region that region corresponds to the memory is deposited, second region of memory corresponds to the high address region of the memory.
Resource mobile module in one of the embodiments, for calculating the current address of each resource and the mesh of each resource
The difference between address is marked, and the resource is split according to the space size of the corresponding storage region of the difference, is less than
Equal to multiple resource fragmentations of the space size;If the corresponding storage region of the destination address of a certain resource fragmentation is idle,
The resource fragmentation of destination address corresponding storage region free time is moved to the storage region of the free time;If a certain resource fragmentation
The corresponding storage region of destination address is occupied, then moves other resource fragmentations in addition to a certain resource fragmentation to correspondence
Storage region.
Resource mobile module in one of the embodiments, is arranged for being instructed according to the static memory defragmentation
The destination address corresponding reference period.
Resource mobile module in one of the embodiments, is accessed for being instructed according to each static memory defragmentation
The corresponding reference period of each resource object address on the memory is set at the time of finishing, or according to access static memory fragment
The corresponding reference period of each resource object address on the memory is arranged in the number of housekeeping instruction.
The static memory defragmentation device further includes resource optimization module in one of the embodiments, for when visit
When the instruction type for the instruction asked is that Memory Allocation instructs, if Memory Allocation fails, inserted after Memory Allocation instruction
Enter static memory fragmentation housekeeping instruction;The static memory defragmentation instruction of access insertion, the memory after being arranged;Again it visits
Ask the Memory Allocation instruction.
Resource optimization module in one of the embodiments, for calculating current theoretical free memory;If described to be allocated
The size of resource is not more than the remaining theoretical memory, and the resource allocation memory failure to be allocated, then in the memory point
It is instructed with the static memory defragmentation is inserted into after instruction.
Resource optimization module in one of the embodiments, is also used to the predeterminated position in the instruction list of current accessed
The static memory defragmentation is inserted into instruct to obtain new command list.
Resource optimization module in one of the embodiments, be also used in the instruction list of the current accessed in
It is inserted into the static memory defragmentation instruction before depositing distribution instruction, obtains new command list.
Specific restriction about static memory defragmentation device may refer to above for static memory defragmentation
The restriction of method, details are not described herein.Modules in above-mentioned static memory defragmentation device can be fully or partially through
Software, hardware and combinations thereof are realized.Above-mentioned each module can be embedded in the form of hardware or independently of the place in computer equipment
It manages in device, can also be stored in a software form in the memory in computer equipment, in order to which processor calls execution above each
The corresponding operation of a module.
In one embodiment, a kind of computer equipment is provided, which can be terminal, internal structure
Figure is shown in Fig.12.The computer equipment includes processor, the memory, network interface, display connected by system bus
Screen and input unit.Wherein, the processor of the computer equipment is for providing calculating and control ability.The computer equipment it is interior
Bag deposit includes non-volatile memory medium, memory.The non-volatile memory medium is stored with operating system and computer program.It should
The operation for inside saving as the operating system and computer program in non-volatile memory medium provides environment.The net of the computer equipment
Network interface is used to communicate with external terminal by network connection.To realize above-mentioned reality when the computer program is executed by processor
Apply the generation method and/or chip verification method of the verifying excitation that example refers to.The display screen of the computer equipment can be liquid crystal
Display screen or electric ink display screen, the input unit of the computer equipment can be the touch layer covered on display screen,
It can be the key being arranged on computer equipment shell, trace ball or Trackpad, can also be external keyboard, Trackpad or mouse
Mark etc..
It will be understood by those skilled in the art that structure shown in Figure 12, only part relevant to application scheme
The block diagram of structure, does not constitute the restriction for the computer equipment being applied thereon to application scheme, and specific computer is set
Standby may include perhaps combining certain components or with different component layouts than more or fewer components as shown in the figure.
In one embodiment, a kind of computer equipment is provided, including memory, processor and storage are on a memory
And the computer program that can be run on a processor, processor perform the steps of judgement current visit when executing computer program
The instruction type for the instruction in instruction list asked;If the instruction type of the instruction of current accessed is that static memory defragmentation refers to
It enables, then obtains the current address of each resource in the multiple resources and the multiple resource on memory;It is deposited for each resource default
Redistribute destination address in storage area domain;By each resource from the destination address of the mobile most each resource allocation in current address, and each
Corresponding destination address and the destination address corresponding reference period are recorded in the resource address list of resource.
In one embodiment, if processor also performs the steps of the instruction of current accessed when executing computer program
Instruction type be not static memory defragmentation instruction, then inquire current accessed instruction reference resource resource address column
Table obtains the current address of the instruction reference resource of current accessed;In the current position of the instruction reference resource of the current accessed
The corresponding operating of the instruction of current accessed is executed on location.
In one embodiment, also to perform the steps of a certain resource corresponding when if processor executing computer program
All instructions completes corresponding operating, then discharges the respective memory regions on the memory for completing corresponding operating.
In one embodiment, the life for obtaining each resource is also performed the steps of when processor executes computer program
Period;According to the length of each resource life cycle, the default storage region be each resource from low address to high address successively
Destination address is distributed, or is sequentially allocated destination address from high address to low address for each resource in the default storage region.
In one embodiment, it is also performed the steps of when processor executes computer program and obtains the first memory respectively
On region on the life cycle of each resource and/or the second region of memory each resource life cycle;According to first memory field
The life cycle of each resource on domain is each resource on first region of memory on the first region of memory from low address
Destination address is sequentially allocated to high address;According to the life cycle of each resource on second region of memory, in the second memory
Region is that each resource on second region of memory is sequentially allocated destination address from high address to low address;Wherein, described
One region of memory corresponds to the low address region of the memory, and second region of memory corresponds to the high address region of the memory.
In one embodiment, it is also performed the steps of when processor executes computer program and calculates the current of each resource
Difference between address and the destination address of each resource, and institute is split according to the space size of the corresponding storage region of the difference
Resource is stated, multiple resource fragmentations less than or equal to the space size are obtained;If the destination address of a certain resource fragmentation is corresponding
Storage region is idle, then moves the memory fragmentation of destination address corresponding storage region free time to the storage region of free time;If certain
The corresponding storage region of the destination address of one resource fragmentation is occupied, then moves other moneys in addition to a certain resource fragmentation
Source fragment is to corresponding storage region.
In one embodiment, it also performs the steps of when processor executes computer program according to the static memory
The destination address corresponding reference period is arranged in defragmentation instruction.
In one embodiment, it also performs the steps of when processor executes computer program according to each static memory
The destination address corresponding reference period of each resource on the memory, Huo Zhegen is arranged in defragmentation instruction access at the time of finishing
The destination address corresponding reference period of each resource on the memory is set according to the number of access static memory defragmentation instruction.
In one embodiment, the finger when the instruction of access is also performed the steps of when processor executes computer program
When type being enabled to instruct for Memory Allocation, if Memory Allocation fails, insertion static memory is broken after Memory Allocation instruction
Piece housekeeping instruction;Access the static memory defragmentation instruction of the insertion, the memory after being arranged;Again it accesses in described
Deposit distribution instruction.
In one embodiment, it is current theoretical remaining that calculating is also performed the steps of when processor executes computer program
Memory;If the size of the resource to be allocated is no more than the remaining theoretical memory, and the resource allocation memory to be allocated loses
It loses, is then inserted into the static memory defragmentation instruction after Memory Allocation instruction.
In one embodiment, it is also performed the steps of when processor executes computer program in the default of instruction list
Position is inserted into the static memory defragmentation and instructs to obtain new command list.
In one embodiment, it is also performed the steps of in described instruction list when processor executes computer program
Memory Allocation instruction before be inserted into static memory defragmentation instruction, obtain new command list.
In one embodiment, a kind of computer readable storage medium is provided, computer program is stored thereon with, is calculated
Machine program performs the steps of the instruction type of the instruction in the instruction list for judging current accessed when being executed by processor;If
The instruction type of the instruction of current accessed is the instruction of static memory defragmentation, then obtains multiple resources on memory, Yi Jisuo
State the current address of each resource in multiple resources;Destination address is redistributed in default storage region for each resource;By each resource
From the destination address of the mobile most each resource allocation in current address, and corresponding mesh is recorded in the resource address list of each resource
Mark address and the destination address corresponding reference period.
In one embodiment, if also performing the steps of the finger of current accessed when computer program is executed by processor
The instruction type of order is not the instruction of static memory defragmentation, then inquires the resource address column of the instruction reference resource of current accessed
Table obtains the current address of the instruction reference resource of current accessed;In the current position of the instruction reference resource of the current accessed
The corresponding operating of the instruction of current accessed is executed on location.
In one embodiment, corresponding if also performing the steps of a certain resource when computer program is executed by processor
All instructions complete corresponding operating, then discharge complete corresponding operating the respective memory regions on the memory.
In one embodiment, the life for obtaining each resource is also performed the steps of when computer program is executed by processor
Order the period;According to the length of each resource life cycle, the default storage region be each resource from low address to high address according to
Sub-distribution destination address, or the default storage region be each resource from high address to low address with being sequentially allocated target
Location.
In one embodiment, it also performs the steps of when computer program is executed by processor and obtains in first respectively
Deposit the life cycle of each resource on the life cycle of each resource on region and/or the second region of memory;According to first memory
The life cycle of each resource on region is each resource on first region of memory on the first region of memory from low land
Location is sequentially allocated destination address to high address;According to the life cycle of each resource on second region of memory, in second
Depositing region is that each resource on second region of memory is sequentially allocated destination address from high address to low address;Wherein, described
First region of memory corresponds to the low address region of the memory, and second region of memory corresponds to the high address area of the memory
Domain.
In one embodiment, it is also performed the steps of when computer program is executed by processor and calculates working as each resource
Difference between preceding address and the destination address of each resource, and split according to the space size of the corresponding storage region of the difference
The resource obtains multiple resource fragmentations less than or equal to the space size;If the destination address of a certain resource fragmentation is corresponding
Storage region it is idle, then move the memory fragmentation of destination address corresponding storage region free time to the storage region of free time;If
The corresponding storage region of the destination address of a certain resource fragmentation is occupied, then moves other in addition to a certain resource fragmentation
Resource fragmentation is to corresponding storage region.
In one embodiment, it is also performed the steps of when computer program is executed by processor according in the static state
It deposits defragmentation instruction and the destination address corresponding reference period is set.
In one embodiment, it is also performed the steps of when computer program is executed by processor according in each static state
It deposits the destination address corresponding reference period that each resource on the memory is set at the time of defragmentation instruction access finishes, or
When according to the number of access static memory defragmentation instruction, the corresponding reference of destination address of each resource on the memory is set
Section.
In one embodiment, it also performs the steps of when computer program is executed by processor when the instruction accessed
When instruction type is that Memory Allocation instructs, if Memory Allocation fails, static memory is inserted into after Memory Allocation instruction
Defragmentation instruction accesses the static memory defragmentation instruction of the insertion, the memory after being arranged;Again described in access
Memory Allocation instruction.
In one embodiment, it is current theoretical surplus that calculating is also performed the steps of when computer program is executed by processor
Remaining memory;If the size of the resource to be allocated is not more than the remaining theoretical memory, and the resource allocation memory to be allocated
The static memory defragmentation instruction is then inserted into failure after Memory Allocation instruction.
In one embodiment, the finger in current accessed is also performed the steps of when computer program is executed by processor
It enables the predeterminated position of list be inserted into the static memory defragmentation to instruct to obtain new command list.
In one embodiment, it also performs the steps of when computer program is executed by processor in the current accessed
Instruction list in Memory Allocation instruction before be inserted into static memory defragmentation instruction, obtain new command list.
Those of ordinary skill in the art will appreciate that realizing all or part of the process in above-described embodiment method, being can be with
Relevant hardware is instructed to complete by computer program, the program can be stored in a computer-readable storage medium
In, the program is when being executed, it may include such as the process of the embodiment of above-mentioned each method.Wherein, each implementation provided herein
Any reference to memory, storage, database or other media used in example, may each comprise non-volatile and/or volatile
Property memory.Nonvolatile memory may include read-only memory (ROM), programming ROM (PROM), electrically programmable ROM (EPROM), electricity
Erasable programmable ROM (EEPROM) or flash memory.Volatile ram may include that random access memory (RAM) or external high speed are slow
Rush memory.By way of illustration and not limitation, RAM is available in many forms, such as static state RAM (SRAM), dynamic ram (DRAM), same
Walk DRAM (SDRAM), double data rate sdram (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronization link (Synchlink)
DRAM (SLDRAM), rambus (Rambus) directly RAM (RDRAM), direct rambus dynamic ram (DRDRAM) and
Rambus dynamic ram (RDRAM) etc..
The embodiments described above only express several embodiments of the present invention, and the description thereof is more specific and detailed, but simultaneously
Limitations on the scope of the patent of the present invention therefore cannot be interpreted as.It should be pointed out that for those of ordinary skill in the art
For, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to guarantor of the invention
Protect range.Therefore, the scope of protection of the patent of the invention shall be subject to the appended claims.
Claims (15)
1. a kind of static memory scrap cleaning method, which comprises the steps of:
Judge the instruction type of the instruction in the instruction list of current accessed;
If the instruction type of the instruction of current accessed is the instruction of static memory defragmentation, multiple resources on memory are obtained,
And in the multiple resource each resource current address;
Destination address is redistributed in default storage region for each resource;
By each resource from the destination address of the mobile most each resource allocation in current address, and in the resource address list of each resource
Record corresponding destination address and the destination address corresponding reference period.
2. static memory scrap cleaning method according to claim 1, which is characterized in that further include following steps:
If the instruction type of the instruction of current accessed is not the instruction of static memory defragmentation, the instruction for inquiring current accessed is drawn
With the resource address list of resource, the current address of the instruction reference resource of current accessed is obtained;
The corresponding operating of the instruction of current accessed is executed on the current address of the instruction reference resource of the current accessed.
3. static memory scrap cleaning method according to claim 1, which is characterized in that obtaining multiple moneys on memory
In source and the multiple resource the step of the current address of each resource before, include the following steps:
If the corresponding all instructions of a certain resource completes corresponding operating, the resource for completing corresponding operating is discharged on the memory
Respective memory regions.
4. static memory scrap cleaning method according to claim 1, which is characterized in that described to be deposited for each resource default
The step of destination address that storage area domain is redistributed includes:
Obtain the life cycle of each resource;
According to the length of each resource life cycle, successively divide for each resource from low address to high address in the default storage region
Destination address is sequentially allocated from high address to low address with destination address, or in the default storage region for each resource.
5. static memory scrap cleaning method according to claim 1, which is characterized in that described is each resource default interior
The step of depositing the destination address that region is redistributed include:
The Life Cycle of each resource on the life cycle of each resource on the first region of memory and/or the second region of memory is obtained respectively
Phase;
It is first memory field on the first region of memory according to the life cycle of each resource on first region of memory
Each resource on domain is sequentially allocated destination address from low address to high address;
It is second memory field on the second region of memory according to the life cycle of each resource on second region of memory
Each resource on domain is sequentially allocated destination address from high address to low address;
Wherein, first region of memory corresponds to the low address region of the memory, and second region of memory corresponds in described
The high address region deposited.
6. static memory scrap cleaning method according to claim 1, which is characterized in that it is described by each resource from current position
The step of destination address of the mobile most each resource allocation in location includes:
The difference between the current address of each resource and the destination address of each resource is calculated, and according to the corresponding storage of the difference
The space size in region splits the resource, obtains multiple resource fragmentations less than or equal to the space size;
If the corresponding storage region of the destination address of a certain resource fragmentation is idle, it is empty to move the corresponding storage region of destination address
Not busy resource fragmentation to the free time storage region;
It is mobile in addition to a certain resource fragmentation if the corresponding storage region of the destination address of a certain resource fragmentation is occupied
Other resource fragmentations to corresponding storage region.
7. static memory scrap cleaning method according to claim 1, which is characterized in that the method also includes:
The destination address corresponding reference period of each resource on the memory is set according to static memory defragmentation instruction.
8. static memory scrap cleaning method according to claim 7, which is characterized in that described according to the static memory
Defragmentation instruction is arranged the step of destination address corresponding reference period of each resource on the memory and includes:
The destination address of each resource on the memory is set at the time of finishing according to the instruction access of each static memory defragmentation
Corresponding reference period, or the mesh that each resource on the memory is set according to the number that static memory defragmentation instructs is accessed
Mark the address corresponding reference period.
9. static memory scrap cleaning method according to claim 1, which is characterized in that the method also includes:
When the instruction type of the instruction of access is that Memory Allocation instructs, if Memory Allocation operation failure, in the access
Insertion static memory defragmentation instruction after Memory Allocation instruction;
Access the static memory defragmentation instruction of the insertion, the memory after being arranged;
Again the Memory Allocation instruction is accessed.
10. static memory scrap cleaning method according to claim 9, which is characterized in that if in the instruction list
The failure of Memory Allocation instruction execution is then wrapped the step of the instruction of insertion static memory defragmentation after Memory Allocation instruction
It includes:
Calculate current theoretical free memory;
If the size of the resource to be allocated is no more than the theoretical free memory, and the resource allocation memory to be allocated loses
It loses, is then inserted into the static memory defragmentation instruction after Memory Allocation instruction.
11. static memory scrap cleaning method according to claim 1, which is characterized in that the method also includes:
The static memory defragmentation is inserted into the predeterminated position of the instruction list of the current accessed to instruct to obtain new command
List.
12. static memory scrap cleaning method according to claim 11, which is characterized in that described in the pre- of instruction list
If position is inserted into and includes: the step of executing static memory defragmentation instruction
The static memory defragmentation instruction is inserted into before the Memory Allocation instruction in the instruction list of the current accessed,
Obtain new command list.
13. a kind of static memory collating unit characterized by comprising
Access modules for the instruction in access instruction list, and judge the type of described instruction;
Module is obtained, when for being the static memory defragmentation instruction in instruction list in access, in acquisition instruction list
The current address of each resource in the multiple resources and the multiple resource of a plurality of instruction reference;
Memory allocating module, the destination address for being redistributed for each resource in default region of memory;
Resource mobile module, for the destination address by each resource from the mobile most each resource allocation in the current address, and
Corresponding destination address and the destination address corresponding reference period are recorded in the resource address list of each resource.
14. a kind of computer equipment, including memory, processor, the computer run on a processor is stored on memory
Program, which is characterized in that the processor realizes side described in any one of claims 1 to 12 when executing the computer program
The step of method.
15. a kind of computer readable storage medium, is stored thereon with computer program, which is characterized in that the computer program
Method described in any one of claims 1 to 12 is realized when being executed by processor.
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Cited By (2)
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---|---|---|---|---|
CN111679909A (en) * | 2020-05-19 | 2020-09-18 | 深圳市元征科技股份有限公司 | Data processing method and device and terminal equipment |
CN115981831A (en) * | 2021-10-14 | 2023-04-18 | 中移物联网有限公司 | Memory management method and related equipment |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101661486A (en) * | 2008-08-28 | 2010-03-03 | 国际商业机器公司 | Method and system for fragment sorting for hard disk of host comprising virtual computer |
CN102301343A (en) * | 2011-06-14 | 2011-12-28 | 华为技术有限公司 | Method, device and system for monitoring software |
CN103246610A (en) * | 2012-02-14 | 2013-08-14 | 中国科学院上海微系统与信息技术研究所 | Dynamic storage management method of embedded system based on single-type memory |
CN103514098A (en) * | 2012-06-29 | 2014-01-15 | 伊姆西公司 | Method and system used for recovering storage space |
CN103914388A (en) * | 2012-12-28 | 2014-07-09 | 北京中电华大电子设计有限责任公司 | Method for JAVA card system heap fragment disposal |
CN104170364A (en) * | 2012-01-10 | 2014-11-26 | 京瓷办公信息系统株式会社 | Image processing apparatus and image forming apparatus |
CN105975398A (en) * | 2015-12-07 | 2016-09-28 | 国家电网公司 | Method for memory fragmentation management |
-
2018
- 2018-02-12 CN CN201810146230.7A patent/CN110162483B/en active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101661486A (en) * | 2008-08-28 | 2010-03-03 | 国际商业机器公司 | Method and system for fragment sorting for hard disk of host comprising virtual computer |
CN102301343A (en) * | 2011-06-14 | 2011-12-28 | 华为技术有限公司 | Method, device and system for monitoring software |
CN104170364A (en) * | 2012-01-10 | 2014-11-26 | 京瓷办公信息系统株式会社 | Image processing apparatus and image forming apparatus |
CN103246610A (en) * | 2012-02-14 | 2013-08-14 | 中国科学院上海微系统与信息技术研究所 | Dynamic storage management method of embedded system based on single-type memory |
CN103514098A (en) * | 2012-06-29 | 2014-01-15 | 伊姆西公司 | Method and system used for recovering storage space |
CN103914388A (en) * | 2012-12-28 | 2014-07-09 | 北京中电华大电子设计有限责任公司 | Method for JAVA card system heap fragment disposal |
CN105975398A (en) * | 2015-12-07 | 2016-09-28 | 国家电网公司 | Method for memory fragmentation management |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111679909A (en) * | 2020-05-19 | 2020-09-18 | 深圳市元征科技股份有限公司 | Data processing method and device and terminal equipment |
CN111679909B (en) * | 2020-05-19 | 2024-02-23 | 深圳市元征科技股份有限公司 | Data processing method and device and terminal equipment |
CN115981831A (en) * | 2021-10-14 | 2023-04-18 | 中移物联网有限公司 | Memory management method and related equipment |
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