CN110149294B

CN110149294B - Synchronous signal block transmission method, communication device and communication equipment

Info

Publication number: CN110149294B
Application number: CN201810150972.7A
Authority: CN
Inventors: 向铮铮; 罗俊; 袁璞
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2018-02-13
Filing date: 2018-02-13
Publication date: 2023-12-08
Anticipated expiration: 2038-02-13
Also published as: WO2019157910A1; CN110149294A

Abstract

The embodiment of the application provides a transmission method, a communication device and communication equipment of a synchronous signal block, wherein the method comprises the following steps: determining the positions of 16 synchronous signal blocks in half a wireless frame; transmitting at least one synchronous signal block to terminal equipment in the time corresponding to the half radio frame; wherein the carrier frequency is in the range of 3GHz to 6 GHz. The network equipment determines the positions of 16 synchronous signal blocks in half wireless frames, and sends at least one synchronous signal block to the terminal equipment in the time corresponding to the half wireless frames, so that the terminal equipment can send more synchronous signal blocks in a 5 millisecond time window, and the more the synchronous signal blocks sent in each beam direction, the more 8 synchronous signal blocks can be sent in the same beam direction by the terminal equipment compared with the network equipment in the 5 millisecond time window at most, so that the terminal equipment can receive more synchronous signal blocks in the same beam direction, thereby obtaining larger gain and meeting the coverage requirement of synchronous signals of a next generation wireless communication system.

Description

Synchronous signal block transmission method, communication device and communication equipment

Technical Field

The present application relates to the field of communications technologies, and in particular, to a method for transmitting a synchronization signal block, a communication device, and a communication device.

Background

The synchronous signal block is a signal structure in the wireless network, the synchronous signal block is sent to the terminal equipment by the network equipment of the wireless network, and the terminal equipment successfully receives the synchronous signal block is the premise of network access of the terminal equipment.

When the carrier frequency and the subcarrier spacing are different, the number of synchronization signal blocks which can be sent to the terminal equipment by the network equipment at most in a preset time is different. However, in some scenarios, the network device may not meet the coverage requirement of the synchronization signal of the next generation wireless communication system because the number of synchronization signal blocks that can be sent by the network device is smaller at most in the preset time.

Disclosure of Invention

The application provides a transmission method, a communication device and communication equipment of a synchronous signal block, which are used for meeting the coverage requirement of synchronous signals of a next-generation wireless communication system.

In a first aspect, the present application provides a method for transmitting a synchronization signal block, where the method includes: when the carrier frequency of the wireless signal sent by the network device is in the range of 3GHz to 6GHz, the network device determines the positions of 16 synchronous signal blocks in a half wireless frame before sending the synchronous signal blocks to the terminal device, and further sends the at least one synchronous signal block to the terminal device in the time corresponding to the half wireless frame, and optionally, the synchronous signal block actually sent by the network device to the terminal device can be at least one synchronous signal block in the 16 synchronous signal blocks. Through the scheme provided by the embodiment, the network device sends 16 synchronization signal blocks at most in the time corresponding to half a wireless frame, namely in a 5 millisecond time window, if the network device has 4 beam directions, the network device can send 4 synchronization signal blocks in each beam direction, compared with the network device which sends 8 synchronization signal blocks at most in the 5 millisecond time window, the terminal device can receive more synchronization signal blocks in the same beam direction, thereby obtaining larger gain and meeting the coverage requirement of the synchronization signal of the next generation wireless communication system.

In one possible design, the network device determines the locations of 16 synchronization signal blocks in half a radio frame, including:

the network equipment maps each synchronous signal block in 16 synchronous signal blocks to an OFDM symbol corresponding to the half radio frame, wherein each synchronous signal block occupies 4 OFDM symbols;

wherein the subcarrier interval is 30KHz, the half radio frame comprises 10 time slots in the time domain, each time slot comprises 14 OFDM symbols in the time domain, and the number of 140 OFDM symbols corresponding to the half radio frame is 0 to 139.

In one possible design, the network device maps each of the 16 synchronization signal blocks onto an OFDM symbol corresponding to the half radio frame, including:

the network equipment maps the first 8 synchronous signal blocks in the 16 synchronous signal blocks to OFDM symbols corresponding to the first 5 time slots in the half wireless frame in a first mapping mode;

the network device maps the last 8 synchronization signal blocks in the 16 synchronization signal blocks to OFDM symbols corresponding to the last 5 time slots in the half radio frame in a second mapping mode.

In one possible design, the first mapping scheme and the second mapping scheme are the same.

In one possible design, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {2,8,72,78} +14×n, n=0, 1,2,3.

In one possible design, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {4,8,16,20,74,78,86,90} +28×n, n=0, 1.

In one possible design, the first and second mapping schemes are mirror images of each other.

In one possible design, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {2,8,86,92} +14×n, n=0, 1,2,3.

In one possible design, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {4,8,16,20,88,92,100,104} +28×n, n=0, 1.

the network device maps the 16 synchronization signal blocks onto OFDM symbols corresponding to the first 8 slots in the half radio frame, each slot corresponding to two synchronization signal blocks.

In one possible design, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks within the half radio frame is {2,8} +14×n, n=0, 1, …,7.

In one possible design, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {4,8,16,20} +28×n, n=0, 1,2,3.

In one possible design, the subcarrier spacing may be 15KHz, the half radio frame may include 5 slots in the time domain, each slot may include 14 OFDM symbols in the time domain, and the number of 70 OFDM symbols corresponding to the half radio frame may be 0 to 69.

In one possible design, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is 2+4×n, n=0, 1, …,15.

In one possible design, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks within the half radio frame is {2,36} +4×n, n=0, 1, …,7.

In one possible design, the method further comprises:

the network device carries the identification information of the synchronization signal block in the synchronization signal block.

In one possible design, the network device carries identification information of the synchronization signal block in the synchronization signal block, including:

the network device carries the identification information of the synchronization signal block in a physical broadcast channel PBCH included in the synchronization signal block.

the network device carries the identification information of the synchronization signal block in a demodulation reference signal DMRS of the PBCH included in the synchronization signal block.

the network device carries partial bits corresponding to the identification information of the synchronous signal block in the PBCH included in the synchronous signal block;

the network device carries the remaining bits of the identification information of the synchronization signal block in the demodulation reference signal DMRS of the PBCH included in the synchronization signal block.

In one possible design, the method further comprises:

the network device sends indication information to the terminal device, where the indication information is used to indicate the at least one synchronization signal block sent by the network device.

In one possible design, the 16 synchronization signal blocks are divided into a plurality of synchronization signal block groups, each synchronization signal block group including at least one synchronization signal block;

the indication information comprises first information and second information, wherein the first information is used for indicating a target synchronous signal block group in a plurality of synchronous signal block groups, and the target synchronous signal block group comprises at least one synchronous signal block sent by the network equipment;

the second information is used to indicate the at least one synchronization signal block sent by the network device in the target synchronization signal block group.

In a second aspect, the present application provides a communication apparatus comprising:

a determining module, configured to determine positions of 16 synchronization signal blocks in half a radio frame;

a transmitting module, configured to transmit the at least one synchronization signal block to a terminal device in a time corresponding to the half radio frame;

wherein the carrier frequency is in the range of 3GHz to 6 GHz.

In one possible design, when the determining module determines the positions of 16 synchronization signal blocks in a half radio frame, the determining module is specifically configured to map each synchronization signal block of the 16 synchronization signal blocks onto an OFDM symbol corresponding to the half radio frame, where each synchronization signal block occupies 4 OFDM symbols;

In one possible design, when the determining module maps each of the 16 synchronization signal blocks to an OFDM symbol corresponding to the half radio frame, the determining module is specifically configured to:

mapping the first 8 synchronous signal blocks in the 16 synchronous signal blocks to OFDM symbols corresponding to the first 5 time slots in the half wireless frame in a first mapping mode;

and mapping the last 8 synchronous signal blocks in the 16 synchronous signal blocks to OFDM symbols corresponding to the last 5 time slots in the half wireless frame in a second mapping mode.

the 16 synchronization signal blocks are mapped to OFDM symbols corresponding to the first 8 time slots in the half radio frame, and each time slot corresponds to two synchronization signal blocks.

In one possible design, the communication device further comprises: and the identification module is used for carrying the identification information of the synchronous signal block in the synchronous signal block.

In one possible design, the identification module is specifically configured to carry the identification information of the synchronization signal block in a physical broadcast channel PBCH included in the synchronization signal block.

In one possible design, the identification module is specifically configured to carry the identification information of the synchronization signal block in a demodulation reference signal DMRS of a PBCH included in the synchronization signal block.

In one possible design, the identification module is specifically configured to carry a portion of bits corresponding to identification information of the synchronization signal block in a PBCH included in the synchronization signal block; and carrying the remaining bits of the identification information of the synchronization signal block in a demodulation reference signal (DMRS) of the PBCH included in the synchronization signal block.

In one possible design, the transmitting module is further configured to:

and sending indication information to the terminal equipment, wherein the indication information is used for indicating the at least one synchronous signal block sent by the network equipment.

In a third aspect, the present application provides a communication device comprising:

an interface and a processor, the interface and the processor coupled;

the processor is configured to perform the method for transmitting a synchronization signal block according to the first aspect.

In one possible design, the communication device in the third aspect may be a network device or a chip; the interfaces may be integrated with the processor on the same chip or may be separately provided on different chips.

In a fourth aspect, the present application provides a method for transmitting a synchronization signal block, including:

the terminal equipment receives at least one synchronous signal block sent by the network equipment;

the terminal equipment accesses the cell.

In a fifth aspect, the present application provides a communication apparatus comprising:

the receiving module is used for receiving at least one synchronous signal block sent by the network equipment;

and the access module is used for accessing the cell.

In a sixth aspect, the present application provides a communication device comprising:

an interface and a processor, the interface and the processor coupled;

the processor is configured to perform the method according to the fourth aspect.

In one possible design, the communication device in the sixth aspect may be a terminal device or a chip; the interfaces may be integrated with the processor on the same chip or may be separately provided on different chips.

In a seventh aspect, the present application provides a computer readable storage medium having a computer program stored therein, which when run on a computer causes the computer to perform the method according to the first aspect.

In an eighth aspect, the present application provides a computer readable storage medium having a computer program stored therein, which when run on a computer causes the computer to perform the method according to the fourth aspect.

In a ninth aspect, the present application provides a computer program for performing the method of the first aspect when the computer program is executed by a computer.

In one possible design, the program in the ninth aspect may be stored in whole or in part on a storage medium packaged with the processor, or in part or in whole on a memory not packaged with the processor.

In a tenth aspect, the present application provides a computer program for performing the method of the fourth aspect when the computer program is executed by a computer.

In one possible design, the program in the tenth aspect may be stored in whole or in part on a storage medium packaged with the processor, or in part or in whole on a memory not packaged with the processor.

In an eleventh aspect, the present application provides a communication apparatus comprising:

a memory and a processor, the memory and the processor coupled;

the processor is configured to perform the method according to the first aspect.

In one possible design, the communication device in the eleventh aspect may be a network device or a chip; the memory may be integrated with the processor on the same chip or may be separately provided on different chips.

In a twelfth aspect, the present application provides a communication device comprising:

a memory and a processor, the memory and the processor coupled;

In one possible design, the communication device in the twelfth aspect may be a terminal device or a chip; the memory may be integrated with the processor on the same chip or may be separately provided on different chips.

In a thirteenth aspect, the present application provides a processor comprising:

at least one circuit for determining the positions of 16 synchronization signal blocks in half a radio frame;

at least one circuit for transmitting at least one synchronization signal block to the terminal device.

In one possible design, the processor in the thirteenth aspect may be a chip.

In a fourteenth aspect, the present application provides a processor comprising:

at least one circuit for receiving at least one synchronization signal block transmitted by the network device;

at least one circuit for accessing a cell.

In one possible design, the processor in the fourteenth aspect may be a chip. It can be seen that in the above aspects, the network device determines the positions of 16 synchronization signal blocks in the half radio frame, and sends at least one synchronization signal block to the terminal device in the time corresponding to the half radio frame, so that the terminal device can send more synchronization signal blocks in the 5 ms time window, and the more synchronization signal blocks sent in each beam direction, the more synchronization signal blocks sent in the same beam direction, the more synchronization signal blocks can be received by the terminal device in the same beam direction, compared with the network device, in the 5 ms time window, so as to obtain a larger gain, and meet the coverage requirement of the synchronization signal of the next generation wireless communication system.

Drawings

Fig. 1 is a schematic view of an application scenario provided in an embodiment of the present application;

fig. 2 is a schematic structural diagram of a synchronization signal block according to the present application;

FIG. 3 is a schematic diagram of a synchronization signal block position within a 5 ms time window according to the present application;

fig. 4 is a schematic diagram of mapping of synchronization signal blocks in time slots under various SCS according to the present application;

fig. 5 is a schematic diagram of mapping 16 synchronization signal blocks in a 5 ms time window according to the present application;

FIG. 6 is a schematic diagram of another mapping of 16 synchronization signal blocks within a 5 ms time window according to the present application;

FIG. 7 is a schematic diagram of mapping of 16 synchronization signal blocks within a 5 ms time window according to the present application;

FIG. 8 is a schematic diagram of mapping 16 synchronization signal blocks within a 5 ms time window according to another embodiment of the present application;

FIG. 9 is a schematic diagram of mapping 16 synchronization signal blocks within a 5 ms time window according to another embodiment of the present application;

fig. 10 is a flowchart of a transmission method of a synchronization signal block according to the present application;

fig. 11 is a schematic diagram of a network device sending a synchronization signal block according to the present application;

fig. 12 is a schematic diagram of dividing 16 synchronization signal blocks into 4 synchronization signal block groups according to the present application;

Fig. 13 is a schematic structural diagram of a communication device according to an embodiment of the present application;

fig. 14 is a schematic structural diagram of another network device according to an embodiment of the present application;

fig. 15 is a schematic structural diagram of still another network device according to an embodiment of the present application;

fig. 16 is a schematic structural diagram of another communication device according to an embodiment of the present application;

fig. 17 is a schematic structural diagram of a terminal device according to an embodiment of the present application.

Detailed Description

The terminology used in the description of the embodiments of the application herein is for the purpose of describing particular embodiments of the application only and is not intended to be limiting of the application.

The embodiment of the application can be applied to various types of communication systems. Fig. 1 is a schematic diagram of an application scenario provided in an embodiment of the present application. The communication system shown in fig. 1 mainly includes a network device 11 and a terminal device 12.

Wherein, 1) the network device 11 may be a network-side device, for example, an access point AP of Wireless-Fidelity (WIFI), a base station of next-generation communication, such as a gNB or a small station, a micro station, a TRP of 5G, and may also be a relay station, an access point, a vehicle-mounted device, a wearable device, and the like. In this embodiment, base stations in communication systems of different communication schemes are different. For the sake of distinction, the base station of the 4G communication system is referred to as LTE eNB, the base station of the 5G communication system is referred to as NR gNB, the base station supporting both the 4G communication system and the 5G communication system is referred to as elet eNB, these names are for convenience of distinction only and are not meant to be limiting.

2) The terminal device 12, also referred to as a User Equipment (UE), is a device that provides voice and/or data connectivity to a User, e.g., a handheld device having wireless connectivity, an in-vehicle device, etc. Common terminals include, for example: a cell phone, tablet, notebook, palm top, mobile internet device (mobile internet device, MID), wearable device, such as a smart watch, smart bracelet, pedometer, etc.

3) "plurality" means two or more, and the like. "and/or", describes an association relationship of an association object, and indicates that there may be three relationships, for example, a and/or B, and may indicate: a exists alone, A and B exist together, and B exists alone. The character "/" generally indicates that the context-dependent object is an "or" relationship.

It should be noted that the number and types of the terminal devices 12 included in the communication system shown in fig. 1 are only one distance, and the embodiment of the present application is not limited thereto. For example, further terminal devices 12 communicating with the network device 11 may be included, which are not depicted in the figures for simplicity of description. In addition, in the communication system as shown in fig. 1, although the network device 11 and the terminal device 12 are shown, the communication system may not be limited to include the network device 11 and the terminal device 12, for example, may also include a core network device or a device for carrying a virtualized network function, etc., which will be apparent to those skilled in the art, and will not be described in detail herein.

In addition, the embodiment of the application can be applied to not only the next generation wireless communication system, namely the 5G communication system, but also other systems possibly appearing in the future, such as a next generation wifi network, a 5G car networking and the like.

Fig. 2 is a schematic structural diagram of a synchronization signal block according to the present application. As shown in fig. 2, the synchronization signal block includes: primary synchronization signal (Primary Synchronization Sigal, PSS), secondary synchronization signal (Secondary Synchronization Signal, SSS), and physical broadcast channel (Physical Broadcast Channel, PBCH). Wherein the PSS and SSS are used for the terminal device to identify and synchronize with the cell. The PBCH includes most basic system information such as a system frame number, intra-frame timing information, etc. The successful reception of the synchronization signal block by the terminal device is a precondition for its access to the cell. As shown in fig. 2, one synchronization signal block occupies 4 orthogonal frequency division multiplexing (Orthogonal Frequency Division Multiplexing, OFDM) symbols in the time domain.

A synchronization signal burst set (burst set) is defined in a New air interface (New Radio, NR) of 5G, where the synchronization signal burst set may include one or more synchronization signal blocks, and the network device, for example, a base station, may separately transmit the synchronization signal blocks included in the synchronization signal burst set through different beams, thereby implementing beam scanning. When the carrier frequency ranges are different, the maximum number L of synchronization signal blocks that can be included in the synchronization signal burst is different. Specifically, when the carrier frequency does not exceed 3GHz, l=4; when the carrier frequency is in the range of 3GHz to 6GHz, l=8; when the carrier frequency is in the range of 6GHz to 52.6GHz, l=64. The base station may periodically transmit the synchronization signal blocks, and the base station needs to transmit the synchronization signal blocks included in the synchronization signal burst set to the terminal device within a time corresponding to half a radio frame, that is, within a 5 ms time window, and the number of synchronization signal blocks actually transmitted by the base station may be less than the maximum number L.

In addition, when Subcarrier spacing (SCS) is different, positions of L synchronization signal blocks within a 5 ms time window are different, as shown in fig. 3. When scs=15 KHz, 1 slot is 1 millisecond, 5 slots are included in 5 milliseconds, the maximum number of synchronization signal blocks that can be included in the synchronization signal burst set is l=4 or l=8, and when l=4, the 4 synchronization signal blocks are located in the first two slots of half a radio frame; when l=8, 8 synchronization signal blocks are located in the first 4 slots of the half radio frame.

When scs=30 KHz, 1 slot is 0.5 ms, 10 slots are included in 5 ms, the maximum number of synchronization signal blocks that can be included in the synchronization signal burst set is l=4 or l=8, and when l=4, the 4 synchronization signal blocks are located in the first two slots of the half radio frame; when l=8, 8 synchronization signal blocks are located in the first 4 slots of the half radio frame.

When scs=120 KHz, 1 slot is 0.125 ms, 40 slots are included in 5 ms, the maximum number of synchronization signal blocks that can be included in the synchronization signal burst set is l=64, and the number of the 40 slots is assumed to be 0 to 39, where each of slots 0 to 7 includes two synchronization signal blocks, each of slots 10 to 17 includes two synchronization signal blocks, each of slots 20 to 27 includes two synchronization signal blocks, and each of slots 30 to 37 includes two synchronization signal blocks, the index of the slot occupied by 64 synchronization signal blocks is {0,1,2,3,4,5,6,7} +10×n, n=0, 1,2,3. Wherein {0,1,2,3,4,5,6,7} +10 x n, n=0, 1,2,3 is equivalent to {0,1,2,3,4,5,6,7, 10,11,12,13,14, 15,16,17,20,21,22,23,24,25,26,27,30,31,32,33,34,35,36,37}.

When scs=240 KHz, 1 slot is 0.0625 ms, 80 slots are included in 5 ms, the maximum number of synchronization signal blocks that can be included in the synchronization signal burst set is l=64, and assuming that the numbers of the 80 slots are 0 to 79, each of slots 0 to 15 includes two synchronization signal blocks, and each of slots 20 to 35 includes two synchronization signal blocks, the index of the slot occupied by the 64 synchronization signal blocks is {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15} +20xn, n=0, 1. Where {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15} +20×n, n=0, 1 is equivalent to {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35}.

In addition, when SCS is different, the position of the synchronization signal block within the slot is also different. Fig. 4 is a schematic diagram of mapping of synchronization signal blocks in time slots under various SCS according to the present application. As shown in fig. 4, when scs=15 KHz, 1 slot is 1 ms, 1 slot includes 14 OFDM symbols, one synchronization signal block occupies 4 OFDM symbols, 1 slot may include two synchronization signal blocks, and the index of the OFDM symbol occupied by the two synchronization signal blocks is {2,3,4,5,8,9,10,11} assuming that the number of the 14 OFDM symbols in the 1 slot is 0 to 13.

When scs=30 KHz, the 1 slot is 0.5 ms, the 1 slot includes 14 OFDM symbols, the 1 slot may include two synchronization signal blocks, the mapping modes of the two synchronization signal blocks in the 1 slot are two, and assuming that the numbers of the 14 OFDM symbols in the 1 slot are 0 to 13, in the first mapping mode, the indexes of the OFDM symbols occupied by the two synchronization signal blocks are {4,5,6,7,8,9,10,11}; in the second mapping mode, the index of the OFDM symbol occupied by the two synchronization signal blocks is {2,3,4,5,8,9,10,11}.

When scs=120 KHz, 1 slot is 0.125 ms, 1 slot includes 14 OFDM symbols, 1 slot may include two synchronization signal blocks, and the index of the OFDM symbol occupied by the two synchronization signal blocks is {4,5,6,7,8,9,10,11} assuming that the number of the 14 OFDM symbols in the 1 slot is 0 to 13.

When scs=240 KHz, 1 slot is 0.0625 ms, 1 slot includes 14 OFDM symbols, and a synchronization signal block needs to be mapped across slots, for example, 1 slot may include 1.5 synchronization signal blocks, and 2 slot may include 2.5 synchronization signal blocks.

As can be seen from the above description, when the carrier frequency is in the range of 3GHz to 6GHz, that is, when the carrier frequency of the signal transmitted by the network device is in the range of 3GHz to 6GHz, the base station can only transmit 8 synchronization signal blocks at most in the time corresponding to half a radio frame, that is, in the 5 ms time window, if the base station has 4 beam directions, the base station transmits 2 synchronization signal blocks in each beam direction, the number of synchronization signal blocks received by the terminal device in the same beam direction is smaller, the obtained gain is smaller, and the coverage requirement of the synchronization signal of the next generation wireless communication system cannot be satisfied. In order to solve the problem, the present application proposes a scheme in which a base station can transmit 16 synchronization signal blocks at most within a time corresponding to half a radio frame, i.e., within a 5 ms time window, when a carrier frequency is in a range of 3GHz to 6 GHz.

In general, the more synchronization signal blocks that the base station transmits in a 5 ms time window, the more synchronization signal blocks that the base station transmits in each beam direction, the more synchronization signal blocks that the terminal device can receive in the same beam direction, and the larger the combining gain that the terminal device obtains after combining the synchronization signal blocks in the same beam direction. When the carrier frequency is in the range of 3GHz to 6GHz, if the base station transmits 16 synchronous signal blocks at most in the time corresponding to half a radio frame, namely in the 5 millisecond time window, the base station has 4 beam directions, the base station can transmit 4 synchronous signal blocks in each beam direction, compared with the network equipment which transmits 8 synchronous signal blocks at most in the 5 millisecond time window, the terminal equipment can receive more synchronous signal blocks in the same beam direction, thereby obtaining larger gain and meeting the coverage requirement of synchronous signals of the next generation of wireless communication system.

The mapping manner of 16 synchronization signal blocks within half a radio frame, i.e. a 5 ms time window, will be described below with reference to a specific application scenario.

A specific application scenario is: when the carrier frequency is in the range of 3GHz to 6GHz, scs=30 KHz, 1 slot is 0.5 ms, half a radio frame includes 10 slots in the time domain, i.e., 5 ms time window, each slot includes 14 OFDM symbols in the time domain, and then the half a radio frame includes 140 OFDM symbols in the time domain, and the numbers of the 140 OFDM symbols corresponding to the half a radio frame are 0 to 139. In this scenario, mapping 16 sync signal blocks in half a radio frame can be seen as mapping 16 sync signal blocks on the 140 OFDM symbols.

Specifically, the manner of mapping 16 synchronization signal blocks onto the 140 OFDM symbols may include the following several possible implementations:

one possible implementation is: mapping the first 8 synchronization signal blocks in the 16 synchronization signal blocks onto OFDM symbols corresponding to the first 5 time slots in the half radio frame, mapping the last 8 synchronization signal blocks in the 16 synchronization signal blocks onto OFDM symbols corresponding to the last 5 time slots in the half radio frame, and mapping the first 8 synchronization signal blocks in the 16 synchronization signal blocks and the mapping mode of the last 8 synchronization signal blocks are the same.

As shown in fig. 5, when scs=30 KHz, 1 slot is 0.5 ms, and half a radio frame includes 10 slots in the time domain, i.e., within a 5 ms time window, the slots are numbered 0 to 9. Before transmitting the 16 synchronization signal blocks, the base station may map the first 8 synchronization signal blocks of the 16 synchronization signal blocks on OFDM symbols corresponding to time slots 0 to 4, and map the last 8 synchronization signal blocks of the 16 synchronization signal blocks on OFDM symbols corresponding to time slots 5 to 9. Since 2 synchronization signal blocks can be placed in 1 slot, the first 8 synchronization signal blocks can be mapped on OFDM symbols corresponding to slots 0 to 3 in slots 0 to 4, and no synchronization signal block is placed in slot 4. In time slots 5 to 9, the last 8 synchronization signal blocks may be mapped on OFDM symbols corresponding to time slots 5 to 8, and time slot 9 does not put a synchronization signal block. Specifically, the mapping mode of the first 8 synchronization signal blocks in the 16 synchronization signal blocks on the OFDM symbols corresponding to the time slots 0 to 3 is consistent with the mapping mode of the last 8 synchronization signal blocks on the OFDM symbols corresponding to the time slots 5 to 8.

For example, the numbers of 16 synchronization signal blocks are 0 to 15, and as shown in fig. 5, the mapping manner of the synchronization signal blocks 0 to 7 on the OFDM symbols corresponding to the time slots 0 to 3 is consistent with the mapping manner of the synchronization signal blocks 8 to 15 on the OFDM symbols corresponding to the time slots 5 to 8. In this case, there are two modes of 16 sync signal block mapping, as shown in fig. 5, in mode 1, one slot includes two sync signal blocks, for example, slot 0 includes sync signal block 0 and sync signal block 1, where sync signal block 0 occupies OFDM symbols numbered 2 to 5, and sync signal block 1 occupies OFDM symbols numbered 8 to 11.

Slot 1 includes a synchronization signal block 2 and a synchronization signal block 3, the synchronization signal block 2 occupies OFDM symbols numbered 16 to 19, and the synchronization signal block 3 occupies OFDM symbols numbered 22 to 25.

Slot 2 includes a synchronization signal block 4 and a synchronization signal block 5, the synchronization signal block 4 occupying OFDM symbols numbered 30 to 33, and the synchronization signal block 5 occupying OFDM symbols numbered 36 to 39.

Slot 3 includes a synchronization signal block 6 and a synchronization signal block 7, synchronization signal block 6 occupying OFDM symbols numbered 44 to 47, and synchronization signal block 7 occupying OFDM symbols numbered 50 to 53.

Slot 5 includes a synchronization signal block 8 and a synchronization signal block 9, synchronization signal block 8 occupying OFDM symbols numbered 72 to 75, and synchronization signal block 9 occupying OFDM symbols numbered 78 to 81.

Slot 6 includes a synchronization signal block 10 and a synchronization signal block 11, synchronization signal block 10 occupying OFDM symbols numbered 86 to 89, and synchronization signal block 11 occupying OFDM symbols numbered 92 to 95.

Slot 7 includes a synchronization signal block 12 and a synchronization signal block 13, the synchronization signal block 12 occupying OFDM symbols numbered 100 to 103, and the synchronization signal block 13 occupying OFDM symbols numbered 106 to 109.

Slot 8 includes a synchronization signal block 14 and a synchronization signal block 15, synchronization signal block 14 occupying OFDM symbols numbered 114 to 117, and synchronization signal block 15 occupying OFDM symbols numbered 120 to 123.

As shown in fig. 5, in mode 1, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {2,8,72,78} +14×n, n=0, 1,2,3, that is, the index of the first OFDM symbol occupied by each of the synchronization signal blocks 0 to 15 in the half radio frame is {2,8,16,22,30,36,44,50,72,78,86,92,100,106,114,120}, in sequence.

As shown in fig. 5, in mode 2, one slot includes two synchronization signal blocks, for example, slot 0 includes synchronization signal block 0 and synchronization signal block 1, synchronization signal block 0 occupies OFDM symbols numbered 4 to 7, and synchronization signal block 1 occupies OFDM symbols numbered 8 to 11.

Slot 1 includes a synchronization signal block 2 and a synchronization signal block 3, the synchronization signal block 2 occupies OFDM symbols numbered 16 to 19, and the synchronization signal block 3 occupies OFDM symbols numbered 20 to 23.

Slot 2 includes a synchronization signal block 4 and a synchronization signal block 5, the synchronization signal block 4 occupying OFDM symbols numbered 32 to 35, and the synchronization signal block 5 occupying OFDM symbols numbered 36 to 39.

Slot 3 includes a synchronization signal block 6 and a synchronization signal block 7, synchronization signal block 6 occupying OFDM symbols numbered 44 to 47, and synchronization signal block 7 occupying OFDM symbols numbered 48 to 51.

Slot 5 includes a synchronization signal block 8 and a synchronization signal block 9, synchronization signal block 8 occupying OFDM symbols numbered 74 to 77, and synchronization signal block 9 occupying OFDM symbols numbered 78 to 81.

Slot 6 includes a synchronization signal block 10 and a synchronization signal block 11, the synchronization signal block 10 occupying OFDM symbols numbered 86 to 89, and the synchronization signal block 11 occupying OFDM symbols numbered 90 to 93.

Slot 7 includes a synchronization signal block 12 and a synchronization signal block 13, the synchronization signal block 12 occupying OFDM symbols numbered 102 to 105, and the synchronization signal block 13 occupying OFDM symbols numbered 106 to 109.

Slot 8 includes a synchronization signal block 14 and a synchronization signal block 15, synchronization signal block 14 occupying OFDM symbols numbered 114 to 117, and synchronization signal block 15 occupying OFDM symbols numbered 118 to 121. As shown in fig. 5, in mode 2, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {4,8,16,20,74,78,86,90} +28×n, n=0, 1, that is, the index of the first OFDM symbol occupied by each of the synchronization signal blocks 0 to 15 in the half radio frame is {4,8,16,20,32,36,44,48,74,78,86,90,102,106,114,118}.

Another possible implementation of mapping 16 synchronization signal blocks on the 140 OFDM symbols is: mapping the first 8 synchronous signal blocks in the 16 synchronous signal blocks onto OFDM symbols corresponding to the first 5 time slots in the half wireless frame, mapping the last 8 synchronous signal blocks in the 16 synchronous signal blocks onto OFDM symbols corresponding to the last 5 time slots in the half wireless frame, and mapping the first 8 synchronous signal blocks in the 16 synchronous signal blocks and the mapping mode of the last 8 synchronous signal blocks are mirror images.

As shown in fig. 6, when scs=30 KHz, 1 slot is 0.5 ms, and half a radio frame includes 10 slots in the time domain, i.e., within a 5 ms time window, the slots are numbered 0 to 9. The 16 synchronization signal blocks are bilaterally symmetric in the 5 ms time window, specifically, the numbers of the 16 synchronization signal blocks are 0 to 15, wherein the synchronization signal block 0 and the synchronization signal block 15 are bilaterally symmetric in the 5 ms time window, the synchronization signal block 1 and the synchronization signal block 14 are bilaterally symmetric in the 5 ms time window, the synchronization signal block 2 and the synchronization signal block 13 are bilaterally symmetric in the 5 ms time window, and so on, and the synchronization signal block 7 and the synchronization signal block 8 are bilaterally symmetric in the 5 ms time window.

As shown in fig. 6, 16 synchronization signal blocks have two modes in bilateral symmetry within a 5 ms time window, and in mode 1, one slot includes two synchronization signal blocks, for example, slot 0 includes synchronization signal block 0 and synchronization signal block 1, synchronization signal block 0 occupies OFDM symbols numbered 2 to 5, and synchronization signal block 1 occupies OFDM symbols numbered 8 to 11.

Slot 6 includes a synchronization signal block 8 and a synchronization signal block 9, synchronization signal block 8 occupying OFDM symbols numbered 86 to 89, and synchronization signal block 9 occupying OFDM symbols numbered 92 to 95.

Slot 7 includes a synchronization signal block 10 and a synchronization signal block 11, synchronization signal block 10 occupying OFDM symbols numbered 100 to 103, and synchronization signal block 11 occupying OFDM symbols numbered 106 to 109.

Slot 8 includes a synchronization signal block 12 and a synchronization signal block 13, the synchronization signal block 12 occupying OFDM symbols numbered 114 to 117, and the synchronization signal block 13 occupying OFDM symbols numbered 120 to 123.

Slot 9 includes a synchronization signal block 14 and a synchronization signal block 15, the synchronization signal block 14 occupying OFDM symbols numbered 128 to 131, and the synchronization signal block 15 occupying OFDM symbols numbered 134 to 137.

As shown in fig. 6, in mode 1, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {2,8,86,92} +14×n, n=0, 1,2,3, that is, the index of the first OFDM symbol occupied by each of the synchronization signal blocks 0 to 15 in the half radio frame is {2,8,16,22,30,36,44,50,86,92,100,106,114,120,128,134}, in sequence.

As shown in fig. 6, in mode 2, one slot includes two synchronization signal blocks, for example, slot 0 includes synchronization signal block 0 and synchronization signal block 1, synchronization signal block 0 occupies OFDM symbols numbered 4 to 7, and synchronization signal block 1 occupies OFDM symbols numbered 8 to 11.

Slot 6 includes a synchronization signal block 8 and a synchronization signal block 9, synchronization signal block 8 occupying OFDM symbols numbered 88 to 91, and synchronization signal block 9 occupying OFDM symbols numbered 92 to 95.

Slot 7 includes a synchronization signal block 10 and a synchronization signal block 11, synchronization signal block 10 occupying OFDM symbols numbered 100 to 103, and synchronization signal block 11 occupying OFDM symbols numbered 104 to 107.

Slot 8 includes a synchronization signal block 12 and a synchronization signal block 13, the synchronization signal block 12 occupying OFDM symbols numbered 116 to 119, and the synchronization signal block 13 occupying OFDM symbols numbered 120 to 123.

Slot 9 includes a synchronization signal block 14 and a synchronization signal block 15, the synchronization signal block 14 occupying OFDM symbols numbered 128 to 131, and the synchronization signal block 15 occupying OFDM symbols numbered 132 to 135.

As shown in fig. 6, in mode 2, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {4,8,16,20,88,92,100,104} +28×n, n=0, 1, that is, the index of the first OFDM symbol occupied by each of the synchronization signal blocks 0 to 15 in the half radio frame is {4,8,16,20,32,36,44,48,88,92,100,104,116,120,128,132}.

Yet another possible implementation of mapping 16 synchronization signal blocks on the 140 OFDM symbols is: and mapping the 16 synchronous signal blocks to OFDM symbols corresponding to the first 8 time slots in the half wireless frame, wherein each time slot corresponds to two synchronous signal blocks. As shown in fig. 7, the synchronization signal blocks 0 to 15 are mapped in 8 slots of slots 0 to 7, and 2 synchronization signal blocks are put in each slot, and no synchronization signal blocks are put in slots 8 and 9. Specifically, the mapping of the synchronization signal blocks 0 to 15 into the 8 slots 0 to 7 has two modes, and as shown in fig. 7, in the mode 1, one slot includes two synchronization signal blocks, for example, the slot 0 includes the synchronization signal block 0 and the synchronization signal block 1, the synchronization signal block 0 occupies the OFDM symbols numbered 2 to 5, and the synchronization signal block 1 occupies the OFDM symbols numbered 8 to 11.

Slot 4 includes a synchronization signal block 8 and a synchronization signal block 9, synchronization signal block 8 occupying OFDM symbols numbered 58 to 61, and synchronization signal block 9 occupying OFDM symbols numbered 64 to 67.

Slot 5 includes a synchronization signal block 10 and a synchronization signal block 11, synchronization signal block 10 occupying OFDM symbols numbered 72 to 75, and synchronization signal block 11 occupying OFDM symbols numbered 78 to 81.

Slot 6 includes a synchronization signal block 12 and a synchronization signal block 13, the synchronization signal block 12 occupying OFDM symbols numbered 86 to 89, and the synchronization signal block 13 occupying OFDM symbols numbered 92 to 95.

Slot 7 includes a synchronization signal block 14 and a synchronization signal block 15, synchronization signal block 14 occupying OFDM symbols numbered 100 to 103, and synchronization signal block 15 occupying OFDM symbols numbered 106 to 109.

As shown in fig. 7, in mode 1, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {2,8} +14×n, n=0, 1, …,7, that is, the indexes of the first OFDM symbol occupied by each of the synchronization signal blocks 0 to 15 in the half radio frame are {2,8, 16,22,30,36,44,50,58,64,72,78,86,92,100,106}, in sequence.

As shown in fig. 7, in mode 2, one slot includes two synchronization signal blocks, for example, slot 0 includes synchronization signal block 0 and synchronization signal block 1, synchronization signal block 0 occupies OFDM symbols numbered 4 to 7, and synchronization signal block 1 occupies OFDM symbols numbered 8 to 11.

Slot 4 includes a synchronization signal block 8 and a synchronization signal block 9, synchronization signal block 8 occupying OFDM symbols numbered 60 to 63, and synchronization signal block 9 occupying OFDM symbols numbered 64 to 67.

Slot 5 includes a synchronization signal block 10 and a synchronization signal block 11, synchronization signal block 10 occupying OFDM symbols numbered 72 to 75, and synchronization signal block 11 occupying OFDM symbols numbered 76 to 79.

Slot 6 includes a synchronization signal block 12 and a synchronization signal block 13, the synchronization signal block 12 occupying OFDM symbols numbered 88 to 91, and the synchronization signal block 13 occupying OFDM symbols numbered 92 to 95.

Slot 7 includes a synchronization signal block 14 and a synchronization signal block 15, the synchronization signal block 14 occupying OFDM symbols numbered 100 to 103, and the synchronization signal block 15 occupying OFDM symbols numbered 104 to 107. As shown in fig. 7, in mode 2, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {4,8,16,20} +28×n, n=0, 1,2,3, that is, the index of the first OFDM symbol occupied by each of the synchronization signal blocks 0 to 15 in the half radio frame is {4,8,16,20,32,36,44,48,60,64,72,76,88,92,100,104}, in sequence.

Another specific application scenario is: when the carrier frequency is in the range of 3GHz to 6GHz, scs=15 KHz, 1 slot is 1 millisecond, half a radio frame includes 5 slots in the time domain, i.e., 5 millisecond time window, each slot includes 14 OFDM symbols in the time domain, then the half a radio frame includes 70 OFDM symbols in the time domain, and the half a radio frame corresponds to 70 OFDM symbols numbered 0 to 69. In this scenario, mapping 16 synchronization signal blocks in half a radio frame can be seen as mapping 16 synchronization signal blocks on the 70 OFDM symbols.

Since each time slot includes 14 OFDM symbols in the time domain, and one synchronization signal block occupies 4 OFDM symbols in the time domain, at most 3 complete synchronization signal blocks can be placed in one time slot, and since 16 synchronization signal blocks need to be placed in 5 time slots, 3.2 synchronization signal blocks are placed in each time slot on average, that is, when 16 synchronization signal blocks are mapped to 5 time slots, part of the 16 synchronization signal blocks need to be mapped across time slots.

Specifically, mapping 16 synchronization signal blocks onto the 70 OFDM symbols may include several possible implementations:

one possible implementation is: as shown in fig. 8, the slot 0 includes a synchronization signal block 0, a synchronization signal block 1 and a synchronization signal block 2, the synchronization signal block 0 occupies OFDM symbols numbered 2 to 5, the synchronization signal block 1 occupies OFDM symbols numbered 6 to 9, and the synchronization signal block 2 occupies OFDM symbols numbered 10 to 13.

Slot 1 includes synchronization signal block 3, synchronization signal block 4, synchronization signal block 5, and the first half of synchronization signal block 6, synchronization signal block 3 occupies OFDM symbols numbered 14 to 17, synchronization signal block 4 occupies OFDM symbols numbered 18 to 21, synchronization signal block 5 occupies OFDM symbols numbered 22 to 25, and synchronization signal block 6 occupies OFDM symbols numbered 26 to 29.

The slot 2 includes a second half of the synchronization signal block 6, a synchronization signal block 7, a synchronization signal block 8, and a synchronization signal block 9, the synchronization signal block 7 occupies OFDM symbols numbered 30 to 33, the synchronization signal block 8 occupies OFDM symbols numbered 34 to 37, and the synchronization signal block 9 occupies OFDM symbols numbered 38 to 41.

Slot 3 includes sync signal block 10, sync signal block 11, sync signal block 12 and the first half of sync signal block 13, sync signal block 10 occupies OFDM symbols numbered 42 to 45, sync signal block 11 occupies OFDM symbols numbered 46 to 49, sync signal block 12 occupies OFDM symbols numbered 50 to 53, and sync signal block 13 occupies OFDM symbols numbered 54 to 57.

Slot 4 includes the second half of synchronization signal block 13, synchronization signal block 14 and synchronization signal block 15, synchronization signal block 14 occupying OFDM symbols numbered 58 to 61, and synchronization signal block 15 occupying OFDM symbols numbered 62 to 65.

As shown in fig. 8, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is 2+4×n, n=0, 1, …,15, that is, the indexes of the first OFDM symbol occupied by each of the synchronization signal blocks 0 to 15 in the half radio frame are {2,6,10,14,18,22,26,30,34,38,42,46,50,54,58,62}, in sequence. Wherein the synchronization signal blocks 6 and 13 are mapped across slots, respectively.

Another possible implementation is that, as shown in fig. 9, slot 0 includes a synchronization signal block 0, a synchronization signal block 1 and a synchronization signal block 2, where the synchronization signal block 0 occupies OFDM symbols numbered 2 to 5, the synchronization signal block 1 occupies OFDM symbols numbered 6 to 9, and the synchronization signal block 2 occupies OFDM symbols numbered 10 to 13.

The slot 2 includes the second half of the synchronization signal block 6, the synchronization signal block 7, the synchronization signal block 8, and the first half of the synchronization signal block 9, the synchronization signal block 7 occupies OFDM symbols numbered 30 to 33, the synchronization signal block 8 occupies OFDM symbols numbered 36 to 39, and the synchronization signal block 9 occupies OFDM symbols numbered 40 to 43.

The slot 3 includes a second half of the synchronization signal block 9, a synchronization signal block 10, a synchronization signal block 11, and a synchronization signal block 12, the synchronization signal block 10 occupies OFDM symbols numbered 44 to 47, the synchronization signal block 11 occupies OFDM symbols numbered 48 to 51, and the synchronization signal block 12 occupies OFDM symbols numbered 52 to 55.

Slot 4 includes synchronization signal block 13, synchronization signal block 14, and synchronization signal block 15, synchronization signal block 13 occupying OFDM symbols numbered 56 to 59, synchronization signal block 14 occupying OFDM symbols numbered 60 to 63, and synchronization signal block 15 occupying OFDM symbols numbered 64 to 67.

As shown in fig. 9, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {2,36} +4×n, n=0, 1, …,7, that is, the indexes of the first OFDM symbol occupied by each of the synchronization signal blocks 0 to 15 in the half radio frame are {2,6,10,14,18,22,26,30,36,40,44,48,52,56,60,64}, in sequence. Wherein the synchronization signal blocks 6 and 9 are mapped across slots, respectively.

By the above mapping method, the present application provides a mapping method of 16 synchronization signal blocks within half a radio frame, i.e. 5 ms time window, when the carrier frequency is in the range of 3GHz to 6GHz, scs=30 KHz or scs=15 KHz. In general, the network device needs to send the synchronization signal blocks to the terminal device, where the network device may send at least one synchronization signal block to the terminal device in the time domain of half a radio frame, that is, in a 5 ms time window, and the number of synchronization signal blocks actually sent by the network device in the 5 ms time window may be less than or equal to 16. The transmission method of the synchronization signal block is described in detail below with reference to the embodiments.

Fig. 10 is a flowchart of a transmission method of a synchronization signal block according to the present application. As shown in fig. 10, the transmission method of the synchronization signal block according to the present embodiment includes the following steps:

in step 1001, the network device determines the positions of 16 synchronization signal blocks in half a radio frame.

In this embodiment, the carrier frequency of the wireless signal transmitted by the network device is in the range of 3GHz to 6 GHz. The network device may transmit a maximum of 16 synchronization signal blocks within a 5 millisecond time window. The network device determines the positions of 16 synchronization signal blocks within half a radio frame, i.e. a 5 ms time window, before sending the synchronization signal blocks to the terminal device.

Specifically, the network device determines the positions of 16 synchronization signal blocks in a half radio frame, including: and the network equipment maps each synchronous signal block in the 16 synchronous signal blocks to an OFDM symbol corresponding to the half wireless frame, wherein each synchronous signal block occupies 4 OFDM symbols.

When the carrier frequency is in the range of 3GHz to 6GHz, scs=30 KHz, 1 slot is 0.5 ms, half a radio frame includes 10 slots in the time domain, i.e., 5 ms time window, each slot includes 14 OFDM symbols in the time domain, and then the half a radio frame includes 140 OFDM symbols in the time domain. In this scenario, mapping 16 sync signal blocks in half a radio frame can be seen as mapping 16 sync signal blocks on the 140 OFDM symbols. The specific mapping method may refer to the mapping method shown in fig. 5, fig. 6, or fig. 7 in the foregoing embodiments, and will not be described herein.

When the carrier frequency is in the range of 3GHz to 6GHz, scs=15 KHz, 1 slot is 1 ms, and half a radio frame includes 5 slots in the time domain, i.e., 5 ms time window, each slot includes 14 OFDM symbols in the time domain, and then the half radio frame includes 70 OFDM symbols in the time domain. In this scenario, mapping 16 synchronization signal blocks in half a radio frame can be seen as mapping 16 synchronization signal blocks on the 70 OFDM symbols. The specific mapping method may refer to the mapping method shown in fig. 8 or fig. 9 in the foregoing embodiment, and will not be described herein.

Step 1002, the network device sends at least one synchronization signal block to a terminal device.

After the network device determines the positions of the 16 synchronization signal blocks in the half radio frame, at least one synchronization signal block is transmitted to the terminal device within the half radio frame, i.e. 5 ms time window, and at most 16 synchronization signal blocks are transmitted.

In this embodiment, the network device determines the positions of 16 synchronization signal blocks in a half radio frame, and sends at least one synchronization signal block to the terminal device in a time corresponding to the half radio frame, so that the terminal device can send more synchronization signal blocks in a 5 ms time window, and the more the synchronization signal blocks sent in each beam direction, the more 8 synchronization signal blocks can be sent in the same beam direction by the terminal device compared with the network device in the 5 ms time window, so that the terminal device can receive more synchronization signal blocks in the same beam direction, thereby obtaining a larger gain and meeting the coverage requirement of the synchronization signal of the next generation wireless communication system.

Based on the above embodiment, the network device may further identify a maximum of 16 synchronization signal blocks that may be included in a half radio frame, specifically, the 16 synchronization signal blocks are numbered 0 to 15, the 16 synchronization signal blocks are identified by using a binary number of 4 bits, for example, the synchronization signal block 0 is identified by a binary number 0000 of 4 bits, the synchronization signal block 1 is identified by a binary number 0001 of 4 bits, and so on, and the synchronization signal block 15 is identified by a binary number 1111 of 4 bits. The specific identification manner is not limited by the schematic illustration, and other identification manners are also possible in other embodiments, for example, the synchronization signal block 0 is identified by a binary number 1111 with 4 bits, the synchronization signal block 1 is identified by a binary number 1110 with 4 bits, and so on, and the synchronization signal block 15 is identified by a binary number 0000 with 4 bits.

When the network device sends the synchronization signal block to the terminal device, the network device may carry the identification information of the synchronization signal block in the synchronization signal block. Specifically, when the synchronization signal block sent by the network device to the terminal device in the half radio frame, that is, in the 5 ms time window is 16, the network device may carry the identification information of each of the 16 synchronization signal blocks in the respective synchronization signal block. When the synchronization signal block transmitted by the network device to the terminal device in the half radio frame, i.e., the 5 ms time window, is less than 16, the network device may carry identification information of the synchronization signal actually transmitted in the synchronization signal block actually transmitted.

For clarity of description, this embodiment may be schematically illustrated by taking any of the mapping manners shown in fig. 5, 6, 7, 8, and 9 as an example, and for example, mode 1 in fig. 7 is schematically illustrated.

As shown in fig. 11, when the network device transmits 16 synchronization signal blocks to the terminal device within a 5 ms time window, the network device may carry identification information 0000 of synchronization signal block 0 in synchronization signal block 0, identification information 0001 of synchronization signal block 1 in synchronization signal block 1, and so on, identification information 1111 of synchronization signal block 15 in synchronization signal block 15.

As shown in fig. 11, when the network device transmits less than 16 synchronization signal blocks to the terminal device within the 5 ms time window, for example, the network device actually transmits 8 synchronization signal blocks numbered odd to the terminal device within the 5 ms time window, the network device may carry the identification information 0001 of the synchronization signal block 1 in the synchronization signal block 1, the identification information 0011 of the synchronization signal block 3 in the synchronization signal block 3, and so on, the identification information 1111 of the synchronization signal block 15 in the synchronization signal block 15.

As shown in fig. 2, each synchronization signal block occupies 4 OFDM symbols in the time domain, wherein the primary synchronization signal PSS occupies 1 OFDM symbol, the secondary synchronization signal SSS and a part of the physical broadcast channel PBCH occupy 1 OFDM symbol, and the remaining PBCH occupies 2 OFDM symbols, and how the identification information of each synchronization signal block is carried in the synchronization signal block will be described in detail below.

In the embodiment of the present application, the network device carrying the identification information of the synchronization signal block in the synchronization signal block may include the following possible implementations:

one possible implementation manner is that the network device carries the identification information of the synchronization signal block in a physical broadcast channel PBCH included in the synchronization signal block.

Specifically, the network device may carry all the identification information of 4 bits of the synchronization signal block in the physical broadcast channel PBCH. For example, fig. 2 shows a schematic structure of the synchronization signal block 1, and the network device may carry all the identification information 0001 of the synchronization signal block 1 in the physical broadcast channel PBCH included in the synchronization signal block 1.

Another possible implementation manner is that the network device carries the identification information of the synchronization signal block in a demodulation reference signal DMRS of the PBCH included in the synchronization signal block.

Specifically, the network device may carry all the identification information of 4 bits of the synchronization signal block in the demodulation reference signal (DeModulation Reference Signal, DMRS) of the PBCH included in the synchronization signal block. The synchronization signal block may include both the PBCH-DMRS and the PBCH, and the PBCH-DMRS and the PBCH may occupy different subcarriers in the same synchronization signal block. Wherein, the PBCH-DMRS can implicitly carry the identification information of the synchronous signal block, and the PBCH can explicitly carry the identification information of the synchronous signal block.

Specifically, one way to generate the PBCH-DMRS sequence is to use c _init And initializing a PBCH-DMRS sequence generator, and generating the PBCH-DMRS sequence by the PBCH-DMRS sequence generator. c _init Is an initialization parameter at the time of PBCH-DMRS sequence generation. c _init The definition of (2) is specifically shown in the following formula (1):

wherein i is _SSB A decimal number corresponding to the identification information 4 bits representing the synchronization signal block,representing cell identity, n _hf Represents field number, and n _hf ＝0。

The network device carries partial bits corresponding to the identification information of the synchronous signal block in a PBCH included in the synchronous signal block; the network device carries the remaining bits of the identification information of the synchronization signal block in a demodulation reference signal DMRS of the PBCH included in the synchronization signal block.

Specifically, the network device may carry a part of bits in the identification information of 4 bits of the synchronization signal block in the PBCH of the synchronization signal block, and carry the remaining bits in the identification information of 4 bits of the synchronization signal block in the demodulation reference signal DMRS of the PBCH included in the synchronization signal block. Wherein, the PBCH-DMRS implicitly carries part of bits, and the PBCH explicitly carries the rest bits.

For example, fig. 2 shows a schematic structure of a synchronization signal block 1, where the identification information of the synchronization signal block 1 is 000 1, the network device may carry the lowest 3 bits, e.g., 001, of 0001 through the PBCH-DMRS of synchronization signal block 1, and the highest 1 bit, e.g., 0, through the PBCH of synchronization signal block 1. At this time, i in equation 1 _SSB Decimal number corresponding to the lowest 3 bits of the identification information 0001 representing the synchronization signal block 1.

In other embodiments, the network device is not limited to carrying the lowest 3 bits in the 4-bit identification information through the PBCH-DMRS of the synchronization signal block 1, but may also carry part of the bits such as the lowest 2 bits, the highest 2 bits, the lowest 1 bits, or the highest 3 bits in the 4-bit identification information in the PBCH-DMRS, and the remaining bits in the PBCH.

In this embodiment, the network device carries the identification information of each synchronization signal block actually transmitted in the network device in each synchronization signal block, and when the terminal device receives one synchronization signal block, the terminal device can know which synchronization signal block the network device transmits to the terminal device through the identification information carried in the synchronization signal block, and in addition, the terminal device can know which synchronization signal block the network device transmits to the terminal device through the identification information carried in at least one synchronization signal block received in a half radio frame, that is, a 5 millisecond time window, so that the communication efficiency between the network device and the terminal device is improved.

The network device may use any mapping manner described in the foregoing embodiment to map 16 synchronization signal blocks in a half radio frame, and then may send at least one synchronization signal block to the terminal device in a time corresponding to the half radio frame, and since the number of synchronization signal blocks actually sent by the network device may not be 16, in this embodiment, the network device may further send indication information to the terminal device, where the indication information is used to indicate the at least one synchronization signal block sent by the network device, for example, the network device may notify the terminal device through the indication information which one or more of the 16 synchronization signal blocks actually sent by the network device. The network device sending the indication information to the terminal device includes the following possible implementations:

one possible implementation is: the indication information sent by the network device to the terminal device may be a 16-bit map, where each bit in the 16-bit map is used to indicate whether one of the 16 synchronization signal blocks is actually sent, for example, when a certain bit is 0, it indicates that the network device does not send the synchronization signal block corresponding to the bit to the terminal device, and when the bit is 1, it indicates that the network device actually sends the synchronization signal block corresponding to the bit to the terminal device.

Another possible implementation is: a two-layer indication method is used to indicate at least one synchronization signal block actually transmitted by the network device. Specifically, the 16 synchronization signal blocks are divided into a plurality of synchronization signal block groups, and as shown in fig. 12, the 16 synchronization signal blocks are divided into 4 synchronization signal block groups, each of which includes 4 synchronization signal blocks, for example, the 1 st, 2 nd, 3 rd and 4 th groups include 4 synchronization signal blocks, respectively. The indication information sent by the network device to the terminal device may specifically include first information and second information, the first information may be a 4-bit map, the second information may be a 4-bit map, that is, the indication information may specifically include two 4-bit maps, one of the 4-bit maps is used for indicating a target synchronization signal block group to which the synchronization signal block actually transmitted by the network device belongs in the 4 synchronization signal block groups, and the other 4-bit map is used for indicating the synchronization signal block actually transmitted by the network device in the target synchronization signal block group. The present embodiment does not limit the order of the two 4-bit maps.

The two 4-bit maps may form an 8-bit sequence, and optionally, in the 8-bit sequence, the first 4-bit map is used to indicate a synchronization signal block actually sent by the network device in the target synchronization signal block group, and the second 4-bit map is used to indicate a target synchronization signal block group to which the synchronization signal block actually sent by the network device in the 4 synchronization signal block groups belongs. For example, the bit sequence of 8 bits is 00110001, which indicates that the synchronization signal blocks actually transmitted by the network device to the terminal device are the 3 rd synchronization signal block and the 4 th synchronization signal block in the 4 th synchronization signal block group, and if the 16 synchronization signal blocks are numbered 0 to 15, the synchronization signal blocks actually transmitted by the network device to the terminal device are the synchronization signal block 14 and the synchronization signal block 15 in the 16 synchronization signal blocks.

Similarly, if the bit sequence of the 8 bits is 00110011, it means that the synchronization signal blocks actually transmitted by the network device to the terminal device are the 3 rd synchronization signal block and the 4 th synchronization signal block in the 3 rd synchronization signal block group, and the 3 rd synchronization signal block and the 4 th synchronization signal block in the 4 th synchronization signal block group, and if the 16 synchronization signal blocks are numbered 0 to 15, the synchronization signal blocks actually transmitted by the network device to the terminal device are the synchronization signal block 10, the synchronization signal block 11, the synchronization signal block 14, and the synchronization signal block 15 in the 16 synchronization signal blocks.

In addition, the network device may transmit the indication information to the terminal device through radio resource control (Radio Resource Control, RRC) signaling.

In this embodiment, the indication information is sent to the terminal device by the network device, through which the network device can inform the terminal device which one or more of the 16 synchronization signal blocks the actually sent synchronization signal block is, and in addition, at least one synchronization signal block actually sent by the network device is indicated by the two-layer indication method, so that the indication information from 16 bits to 8 bits of the network device is reduced, and the network resource utilization rate is improved.

Fig. 13 is a schematic structural diagram of a communication device according to an embodiment of the present application. As shown in fig. 13, the communication device 130 includes: a determining module 131 and a transmitting module 132; the determining module 131 is configured to determine positions of 16 synchronization signal blocks in half a radio frame; a transmitting module 132, configured to transmit the at least one synchronization signal block to a terminal device in a time corresponding to the half radio frame; wherein the carrier frequency is in the range of 3GHz to 6 GHz.

In fig. 13, further, when the determining module 131 determines the positions of 16 synchronization signal blocks in a half radio frame, it is specifically configured to map each synchronization signal block of the 16 synchronization signal blocks onto an OFDM symbol corresponding to the half radio frame, where each synchronization signal block occupies 4 OFDM symbols; the subcarrier spacing is 30KHz, the half radio frame comprises 10 time slots in the time domain, each time slot comprises 14 OFDM symbols in the time domain, and the 140 OFDM symbols corresponding to the half radio frame are numbered 0 to 139.

In the above embodiment, when the determining module 131 maps each of the 16 synchronization signal blocks to the OFDM symbol corresponding to the half radio frame, the determining module is specifically configured to: mapping the first 8 synchronous signal blocks in the 16 synchronous signal blocks to OFDM symbols corresponding to the first 5 time slots in the half wireless frame in a first mapping mode; and mapping the last 8 synchronous signal blocks in the 16 synchronous signal blocks to OFDM symbols corresponding to the last 5 time slots in the half wireless frame in a second mapping mode.

In the above embodiment, the first mapping manner and the second mapping manner are the same.

In the above embodiment, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {2,8,72,78} +14×n, n=0, 1,2,3.

In the above embodiment, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {4,8,16,20,74,78,86,90} +28×n, n=0, 1.

In the above embodiment, the first mapping manner and the second mapping manner are mirror images of each other.

In the above embodiment, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {2,8,86,92} +14×n, n=0, 1,2,3.

In the above embodiment, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {4,8,16,20,88,92,100,104} +28×n, n=0, 1.

In the above embodiment, when the determining module 131 maps each of the 16 synchronization signal blocks to the OFDM symbol corresponding to the half radio frame, the determining module is specifically configured to: the 16 synchronization signal blocks are mapped to OFDM symbols corresponding to the first 8 time slots in the half radio frame, and each time slot corresponds to two synchronization signal blocks.

In the above embodiment, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {2,8} +14×n, n=0, 1, …,7.

In the above embodiment, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {4,8,16,20} +28×n, n=0, 1,2,3.

In the above embodiment, the subcarrier spacing is 15KHz, the half radio frame includes 5 slots in the time domain, each slot includes 14 OFDM symbols in the time domain, and the number of 70 OFDM symbols corresponding to the half radio frame is 0 to 69.

In the above embodiment, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is 2+4×n, n=0, 1, …,15.

In the above embodiment, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {2,36} +4×n, n=0, 1, …,7.

In the above embodiment, the communication device 30 further includes an identification module 133, where the identification module 133 is configured to carry identification information of the synchronization signal block in the synchronization signal block.

In the above embodiment, the identification module 133 is specifically configured to carry the identification information of the synchronization signal block in the physical broadcast channel PBCH included in the synchronization signal block.

In the above embodiment, the identification module 133 is specifically configured to carry the identification information of the synchronization signal block in the demodulation reference signal DMRS of the PBCH included in the synchronization signal block.

In the above embodiment, the identification module 133 is specifically configured to carry a portion of bits corresponding to the identification information of the synchronization signal block in the PBCH included in the synchronization signal block; and carrying the remaining bits of the identification information of the synchronization signal block in a demodulation reference signal (DMRS) of the PBCH included in the synchronization signal block.

In the above embodiment, the sending module 132 is further configured to: and sending indication information to the terminal equipment, wherein the indication information is used for indicating the at least one synchronous signal block sent by the network equipment.

In the above embodiment, the 16 synchronization signal blocks are divided into a plurality of synchronization signal block groups, each synchronization signal block group including at least one synchronization signal block; the indication information comprises first information and second information, wherein the first information is used for indicating a target synchronous signal block group in a plurality of synchronous signal block groups, and the target synchronous signal block group comprises at least one synchronous signal block sent by the network equipment; the second information is used to indicate the at least one synchronization signal block sent by the network device in the target synchronization signal block group.

The communication device of the embodiment shown in fig. 13 may be used to implement the technical solution of the above-mentioned method embodiment, and its implementation principle and technical effects are similar, and are not repeated here.

It should be understood that the above division of the modules of the network device is merely a division of a logic function, and may be fully or partially integrated into a physical entity or may be physically separated when actually implemented. And these modules may all be implemented in software in the form of calls by the processing element; or can be realized in hardware; the method can also be realized in a mode that part of the modules are called by processing elements through software, and part of the modules are realized in a mode that hardware is adopted. For example, the determining module may be a processing element that is set up separately, may be implemented in a chip of the network device, or may be stored in a memory of the network device in a program form, and the functions of the above modules are called and executed by a processing element of the network device. The implementation of the other modules is similar. In addition, all or part of the modules can be integrated together or can be independently implemented. The processing element described herein may be an integrated circuit having signal processing capabilities. In implementation, each step of the above method or each module above may be implemented by an integrated logic circuit of hardware in a processor element or an instruction in a software form.

For example, the modules above may be one or more integrated circuits configured to implement the methods above, such as: one or more specific integrated circuits (Application Specific Integrated Circuit, ASIC), or one or more microprocessors (digital singnal processor, DSP), or one or more field programmable gate arrays (Field Programmable Gate Array, FPGA), or the like. For another example, when a module above is implemented in the form of a processing element scheduler, the processing element may be a general purpose processor, such as a central processing unit (Central Processing Unit, CPU) or other processor that may invoke the program. For another example, the modules may be integrated together and implemented in the form of a system-on-a-chip (SOC).

Fig. 14 is a schematic structural diagram of another network device according to an embodiment of the present application. As shown in fig. 14, the network device 140 includes: a memory 141, a processor 142 and a transmitter 143, wherein the memory 141 is for storing a computer program; the processor 142 invokes the computer program which, when executed, is operative to perform the following operations: determining the positions of 16 synchronous signal blocks in half a wireless frame; the transmitter 143 is configured to transmit the at least one synchronization signal block to the terminal device in a time corresponding to the half radio frame; wherein the carrier frequency is in the range of 3GHz to 6 GHz.

In fig. 14, further, when the processor 142 determines the positions of 16 synchronization signal blocks in half a radio frame, it is specifically configured to: mapping each of 16 synchronous signal blocks to an OFDM symbol corresponding to the half radio frame, wherein each synchronous signal block occupies 4 OFDM symbols; the subcarrier spacing is 30KHz, the half radio frame comprises 10 time slots in the time domain, each time slot comprises 14 OFDM symbols in the time domain, and the 140 OFDM symbols corresponding to the half radio frame are numbered 0 to 139.

In the above embodiment, when the processor 142 maps each of the 16 synchronization signal blocks to the OFDM symbol corresponding to the half radio frame, the method is specifically used for: mapping the first 8 synchronous signal blocks in the 16 synchronous signal blocks to OFDM symbols corresponding to the first 5 time slots in the half wireless frame in a first mapping mode; and mapping the last 8 synchronous signal blocks in the 16 synchronous signal blocks to OFDM symbols corresponding to the last 5 time slots in the half wireless frame in a second mapping mode.

In the above embodiment, when the processor 142 maps each of the 16 synchronization signal blocks to the OFDM symbol corresponding to the half radio frame, the method is specifically used for: the 16 synchronization signal blocks are mapped to OFDM symbols corresponding to the first 8 time slots in the half radio frame, and each time slot corresponds to two synchronization signal blocks.

In the above embodiment, the processor 142 is further configured to: the identification information of the synchronization signal block is carried in the synchronization signal block.

In the above embodiment, the processor 142 is specifically configured to carry the identification information of the synchronization signal block in the physical broadcast channel PBCH included in the synchronization signal block.

In the above embodiment, the processor 142 is specifically configured to carry the identification information of the synchronization signal block in the demodulation reference signal DMRS of the PBCH included in the synchronization signal block.

In the above embodiment, the processor 142 is specifically configured to carry a portion of bits corresponding to the identification information of the synchronization signal block in the PBCH included in the synchronization signal block; and carrying the remaining bits of the identification information of the synchronization signal block in a demodulation reference signal (DMRS) of the PBCH included in the synchronization signal block.

In the above embodiment, the transmitter is further configured to: and sending indication information to the terminal equipment, wherein the indication information is used for indicating the at least one synchronous signal block sent by the network equipment.

The network device of the embodiment shown in fig. 14 may be used to implement the technical solution of the above-mentioned method embodiment, and its implementation principle and technical effects are similar, and are not repeated here.

Fig. 15 is a schematic structural diagram of still another network device according to an embodiment of the present application. The network device may specifically be a base station, as shown in fig. 15, where the base station includes: antenna 150, radio frequency device 160, baseband device 170. The antenna 150 is connected to a radio frequency device 160. In the uplink direction, the radio frequency device 160 receives information transmitted from the terminal via the antenna 150, and transmits the information transmitted from the terminal to the baseband device 170 for processing. In the downlink direction, the baseband device 170 processes information of the terminal and transmits the processed information to the radio frequency device 160, and the radio frequency device 160 processes information of the terminal and transmits the processed information to the terminal through the antenna 150.

The above network device may be located in the baseband apparatus 170, and in one implementation, the above modules are implemented in the form of a processing element scheduler, for example, the baseband apparatus 170 includes a processing element 171 and a storage element 172, and the processing element 171 invokes the program stored in the storage element 172 to perform the method in the above method embodiment. The baseband device 170 may further include an interface 173, such as a common public radio interface (common public radio interface, CPRI), for interacting with the radio frequency device 160.

In another implementation, the above modules may be one or more processing elements configured to implement the above methods, which are disposed on the baseband apparatus 170, where the processing elements may be integrated circuits, for example: one or more ASICs, or one or more DSPs, or one or more FPGAs, etc. These integrated circuits may be integrated together to form a chip.

For example, the above modules may be integrated together, implemented in the form of a system-on-a-chip (SOC), e.g., the baseband apparatus 170 includes an SOC chip, for implementing the above method. The processing element 171 and the storage element 172 may be integrated within the chip, and the functions of the above methods or the above modules may be implemented in the form of stored programs called by the processing element 171 into the storage element 172; alternatively, at least one integrated circuit may be integrated within the chip for implementing the above method or the functions of the above respective modules; alternatively, the functions of some modules may be implemented in the form of a processing element calling program, and the functions of some modules may be implemented in the form of an integrated circuit, in combination with the above implementations.

Regardless of the manner, the above network device comprises at least one processing element, a storage element and a communication interface, wherein the at least one processing element is adapted to perform the methods provided by the above method embodiments. The processing element may be configured in a first manner: i.e. executing part or all of the steps in the above method embodiments in a manner that executes the program stored by the storage element; the second way is also possible: i.e. by means of integrated logic circuitry of hardware in the processor element in combination with instructions to perform some or all of the steps in the above method embodiments; of course, the method provided by the above method embodiment may also be performed in combination with the first mode and the second mode.

The processing elements herein, as described above, may be general-purpose processors, such as a central processing unit (Central Processing Unit, CPU), or one or more integrated circuits configured to implement the above methods, such as: one or more specific integrated circuits (Application Specific Integrated Circuit, ASIC), or one or more microprocessors (digital singnal processor, DSP), or one or more field programmable gate arrays (Field Programmable Gate Array, FPGA), or the like. The memory element may be one memory or may be a collective term for a plurality of memory elements.

In addition, an embodiment of the present application further provides a computer readable storage medium, where a computer program is stored, which when executed on a computer, causes the computer to execute the method for transmitting a synchronization signal block described in the foregoing embodiment.

Furthermore, an embodiment of the present application provides a computer program product, where the computer program product includes a computer program, which when executed on a computer, causes the computer to execute the method for transmitting a synchronization signal block according to the above embodiment.

Fig. 16 is a schematic structural diagram of another communication device according to an embodiment of the present application. As shown in fig. 16, the communication device 160 includes: a receiving module 161 and an access module 162; the receiving module 161 is configured to receive at least one synchronization signal block sent by a network device; the access module 162 is used for accessing cells.

The communication device of the embodiment shown in fig. 16 may be used to implement the technical solution of the above-mentioned method embodiment, and its implementation principle and technical effects are similar, and are not repeated here.

Fig. 17 is a schematic structural diagram of a terminal device according to an embodiment of the present application. As shown in fig. 17, the terminal device 170 includes: a memory 171, a processor 172 and a receiver 173, wherein the memory 171 is for storing a computer program; the processor 172 invokes the computer program which, when executed, is operative to perform the following operations: receiving, by the receiver 173, at least one synchronization signal block transmitted by a network device; and accessing the cell according to the at least one synchronous signal block.

The terminal device of the embodiment shown in fig. 17 may be used to implement the technical solution of the foregoing method embodiment, and its implementation principle and technical effects are similar, and are not described herein again.

In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions in accordance with the present application are produced in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by a wired (e.g., coaxial cable, fiber optic, digital subscriber line), or wireless (e.g., infrared, wireless, microwave, etc.). The computer readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that contains an integration of one or more available media. The usable medium may be a magnetic medium (e.g., floppy Disk, hard Disk, tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid State Disk), etc.

Claims

1. A method for transmitting a synchronization signal block, comprising:

the network equipment determines the positions of 16 synchronous signal blocks in half a wireless frame;

the network equipment sends at least one synchronous signal block to terminal equipment;

wherein the carrier frequency is in the range of 3GHz to 6 GHz;

the subcarrier interval is 30KHz, the half radio frame comprises 10 time slots in the time domain, each time slot comprises 14 OFDM symbols in the time domain, and the 140 OFDM symbols corresponding to the half radio frame are numbered from 0 to 139;

or,

the subcarrier interval is 15KHz, the half radio frame comprises 5 time slots in the time domain, each time slot comprises 14 OFDM symbols in the time domain, and the number of 70 OFDM symbols corresponding to the half radio frame is 0 to 69.

2. The method of claim 1, wherein when the subcarrier spacing is 30KHz, the half radio frame includes 10 slots in the time domain, each slot includes 14 OFDM symbols in the time domain, and the number of 140 OFDM symbols corresponding to the half radio frame is 0 to 139, the network device determining the position of 16 synchronization signal blocks in the half radio frame comprises:

and the network equipment maps each synchronous signal block in the 16 synchronous signal blocks to the OFDM symbol corresponding to the half wireless frame, wherein each synchronous signal block occupies 4 OFDM symbols.

3. The method of claim 2, wherein the network device mapping each of the 16 synchronization signal blocks onto an OFDM symbol corresponding to the half radio frame comprises:

and the network equipment maps the last 8 synchronous signal blocks in the 16 synchronous signal blocks to OFDM symbols corresponding to the last 5 time slots in the half wireless frame in a second mapping mode.

4. A method according to claim 3, wherein the first and second mapping patterns are the same.

5. The method of claim 4 wherein the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks within the half radio frame is {2,8,72,78} +14 x n, n=0, 1,2,3.

6. The method of claim 4 wherein the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks within the half radio frame is {4,8,16,20,74,78,86,90} +28 x n, n=0, 1.

7. A method according to claim 3, wherein the first and second mapping patterns are mirror images of each other.

8. The method of claim 7 wherein the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks within the half radio frame is {2,8,86,92} +14 x n, n=0, 1,2,3.

9. The method of claim 7 wherein the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks within the half radio frame is {4,8,16,20,88,92,100,104} +28 x n, n=0, 1.

10. The method of claim 2, wherein the network device mapping each of the 16 synchronization signal blocks onto an OFDM symbol corresponding to the half radio frame comprises:

the network device maps the 16 synchronization signal blocks to OFDM symbols corresponding to the first 8 slots in the half radio frame, where each slot corresponds to two synchronization signal blocks.

11. The method of claim 10 wherein the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks within the half radio frame is {2,8} +14 x n, n=0, 1, …,7.

12. The method of claim 10 wherein the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks within the half radio frame is {4,8,16,20} +28 x n, n=0, 1,2,3.

13. The method of claim 1 wherein when the subcarrier spacing is 15KHz, the half radio frame comprises 5 slots in the time domain, each slot comprises 14 OFDM symbols in the time domain, the number of the corresponding 70 OFDM symbols in the half radio frame is 0 to 69, and the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is 2+4 x n, n=0, 1, …,15.

14. The method of claim 1 wherein when the subcarrier spacing is 15KHz, the half radio frame comprises 5 slots in the time domain, each slot comprises 14 OFDM symbols in the time domain, the number of the corresponding 70 OFDM symbols in the half radio frame is 0 to 69, and the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {2,36} +4n, n=0, 1, …,7.

15. The method according to any one of claims 1-14, further comprising:

16. The method of claim 15, wherein the network device carrying identification information of the synchronization signal block in the synchronization signal block comprises:

17. The method of claim 15, wherein the network device carrying identification information of the synchronization signal block in the synchronization signal block comprises:

the network device carries the identification information of the synchronization signal block in a demodulation reference signal (DMRS) of a PBCH included in the synchronization signal block.

18. The method of claim 15, wherein the network device carrying identification information of the synchronization signal block in the synchronization signal block comprises:

the network equipment carries partial bits corresponding to the identification information of the synchronous signal block in a PBCH included in the synchronous signal block;

the network device carries the remaining bits of the identification information of the synchronization signal block in a demodulation reference signal DMRS of the PBCH included in the synchronization signal block.

19. The method according to claim 1, wherein the method further comprises:

the network device sends indication information to the terminal device, wherein the indication information is used for indicating the at least one synchronous signal block sent by the network device.

20. The method of claim 19, wherein the 16 synchronization signal blocks are divided into a plurality of synchronization signal block groups, each synchronization signal block group including at least one synchronization signal block;

the second information is used for indicating the at least one synchronization signal block sent by the network device in the target synchronization signal block group.

21. A communication device, comprising:

a transmitting module, configured to transmit at least one synchronization signal block to a terminal device;

wherein the carrier frequency is in the range of 3GHz to 6 GHz;

or,

22. The communication apparatus according to claim 21, wherein when the subcarrier spacing is 30KHz, the half radio frame includes 10 slots in the time domain, each slot includes 14 OFDM symbols in the time domain, and the number of 140 OFDM symbols corresponding to the half radio frame is 0 to 139, the determining module is specifically configured to, when determining the position of 16 synchronization signal blocks in the half radio frame:

mapping each of the 16 synchronous signal blocks to an OFDM symbol corresponding to the half radio frame, wherein each synchronous signal block occupies 4 OFDM symbols.

23. The communication apparatus of claim 22, wherein when the determining module maps each of the 16 synchronization signal blocks to an OFDM symbol corresponding to the half radio frame, the determining module is specifically configured to:

24. The communication apparatus of claim 23, wherein the first mapping scheme and the second mapping scheme are the same.

25. The communication apparatus of claim 24, wherein the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {2,8,72,78} +14 x n, n=0, 1,2,3.

26. The communication apparatus of claim 24, wherein the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {4,8,16,20,74,78,86,90} +28 x n, n=0, 1.

27. The communication apparatus of claim 23, wherein the first and second mapping patterns are mirror images of each other.

28. The communication apparatus of claim 27, wherein the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {2,8,86,92} +14 x n, n=0, 1,2,3.

29. The communication apparatus of claim 27, wherein the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {4,8,16,20,88,92,100,104} +28 x n, n=0, 1.

30. The communication apparatus of claim 22, wherein when the determining module maps each of the 16 synchronization signal blocks to an OFDM symbol corresponding to the half radio frame, the determining module is specifically configured to:

and mapping the 16 synchronous signal blocks to OFDM symbols corresponding to the first 8 time slots in the half wireless frame, wherein each time slot corresponds to two synchronous signal blocks.

31. The communication apparatus of claim 30, wherein the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {2,8} +14 x n, n=0, 1, …,7.

32. The communication apparatus of claim 30, wherein the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {4,8,16,20} +28 x n, n=0, 1,2,3.

33. The communication apparatus of claim 21, wherein when the subcarrier spacing is 15KHz, the half radio frame includes 5 slots in the time domain, each slot includes 14 OFDM symbols in the time domain, and the number of 70 OFDM symbols corresponding to the half radio frame is 0 to 69, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is 2+4 x n, n=0, 1, …,15.

34. The communication apparatus of claim 21, wherein when the subcarrier spacing is 15KHz, the half radio frame includes 5 slots in the time domain, each slot includes 14 OFDM symbols in the time domain, and the number of 70 OFDM symbols corresponding to the half radio frame is 0 to 69, the index of the first OFDM symbol occupied by each of the 16 synchronization signal blocks in the half radio frame is {2,36} +4 x n, n=0, 1, …,7.

35. The communication device according to any one of claims 21-34, further comprising:

and the identification module is used for carrying the identification information of the synchronous signal block in the synchronous signal block.

36. The communication apparatus according to claim 35, wherein the identification module is specifically configured to carry identification information of the synchronization signal block in a physical broadcast channel PBCH included in the synchronization signal block.

37. The communication apparatus according to claim 35, wherein the identification module is specifically configured to carry identification information of the synchronization signal block in a demodulation reference signal DMRS of a PBCH included in the synchronization signal block.

38. The communication device according to claim 35, wherein the identification module is specifically configured to carry a portion of bits corresponding to identification information of the synchronization signal block in a PBCH included in the synchronization signal block; and carrying the remaining bits of the identification information of the synchronous signal block in a demodulation reference signal (DMRS) of the PBCH included in the synchronous signal block.

39. The communication device of claim 21, wherein the transmitting module is further configured to:

and sending indication information to the terminal equipment, wherein the indication information is used for indicating the at least one synchronous signal block sent by the sending module.

40. The communication device of claim 39, wherein the 16 synchronization signal blocks are divided into a plurality of synchronization signal block groups, each synchronization signal block group comprising at least one synchronization signal block;

the indication information comprises first information and second information, the first information is used for indicating a target synchronous signal block group in a plurality of synchronous signal block groups, and the target synchronous signal block group comprises at least one synchronous signal block sent by the sending module;

the second information is used for indicating the at least one synchronization signal block sent by the sending module in the target synchronization signal block group.

41. A communication device, comprising:

an interface and a processor, the interface and the processor coupled;

the processor is configured to perform the method of any of claims 1-20.

42. A method for transmitting a synchronization signal block, comprising:

the terminal equipment accesses a cell;

wherein the at least one synchronization channel block is at least one of 16 synchronization signal blocks that determine a position in a half radio frame for the network device;

wherein the carrier frequency is in the range of 3GHz to 6 GHz;

or,

43. A communication device, comprising:

the access module is used for accessing the cell;

wherein the carrier frequency is in the range of 3GHz to 6 GHz;

or,

44. A communication device, comprising:

an interface and a processor, the interface and the processor coupled;

the processor is configured to perform the method of claim 42.

45. A computer readable storage medium, characterized in that the computer readable storage medium has stored therein a computer program which, when run on a computer, causes the computer to perform the method according to any of claims 1-20.

46. A computer-readable storage medium, having stored therein a computer program which, when run on a computer, causes the computer to perform the method of claim 42.