WO2019157910A1

WO2019157910A1 - Synchronization signal block transmission method, communication device, and communication apparatus

Info

Publication number: WO2019157910A1
Application number: PCT/CN2019/072544
Authority: WO
Inventors: 向铮铮; 罗俊; 袁璞
Original assignee: 华为技术有限公司
Priority date: 2018-02-13
Filing date: 2019-01-21
Publication date: 2019-08-22
Also published as: CN110149294A; CN110149294B

Abstract

Embodiments of the present application provide a synchronization signal block transmission method, a communication device, and a communication apparatus. The method comprises: determining positions of 16 synchronization signal blocks in one half of a radio frame; and sending at least one synchronization signal block to a terminal apparatus within a time period corresponding to the half of the radio frame, wherein a carrier frequency is in a range of 3 GHz to 6 GHz. The positions of the 16 synchronization signal blocks in the half of the radio frame are determined by a network apparatus, and at least one synchronization signal block is sent to a terminal apparatus within a time period corresponding to the half of the radio frame, such that the terminal apparatus can send more synchronization signal blocks within a five-millisecond time window, and more synchronization signal blocks are sent in each beam direction. Compared with a network apparatus that can send up to eight synchronization signal blocks in a five-millisecond time window, the terminal apparatus can receive more synchronization signal blocks in the same beam direction, thereby obtaining greater gain and meeting synchronization signal coverage requirements of a next-generation wireless communication system.

Description

Method for transmitting synchronization signal block, communication device and communication device

This application claims the priority of the Chinese Patent Application filed on February 13, 2018, the Chinese Patent Office, Application No. 201101150972.7, the application of the name of the "synchronous signal block transmission method, communication device and communication device", the entire contents of which are incorporated by reference. Combined in this application.

Technical field

The present application relates to the field of communications technologies, and in particular, to a method for transmitting a synchronization signal block, a communication device, and a communication device.

Background technique

The synchronization signal block is a signal structure in the wireless network, and the synchronization signal block is sent by the network device of the wireless network to the terminal device, and the terminal device successfully receiving the synchronization signal block is a prerequisite for the terminal device to access the network.

When the carrier frequency and the subcarrier spacing are different, the number of synchronization signal blocks that the network device can send to the terminal device in a preset time is different. However, in some scenarios, the number of synchronization signal blocks that a network device can transmit at a preset time is small, which may not meet the coverage requirement of the synchronization signal of the next generation wireless communication system.

Summary of the invention

The embodiment of the present application provides a method for transmitting a synchronization signal block, a communication device, and a communication device to meet the coverage requirement of a synchronization signal of a next generation wireless communication system.

In a first aspect, the present application provides a method for transmitting a synchronization signal block, the method comprising: when a carrier frequency of a wireless signal transmitted by the network device is in a range of 3 GHz to 6 GHz, the network device is transmitting a synchronization signal block to the terminal device. The position of the 16 sync signal blocks in the half of the radio frame is determined, and the at least one sync signal block is further sent to the terminal device in the time corresponding to the half of the radio frame. Optionally, the network device sends the terminal device to the terminal device. The actually transmitted sync signal block may be at least one of the 16 sync signal blocks. With the solution provided by the embodiment, the network device sends a maximum of 16 synchronization signal blocks in a time interval corresponding to half a radio frame, that is, a time interval of 5 milliseconds. If the network device has four beam directions, the network device is in each beam direction. Up to 4 sync signal blocks can be sent, and the terminal device can receive more sync signal blocks in the same beam direction than the network device can transmit more than 8 sync signal blocks in the 5 millisecond time window, thereby obtaining a larger Gain to meet the coverage requirements of synchronous signals for next-generation wireless communication systems.

In one possible design, the network device determines the location of the 16 sync signal blocks in half of the radio frames, including:

The network device maps each synchronization signal block of the 16 synchronization signal blocks to the OFDM symbol corresponding to the half radio frame, and each synchronization signal block occupies 4 OFDM symbols;

The subcarrier spacing is 30 kHz, and the half radio frame includes 10 time slots in the time domain, each time slot includes 14 OFDM symbols in the time domain, and the number of 140 OFDM symbols corresponding to the half radio frame. It is 0 to 139.

In a possible design, the network device maps each of the 16 synchronization signal blocks to the OFDM symbol corresponding to the half of the radio frame, including:

The network device maps the first 8 synchronization signal blocks of the 16 synchronization signal blocks to the OFDM symbols corresponding to the first 5 time slots in the half radio frame in a first mapping manner;

The network device maps the last 8 sync signal blocks of the 16 sync signal blocks to the OFDM symbols corresponding to the last 5 slots of the half radio frame in a second mapping manner.

In one possible design, the first mapping manner is the same as the second mapping manner.

In a possible design, the index of the first OFDM symbol occupied by each sync signal block in the 16 sync signal blocks in the half radio frame is {2, 8, 72, 78} + 14 * n , n = 0, 1, 2, 3.

In a possible design, the index of the first OFDM symbol occupied by each sync signal block in the 16 sync signal blocks in the half radio frame is {4, 8, 16, 20, 74, 78, 86,90}+28*n, n=0,1.

In one possible design, the first mapping mode and the second mapping mode are mirror images of each other.

In a possible design, the index of the first OFDM symbol occupied by each sync signal block in the 16 sync signal blocks in the half radio frame is {2, 8, 86, 92} + 14 * n , n = 0, 1, 2, 3.

In a possible design, the index of the first OFDM symbol occupied by each sync signal block in the 16 sync signal blocks in the half radio frame is {4, 8, 16, 20, 88, 92, 100, 104} +28*n, n=0, 1.

The network device maps the 16 synchronization signal blocks to the OFDM symbols corresponding to the first 8 time slots of the half radio frame, and each time slot corresponds to two synchronization signal blocks.

In a possible design, the index of the first OFDM symbol occupied by each synchronization signal block in the 16 synchronization signal blocks in the half radio frame is {2, 8} + 14 * n, n = 0 , 1, ..., 7.

In a possible design, the index of the first OFDM symbol occupied by each sync signal block in the 16 sync signal blocks in the half radio frame is {4, 8, 16, 20} + 28 * n , n = 0, 1, 2, 3.

In a possible design, the subcarrier spacing is 15 kHz, the half radio frame includes 5 time slots in the time domain, and each time slot includes 14 OFDM symbols in the time domain, and the half radio frame corresponds to The 70 OFDM symbols are numbered from 0 to 69.

In a possible design, the index of the first OFDM symbol occupied by each of the 16 sync signal blocks in the half of the radio frame is 2+4*n, n=0, 1,... , 15.

In a possible design, the index of the first OFDM symbol occupied by each synchronization signal block in the 16 synchronization signal blocks in the half radio frame is {2, 36} + 4*n, n=0. , 1, ..., 7.

In one possible design, the method further includes:

The network device carries the identification information of the synchronization signal block in the synchronization signal block.

In a possible design, the network device carries the identification information of the synchronization signal block in the synchronization signal block, including:

The network device carries the identification information of the synchronization signal block in a physical broadcast channel PBCH included in the synchronization signal block.

The network device carries the identification information of the synchronization signal block in the demodulation reference signal DMRS of the PBCH included in the synchronization signal block.

The network device carries part of the bit corresponding to the identification information of the synchronization signal block in the PBCH included in the synchronization signal block;

The network device carries the remaining bits of the identification information of the synchronization signal block in the demodulation reference signal DMRS of the PBCH included in the synchronization signal block.

In one possible design, the method further includes:

The network device sends indication information to the terminal device, where the indication information is used to indicate the at least one synchronization signal block sent by the network device.

In a possible design, the 16 sync signal blocks are divided into a plurality of sync signal block groups, and each sync signal block group includes at least one sync signal block;

The indication information includes first information and second information, the first information is used to indicate a target synchronization signal block group in the plurality of synchronization signal block groups, and the target synchronization signal block group includes the at least one synchronization signal sent by the network device Piece;

The second information is used to indicate the at least one synchronization signal block sent by the network device in the target synchronization signal block group.

In a second aspect, the application provides a communication device, including:

a determining module, configured to determine a position of 16 sync signal blocks in a half of the radio frame;

a sending module, configured to send the at least one synchronization signal block to the terminal device within a time corresponding to the half of the radio frame;

Among them, the carrier frequency is in the range of 3 GHz to 6 GHz.

In a possible design, when the determining module determines the position of the 16 sync signal blocks in the half radio frame, specifically, mapping each sync signal block of the 16 sync signal blocks to the half radio frame corresponding On each OFDM symbol, each sync signal block occupies 4 OFDM symbols;

In a possible design, when the determining module maps each of the 16 synchronization signal blocks to the OFDM symbol corresponding to the half of the radio frame, the determining module is specifically configured to:

Mapping the first 8 sync signal blocks of the 16 sync signal blocks to the OFDM symbols corresponding to the first 5 slots in the half radio frame in a first mapping manner;

The last 8 sync signal blocks of the 16 sync signal blocks are mapped to the OFDM symbols corresponding to the last 5 slots of the half radio frame in the second mapping manner.

The 16 sync signal blocks are mapped to the OFDM symbols corresponding to the first 8 slots in the half of the radio frames, and each time slot corresponds to two sync signal blocks.

In a possible design, the communication device further includes: an identification module, configured to carry the identification information of the synchronization signal block in the synchronization signal block.

In a possible design, the identification module is specifically configured to carry the identification information of the synchronization signal block in a physical broadcast channel PBCH included in the synchronization signal block.

In a possible design, the identification module is specifically configured to carry the identification information of the synchronization signal block in a demodulation reference signal DMRS of the PBCH included in the synchronization signal block.

In a possible design, the identifier module is specifically configured to carry a partial bit corresponding to the identifier information of the synchronization signal block in a PBCH included in the synchronization signal block; and carry the remaining bits of the identifier information of the synchronization signal block in The sync signal block includes a demodulation reference signal DMRS of the PBCH.

In one possible design, the sending module is also used to:

And transmitting, to the terminal device, indication information, where the indication information is used to indicate the at least one synchronization signal block sent by the network device.

In a third aspect, the application provides a communication device, including:

An interface and a processor, the interface coupled to the processor;

The processor is configured to perform the method for transmitting a synchronization signal block according to the first aspect.

In a possible design, the communication device in the third aspect may be a network device or a chip; the interface may be integrated on the same chip as the processor, or may be separately disposed on different chips.

In a fourth aspect, the application provides a method for transmitting a synchronization signal block, including:

Receiving, by the terminal device, at least one synchronization signal block sent by the network device;

The terminal device accesses a cell.

In a fifth aspect, the application provides a communication device, including:

a receiving module, configured to receive at least one synchronization signal block sent by the network device;

An access module, configured to access a cell.

In a sixth aspect, the application provides a communication device, including:

An interface and a processor, the interface coupled to the processor;

The processor is for performing the method of the fourth aspect.

In a possible design, the communication device in the sixth aspect may be a terminal device or a chip; the interface may be integrated on the same chip as the processor, or may be separately disposed on different chips.

In a seventh aspect, the application provides a communication device, the communication device includes: a processor, the processor and a memory coupled;

The memory for storing a computer program;

The processor is configured to execute a computer program stored in the memory to cause the communication device to perform the method of the first aspect or the fourth aspect.

In an eighth aspect, the application provides a communication device, including: a processor, a memory, and a transceiver;

The memory for storing a computer program;

In a ninth aspect, the present application provides a processor, the processor comprising: at least one circuit for performing the method of the first aspect or the fourth aspect.

In a tenth aspect, the present application provides a computer readable storage medium having stored therein a computer program that, when run on a computer, causes the computer to perform the method of the first aspect.

In an eleventh aspect, the application provides a computer readable storage medium having stored therein a computer program that, when run on a computer, causes the computer to perform the method of the fourth aspect.

According to a twelfth aspect, the present application provides a computer program comprising a program or an instruction, the method of the first aspect being executed when the program or instruction is run on a computer.

In a possible design, the computer program in the twelfth aspect may be stored in whole or in part on a storage medium packaged with the processor, or may be partially or completely stored on a memory not packaged with the processor. .

In a thirteenth aspect, the application provides a computer program comprising a program or an instruction, the method of the fourth aspect being executed when the program or instruction is run on a computer.

In a possible design, the computer program in the thirteenth aspect may be stored in whole or in part on a storage medium packaged with the processor, or may be partially or completely stored on a memory not packaged with the processor. .

In a fourteenth aspect, the application provides a communication device, including:

a memory and a processor, the memory being coupled to the processor;

The processor is for performing the method of the first aspect.

In a possible design, the communication device in the eleventh aspect may be a network device or a chip; the memory may be integrated on the same chip as the processor, or may be separately disposed on different chips.

In a fifteenth aspect, the application provides a communication device, including:

a memory and a processor, the memory being coupled to the processor;

The processor is for performing the method as described in the fourth aspect.

In a possible design, the communication device in the twelfth aspect may be a terminal device or a chip; the memory may be integrated on the same chip as the processor, or may be separately disposed on different chips.

In a sixteenth aspect, the present application provides a system, comprising: the network device according to the fourteenth aspect, and the terminal device according to the fifteenth aspect.

It can be seen that, in the above aspects, the location of the 16 synchronization signal blocks in the half radio frame is determined by the network device, and the at least one synchronization signal block is sent to the terminal device in the time corresponding to the half of the radio frame, so that the terminal device More sync signal blocks can be transmitted in a 5 millisecond time window, and more sync signal blocks are transmitted in each beam direction, and up to 8 sync signal blocks are transmitted in a 5 millisecond time window compared to the network device. The device can receive more sync signal blocks in the same beam direction, thereby obtaining greater gain and meeting the coverage requirements of the synchronization signals of the next generation wireless communication system.

DRAWINGS

FIG. 1 is a schematic diagram of an application scenario provided by an embodiment of the present application;

2 is a schematic structural diagram of a synchronization signal block provided by the present application;

3 is a schematic diagram of a position of a synchronization signal block in a 5 millisecond time window provided by the present application;

4 is a schematic diagram of mapping of synchronization signal blocks in different SCSs in a time slot according to the present application;

FIG. 5 is a schematic diagram of mapping of 16 synchronization signal blocks in a 5 millisecond time window according to the present application; FIG.

6 is a schematic diagram of mapping of another 16 synchronization signal blocks provided in the present application in a 5 millisecond time window;

FIG. 7 is a schematic diagram of mapping of another 16 synchronization signal blocks in a 5 millisecond time window according to the present application; FIG.

FIG. 8 is a schematic diagram of mapping of another 16 synchronization signal blocks in a 5 millisecond time window according to the present application; FIG.

FIG. 9 is a schematic diagram of mapping of another 16 sync signal blocks provided in the 5 millisecond time window according to the present application; FIG.

10 is a flowchart of a method for transmitting a synchronization signal block provided by the present application;

11 is a schematic diagram of a network device sending a synchronization signal block according to the present application;

12 is a schematic diagram of dividing 16 sync signal blocks into 4 sync signal block groups according to the present application;

FIG. 13 is a schematic structural diagram of a communication apparatus according to an embodiment of the present application;

FIG. 14 is a schematic structural diagram of another network device according to an embodiment of the present disclosure;

FIG. 15 is a schematic structural diagram of still another network device according to an embodiment of the present application;

16 is a schematic structural diagram of another communication device according to an embodiment of the present application;

FIG. 17 is a schematic structural diagram of a terminal device according to an embodiment of the present disclosure.

Detailed ways

The terms used in the embodiments of the present application are only used to explain the specific embodiments of the present application, and are not intended to limit the present application.

Embodiments of the present application are applicable to various types of communication systems. FIG. 1 is a schematic diagram of an application scenario provided by an embodiment of the present application. The communication system shown in FIG. 1 mainly includes a network device 11 and a terminal device 12.

1) The network device 11 may be a network side device, for example, a Wireless-Fidelity (WIFI) access point AP, a base station for next-generation communication, such as a 5G gNB or a small station, a micro station, a TRP, It can also be a relay station, an access point, an in-vehicle device, a wearable device, or the like. In this embodiment, the base stations in the communication systems of different communication systems are different. For the sake of distinction, the base station of the 4G communication system is referred to as an LTE eNB, the base station of the 5G communication system is referred to as an NR gNB, and the base station supporting both the 4G communication system and the 5G communication system is referred to as an eLTE eNB, and these names are only convenient distinctions, and Not limited.

2) The terminal device 12 is also referred to as a User Equipment (UE), and is a device that provides voice and/or data connectivity to a user, for example, a handheld device having a wireless connection function, an in-vehicle device, and the like. Common terminals include, for example, mobile phones, tablets, notebook computers, PDAs, mobile internet devices (MIDs), wearable devices such as smart watches, smart bracelets, pedometers, and the like.

3) "Multiple" means two or more, and other quantifiers are similar. "and/or", describing the association relationship of the associated objects, indicating that there may be three relationships, for example, A and/or B, which may indicate that there are three cases where A exists separately, A and B exist at the same time, and B exists separately. The character "/" generally indicates that the contextual object is an "or" relationship.

It should be noted that the number and type of the terminal devices 12 included in the communication system shown in FIG. 1 are only one distance, and the embodiment of the present application is not limited thereto. For example, more terminal devices 12 that communicate with the network device 11 may also be included, which are not described in the drawings for the sake of brevity. Further, in the communication system as shown in FIG. 1, although the network device 11 and the terminal device 12 are shown, the communication system may not be limited to include the network device 11 and the terminal device 12, and may also include, for example, a core network device or Devices for carrying virtualized network functions, etc., will be apparent to those skilled in the art and will not be described herein.

In addition, the embodiments of the present application can be applied not only to a next-generation wireless communication system, that is, a 5G communication system, but also to other systems that may appear in the future, such as a next-generation wifi network, a 5G car network, and the like.

FIG. 2 is a schematic structural diagram of a synchronization signal block provided by the present application. As shown in FIG. 2, the synchronization signal block includes: a primary synchronization signal (Priss Synchronization Sigal, PSS), a secondary synchronization signal (SSS), and a physical broadcast channel (PBCH). The PSS and the SSS are used by the terminal device to identify the cell and synchronize with the cell. The PBCH includes the most basic system information such as system frame number, intraframe timing information, and the like. The successful reception of the synchronization signal block by the terminal device is a prerequisite for its access to the cell. As shown in FIG. 2, one synchronization signal block occupies four orthogonal frequency division multiplexing (OFDM) symbols in the time domain.

A synchronization signal burst set is defined in the 5G New Radio (NR), the synchronization signal burst set may include one or more synchronization signal blocks, and the network equipment such as the base station may separately transmit through different beams A synchronization signal block included in the burst of the synchronization signal is transmitted to implement beam scanning. When the carrier frequency range is different, the maximum number L of sync signal blocks that the sync signal burst set can include is different. Specifically, when the carrier frequency does not exceed 3 GHz, L=4; when the carrier frequency is in the range of 3 GHz to 6 GHz, L=8; when the carrier frequency is in the range of 6 GHz to 52.6 GHz, L=64. The base station may periodically send the synchronization signal block, and the base station needs to send the synchronization signal block included in the synchronization signal burst set to the terminal device within the time interval corresponding to the half radio frame, that is, the synchronization signal actually transmitted by the base station. The number of blocks can be less than the maximum number L.

In addition, when the subcarrier spacing (SCS) is different, the positions of the L sync signal blocks in the 5 millisecond time window are different, as shown in FIG. When SCS=15KHz, 1 time slot is 1 millisecond, 5 time slots include 5 time slots, and the maximum number of synchronization signal blocks that can be included in the synchronization signal burst set is L=4 or L=8, when L=4 The four sync signal blocks are located in the first two slots of the half radio frame; when L=8, the eight sync signal blocks are located in the first four slots of the half radio frame.

When SCS=30KHz, 1 time slot is 0.5 milliseconds, 5 time slots are included in 5 milliseconds, and the maximum number of synchronization signal blocks that can be included in the synchronization signal burst set is L=4 or L=8, when L=4 The four sync signal blocks are located in the first two slots of the half radio frame; when L=8, the eight sync signal blocks are located in the first four slots of the half radio frame.

When SCS=120KHz, 1 time slot is 0.125 milliseconds, 40 time slots are included in 5 milliseconds, and the maximum number of synchronization signal blocks that can be included in the synchronization signal burst set is L=64, assuming 40 time slots are numbered 0 to 39, wherein each of the time slots 0 to 7 includes two synchronization signal blocks, and each of the time slots 10 to 17 includes two synchronization signal blocks, and the time slot 20 is Each of the time slots 27 includes two synchronization signal blocks, and each of the time slots 30 to 37 includes two synchronization signal blocks, and the index of the time slot occupied by the 64 synchronization signal blocks is {0,1,2,3,4,5,6,7}+10*n,n=0,1,2,3. Where {0,1,2,3,4,5,6,7}+10*n,n=0,1,2,3 are equivalent to {0,1,2,3,4,5,6 ,7,10,11,12,13,14,15,16,17,20,21,22,23,24,25,26,27,30,31,32,33,34,35,36,37 }.

When SCS=240KHz, 1 time slot is 0.0625 milliseconds, 80 time slots are included in 5 milliseconds, and the maximum number of synchronization signal blocks that can be included in the synchronization signal burst set is L=64, assuming 80 time slots are numbered 0 to 79, each of the time slots 0 to 90 includes two synchronization signal blocks, and each of the time slots 20 to 35 includes two synchronization signal blocks, and then 64 synchronization signal blocks The index of the occupied time slot is {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}+20*n, n=0, 1. Where {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}+20*n,n=0,1 is equivalent to {0 ,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,20,21,22,23,24,25,26,27,28,29 , 30, 31, 32, 33, 34, 35}.

In addition, when the SCS is different, the position of the sync signal block in the time slot is also different. FIG. 4 is a schematic diagram of mapping of synchronization signal blocks in different SCSs in a time slot according to the present application. As shown in FIG. 4, when SCS=15KHz, 1 slot is 1 millisecond, 1 slot includes 14 OFDM symbols, one sync signal block occupies 4 OFDM symbols, and 1 slot can include two synchronization signals. Block, assuming that the number of 14 OFDM symbols in one slot is 0 to 13, the index of the OFDM symbol occupied by the two synchronization signal blocks is {2, 3, 4, 5, 8, 9, 10, 11} .

When SCS=30KHz, 1 time slot is 0.5 milliseconds, 1 time slot includes 14 OFDM symbols, 1 time slot can include two synchronization signal blocks, and mapping of the two synchronization signal blocks in one time slot There are two modes. If the number of 14 OFDM symbols in a slot is 0 to 13, the index of the OFDM symbol occupied by the two sync blocks is {4, 5, 6, in the first mapping mode. 7,8,9,10,11}; in the second mapping mode, the index of the OFDM symbol occupied by the two synchronization signal blocks is {2, 3, 4, 5, 8, 9, 10, 11}.

When SCS=120KHz, 1 slot is 0.125 milliseconds, 1 slot includes 14 OFDM symbols, and 1 slot can include two sync signal blocks, assuming that 14 OFDM symbols in one slot are numbered 0. Up to 13, the index of the OFDM symbol occupied by the two sync signal blocks is {4, 5, 6, 7, 8, 9, 10, 11}.

When SCS=240KHz, one time slot is 0.0625 milliseconds, one time slot includes 14 OFDM symbols, and the synchronization signal block needs to be mapped across time slots. For example, the first time slot may include 1.5 synchronization signal blocks, and the second time slot The time slots may include 2.5 sync signal blocks.

It can be seen from the above description that when the carrier frequency is in the range of 3 GHz to 6 GHz, that is, when the carrier frequency of the signal transmitted by the network device is in the range of 3 GHz to 6 GHz, the base station is within a time interval of 5 milliseconds corresponding to a half of the wireless frame. A maximum of eight synchronization signal blocks can be transmitted. If the base station has four beam directions, the base station transmits two synchronization signal blocks in each beam direction, and the number of synchronization signal blocks received by the terminal device in the same beam direction is compared. Less, the gain obtained is small, and it cannot meet the coverage requirements of the synchronization signal of the next generation wireless communication system. In order to solve this problem, the present application proposes that when the carrier frequency is in the range of 3 GHz to 6 GHz, the base station can transmit a maximum of 16 synchronization signal blocks within a time interval corresponding to half a radio frame, that is, a 5 millisecond time window.

Generally, the more synchronization signal blocks that the base station transmits in the 5 millisecond time window, the more synchronization signal blocks that the base station transmits in each beam direction, and the synchronization signal blocks that the terminal device can receive in the same beam direction. The more, the greater the combined gain obtained when the terminal device combines the respective sync signal blocks in the same beam direction. When the carrier frequency is in the range of 3 GHz to 6 GHz, if the base station transmits a maximum of 16 synchronization signal blocks within a time interval corresponding to half a radio frame, that is, a 5 millisecond time window, and the base station has 4 beam directions, the base station is in each beam. Four sync signal blocks can be transmitted in the direction. Compared with the network device, a maximum of 8 sync signal blocks are transmitted in a 5 millisecond time window, and the terminal device can receive more sync signal blocks in the same beam direction, thereby obtaining a larger The gain meets the coverage requirements of the synchronization signal of the next generation wireless communication system.

In the following, the mapping manner of 16 sync signal blocks in a half-radio frame, that is, a 5-millisecond time window, will be introduced in combination with a specific application scenario.

A specific application scenario is: when the carrier frequency is in the range of 3 GHz to 6 GHz, when SCS=30 kHz, one time slot is 0.5 milliseconds, and half of the wireless frames include 10 time slots in the time domain, that is, 5 millisecond time windows. a slot, where each slot includes 14 OFDM symbols in the time domain, the half radio frame includes 140 OFDM symbols in the time domain, and the 140 OFDM symbols corresponding to the half radio frame are numbered 0 to 139. . In this scenario, mapping 16 sync signal blocks in a half radio frame can be seen as mapping 16 sync signal blocks onto the 140 OFDM symbols.

Specifically, the manner in which 16 synchronization signal blocks are mapped on the 140 OFDM symbols may include the following feasible implementation manners:

A possible implementation manner is: mapping the first 8 synchronization signal blocks of the 16 synchronization signal blocks to the OFDM symbols corresponding to the first 5 time slots of the half radio frame, and the 16 synchronization signals are The last 8 sync signal blocks in the block are mapped to the OFDM symbols corresponding to the last 5 slots in the half of the radio frames, and the mapping manners of the first 8 sync signal blocks and the last 8 sync signals in the 16 sync signal blocks The way the blocks are mapped is the same.

As shown in FIG. 5, when SCS=30KHz, one time slot is 0.5 milliseconds, and half of the wireless frames include 10 time slots in the time domain, that is, 5 millisecond time window, and the time slots are numbered from 0 to 9. Before transmitting the 16 sync signal blocks, the base station may map the first 8 sync signal blocks of the 16 sync signal blocks on the OFDM symbols corresponding to slot 0 to slot 4, and the last 8 of the 16 sync signal blocks. The sync signal blocks are mapped on the OFDM symbols corresponding to slot 5 to slot 9. Since two synchronization signal blocks can be placed in one time slot, in the time slots 0 to 4, the first 8 synchronization signal blocks can be mapped on the OFDM symbols corresponding to the time slots 0 to 3, and the time slot 4 Do not put the sync signal block. In slot 5 to slot 9, the last 8 sync blocks can be mapped on the OFDM symbols corresponding to slot 5 to slot 8, and slot 9 does not put the sync block. Specifically, the mapping manner of the first 8 sync signal blocks in the 16 sync signal blocks on the OFDM symbols corresponding to slot 0 to slot 3 and the OFDM corresponding to the slots 8 to 8 in the last 8 sync signal blocks The mapping on the symbols is consistent.

For example, the number of 16 sync signal blocks is 0 to 15, as shown in FIG. 5, the mapping manner of the sync signal block 0 to the sync signal block 7 on the OFDM symbols corresponding to slot 0 to slot 3 and the sync signal block 8 The mapping pattern to the sync signal block 15 on the OFDM symbols corresponding to slot 5 to slot 8 is identical. In this case, there are two modes of 16 sync signal block mapping modes, as shown in FIG. 5. In mode 1, one time slot includes two sync signal blocks, for example, time slot 0 includes sync signal block 0 and Synchronization signal block 1, sync signal block 0 occupies an OFDM symbol numbered 2 to 5, and sync signal block 1 occupies an OFDM symbol numbered 8 to 11.

The slot 1 includes a sync block 2 and a sync block 3, the sync block 2 occupies OFDM symbols numbered 16 to 19, and the sync block 3 occupies OFDM symbols numbered 22 to 25.

The time slot 2 includes a sync signal block 4 occupying OFDM symbols numbered 30 to 33, and a sync signal block 5 occupying OFDM symbols numbered 36 to 39.

The time slot 3 includes a sync signal block 6 occupying OFDM symbols numbered 44 to 47, and a sync signal block 7 occupying OFDM symbols numbered 50 to 53.

The time slot 5 includes a sync signal block 8 occupying OFDM symbols numbered 72 to 75, and a sync signal block 9 occupying OFDM symbols numbered 78 to 81.

The time slot 6 includes a sync signal block 10 occupying OFDM symbols numbered 86 to 89, and a sync signal block 11 occupying OFDM symbols numbered 92 to 95.

The slot 7 includes a sync signal block 12 occupying OFDM symbols numbered 100 to 103, and a sync signal block 13 occupying OFDM symbols numbered 106 to 109.

The time slot 8 includes a sync signal block 14 occupying OFDM symbols numbered 114 to 117 and a sync signal block 15 occupying OFDM symbols numbered 120 to 123.

As shown in FIG. 5, in mode 1, the index of the first OFDM symbol occupied by each sync signal block in each of the 16 sync signal blocks in the half radio frame is {2, 8, 72, 78} + 14*n, n=0, 1, 2, 3, that is, the index of the first OFDM symbol occupied by each synchronization signal block in the synchronization signal block 0 to the synchronization signal block 15 in the half radio frame is {2,8,16,22,30,36,44,50,72,78,86,92,100,106,114,120}.

As shown in FIG. 5, in mode 2, one slot includes two sync signal blocks, for example, slot 0 includes sync block 0 and sync block 1, and sync block 0 occupies OFDM symbols numbered 4-7. The sync signal block 1 occupies an OFDM symbol numbered 8 to 11.

The slot 1 includes a sync block 2 and a sync block 3, the sync block 2 occupies OFDM symbols numbered 16 to 19, and the sync block 3 occupies OFDM symbols numbered 20 to 23.

The slot 2 includes a sync signal block 4 and a sync signal block 5, the sync signal block 4 occupies OFDM symbols numbered 32 to 35, and the sync signal block 5 occupies OFDM symbols numbered 36 to 39.

The slot 3 includes a sync signal block 6 occupying OFDM symbols numbered 44 to 47, and a sync signal block 7 occupying OFDM symbols numbered 48 to 51.

The time slot 5 includes a sync signal block 8 occupying OFDM symbols numbered 74 to 77, and a sync signal block 9 occupying OFDM symbols numbered 78 to 81.

The time slot 6 includes a sync signal block 10 occupying OFDM symbols numbered 86 to 89, and a sync signal block 11 occupying OFDM symbols numbered 90 to 93.

The time slot 7 includes a sync signal block 12 occupying OFDM symbols numbered 102 to 105, and a sync signal block 13 occupying OFDM symbols numbered 106 to 109.

The time slot 8 includes a sync signal block 14 occupying OFDM symbols numbered 114 to 117, and a sync signal block 15 occupying OFDM symbols numbered 118 to 121. As shown in FIG. 5, in mode 2, the index of the first OFDM symbol occupied by each sync signal block in each of the 16 sync signal blocks in the half radio frame is {4, 8, 16, 20, 74. , 78, 86, 90} + 28 * n, n = 0, 1, that is, the first OFDM symbol occupied by each of the sync signal block 0 to the sync signal block 15 is within the half of the radio frame The index is {4, 8, 16, 20, 32, 36, 44, 48, 74, 78, 86, 90, 102, 106, 114, 118}.

Another possible implementation of mapping 16 sync signal blocks onto the 140 OFDM symbols is to map the first 8 sync signal blocks of the 16 sync signal blocks to the first 5 radio frames. On the OFDM symbol corresponding to the time slots, the last 8 synchronization signal blocks of the 16 synchronization signal blocks are mapped onto the OFDM symbols corresponding to the last 5 slots of the half radio frame, and 16 synchronization signal blocks are used. The mapping manner of the first 8 sync signal blocks and the mapping manner of the last 8 sync signal blocks are mirror images of each other.

As shown in FIG. 6, when SCS=30KHz, one time slot is 0.5 milliseconds, and half of the radio frames include 10 time slots in the time domain, that is, the 5 millisecond time window, and the time slots are numbered from 0 to 9. 16 The sync signal blocks are bilaterally symmetric within a 5 millisecond time window. Specifically, the 16 sync signal blocks are numbered 0 to 15, wherein the sync signal block 0 and the sync signal block 15 are bilaterally symmetric within a 5 millisecond time window. The sync signal block 1 and the sync signal block 14 are bilaterally symmetric within a 5 millisecond time window, and the sync signal block 2 and the sync signal block 13 are bilaterally symmetric within a 5 millisecond time window, and so on, the sync signal block 7 and The sync signal block 8 is bilaterally symmetric within a 5 millisecond time window.

As shown in FIG. 6, when 16 sync signal blocks are bilaterally symmetric in a 5 millisecond time window, there are two modes. In mode 1, one slot includes two sync signal blocks, for example, slot 0 includes a sync signal block 0. And sync signal block 1, sync signal block 0 occupies an OFDM symbol numbered 2 to 5, and sync signal block 1 occupies an OFDM symbol numbered 8 to 11.

The time slot 6 includes a sync signal block 8 occupying OFDM symbols numbered 86 to 89, and a sync signal block 9 occupying OFDM symbols numbered 92 to 95.

The slot 7 includes a sync signal block 10 occupying OFDM symbols numbered 100 to 103, and a sync signal block 11 occupying OFDM symbols numbered 106 to 109.

The time slot 8 includes a sync signal block 12 occupying OFDM symbols numbered 114 to 117, and a sync signal block 13 occupying OFDM symbols numbered 120 to 123.

The slot 9 includes a sync signal block 14 occupying OFDM symbols numbered 128 to 131, and a sync signal block 15 occupying OFDM symbols numbered 134 to 137.

As shown in FIG. 6, in mode 1, the index of the first OFDM symbol occupied by each sync signal block in each of the 16 sync signal blocks in the half radio frame is {2, 8, 86, 92} + 14*n, n=0, 1, 2, 3, that is, the index of the first OFDM symbol occupied by each synchronization signal block in the synchronization signal block 0 to the synchronization signal block 15 in the half radio frame is {2,8,16,22,30,36,44,50,86,92,100,106,114,120,128,134}.

As shown in FIG. 6, in mode 2, one slot includes two sync signal blocks, for example, slot 0 includes sync block 0 and sync block 1, and sync block 0 occupies an OFDM symbol numbered 4-7. The sync signal block 1 occupies an OFDM symbol numbered 8 to 11.

The time slot 6 includes a sync signal block 8 occupying OFDM symbols numbered 88 to 91, and a sync signal block 9 occupying OFDM symbols numbered 92 to 95.

The slot 7 includes a sync signal block 10 occupying OFDM symbols numbered 100 to 103, and a sync signal block 11 occupying OFDM symbols numbered 104 to 107.

The time slot 8 includes a sync signal block 12 occupying OFDM symbols numbered 116 to 119, and a sync signal block 13 occupying OFDM symbols numbered 120 to 123.

The slot 9 includes a sync signal block 14 occupying OFDM symbols numbered 128 to 131, and a sync signal block 15 occupying OFDM symbols numbered 132 to 135.

As shown in FIG. 6, in mode 2, the index of the first OFDM symbol occupied by each synchronization signal block in the 16 synchronization signal blocks in the half radio frame is {4, 8, 16, 20, 88. , 92, 100, 104} + 28 * n, n = 0, 1, that is, the index of the first OFDM symbol occupied by each of the synchronization signal blocks 0 to the synchronization signal block 15 in the half of the radio frame is {4,8,16,20,32,36,44,48,88,92,100,104,116,120,128,132}.

Yet another possible implementation of mapping 16 sync signal blocks onto the 140 OFDM symbols is to map the 16 sync signal blocks to the OFDM symbols corresponding to the first 8 slots in the half of the radio frames. In the above, each time slot corresponds to two synchronization signal blocks. As shown in FIG. 7, the sync signal block 0 to the sync signal block 15 are mapped in 8 slots of slot 0 to

slot

7, and 2 sync signal blocks are placed in each slot, and slot 8 and slot 9 are placed. Do not put the sync signal block. Specifically, there are two modes in which the synchronization signal block 0 to the synchronization signal block 15 are mapped in the eight slots of the slot 0 to the slot 7, as shown in FIG. 7, in the mode 1, one slot includes two slots. The sync signal block, for example, slot 0 includes sync block 0 and sync block 1, sync block 0 occupies OFDM symbols numbered 2 through 5, and sync block 1 occupies OFDM symbols numbered 8 through 11.

The time slot 4 includes a sync signal block 8 occupying OFDM symbols numbered 58 to 61, and a sync signal block 9 occupying OFDM symbols numbered 64 to 67.

The time slot 5 includes a sync signal block 10 occupying OFDM symbols numbered 72 to 75, and a sync signal block 11 occupying OFDM symbols numbered 78 to 81.

The time slot 6 includes a sync signal block 12 occupying OFDM symbols numbered 86 to 89, and a sync signal block 13 occupying OFDM symbols numbered 92 to 95.

The slot 7 includes a sync signal block 14 occupying OFDM symbols numbered 100 to 103, and a sync signal block 15 occupying OFDM symbols numbered 106 to 109.

As shown in FIG. 7, in mode 1, an index of a first OFDM symbol occupied by each synchronization signal block in each of the 16 synchronization signal blocks in the half radio frame is {2, 8} + 14*n, n=0,1,...,7, that is, the index of the first OFDM symbol occupied by each synchronization signal block in the synchronization signal block 0 to the synchronization signal block 15 in the half radio frame is {2, 8 , 16, 22, 30, 36, 44, 50, 58, 64, 72, 78, 86, 92, 100, 106}.

As shown in FIG. 7, in mode 2, one slot includes two sync signal blocks, for example, slot 0 includes sync block 0 and sync block 1, and sync block 0 occupies an OFDM symbol numbered 4-7. The sync signal block 1 occupies an OFDM symbol numbered 8 to 11.

The time slot 4 includes a sync signal block 8 occupying OFDM symbols numbered 60 to 63, and a sync signal block 9 occupying OFDM symbols numbered 64 to 67.

The time slot 5 includes a sync signal block 10 occupying OFDM symbols numbered 72 to 75, and a sync signal block 11 occupying OFDM symbols numbered 76 to 79.

The time slot 6 includes a sync signal block 12 occupying OFDM symbols numbered 88 to 91, and a sync signal block 13 occupying OFDM symbols numbered 92 to 95.

The time slot 7 includes a sync signal block 14 occupying OFDM symbols numbered 100 to 103, and a sync signal block 15 occupying OFDM symbols numbered 104 to 107. As shown in FIG. 7, in mode 2, the index of the first OFDM symbol occupied by each sync signal block in each of the 16 sync signal blocks in the half radio frame is {4, 8, 16, 20} + 28*n, n=0, 1, 2, 3, that is, the index of the first OFDM symbol occupied by each synchronization signal block in the synchronization signal block 0 to the synchronization signal block 15 in the half radio frame is {4,8,16,20,32,36,44,48,60,64,72,76,88,92,100,104}.

Another specific application scenario is: when the carrier frequency is in the range of 3 GHz to 6 GHz, when SCS=15 kHz, one time slot is 1 millisecond, and half of the wireless frames include 5 in the time domain, ie, 5 millisecond time window. a time slot, each time slot including 14 OFDM symbols in the time domain, the half radio frame includes 70 OFDM symbols in the time domain, and the 70 OFDM symbols corresponding to the half radio frame are numbered 0 to 69. In this scenario, mapping 16 sync signal blocks in a half radio frame can be seen as mapping 16 sync signal blocks onto the 70 OFDM symbols.

Since each of the five time slots includes 14 OFDM symbols in the time domain and one synchronization signal block occupies 4 OFDM symbols in the time domain, a maximum of 3 complete synchronization signal blocks can be placed in one time slot. Since 16 synchronization signal blocks need to be placed in 5 time slots, an average of 3.2 synchronization signal blocks are placed in each time slot, that is, 16 synchronization signal blocks are mapped to 5 time slots, 16 synchronization signals. Part of the sync signal block in the block needs to be mapped across time slots.

Specifically, mapping 16 synchronization signal blocks on the 70 OFDM symbols may include the following feasible implementation manners:

A feasible implementation manner is as follows: as shown in FIG. 8, the time slot 0 includes a synchronization signal block 0, a synchronization signal block 1 and a synchronization signal block 2, and the synchronization signal block 0 occupies an OFDM symbol numbered 2 to 5, and the synchronization signal block 1 occupies an OFDM symbol numbered 6 to 9, and sync signal block 2 occupies an OFDM symbol numbered 10 to 13.

The slot 1 includes the sync signal block 3, the sync signal block 4, the sync signal block 5, and the first half of the sync signal block 6, the sync signal block 3 occupies the OFDM symbols numbered 14 to 17, and the sync signal block 4 occupies the number 18 to The OFDM symbol of 21, the sync signal block 5 occupies OFDM symbols numbered 22 to 25, and the sync signal block 6 occupies OFDM symbols numbered 26 to 29.

The time slot 2 includes the latter half of the sync signal block 6, the sync signal block 7, the sync signal block 8, and the sync signal block 9, the sync signal block 7 occupies the OFDM symbols numbered 30 to 33, and the sync signal block 8 occupies the number 34. To the OFDM symbol of 37, the sync signal block 9 occupies OFDM symbols numbered 38 to 41.

The time slot 3 includes a sync signal block 10, a sync signal block 11, a sync signal block 12, and a first half of the sync signal block 13, the sync signal block 10 occupies an OFDM symbol numbered 42 to 45, and the sync signal block 11 occupies a number 46. The OFDM symbol of 49, the sync signal block 12 occupies OFDM symbols numbered 50 to 53, and the sync signal block 13 occupies OFDM symbols numbered 54 to 57.

The time slot 4 includes the latter half of the sync signal block 13, the sync signal block 14 and the sync signal block 15, the sync signal block 14 occupies OFDM symbols numbered 58 to 61, and the sync signal block 15 occupies the OFDM symbols numbered 62 to 65. .

As shown in FIG. 8, the index of the first OFDM symbol occupied by each synchronization signal block in the 16 synchronization signal blocks in the half radio frame is 2+4*n, n=0, 1, ... , 15, that is, the index of the first OFDM symbol occupied by each of the synchronization signal blocks 0 to the synchronization signal block 15 in the half of the radio frame is {2, 6, 10, 14, 18, 22,26,30,34,38,42,46,50,54,58,62}. The sync signal block 6 and the sync signal block 13 are respectively mapped across time slots.

Another feasible implementation manner is as follows: as shown in FIG. 9, the time slot 0 includes the synchronization signal block 0, the synchronization signal block 1 and the synchronization signal block 2, and the synchronization signal block 0 occupies the OFDM symbol numbered 2 to 5, and the synchronization signal Block 1 occupies OFDM symbols numbered 6 to 9, and sync signal block 2 occupies OFDM symbols numbered 10 to 13.

The time slot 2 includes the latter half of the sync signal block 6, the sync signal block 7, the sync signal block 8, and the first half of the sync signal block 9, the sync signal block 7 occupies the OFDM symbols numbered 30 to 33, and the sync signal block 8 occupies The OFDM symbols numbered 36 to 39, and the sync signal block 9 occupy OFDM symbols numbered 40 to 43.

The time slot 3 includes the latter half of the sync signal block 9, the sync signal block 10, the sync signal block 11, and the sync signal block 12. The sync signal block 10 occupies the OFDM symbols numbered 44 to 47, and the sync signal block 11 occupies the number 48. To the OFDM symbol of 51, the sync signal block 12 occupies OFDM symbols numbered 52 to 55.

The time slot 4 includes a sync signal block 13, a sync signal block 14 and a sync signal block 15, the sync signal block 13 occupies OFDM symbols numbered 56 to 59, and the sync signal block 14 occupies OFDM symbols numbered 60 to 63, and the sync signal block 15 occupies an OFDM symbol numbered 64 to 67.

As shown in FIG. 9, the index of the first OFDM symbol occupied by each synchronization signal block in the 16 synchronization signal blocks in the half radio frame is {2, 36} + 4*n, n=0. , 1, ..., 7, that is, the index of the first OFDM symbol occupied by each of the synchronization signal blocks 0 to the synchronization signal block 15 in the half of the radio frame is {2, 6, 10, 14,18,22,26,30,36,40,44,48,52,56,60,64}. The synchronization signal block 6 and the synchronization signal block 9 are respectively mapped across time slots.

Through the above mapping manner, the present application provides a mapping manner of 16 synchronization signal blocks in a half-radio frame, that is, a 5 millisecond time window, when the carrier frequency is in the range of 3 GHz to 6 GHz, SCS=30 KHz or SCS=15 kHz. Generally, the network device needs to send the synchronization signal block to the terminal device, and the network device can send at least one synchronization signal block to the terminal device in the time domain of the half of the wireless frame, that is, the 5 millisecond time window, and the network device is in the 5 millisecond time window. The number of sync signal blocks actually transmitted within may be less than or equal to 16. The transmission method of the synchronization signal block will be described in detail below with reference to the embodiments.

FIG. 10 is a flowchart of a method for transmitting a synchronization signal block provided by the present application. As shown in FIG. 10, the method for transmitting a synchronization signal block according to this embodiment includes the following steps:

Step 1001: The network device determines a location of 16 synchronization signal blocks in a half of the radio frame.

In this embodiment, the carrier frequency of the wireless signal transmitted by the network device is in a range of 3 GHz to 6 GHz. The network device can transmit up to 16 sync signal blocks in a 5 millisecond time window. Before the network device sends the synchronization signal block to the terminal device, it first determines the position of the 16 synchronization signal blocks in the half wireless frame, that is, the 5 millisecond time window.

Specifically, the determining, by the network device, the location of the 16 synchronization signal blocks in the half of the radio frame, includes: the network device mapping each of the 16 synchronization signal blocks to the half of the radio frame On the corresponding OFDM symbol, each sync signal block occupies 4 OFDM symbols.

When the carrier frequency is in the range of 3 GHz to 6 GHz, when SCS=30 kHz, one time slot is 0.5 milliseconds, and half of the wireless frames include 10 time slots in the time domain, ie, 5 millisecond time window, each time slot is in time. The domain includes 14 OFDM symbols, and the half of the radio frame includes 140 OFDM symbols in the time domain. In this scenario, mapping 16 sync signal blocks in a half radio frame can be seen as mapping 16 sync signal blocks onto the 140 OFDM symbols. For the specific mapping method, refer to the mapping method shown in FIG. 5, FIG. 6, or FIG. 7 in the foregoing embodiment, and details are not described herein again.

When the carrier frequency is in the range of 3 GHz to 6 GHz, when SCS=15 kHz, 1 slot is 1 millisecond, and half of the radio frames include 5 slots in the time domain, that is, 5 ms time window, each time slot is in time. The domain includes 14 OFDM symbols, and the half of the radio frame includes 70 OFDM symbols in the time domain. In this scenario, mapping 16 sync signal blocks in a half radio frame can be seen as mapping 16 sync signal blocks onto the 70 OFDM symbols. For the specific mapping method, refer to the mapping method shown in FIG. 8 or FIG. 9 in the foregoing embodiment, and details are not described herein again.

Step 1002: The network device sends at least one synchronization signal block to the terminal device.

After the network device determines the position of the 16 sync signal blocks in the half radio frame, at least one sync signal block is transmitted to the terminal device in a half radio frame, that is, a 5 millisecond time window, and at most 16 sync signal blocks are transmitted.

In this embodiment, the location of the 16 synchronization signal blocks in the half radio frame is determined by the network device, and at least one synchronization signal block is sent to the terminal device in a time corresponding to the half of the radio frame, so that the terminal device can be in the 5 milliseconds. More sync signal blocks are sent in the time window, and more sync signal blocks are transmitted in each beam direction. Compared with the network device, a maximum of 8 sync signal blocks are transmitted in a 5 millisecond time window, and the terminal device is in the same beam. More sync signal blocks can be received in the direction, thereby obtaining greater gain and meeting the coverage requirements of the synchronization signals of the next generation wireless communication system.

On the basis of the foregoing embodiment, the network device may further identify a maximum of 16 synchronization signal blocks that may be included in one half of the radio frame. Specifically, the 16 synchronization signal blocks are numbered from 0 to 15, and adopt 4-bit. The binary number is used to identify 16 sync signal blocks. For example, the sync signal block 0 is identified by a 4-bit binary number 0000, the sync signal block 1 is identified by a 4-bit binary number 0001, and so on, and the sync signal block 15 is used. The 4-bit binary number 1111 is used to identify. This is only a schematic description, and does not limit the specific identification manner. In other embodiments, other identification manners may also be used. For example, the synchronization signal block 0 is identified by a 4-bit binary number 1111, and the synchronization signal block 1 is used. The 4-bit binary number 1110 is used to identify, and so on, the sync signal block 15 is identified by a 4-bit binary number 0000.

When the network device sends the synchronization signal block to the terminal device, the network device may carry the identification information of the synchronization signal block in the synchronization signal block. Specifically, when the synchronization signal block sent by the network device to the terminal device in a half wireless frame, that is, a 5 millisecond time window is 16, the network device may carry the identification information of each synchronization signal block in the 16 synchronization signal blocks in their respective In the sync signal block. When the synchronization signal block sent by the network device to the terminal device in a half wireless frame, that is, a 5 millisecond time window, is less than 16, the network device may carry the identification information of the synchronization signal actually transmitted by the network device in the actually transmitted synchronization signal block.

For the sake of clarity, the present embodiment can be schematically illustrated by using any of the mapping modes shown in FIG. 5, FIG. 6, FIG. 7, FIG. 8, and FIG. 9, for example, taking mode 1 in FIG. 7 as an example. Schematic description.

As shown in FIG. 11, when the network device sends 16 synchronization signal blocks to the terminal device within a 5 millisecond time window, the network device may carry the identification information 0000 of the synchronization signal block 0 in the synchronization signal block 0, and the synchronization signal block 1 The identification information 0001 is carried in the synchronization signal block 1, and so on, and the identification information 1111 of the synchronization signal block 15 is carried in the synchronization signal block 15.

As shown in FIG. 11, when the network device sends less than 16 synchronization signal blocks to the terminal device within a 5 millisecond time window, for example, the network device actually transmits 8 odd-numbered synchronization signal blocks to the terminal device within a 5 millisecond time window. The network device may carry the identification information 0001 of the synchronization signal block 1 in the synchronization signal block 1, carry the identification information 0011 of the synchronization signal block 3 in the synchronization signal block 3, and so on, and identify the synchronization signal block 15. Information 1111 is carried in sync signal block 15.

As shown in FIG. 2, each synchronization signal block occupies 4 OFDM symbols in the time domain, wherein the primary synchronization signal PSS occupies 1 OFDM symbol, the secondary synchronization signal SSS and the partial physical broadcast channel PBCH occupy 1 OFDM symbol, and the remaining The PBCH occupies 2 OFDM symbols, and how the identification information of each synchronization signal block is carried in the synchronization signal block will be described in detail below.

In the embodiment of the present application, the network device carrying the identifier information of the synchronization signal block in the synchronization signal block may include the following feasible implementation manners:

A feasible implementation manner is that the network device carries the identification information of the synchronization signal block in a physical broadcast channel PBCH included in the synchronization signal block.

Specifically, the network device may carry all the 4-bit identification information of the synchronization signal block in the physical broadcast channel PBCH. For example, FIG. 2 shows a schematic structural diagram of the synchronization signal block 1, and the network device can carry all the identification information 0001 of the synchronization signal block 1 in the physical broadcast channel PBCH included in the synchronization signal block 1.

Another possible implementation manner is that the network device carries the identification information of the synchronization signal block in a demodulation reference signal DMRS of the PBCH included in the synchronization signal block.

Specifically, the network device may carry all the 4-bit identification information of the synchronization signal block in a DeModulation Reference Signal (DMRS) of the PBCH included in the synchronization signal block. The sync signal block may include both PBCH-DMRS and PBCH, and the PBCH-DMRS and PBCH may occupy different subcarriers in the same sync signal block. The PBCH-DMRS may implicitly carry the identification information of the synchronization signal block, and the PBCH may explicitly carry the identification information of the synchronization signal block.

Specifically, one way of generating the PBCH-DMRS sequence is: initializing the PBCH-DMRS sequence generator by using c _init , and generating the PBCH-DMRS sequence by the PBCH-DMRS sequence generator. c _init is an initialization parameter when the PBCH-DMRS sequence is generated. The definition of c _init is as follows in formula (1):

Where i _SSB represents a decimal number corresponding to 4 bits of the identification information of the synchronization signal block,

Indicates the cell identity, n _hf represents the field number, and n _hf =0.

A further feasible implementation manner is: the network device carries a part of the bit corresponding to the identifier information of the synchronization signal block in a PBCH included in the synchronization signal block; and the network device identifies the synchronization signal block The remaining bits of the information are carried in the demodulation reference signal DMRS of the PBCH included in the synchronization signal block.

Specifically, the network device may carry part of the 4-bit identification information of the synchronization signal block in the PBCH of the synchronization signal block, and carry the remaining bits in the 4-bit identification information of the synchronization signal block in the synchronization signal block. The demodulation reference signal DMRS included in the PBCH. The PBCH-DMRS implicitly carries some bits, and the PBCH explicitly carries the remaining bits.

For example, FIG. 2 is a schematic structural diagram of the synchronization signal block 1, and the identification information of the synchronization signal block 1 is 0001, and the network device can carry the lowest bit 3 bits of 0001, for example, 001, through the PBCH-DMRS of the synchronization signal block 1, The highest bit of 1 bit, for example 0, is carried by the PBCH of the sync signal block 1. At this time, i _{SSB in} Formula 1 indicates the decimal number corresponding to the lowest 3 bits of the identification information 0001 of the sync signal block 1.

In other embodiments, the network device is not limited to carrying the lowest 3 bits of the 4-bit identification information through the PBCH-DMRS of the synchronization signal block 1, and may also use the lowest 2 bits of the 4-bit identification information, up to 2 Some bits such as bits, lowest 1 bit, or up to 3 bits are carried in the PBCH-DMRS, and the remaining bits are carried in the PBCH.

In this embodiment, the identifier information of each synchronization signal block that is actually sent by the network device is carried in the synchronization signal block. When the terminal device receives a synchronization signal block, the terminal device passes the identifier carried in the synchronization signal block. The information can be used to know which synchronization signal block is sent by the network device to the terminal device. In addition, the terminal device can learn the network by using the identification information carried in the at least one synchronization signal block received in the half wireless frame, that is, the 5 millisecond time window. What synchronization signal blocks are sent by the device to the terminal device, which improves the communication efficiency between the network device and the terminal device.

The network device uses any mapping manner described in the foregoing embodiment, and after mapping 16 synchronization signal blocks in a half radio frame, may send at least one synchronization to the terminal device within a time corresponding to the half radio frame. In the signal block, the number of the synchronization signal blocks that the network device actually sends may not be 16, so in the embodiment, the network device may further send indication information to the terminal device, where the indication information is used to indicate the network device. The at least one synchronization signal block that is sent, for example, the network device can notify the terminal device by which the synchronization signal block that is actually transmitted is which one or more of the 16 synchronization signal blocks. The network device sends the indication information to the terminal device, including the following feasible implementation manners:

A feasible implementation manner is that the indication information sent by the network device to the terminal device may be a 16-bit bitmap, where each bit in the 16-bit bitmap is used to indicate one of the 16 synchronization signal blocks. Whether the block is actually sent. For example, when a certain bit is 0, it indicates that the network device does not send the synchronization signal block corresponding to the bit to the terminal device. When the bit is 1, it indicates that the network device actually sends the bit to the terminal device. Corresponding sync signal block.

Another possible implementation manner is to use a two-layer indication method to indicate at least one synchronization signal block that the network device actually transmits. Specifically, the 16 synchronization signal blocks are divided into a plurality of synchronization signal block groups. As shown in FIG. 12, 16 synchronization signal blocks are divided into 4 synchronization signal block groups, and each synchronization signal block group includes 4 synchronization groups. The signal blocks, for example, the first group, the second group, the third group, and the fourth group respectively include four synchronization signal blocks. The indication information sent by the network device to the terminal device may specifically include the first information and the second information, the first information may be a 4-bit bitmap, and the second information may be a 4-bit bitmap, that is, the indication The information may specifically include two 4-bit bit maps, wherein a 4-bit bit map is used to indicate a target sync signal block group to which the sync signal block actually transmitted by the network device in the four sync signal block groups belongs, and another 4-bit The bit map is used to indicate a sync signal block actually transmitted by the network device in the target sync signal block group. This embodiment does not limit the order of the two 4-bit bit maps.

The two 4-bit bit maps may constitute an 8-bit bit sequence. Optionally, in the 8-bit bit sequence, the first 4 bits of the bit map are used to indicate that the target synchronization signal block group is actually transmitted by the network device. The synchronization signal block, the last 4 bits of the bit map is used to indicate the target synchronization signal block group to which the synchronization signal block actually transmitted by the network device belongs in the 4 synchronization signal block groups. For example, the 8-bit bit sequence is 00110001, indicating that the synchronization signal block actually transmitted by the network device to the terminal device is the third synchronization signal block and the fourth synchronization signal block in the fourth synchronization signal block group, if 16 The synchronization signal block numbers are 0 to 15, and the synchronization signal block actually transmitted by the network device to the terminal device is the synchronization signal block 14 and the synchronization signal block 15 in the 16 synchronization signal blocks.

Similarly, if the 8-bit bit sequence is 00110011, the synchronization signal block that the network device actually transmits to the terminal device is the third synchronization signal block and the fourth synchronization signal block in the third synchronization signal block group, and The third sync signal block and the fourth sync signal block in the fourth sync signal block group, if 16 sync signal blocks are numbered from 0 to 15, the sync signal block actually transmitted by the network device to the terminal device is The sync signal block 10, the sync signal block 11, the sync signal block 14, and the sync signal block 15 among the 16 sync signal blocks.

In addition, the network device may send the indication information to the terminal device by using Radio Resource Control (RRC) signaling.

In this embodiment, the network device sends the indication information to the terminal device, and the network device can notify the terminal device by using the indication information, which one or more of the 16 synchronization signal blocks are actually sent by the terminal device, and The two-layer indication method is used to indicate at least one synchronization signal block actually sent by the network device, so that the indication information of the network device to the terminal device is reduced from 16 bits to 8 bits, thereby improving network resource utilization.

FIG. 13 is a schematic structural diagram of a communication apparatus according to an embodiment of the present application. As shown in FIG. 13, the communication device 130 includes: a determining module 131 and a sending module 132. The determining module 131 is configured to determine a position of 16 sync signal blocks in a half radio frame, and a sending module 132, configured to The at least one synchronization signal block is transmitted to the terminal device within a time corresponding to the half of the radio frame; wherein the carrier frequency is in a range of 3 GHz to 6 GHz.

In FIG. 13, further, the determining module 131 determines the position of the 16 sync signal blocks in the half radio frame, specifically for mapping each sync signal block of the 16 sync signal blocks to the half radio frame. On the corresponding OFDM symbol, each sync signal block occupies 4 OFDM symbols; the subcarrier spacing is 30 KHz, the half radio frame includes 10 slots in the time domain, and each slot includes 14 OFDM in the time domain. The symbol, the 140 OFDM symbols corresponding to the half radio frame are numbered from 0 to 139.

In the foregoing embodiment, when the determining module 131 maps each of the 16 synchronization signal blocks to the OFDM symbol corresponding to the half of the radio frame, the method is specifically configured to: synchronize the 16 synchronizations by using the first mapping manner. The first 8 sync signal blocks in the signal block are mapped to the OFDM symbols corresponding to the first 5 slots in the half radio frame; and the last 8 sync signal blocks in the 16 sync signal blocks are mapped to the second mapping manner. On the OFDM symbol corresponding to the last 5 slots in the half of the radio frame.

In the above embodiment, the first mapping manner is the same as the second mapping manner.

In the above embodiment, the index of the first OFDM symbol occupied by each of the 16 sync signal blocks in the half radio frame is {2, 8, 72, 78} + 14 * n, n =0, 1, 2, 3.

In the above embodiment, the index of the first OFDM symbol occupied by each synchronization signal block in the 16 synchronization signal blocks in the half radio frame is {4, 8, 16, 20, 74, 78, 86, 90}+28*n, n=0, 1.

In the above embodiment, the first mapping mode and the second mapping mode are mirror images of each other.

In the above embodiment, the index of the first OFDM symbol occupied by each of the 16 sync signal blocks in the half radio frame is {2, 8, 86, 92} + 14 * n, n =0, 1, 2, 3.

In the above embodiment, the index of the first OFDM symbol occupied by each of the 16 sync signal blocks in the half radio frame is {4, 8, 16, 20, 88, 92, 100, 104} + 28 *n, n=0, 1.

In the foregoing embodiment, when the determining module 131 maps each of the 16 synchronization signal blocks to the OFDM symbol corresponding to the half of the radio frame, the determining module 131 is specifically configured to: map the 16 synchronization signal blocks to the OFDM symbol. On the OFDM symbols corresponding to the first 8 slots in the half of the radio frames, each slot corresponds to two sync signal blocks.

In the above embodiment, the index of the first OFDM symbol occupied by each synchronization signal block in the 16 synchronization signal blocks in the half radio frame is {2, 8} + 14 * n, n = 0, 1 ,..., 7.

In the above embodiment, the index of the first OFDM symbol occupied by each of the 16 sync signal blocks in the half radio frame is {4, 8, 16, 20} + 28 * n, n =0, 1, 2, 3.

In the above embodiment, the subcarrier spacing is 15 kHz, and the half radio frame includes 5 slots in the time domain, each slot includes 14 OFDM symbols in the time domain, and 70 slots corresponding to the half radio frame. The OFDM symbols are numbered from 0 to 69.

In the above embodiment, the index of the first OFDM symbol occupied by each of the 16 sync signal blocks in the half radio frame is 2+4*n, n=0, 1, . . . , 15 .

In the above embodiment, the index of the first OFDM symbol occupied by each of the 16 sync signal blocks in the half radio frame is {2, 36} + 4 * n, n = 0, 1 ,..., 7.

In the above embodiment, the communication device 30 further includes an identification module 133, and the identification module 133 is configured to carry the identification information of the synchronization signal block in the synchronization signal block.

In the foregoing embodiment, the identifier module 133 is specifically configured to carry the identifier information of the synchronization signal block in a physical broadcast channel PBCH included in the synchronization signal block.

In the above embodiment, the identifier module 133 is specifically configured to carry the identifier information of the synchronization signal block in the demodulation reference signal DMRS of the PBCH included in the synchronization signal block.

In the above embodiment, the identifier module 133 is specifically configured to carry part of the bit corresponding to the identifier information of the synchronization signal block in the PBCH included in the synchronization signal block; and carry the remaining bits of the identifier information of the synchronization signal block in the PBCH The sync signal block includes a demodulation reference signal DMRS of the PBCH.

In the foregoing embodiment, the sending module 132 is further configured to: send the indication information to the terminal device, where the indication information is used to indicate the at least one synchronization signal block sent by the network device.

In the above embodiment, the 16 sync signal blocks are divided into a plurality of sync signal block groups, each sync signal block group includes at least one sync signal block; the indication information includes first information and second information, the first information And indicating a target synchronization signal block group in the plurality of synchronization signal block groups, the target synchronization signal block group includes the at least one synchronization signal block sent by the network device; the second information is used to indicate the target synchronization signal block group The at least one sync signal block sent by the network device.

The communication device of the embodiment shown in FIG. 13 can be used to perform the technical solution of the foregoing method embodiment, and the implementation principle and the technical effect are similar, and details are not described herein again.

It should be understood that the division of each module of the above network device is only a division of logical functions, and the actual implementation may be integrated into one physical entity in whole or in part, or may be physically separated. And these modules can all be implemented by software in the form of processing component calls; or all of them can be realized in the form of hardware; some modules can be realized by software in the form of processing component calls, and some modules are realized by hardware. For example, the determining module may be a separately set processing component, or may be integrated in a chip of the network device, or may be stored in a memory of the network device in the form of a program, and is called by a processing component of the network device. And perform the functions of each of the above modules. The implementation of other modules is similar. In addition, all or part of these modules can be integrated or implemented independently. The processing elements described herein can be an integrated circuit with signal processing capabilities. In the implementation process, each step of the above method or each of the above modules may be completed by an integrated logic circuit of hardware in the processor element or an instruction in a form of software.

For example, the above modules may be one or more integrated circuits configured to implement the above methods, such as one or more Application Specific Integrated Circuits (ASICs), or one or more microprocessors (digital) Singnal processor (DSP), or one or more Field Programmable Gate Array (FPGA). As another example, when one of the above modules is implemented in the form of a processing component scheduler, the processing component can be a general purpose processor, such as a central processing unit (CPU) or other processor that can invoke the program. As another example, these modules can be integrated and implemented in the form of a system-on-a-chip (SOC).

FIG. 14 is a schematic structural diagram of another network device according to an embodiment of the present disclosure. As shown in FIG. 14, the network device 140 includes a memory 141, a processor 142, and a transmitter 143, wherein the memory 141 is used to store a computer program; the processor 142 calls the computer program, and when the computer program is executed, The following operations are performed: determining a position of the 16 synchronization signal blocks in the half of the radio frame; the transmitter 143 is configured to send the at least one synchronization signal block to the terminal device in a time corresponding to the half of the radio frame; The carrier frequency is in the range of 3 GHz to 6 GHz.

In FIG. 14, further, when the processor 142 determines the position of the 16 sync signal blocks in the half radio frame, the method is specifically configured to: map each sync signal block of the 16 sync signal blocks to the half wireless On the OFDM symbol corresponding to the frame, each synchronization signal block occupies 4 OFDM symbols; the subcarrier spacing is 30 KHz, the half radio frame includes 10 time slots in the time domain, and each time slot includes 14 in the time domain. For OFDM symbols, the 140 OFDM symbols corresponding to the half radio frame are numbered from 0 to 139.

In the foregoing embodiment, when the processor 142 maps each of the 16 synchronization signal blocks to the OFDM symbol corresponding to the half of the radio frame, the processor 142 is specifically configured to: synchronize the 16 synchronizations by using the first mapping manner. The first 8 sync signal blocks in the signal block are mapped to the OFDM symbols corresponding to the first 5 slots in the half radio frame; and the last 8 sync signal blocks in the 16 sync signal blocks are mapped to the second mapping manner. On the OFDM symbol corresponding to the last 5 slots in the half of the radio frame.

In the above embodiment, when the processor 142 maps each of the 16 synchronization signal blocks to the OFDM symbol corresponding to the half of the radio frame, the processor 142 is specifically configured to: map the 16 synchronization signal blocks to the OFDM symbol. On the OFDM symbols corresponding to the first 8 slots in the half of the radio frames, each slot corresponds to two sync signal blocks.

In the above embodiment, the processor 142 is further configured to: carry the identification information of the synchronization signal block in the synchronization signal block.

In the above embodiment, the processor 142 is specifically configured to carry the identification information of the synchronization signal block in a physical broadcast channel PBCH included in the synchronization signal block.

In the above embodiment, the processor 142 is specifically configured to carry the identification information of the synchronization signal block in the demodulation reference signal DMRS of the PBCH included in the synchronization signal block.

In the above embodiment, the processor 142 is specifically configured to carry part of the bit corresponding to the identification information of the synchronization signal block in the PBCH included in the synchronization signal block; and carry the remaining bits of the identification information of the synchronization signal block in the PBCH The sync signal block includes a demodulation reference signal DMRS of the PBCH.

In the above embodiment, the transmitter is further configured to: send the indication information to the terminal device, where the indication information is used to indicate the at least one synchronization signal block sent by the network device.

The network device of the embodiment shown in FIG. 14 can be used to implement the technical solution of the foregoing method embodiment, and the implementation principle and the technical effect are similar, and details are not described herein again.

FIG. 15 is a schematic structural diagram of still another network device according to an embodiment of the present application. The network device may specifically be a base station. As shown in FIG. 15, the base station includes an antenna 150, a radio frequency device 160, and a baseband device 170. The antenna 150 is coupled to the radio frequency device 160. In the uplink direction, the radio frequency device 160 receives the information transmitted by the terminal through the antenna 150, and transmits the information transmitted by the terminal to the baseband device 170 for processing. In the downlink direction, the baseband device 170 processes the information of the terminal and sends it to the radio frequency device 160. The radio frequency device 160 processes the information of the terminal and sends it to the terminal via the antenna 150.

The above network device may be located in the baseband device 170. In one implementation, each of the above modules is implemented in the form of a processing component scheduler, for example, the baseband device 170 includes a processing component 171 and a storage component 172, and the processing component 171 invokes a program stored by the storage component 172. To perform the method in the above method embodiments. In addition, the baseband device 170 may further include an interface 173 for interacting with the radio frequency device 160, such as a common public radio interface (CPRI).

In another implementation, the above modules may be one or more processing elements configured to implement the above methods, the processing elements being disposed on the baseband device 170, where the processing elements may be integrated circuits, such as: one or more ASICs, or one or more DSPs, or one or more FPGAs, etc. These integrated circuits can be integrated to form a chip.

For example, the above various modules may be integrated together in the form of a system-on-a-chip (SOC), for example, the baseband device 170 includes a SOC chip for implementing the above method. The processing component 171 and the storage component 172 may be integrated into the chip, and the functions of the above method or the above modules may be implemented by the processing component 171 calling the stored program of the storage component 172; or, at least one integrated circuit may be integrated in the chip. The functions of the above methods or the above modules may be implemented; or, the above implementation manners may be combined, and the functions of some modules are implemented by the processing component calling program, and the functions of some modules are implemented by the form of an integrated circuit.

Regardless of the manner, in summary, the above network device includes at least one processing element, a storage element and a communication interface, wherein at least one of the processing elements is used to perform the method provided by the above method embodiments. The processing element may perform some or all of the steps in the above method embodiments in a manner of executing the program stored in the storage element in the first manner; or in the second manner: through the integrated logic circuit of the hardware in the processor element Some or all of the steps in the foregoing method embodiments are performed in combination with the instructions. Of course, the methods provided in the foregoing method embodiments may also be implemented in combination with the first mode and the second mode.

The processing elements herein are the same as described above, and may be a general purpose processor, such as a Central Processing Unit (CPU), or may be one or more integrated circuits configured to implement the above method, for example: one or more specific An Application Specific Integrated Circuit (ASIC), or one or more digital singnal processors (DSPs), or one or more Field Programmable Gate Arrays (FPGAs). The storage element can be a memory or a collective name for a plurality of storage elements.

In addition, the embodiment of the present application further provides a computer readable storage medium, where the computer readable storage medium stores a computer program, and when executed on the computer, causes the computer to perform the transmission of the synchronization signal block described in the foregoing embodiment. method.

In addition, the embodiment of the present application further provides a computer program product, which comprises a computer program, when it is run on a computer, causes the computer to execute the transmission method of the synchronization signal block described in the foregoing embodiment.

FIG. 16 is a schematic structural diagram of another communication apparatus according to an embodiment of the present application. As shown in FIG. 16, the communication device 160 includes: a receiving module 161 and an access module 162. The receiving module 161 is configured to receive at least one synchronization signal block sent by the network device, and the access module 162 is configured to access the cell.

The communication device of the embodiment shown in FIG. 16 can be used to implement the technical solution of the foregoing method embodiment, and the implementation principle and the technical effect are similar, and details are not described herein again.

FIG. 17 is a schematic structural diagram of a terminal device according to an embodiment of the present disclosure. As shown in FIG. 17, the terminal device 170 includes a memory 171, a processor 172, and a receiver 173, wherein the memory 171 is used to store a computer program; the processor 172 calls the computer program, and when the computer program is executed, The following operations are performed: receiving, by the receiver 173, at least one synchronization signal block sent by the network device; accessing the cell according to the at least one synchronization signal block.

The terminal device of the embodiment shown in FIG. 17 can be used to perform the technical solution of the foregoing method embodiment, and the implementation principle and the technical effect are similar, and details are not described herein again.

In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented in software, it may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions described in accordance with the present application are generated in whole or in part. The computer can be a general purpose computer, a special purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer readable storage medium or transferred from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions can be from a website site, computer, server or data center Transfer to another website site, computer, server, or data center via wired (eg, coaxial cable, fiber optic, digital subscriber line) or wireless (eg, infrared, wireless, microwave, etc.). The computer readable storage medium can be any available media that can be accessed by a computer or a data storage device such as a server, data center, or the like that includes one or more available media. The usable medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a DVD), or a semiconductor medium (eg, a solid state hard disk).

Claims

A method for transmitting a synchronization signal block, comprising:

The network device determines the location of the 16 sync signal blocks in the half of the radio frame;

Transmitting, by the network device, at least one synchronization signal block to the terminal device;

Among them, the carrier frequency is in the range of 3 GHz to 6 GHz.
The method according to claim 1, wherein the determining, by the network device, the location of the 16 sync signal blocks in the half of the radio frame comprises:

The network device maps each synchronization signal block of the 16 synchronization signal blocks to the OFDM symbol corresponding to the half radio frame, and each synchronization signal block occupies 4 OFDM symbols;

The subcarrier spacing is 30 KHz, and the half radio frame includes 10 time slots in the time domain, each time slot includes 14 OFDM symbols in the time domain, and 140 OFDM symbols corresponding to the half radio frame. The number is 0 to 139.
The method according to claim 2, wherein the network device maps each of the 16 synchronization signal blocks to the OFDM symbol corresponding to the half of the radio frame, including:

The network device maps the first 8 synchronization signal blocks of the 16 synchronization signal blocks to the OFDM symbols corresponding to the first 5 time slots of the half radio frame in a first mapping manner;

And the network device maps the last 8 synchronization signal blocks of the 16 synchronization signal blocks to the OFDM symbols corresponding to the last 5 time slots in the half radio frame in a second mapping manner.
The method according to claim 3, wherein the first mapping manner and the second mapping manner are the same.
The method according to claim 4, wherein the index of the first OFDM symbol occupied by each of the 16 sync signal blocks in the half of the radio frame is {2, 8, 72 , 78} + 14 * n, n = 0, 1, 2, 3.
The method according to claim 4, wherein the index of the first OFDM symbol occupied by each of the 16 sync signal blocks in the half of the radio frame is {4, 8, 16 , 20, 74, 78, 86, 90} + 28 * n, n = 0, 1.
The method according to claim 3, wherein the first mapping mode and the second mapping mode are mirror images of each other.
The method according to claim 7, wherein the index of the first OFDM symbol occupied by each of the 16 sync signal blocks in the half of the radio frame is {2, 8, 86 , 92} + 14 * n, n = 0, 1, 2, 3.
The method according to claim 7, wherein the index of the first OFDM symbol occupied by each of the 16 sync signal blocks in the half of the radio frame is {4, 8, 16 , 20, 88, 92, 100, 104} + 28 * n, n = 0, 1.
The method according to claim 2, wherein the network device maps each of the 16 synchronization signal blocks to the OFDM symbol corresponding to the half of the radio frame, including:

The network device maps the 16 synchronization signal blocks to OFDM symbols corresponding to the first 8 time slots of the half radio frame, and each time slot corresponds to two synchronization signal blocks.
The method according to claim 10, wherein the index of the first OFDM symbol occupied by each of the 16 sync signal blocks in the half of the radio frame is {2, 8} + 14*n, n=0, 1, ..., 7.
The method according to claim 10, wherein an index of the first OFDM symbol occupied by each of the 16 sync signal blocks in the half of the radio frame is {4, 8, 16 , 20}+28*n, n=0, 1, 2, 3.
The method according to claim 1, wherein the subcarrier spacing is 15 kHz, the half radio frame comprises 5 time slots in the time domain, and each time slot includes 14 OFDM symbols in the time domain. The 70 OFDM symbols corresponding to the half radio frame are numbered 0 to 69.
The method according to claim 13, wherein the index of the first OFDM symbol occupied by each of the 16 sync signal blocks in the half of the radio frame is 2+4*n, n=0,1,...,15.
The method according to claim 13, wherein the index of the first OFDM symbol occupied by each of the 16 sync signal blocks in the half of the radio frame is {2, 36} + 4*n, n=0, 1, ..., 7.
The method according to any one of claims 1 to 15, wherein the method further comprises:

The network device carries the identification information of the synchronization signal block in the synchronization signal block.
The method according to claim 16, wherein the network device carries the identification information of the synchronization signal block in the synchronization signal block, including:

The network device carries the identification information of the synchronization signal block in a physical broadcast channel PBCH included in the synchronization signal block.
The method according to claim 16, wherein the network device carries the identification information of the synchronization signal block in the synchronization signal block, including:

The network device carries the identification information of the synchronization signal block in a demodulation reference signal DMRS of the PBCH included in the synchronization signal block.
The method according to claim 16, wherein the network device carries the identification information of the synchronization signal block in the synchronization signal block, including:

Transmitting, by the network device, a partial bit corresponding to the identifier information of the synchronization signal block in a PBCH included in the synchronization signal block;

The network device carries the remaining bits of the identification information of the synchronization signal block in a demodulation reference signal DMRS of the PBCH included in the synchronization signal block.
The method of any of claims 1 to 19, wherein the method further comprises:

The network device sends the indication information to the terminal device, where the indication information is used to indicate the at least one synchronization signal block sent by the network device.
The method according to claim 20, wherein the 16 sync signal blocks are divided into a plurality of sync signal block groups, and each sync signal block group includes at least one sync signal block;

The indication information includes first information and second information, the first information is used to indicate a target synchronization signal block group in a plurality of synchronization signal block groups, and the target synchronization signal block group includes a location sent by the network device Said at least one synchronization signal block;

The second information is used to indicate the at least one synchronization signal block sent by the network device in the target synchronization signal block group.
A communication device, comprising:

a determining module, configured to determine a position of 16 sync signal blocks in a half of the radio frame;

a sending module, configured to send at least one synchronization signal block to the terminal device;

Among them, the carrier frequency is in the range of 3 GHz to 6 GHz.
The communication device according to claim 22, wherein the determining module determines the position of the 16 sync signal blocks in the half of the radio frame, specifically for:

Mapping each synchronization signal block of the 16 synchronization signal blocks to the OFDM symbol corresponding to the half radio frame, each synchronization signal block occupying 4 OFDM symbols;

The subcarrier spacing is 30 KHz, and the half radio frame includes 10 time slots in the time domain, each time slot includes 14 OFDM symbols in the time domain, and 140 OFDM symbols corresponding to the half radio frame. The number is 0 to 139.
The communication device according to claim 23, wherein the determining module is configured to: when each of the 16 synchronization signal blocks is mapped to the OFDM symbol corresponding to the half of the radio frame, specifically:

Mapping the first 8 synchronization signal blocks of the 16 synchronization signal blocks to the OFDM symbols corresponding to the first 5 time slots in the half radio frame in a first mapping manner;

The last 8 sync signal blocks of the 16 sync signal blocks are mapped to the OFDM symbols corresponding to the last 5 slots of the half radio frame in a second mapping manner.
The communication device according to claim 24, wherein said first mapping mode and said second mapping mode are the same.
The communication apparatus according to claim 25, wherein an index of a first OFDM symbol occupied by each of the 16 sync signal blocks in the half of the radio frames is {2, 8, 72,78}+14*n, n=0, 1, 2, 3.
The communication apparatus according to claim 25, wherein an index of a first OFDM symbol occupied by each of the 16 sync signal blocks in the half of the radio frames is {4, 8, 16,20,74,78,86,90}+28*n, n=0,1.
The communication device according to claim 24, wherein said first mapping mode and said second mapping mode are mirror images of each other.
The communication apparatus according to claim 28, wherein an index of a first OFDM symbol occupied by each of the 16 sync signal blocks in the half of the radio frames is {2, 8, 86, 92} + 14 * n, n = 0, 1, 2, 3.
The communication apparatus according to claim 28, wherein an index of a first OFDM symbol occupied by each of the 16 sync signal blocks in the half of the radio frames is {4, 8, 16,20,88,92,100,104}+28*n, n=0,1.
The communication device according to claim 23, wherein the determining module is configured to: when each of the 16 synchronization signal blocks is mapped to the OFDM symbol corresponding to the half of the radio frame, specifically:

And mapping the 16 synchronization signal blocks to OFDM symbols corresponding to the first 8 time slots of the half radio frame, where each time slot corresponds to two synchronization signal blocks.
The communication apparatus according to claim 31, wherein an index of a first OFDM symbol occupied by each of the 16 sync signal blocks in the half of the radio frames is {2, 8} +14*n, n=0, 1, ..., 7.
The communication apparatus according to claim 31, wherein an index of a first OFDM symbol occupied by each of the 16 sync signal blocks in the half of the radio frames is {4, 8, 16,20}+28*n,n=0,1,2,3.
The communication apparatus according to claim 22, wherein the subcarrier spacing is 15 kHz, the half radio frame includes 5 time slots in the time domain, and each time slot includes 14 OFDM symbols in the time domain. The 70 OFDM symbols corresponding to the half radio frame are numbered from 0 to 69.
The communication apparatus according to claim 34, wherein an index of a first OFDM symbol occupied by each of the 16 sync signal blocks in the half of the radio frames is 2+4*n , n=0,1,...,15.
The communication apparatus according to claim 34, wherein an index of a first OFDM symbol occupied by each of the 16 sync signal blocks in the half of the radio frames is {2, 36} +4*n, n=0, 1, ..., 7.
The communication device according to any one of claims 22 to 36, further comprising:

And an identifier module, configured to carry identifier information of the synchronization signal block in the synchronization signal block.
The communication device according to claim 37, wherein the identification module is specifically configured to carry the identification information of the synchronization signal block in a physical broadcast channel PBCH included in the synchronization signal block.
The communication device according to claim 37, wherein the identification module is specifically configured to carry the identification information of the synchronization signal block in a demodulation reference signal DMRS of the PBCH included in the synchronization signal block.
The communication device according to claim 37, wherein the identification module is specifically configured to carry a partial bit corresponding to the identification information of the synchronization signal block in a PBCH included in the synchronization signal block; The remaining bits of the identification information of the signal block are carried in the demodulation reference signal DMRS of the PBCH included in the synchronization signal block.
The communication device according to any one of claims 22 to 40, wherein the transmitting module is further configured to:

Sending indication information to the terminal device, where the indication information is used to indicate the at least one synchronization signal block sent by the sending module.
The communication apparatus according to claim 41, wherein said 16 sync signal blocks are divided into a plurality of sync signal block groups, and each sync signal block group includes at least one sync signal block;

The indication information includes first information and second information, where the first information is used to indicate a target synchronization signal block group in a plurality of synchronization signal block groups, and the target synchronization signal block group includes a location sent by the sending module. Said at least one synchronization signal block;

The second information is used to indicate the at least one synchronization signal block sent by the sending module in the target synchronization signal block group.
A communication device, comprising:

An interface and a processor, the interface coupled to the processor;

The processor is operative to perform the method of any of claims 1-21.
A method for transmitting a synchronization signal block, comprising:

Receiving, by the terminal device, at least one synchronization signal block sent by the network device;

The terminal device accesses a cell.
A communication device, comprising:

a receiving module, configured to receive at least one synchronization signal block sent by the network device;

An access module, configured to access a cell.
A communication device, comprising:

An interface and a processor, the interface coupled to the processor;

The processor is for performing the method of claim 44.
A communication device, comprising: a processor, the processor and a memory coupled;

The memory for storing a computer program;

The processor is configured to execute a computer program stored in the memory to cause the communication device to perform the method of any one of claims 1-21 or 44.
A communication device, comprising: a processor, a memory and a transceiver;

The memory for storing a computer program;

The processor is configured to execute a computer program stored in the memory to cause the communication device to perform the method of any one of claims 1-21 or 44.
A processor, comprising: at least one circuit for performing the method of any one of claims 1-21 or 44.
A readable storage medium, comprising a program or an instruction, the method of any one of claims 1-21 or 44 being executed when the program or instruction is run on a computer.
A computer program, comprising a program or an instruction, the method of any one of claims 1-21 or 44 being executed when the program or instruction is run on a computer.
A system, characterized in that the system comprises a network device according to any of claims 1-21 and a terminal device according to claim 44.