CN110134442A - 控制非易失性存储器通道的系统及方法 - Google Patents
控制非易失性存储器通道的系统及方法 Download PDFInfo
- Publication number
- CN110134442A CN110134442A CN201910482476.6A CN201910482476A CN110134442A CN 110134442 A CN110134442 A CN 110134442A CN 201910482476 A CN201910482476 A CN 201910482476A CN 110134442 A CN110134442 A CN 110134442A
- Authority
- CN
- China
- Prior art keywords
- sequencer
- micro
- data
- sequence
- block
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
- G06F3/0613—Improving I/O performance in relation to throughput
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1694—Configuration of memory controller to different memory types
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0683—Plurality of storage devices
- G06F3/0688—Non-volatile semiconductor memory arrays
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/04—Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Human Computer Interaction (AREA)
- Read Only Memory (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Microcomputers (AREA)
- Memory System (AREA)
- Advance Control (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/768,215 | 2013-02-15 | ||
| US13/768,215 US9081666B2 (en) | 2013-02-15 | 2013-02-15 | Non-volatile memory channel control using a general purpose programmable processor in combination with a low level programmable sequencer |
| CN201410027208.2A CN103995686B (zh) | 2013-02-15 | 2014-01-21 | 控制非易失性存储器通道的系统及方法 |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410027208.2A Division CN103995686B (zh) | 2013-02-15 | 2014-01-21 | 控制非易失性存储器通道的系统及方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110134442A true CN110134442A (zh) | 2019-08-16 |
Family
ID=50097556
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910482476.6A Pending CN110134442A (zh) | 2013-02-15 | 2014-01-21 | 控制非易失性存储器通道的系统及方法 |
| CN201410027208.2A Expired - Fee Related CN103995686B (zh) | 2013-02-15 | 2014-01-21 | 控制非易失性存储器通道的系统及方法 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410027208.2A Expired - Fee Related CN103995686B (zh) | 2013-02-15 | 2014-01-21 | 控制非易失性存储器通道的系统及方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US9081666B2 (enExample) |
| EP (1) | EP2767899A3 (enExample) |
| JP (1) | JP6577166B2 (enExample) |
| KR (1) | KR102170644B1 (enExample) |
| CN (2) | CN110134442A (enExample) |
| TW (1) | TWI633433B (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112486516A (zh) * | 2020-06-03 | 2021-03-12 | 英韧科技(上海)有限公司 | 由nand闪存控制器实现的电镜像 |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102081588B1 (ko) * | 2013-08-08 | 2020-02-26 | 삼성전자 주식회사 | Ecc 디코더의 동작 방법 및 그것을 포함하는 메모리 컨트롤러 |
| EP3201781A4 (en) * | 2014-10-03 | 2018-05-30 | Agency for Science, Technology and Research | Active storage unit and array |
| US20160179388A1 (en) * | 2014-12-18 | 2016-06-23 | CNEXLABS, Inc. | Method and apparatus for providing programmable nvm interface using sequencers |
| US20170046102A1 (en) * | 2015-08-14 | 2017-02-16 | Marvell World Trade Ltd. | Flexible interface for nand flash memory |
| US10175902B2 (en) * | 2016-06-27 | 2019-01-08 | Micron Technology, Inc.. | Managing host communication with a regulator in a low power mode |
| AU2016416417B2 (en) * | 2016-07-29 | 2021-12-09 | Razer (Asia-Pacific) Pte. Ltd. | Interface devices, methods for controlling an interface device, and computer-readable media |
| CN108139993B (zh) * | 2016-08-29 | 2020-06-16 | 华为技术有限公司 | 内存装置、内存控制器、数据缓存装置及计算机系统 |
| US10430085B2 (en) | 2016-11-08 | 2019-10-01 | Micron Technology, Inc. | Memory operations on data |
| US10261876B2 (en) | 2016-11-08 | 2019-04-16 | Micron Technology, Inc. | Memory management |
| US10628049B2 (en) | 2017-07-12 | 2020-04-21 | Sandisk Technologies Llc | Systems and methods for on-die control of memory command, timing, and/or control signals |
| JP2020046918A (ja) | 2018-09-19 | 2020-03-26 | キオクシア株式会社 | 記憶装置及び制御方法 |
| CN112925728B (zh) * | 2019-05-05 | 2024-09-06 | 长江存储科技有限责任公司 | 具有序列处理单元的存储器控制系统 |
| EP3751572B1 (en) * | 2019-06-13 | 2021-12-01 | Melexis Technologies NV | Memory device |
| KR102678472B1 (ko) | 2019-07-17 | 2024-06-27 | 삼성전자주식회사 | 메모리 컨트롤러 및 이를 포함하는 저장 장치 |
| DE102020207616A1 (de) * | 2020-06-19 | 2021-12-23 | Robert Bosch Gesellschaft mit beschränkter Haftung | Verfahren zum Betreiben einer Recheneinheit |
| US11893244B2 (en) | 2021-10-12 | 2024-02-06 | Western Digital Technologies, Inc. | Hybrid memory management of non-volatile memory (NVM) devices for use with recurrent neural networks |
| US11755208B2 (en) * | 2021-10-12 | 2023-09-12 | Western Digital Technologies, Inc. | Hybrid memory management of non-volatile memory (NVM) devices for use with recurrent neural networks |
| WO2023091377A1 (en) * | 2021-11-22 | 2023-05-25 | Rambus Inc. | Logging burst error information of a dynamic random access memory (dram) using a buffer structure and signaling |
| KR102643031B1 (ko) * | 2023-09-07 | 2024-03-04 | 주식회사 잇다반도체 | 프로그램 가능 시퀀서와 이를 이용한 시스템 온 칩 장치 |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB0426773D0 (en) * | 2004-12-07 | 2005-01-12 | Hewlett Packard Development Co | Bufferless writing of data to memory |
| US20060168429A1 (en) * | 2005-01-27 | 2006-07-27 | Innovasic, Inc. | Deterministic microcontroller with configurable input/output interface |
| US20060168374A1 (en) * | 2005-01-27 | 2006-07-27 | Innovasic, Inc. | Configurable input/output interface |
| TW200743957A (en) * | 2006-05-16 | 2007-12-01 | Ite Tech Inc | Control device and control method for memory |
| CN102422271A (zh) * | 2009-05-06 | 2012-04-18 | 苹果公司 | 用于非易失性存储器系统的多页准备命令 |
Family Cites Families (29)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AU5442494A (en) | 1992-10-13 | 1994-05-09 | Compaq Computer Corporation | Disk array controller having advanced internal bus protocol |
| US5448709A (en) | 1992-10-13 | 1995-09-05 | Compaq Computer Corporation | Disk array controller having command descriptor blocks utilized by bus master and bus slave for respectively performing data transfer operations |
| US5918242A (en) * | 1994-03-14 | 1999-06-29 | International Business Machines Corporation | General-purpose customizable memory controller |
| US5721860A (en) * | 1994-05-24 | 1998-02-24 | Intel Corporation | Memory controller for independently supporting synchronous and asynchronous DRAM memories |
| US6505282B1 (en) * | 1994-11-30 | 2003-01-07 | Intel Corporation | Method and apparatus for determining memory types of a multi-type memory subsystem where memory of the different types are accessed using column control signals with different timing characteristics |
| US5719880A (en) * | 1996-09-20 | 1998-02-17 | Texas Instruments Incorporated, A Delaware Corporation | On-chip operation for memories |
| US6336174B1 (en) * | 1999-08-09 | 2002-01-01 | Maxtor Corporation | Hardware assisted memory backup system and method |
| US6668308B2 (en) * | 2000-06-10 | 2003-12-23 | Hewlett-Packard Development Company, L.P. | Scalable architecture based on single-chip multiprocessing |
| JP2002007200A (ja) * | 2000-06-16 | 2002-01-11 | Nec Corp | メモリ制御装置及び動作切替方法並びにインターフェース装置、半導体集積チップ、記録媒体 |
| DE10031223A1 (de) * | 2000-06-27 | 2002-01-10 | Philips Corp Intellectual Pty | Mikrocontroller |
| JP4722305B2 (ja) * | 2001-02-27 | 2011-07-13 | 富士通セミコンダクター株式会社 | メモリシステム |
| JP2003131940A (ja) * | 2001-10-25 | 2003-05-09 | Hitachi Ltd | メモリコントローラ装置 |
| JP3756818B2 (ja) * | 2002-01-09 | 2006-03-15 | 株式会社メガチップス | メモリ制御回路および制御システム |
| US20040054864A1 (en) * | 2002-09-13 | 2004-03-18 | Jameson Neil Andrew | Memory controller |
| US7277995B2 (en) * | 2003-10-29 | 2007-10-02 | Dot Hill Systems Corporation | Storage controller and method for performing host access control in the host interface adapter |
| JP4357331B2 (ja) * | 2004-03-24 | 2009-11-04 | 東芝メモリシステムズ株式会社 | マイクロプロセッサブートアップ制御装置、及び情報処理システム |
| US7308526B2 (en) * | 2004-06-02 | 2007-12-11 | Intel Corporation | Memory controller module having independent memory controllers for different memory types |
| US7680967B2 (en) | 2005-01-27 | 2010-03-16 | Innovasic, Inc. | Configurable application specific standard product with configurable I/O |
| US7673190B1 (en) * | 2005-09-14 | 2010-03-02 | Unisys Corporation | System and method for detecting and recovering from errors in an instruction stream of an electronic data processing system |
| US8291295B2 (en) | 2005-09-26 | 2012-10-16 | Sandisk Il Ltd. | NAND flash memory controller exporting a NAND interface |
| US7574611B2 (en) * | 2005-11-28 | 2009-08-11 | Atmel Corporation | Command decoder for microcontroller based flash memory digital controller system |
| US8775717B2 (en) | 2007-12-27 | 2014-07-08 | Sandisk Enterprise Ip Llc | Storage controller for flash memory including a crossbar switch connecting a plurality of processors with a plurality of internal memories |
| US7808807B2 (en) | 2008-02-26 | 2010-10-05 | Ovonyx, Inc. | Method and apparatus for accessing a multi-mode programmable resistance memory |
| WO2009145903A1 (en) * | 2008-05-29 | 2009-12-03 | Advanced Micro Devices, Inc. | Embedded programmable component for memory device training |
| US8180981B2 (en) | 2009-05-15 | 2012-05-15 | Oracle America, Inc. | Cache coherent support for flash in a memory hierarchy |
| US8266369B2 (en) * | 2009-12-18 | 2012-09-11 | Nxp B.V. | Flash memory interface |
| EP2539823B1 (en) * | 2010-02-23 | 2016-04-13 | Rambus Inc. | Time multiplexing at different rates to access different memory types |
| US9529712B2 (en) * | 2011-07-26 | 2016-12-27 | Nvidia Corporation | Techniques for balancing accesses to memory having different memory types |
| US9348774B2 (en) * | 2013-01-25 | 2016-05-24 | Seagate Technology Llc | Controller-opaque communication with non-volatile memory devices |
-
2013
- 2013-02-15 US US13/768,215 patent/US9081666B2/en not_active Expired - Fee Related
-
2014
- 2014-01-21 CN CN201910482476.6A patent/CN110134442A/zh active Pending
- 2014-01-21 CN CN201410027208.2A patent/CN103995686B/zh not_active Expired - Fee Related
- 2014-01-29 KR KR1020140011498A patent/KR102170644B1/ko active Active
- 2014-02-06 EP EP14154095.5A patent/EP2767899A3/en not_active Withdrawn
- 2014-02-07 TW TW103104182A patent/TWI633433B/zh not_active IP Right Cessation
- 2014-02-12 JP JP2014023971A patent/JP6577166B2/ja not_active Expired - Fee Related
-
2015
- 2015-06-03 US US14/729,659 patent/US9262084B2/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB0426773D0 (en) * | 2004-12-07 | 2005-01-12 | Hewlett Packard Development Co | Bufferless writing of data to memory |
| US20060168429A1 (en) * | 2005-01-27 | 2006-07-27 | Innovasic, Inc. | Deterministic microcontroller with configurable input/output interface |
| US20060168374A1 (en) * | 2005-01-27 | 2006-07-27 | Innovasic, Inc. | Configurable input/output interface |
| TW200743957A (en) * | 2006-05-16 | 2007-12-01 | Ite Tech Inc | Control device and control method for memory |
| CN102422271A (zh) * | 2009-05-06 | 2012-04-18 | 苹果公司 | 用于非易失性存储器系统的多页准备命令 |
Non-Patent Citations (1)
| Title |
|---|
| 李明磊等: "基于C8051F340的非易失大容量数据存储方案", 《电子设计工程》 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112486516A (zh) * | 2020-06-03 | 2021-03-12 | 英韧科技(上海)有限公司 | 由nand闪存控制器实现的电镜像 |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201502775A (zh) | 2015-01-16 |
| CN103995686A (zh) | 2014-08-20 |
| JP2014157603A (ja) | 2014-08-28 |
| US20140237162A1 (en) | 2014-08-21 |
| EP2767899A2 (en) | 2014-08-20 |
| US9081666B2 (en) | 2015-07-14 |
| US9262084B2 (en) | 2016-02-16 |
| KR102170644B1 (ko) | 2020-10-27 |
| TWI633433B (zh) | 2018-08-21 |
| EP2767899A3 (en) | 2016-08-17 |
| US20150268870A1 (en) | 2015-09-24 |
| CN103995686B (zh) | 2019-06-28 |
| KR20140103048A (ko) | 2014-08-25 |
| JP6577166B2 (ja) | 2019-09-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110134442A (zh) | 控制非易失性存储器通道的系统及方法 | |
| US8266369B2 (en) | Flash memory interface | |
| CN104520932B (zh) | 闪存存储器控制器 | |
| JP5960517B2 (ja) | フラッシュメディアコントローラの内部のメタデータハンドリング | |
| KR101560469B1 (ko) | 메모리 시스템 컨트롤러들을 포함하는 장치 및 관련 방법들 | |
| CN111679785A (zh) | 用于处理操作的存储器装置及其操作方法、数据处理系统 | |
| CN103034454B (zh) | 柔性闪存命令 | |
| CN103092782A (zh) | 用于闪存器件的闪存控制器硬件架构 | |
| CN103117797B (zh) | 高速载荷数据模拟源 | |
| KR20170131376A (ko) | 다중 레벨 셀 모드 비휘발성 메모리를 위한 비용 최적화된 단일 레벨 셀 모드 비휘발성 메모리 | |
| US11314418B2 (en) | Extensible storage system and method | |
| TWI519962B (zh) | 智慧雙資料率(ddr)記憶體控制器 | |
| TWI736957B (zh) | 用於資料傳送的系統及記憶體裝置 | |
| TWI848492B (zh) | 記憶體、記憶體的控制方法及記憶體系統 | |
| CN1504900B (zh) | 自内存读取数据的控制电路及其方法 | |
| CN103092781A (zh) | 闪存接口的有效利用 | |
| EP4070204A1 (en) | Data transfers between a memory and a distributed compute array | |
| CN102169717B (zh) | 一种具有数据处理功能的存储器装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20190816 |
|
| WD01 | Invention patent application deemed withdrawn after publication |