CN110111821A - A kind of magnetic RAM using distributed reference unit - Google Patents
A kind of magnetic RAM using distributed reference unit Download PDFInfo
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- CN110111821A CN110111821A CN201810103004.0A CN201810103004A CN110111821A CN 110111821 A CN110111821 A CN 110111821A CN 201810103004 A CN201810103004 A CN 201810103004A CN 110111821 A CN110111821 A CN 110111821A
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- unit
- reference unit
- storage
- magnetic ram
- storage word
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1653—Address circuits or decoders
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1659—Cell access
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1675—Writing or programming circuits or methods
Abstract
The present invention provides a kind of magnetic RAMs using distributed reference unit, including at least external circuit, memory cell array and set of reference cells, every a line of memory cell array has M storage word, each storage word has N number of byte, each byte has L bit, for each storage word or it is that each row configures a set of reference cells, has K reference unit in each set of reference cells.The present invention solves the problems, such as that reference unit is opposite in both economical method and drifts about.Reasonable layout of the reference unit in word and in row so that the drift of reference unit is solved the problems, such as very close to data cell with lower area cost from probability, and avoids and increases additional data storage cell read-write operation.
Description
Technical field
The present invention relates to a kind of storage devices, and in particular to a kind of magnetic random storage using distributed reference unit
Device belongs to technology of semiconductor chips field.
Background technique
MRAM is a kind of new memory and memory technology, can as SRAM/DRAM quick random read-write, can also picture
The same reservation data permanent after a loss of power of Flash flash memory.Its economy is comparable good, the silicon area ratio that unit capacity occupies
Playing SRAM has very big advantage, and the NOR Flash than being commonly used in such chip is also advantageous, compares embedded NOR
The advantage of Flash is bigger.Its performance is also fairly good, and read-write time delay then in various memories and is deposited close to best SRAM, power consumption
It is optimal in storage technology.And MRAM is incompatible with standard CMOS semiconductor technique unlike DRAM and Flash, and MRAM can be with
It is integrated into the same chip with logic circuit.
The principle of MRAM is the structure for being called MTJ (magnetic tunnel junction) based on one.It is pressed from both sides by two layers of ferrimagnet
One layer very thin non-ferric magnetic dielectric composition, as depicted in figs. 1 and 2.One layer of following ferromagnetic material is that have admittedly
Determine the reference layer 13 of the direction of magnetization, ferromagnetic material above is the memory layer 11 of changeable magnetization direction, remembers the magnetization side of layer 11
To can be parallel or antiparallel with reference layer 13.Due to the effect of quantum physics, electric current can pass through intermediate tunnel barrier
Layer 12, but the resistance of MTJ is related with the direction of magnetization of variable magnetization layer.It is equal with the direction of magnetization of reference layer 13 to remember layer 11
Resistance is low when row, such as Fig. 1；Resistance is high when antiparallel, such as Fig. 2.The process for reading MRAM is exactly to measure to the resistance of MTJ.
Using newer STT-MRAM technology, it is also fairly simple to write MRAM: carrying out writing behaviour across MTJ using than reading stronger electric current
Make.One electric current from bottom to top is variable magnetization stratification at the direction antiparallel with fixing layer, and top-down electric current is it
It is set to parallel direction.
The storage unit of each MRAM is made of MTJ and NMOS selecting pipe.Each storage unit needs to connect
Three lines: the grid of NMOS tube is connected to the wordline of chip (Word Line) 32, is responsible for switching on or off this unit；NMOS
One pole of pipe is connected on source electrode line (Source Line) 33, and another pole of NMOS tube is extremely connected with the one of magnetic tunnel junction 34, magnetic
Another pole of property tunnel knot 34 is connected on bit line (Bit Line) 31, as shown in Figure 3.One MRAM chip is by one or more
The array of mram memory cell forms, and each array has several external circuits, and such as: row-address decoder becomes the address received
The selection of wordline；Column address decoder becomes the address received the selection of bit line；Reading in read-write controller control bit line (is surveyed
Amount) write and (add electric current) operation；Input and output controller is used for and external exchange data.
The reading circuit of MRAM needs to detect the resistance of MRAM memory unit.Due to MTJ resistance can with temperature etc. and
Drift, general method are to use some high-impedance state or low resistance state memory units of being written on chip as with reference to single
Member.Sense amplifier (Sense Amplifier) is reused to compare the resistance of memory unit and reference unit.And reference unit
It is also made of common memory unit, as common memory unit, it also has a distribution, this distribution can add
The big probability that readout error occurs.
Dedicated reference unit carries out that configuration is disposably written after factory, no longer carries out write operation later.And data are deposited
Storage unit in addition to reading, can be also constantly written into use.Data storage cell is with long-term write operation, electricity
Resistance can rallentando reduce.But the resistance of reference unit remains unchanged.After leading to long-term use, phase occurs for reference resistance
Pair drift, read error can occur for data storage cell.
Summary of the invention
In order to solve the above-mentioned technical problems, the present invention provides a kind of magnetic random storages using distributed reference unit
Device includes at least external circuit, memory cell array and set of reference cells, and every a line of memory cell array has M storage word,
Each storage word has N number of byte, and each byte has L bit, for each storage word or is that each row configures a reference
Unit group has K reference unit in each set of reference cells.
Further, the type of K reference unit is one of following three types: (1) being entirely dedicated reference unit；
It (2) is entirely multiplexing reference unit；(3) it is partially dedicated reference unit, is partially multiplexing reference unit.
For dedicated reference unit, when corresponding storage unit is written into the first bit value, dedicated reference unit is synchronized
Reference value is written.
Multiplexing reference unit includes first unit and second unit, carries out write-in behaviour simultaneously to first unit and second unit
Make: when the second bit value is written in first unit, the inverse value of the second bit value is written in second unit；Make first unit in this way
It is used as a storage unit, first unit and second unit joint are used as a reference unit.
Further, a set of reference cells is configured for each storage word, K reference cell distribution is in storage word；?
It stores and chooses one or more bits in each byte of word, several bit bit combinations selected are as multiplexing with reference to single
Member uses, or uses as dedicated reference unit.Position of several bits selected in respective byte corresponds to position
It sets identical or not identical.When arbitrary data is read in storing word, being read together in word all referring to unit is stored.
Further, a set of reference cells, different stored bits of the K reference cell distribution to row are configured for each row
In position.When middle arbitrary data of being expert at is read, being read together all referring to unit in row.
The invention has the following advantages: the present invention solves the opposite drift of reference unit in both economical method
Problem.Reasonable layout of the reference unit in word and in row makes from probability, and the drift of reference unit is single very close to memory
Member is solved the problems, such as with lower area cost, and is avoided and increased additional data storage cell read-write.
Detailed description of the invention
When Fig. 1 is that magnetic tunnel junction is in low resistance state, the memory layer schematic diagram parallel with reference layer magnetism；
When Fig. 2 is that magnetic tunnel junction is in high-resistance state, memory layer and the magnetic antiparallel schematic diagram of reference layer；
Fig. 3 is the structural schematic diagram that storage unit is made of a magnetic tunnel junction and a NMOS tube；
Fig. 4 is the electrical block diagram of the magnetic RAM in a preferred embodiment of the present invention.
Specific embodiment
In order to make the foregoing objectives, features and advantages of the present invention clearer and more comprehensible, with reference to the accompanying drawing to the present invention
Specific embodiment be described in detail.It should be noted that attached drawing of the present invention is all made of simplified form and uses non-essence
Quasi- ratio, only for the purpose of facilitating and clarifying the purpose of the embodiments of the invention.
Reference unit is generally formed in parallel by a large amount of memory unit, as shown in Figure 4.Reference unit is also possible to by multiple
Realize in N number of bit of that is, every a line, there is K from bit 0 to K-1 to use two basic units of storage with memory unit
(2T2M), MTJ in two units each other reverse phase (high-impedance state another low resistance state, or otherwise).In an array, different
This K bit stealing 2K column in capable word.
The above method encounters problem in the actual use of product:
(1) dedicated reference unit carries out that configuration is disposably written after factory, no longer carries out write operation later.
(2) data storage cell can be also constantly written into use in addition to reading.
(3) data storage cell can rallentando reduce with long-term write operation, resistance.
(4) resistance of reference unit but remains unchanged.After leading to long-term use, phase occurs with reference to the resistance of reference unit
Pair drift, read error can occur for a small number of data storage cells.
(5) if the reference unit of multiplex data position requires to be written into when arbitrary data position updates in the line, mean one
Capable data storage and reference unit needs is written simultaneously every time, increases abrasion caused by data write-in and additional data
It reads (when data line bit position updates).
(6) if the reference unit of multiplex data position is only written into when corresponding data position updates, where reference unit
When low level and larger other data bit write-in number difference, the write-in number and data storage cell number difference of reference unit
It is larger, also it is easy to produce read error.
For MRAM in use because the problem of reference unit deviation causes readout error, the invention proposes make
With the solution of distributed reference unit (Reference Cell).In reference unit is distributed in word or is gone by the present invention
Different location, when carrying out the write operation of memory unit, according to the data bits write, correspondingly carry out reference unit writes behaviour
Make, so that the resistance of reference unit is drifted about together with data storage cell on probability.The invention belongs to semiconductor chip field,
Its most important application is to fields such as the very stringent Internet of Things of standby power consumption requirements and wearable electronics.
The present invention provides a kind of magnetic RAM using distributed reference unit, include at least external circuit,
Memory cell array and set of reference cells.In one mram memory cell array, every a line has M storage word, each storage word
There is N number of byte, each byte has L bit.For example, a line has 8 storage words, each storage word has 8 bytes, each word
Section has 8 bits, and a line in such a mram memory cell array shares 512 bits.
One group of K reference unit can be configured for each storage word, or every a line configures one group K with reference to single
Member.This K reference unit, can be it is dedicated, be also possible to multiplexing or part it is dedicated, fractional reuse.For special
With reference unit, when corresponding storage unit is written into value, dedicated reference unit is synchronized write-in reference value.
Multiplexing reference unit includes first unit and second unit, carries out write-in behaviour simultaneously to first unit and second unit
Make: when the second bit value is written in first unit, the inverse value of the second bit value is written in second unit；Make first unit in this way
It is used as a storage unit, first unit and second unit joint are used as a reference unit.
For example, needing to be written binary zero value according to storage in first unit, then being written in second unit binary
1 value.If first defining corresponding 0 value of low resistance state, then being stored in the storage unit of 0 value, wherein magnetic tunnel junction is low resistance state.Therewith
After 1 value is written according to inverse value rule in the second unit matched, magnetic tunnel junction is found to be high-impedance state.High-impedance state and low resistance state
The average value found out, the resistance value of resistance value or low resistance state from high-impedance state as reference unit are very suitable by it all farther out.
In practical application, the resistance value of multiple multiplexing reference units can be averaged again, as more accurate and stable reference.
K reference cell distribution can choose representational bit when storing in word.Such as each word in word
Section (byte) chooses one or more bits and does multiplexing reference unit or configure one or more dedicated reference units, different bytes
Bit can different (such as 0 bit 0 of byte, 1 bits 1 ... of byte), can also be identical (as being all bit 0).For example, choosing
Bit 0,9,18,27,36,45,54,63 does multiplexing reference unit or configuration dedicated reference unit, uses storage unit 0 and 64,9
With 65 ..., 63 and 71.When arbitrary data is read in storing word, being read together in word all referring to unit is stored.
In this way, each byte only increases 8 storage units, the cost of 12.5% area just solves the opposite drift of reference unit
The problem of, and do not need additional data storage cell read-write.
K reference unit could be distributed in capable different bits, for example, only taking K/M in each storage word
Bit makes reference unit, and such line inscribed comes to K, similar to the distribution of storage word internal reference unit, these row internal references
Unit can be distributed in different word Nepit position in each storage word, can also be identical.For example, choose bit 0,73,
146,219,292,365,438,511 multiplexing reference unit or configuration dedicated reference unit are done, uses storage unit 0 and 512,73
With 513 ..., 511 and 519.When middle arbitrary data of being expert at is read, being read together all referring to unit in row.In this way
8 storage units are only increased, the cost of 1.5625% area just solves the problems, such as that reference unit is opposite and drifts about, and
Additional data storage cell read-write is not needed.
The preferred embodiment of the present invention has been described in detail above.It should be appreciated that those skilled in the art without
It needs creative work according to the present invention can conceive and makes many modifications and variations.Therefore, all technologies in the art
Personnel are available by logical analysis, reasoning, or a limited experiment on the basis of existing technology under this invention's idea
Technical solution, all should be within the scope of protection determined by the claims.
Claims (10)
1. a kind of magnetic RAM, which is characterized in that include at least external circuit, memory cell array and reference unit
Group, every a line of the memory cell array have M storage word, and each storage word has N number of byte, and each byte has
L bit for each storage word or is that each row configures a set of reference cells, each reference
There is K reference unit in unit group.
2. a kind of magnetic RAM according to claim 1, which is characterized in that the type of the K reference unit
For one of following three types: (1) being entirely dedicated reference unit；It (2) is entirely multiplexing reference unit；It (3) is partially dedicated
Reference unit is partially multiplexing reference unit.
3. a kind of magnetic RAM according to claim 2, which is characterized in that for the dedicated reference unit,
When corresponding storage unit is written into the first bit value, the dedicated reference unit is synchronized write-in reference value.
4. a kind of magnetic RAM according to claim 2, which is characterized in that the multiplexing reference unit includes the
Unit one and second unit carry out write operation simultaneously to the first unit and the second unit: in the first unit
When the second bit value is written, the inverse value of second bit value is written in the second unit；Make the first unit in this way
It is used as a storage unit, the first unit and second unit joint are used as a reference unit.
5. a kind of magnetic RAM according to claim 2, which is characterized in that for each storage word configuration one
A set of reference cells, the K reference cell distributions are in the storage word；In each of the storage word byte
The one or more bits of interior selection, several the described bit bit combinations selected are used as multiplexing reference unit.
6. a kind of magnetic RAM according to claim 2, which is characterized in that for each storage word configuration one
A set of reference cells, the K reference cell distributions are in the storage word；In each of the storage word byte
The one or more bits of interior selection, several the described bits selected are used as dedicated reference unit.
7. a kind of magnetic RAM according to claim 5 or 6, which is characterized in that select several described in
Position corresponding position of the bit in respective byte is identical or not identical.
8. a kind of magnetic RAM according to claim 5 or 6, which is characterized in that any in the storage word
When data are read, the whole reference unit in the storage word is read together.
9. a kind of magnetic RAM according to claim 1, which is characterized in that configure an institute for each row
Set of reference cells is stated, in the difference bits of the K reference cell distributions to the row.
10. a kind of magnetic RAM according to claim 9, which is characterized in that the arbitrary data in the row
When being read, the whole reference unit in the row is read together.
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| CN201810103004.0A CN110111821A (en) | 2018-02-01 | 2018-02-01 | A kind of magnetic RAM using distributed reference unit |
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| CN201810103004.0A CN110111821A (en) | 2018-02-01 | 2018-02-01 | A kind of magnetic RAM using distributed reference unit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112445415A (en) * | 2019-08-30 | 2021-03-05 | 中电海康集团有限公司 | Control method, control device, reading method, storage medium and processor |
| US20220164137A1 (en) * | 2020-11-24 | 2022-05-26 | Arm Limited | Memory for an Artificial Neural Network Accelerator |
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Application publication date: 20190809 |