CN110099023B - OFDM system receiver sampling frequency offset compensation device and method - Google Patents
OFDM system receiver sampling frequency offset compensation device and method Download PDFInfo
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Abstract
The invention discloses a device and a method for compensating sampling frequency offset of an OFDM system receiver, wherein a sampling frequency offset estimation module of the device is used for calculating a sampling frequency offset estimation value; the Farrow filter is used for carrying out interpolation or extraction operation on the sampling signal according to the initial sampling frequency offset estimation value; the frame synchronization module is used for synchronously detecting the sampling data after interpolation or extraction operation through cross-correlation operation; the sampling timing error auxiliary detection module is used for detecting a sampling timing error value in real time according to data output by the frame synchronization module, the proportional integral module is used for carrying out proportional and integral operation on the sampling timing error value, the Farrow filter is also used for carrying out interpolation or extraction operation on a sampling signal according to the value after the proportional and integral operation, and is also used for carrying out interpolation or extraction operation on the sampling signal according to the calculated sampling frequency offset estimation value. The OFDM system receiver sampling frequency offset compensation device and method can improve the accuracy of sampling frequency offset estimation.
Description
Technical Field
The present invention relates to the field of wireless communication technologies, and in particular, to a sampling frequency offset compensation apparatus and method for an OFDM system receiver.
Background
In any communication system, crystal oscillators between transmitting and receiving nodes have frequency deviation, so that sampling frequency deviation can be caused, and even if a smaller sampling frequency deviation exists in a communication system adopting an OFDM technology (orthogonal frequency division multiplexing technology), if the duration of a transmission frame is longer, the accumulated sampling frequency deviation is larger, so that the error rate of received data is increased. Here, taking power line carrier communication as an example, fig. 1 is a frame format schematic diagram of power line carrier communication, and one PPDU (protocol data unit) is composed of a preamble, a frame control and payload data. The preamble is a periodic sequence, typically comprising 10.5 SYNCP symbols and 2.5 SYNCM symbols, with a guard interval between each data.
The deviation of the sampling clock has a fatal influence on the long-time transmission of data, and if there is a little deviation, even if the channel SNR (signal-to-noise ratio) is high, the signal is not decodable at all after a sufficiently long time. For the power line carrier communication system with the frame structure, because each frame can independently realize frame synchronization, only preamble is needed, and the tolerance of deviation of the frame control and the previous user symbols to the sampling clock is higher.
Therefore, in order to ensure the receiving performance of the system, the frequency offset compensation must be performed on the sampled data at the receiving end according to the estimation result of the sampling frequency offset, so as to reconstruct ideal sampled data and ensure the effective work of subsequent synchronization, demodulation and decoding modules.
The first common frequency offset compensation method uses an interpolation and decimation filter to interpolate and decimate a sampling signal in the time domain. The method generally employs a segmented parabolic polynomial filter of Farrow construction. The filter realizes interpolation and extraction through a group of fixed coefficients and a series of operations, and realizes the reconstruction of sampling data. In the segmented parabolic polynomial interpolation filter of Farrow structure, the interpolation phase control calculates the phase deviation of each output signal corresponding to the known input signal according to SFO (sampling frequency offset) errors obtained by various modes (for example, a scheme that the MAC layer obtains by comparing the difference between the system network clock and the local network clock in BEACON (BEACON) frames, or determines the frequency offset value by detecting continuous pilots in the signal, or determines the sampling frequency offset value by detecting the cross correlation of synchronous header sequences in the signal, and the like), i.e., performs an integration operation on the frequency errors to obtain the base point and the relative position of interpolation. The conventional compensation method usually performs only one permanent adjustment of the frequency offset (one coarse adjustment or another fine adjustment), and then does not perform the frequency offset adjustment. The compensation method completely depends on the estimation accuracy of the system to the frequency offset, and the frequency offset compensation circuit only realizes the compensation function and does not improve the accuracy of the frequency offset estimation. Therefore, the compensation effect is sometimes not very desirable.
The second frequency offset compensation method adopts a mode of directly adjusting the oscillation frequency of the phase-locked loop. The method is to convert the frequency deviation estimation result into the frequency setting parameter of the phase-locked loop, and directly modify the parameter setting of the phase-locked loop, thereby changing the oscillation frequency of the phase-locked loop to keep the same with the frequency of a sending end. But requires a highly accurate phase-locked loop circuit. And therefore the cost is high. Meanwhile, unnecessary limitations are brought to design implementation.
The information disclosed in this background section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person skilled in the art.
Disclosure of Invention
The invention aims to provide a device and a method for compensating sampling frequency offset of a receiver of an OFDM system, which can improve the accuracy of sampling frequency offset estimation.
In order to achieve the above object, the present invention provides a sampling frequency offset compensation apparatus for an OFDM system receiver, comprising: the device comprises a memory, a sampling frequency offset estimation module, a Farrow filter, a frame synchronization module, a sampling timing error auxiliary detection module and a proportional integral module. The memory is used for storing the sampling data; the sampling frequency offset estimation module is used for calculating a sampling frequency offset estimation value based on the beacon frame; the Farrow filter is coupled with the memory and the sampling frequency offset estimation module and is used for carrying out interpolation or extraction operation on the sampling signal according to a sampling frequency offset estimation value initially set by the sampling frequency offset estimation module and a sectional type parabolic polynomial algorithm; the frame synchronization module is coupled with the Farrow filter and used for synchronously detecting the sampling data after interpolation or extraction operation through cross-correlation operation; the sampling timing error auxiliary detection module is coupled with the frame synchronization module and is used for detecting a sampling timing error value in real time according to data output by the frame synchronization module, and when a preamble symbol synchronous cyclic prefix (SYNCP symbol) is detected, the frame synchronization module outputs a pre-locking signal so as to start the sampling timing error auxiliary detection module to work; the proportional integral module is coupled with the sampling timing error auxiliary detection module and the Farrow filter, and is configured to perform proportional and integral operations on the sampling timing error value, the Farrow filter is further configured to perform interpolation or decimation operations on the sampling signal according to a value obtained by performing proportional and integral operations on the sampling timing error value and a piecewise parabolic polynomial algorithm, and the Farrow filter is further configured to perform interpolation or decimation operations on the sampling signal according to a sampling frequency offset estimation value calculated by the sampling frequency offset estimation module and the piecewise parabolic polynomial algorithm.
In a preferred embodiment, when the frame synchronization module does not detect the preamble symbol synchronization cyclic prefix, the sample data input to the memory is buffered in a half buffer of the memory, and when the frame synchronization module detects the preamble symbol synchronization cyclic prefix, the sample data input to the memory is buffered in the entire buffer of the memory.
In a preferred embodiment, the detecting the sampling timing error value in real time by the sampling timing error auxiliary detection module according to the data output by the frame synchronization module includes: the sampling timing error auxiliary detection module performs cross-correlation operation on data of a first half sampling period of each sampling moment and a local synchronous cyclic prefix (SYNCP symbol), the data after the cross-correlation operation are placed in a corresponding sliding window according to index values of the data, accumulation operation is performed, an absolute value is obtained, then each obtained absolute value is added, and the obtained absolute value is divided by the total number of all data after the cross-correlation operation is performed, so that a first average value is obtained; the sampling timing error auxiliary detection module performs cross-correlation operation on data of a latter half sampling period at each sampling moment and local synchronous cyclic prefix (SYNCP symbol), the data after the cross-correlation operation are put into corresponding sliding windows according to index values of the data, accumulation operation is performed, absolute values are obtained, then each obtained absolute value is added, and the sum is divided by the total number of all data subjected to the cross-correlation operation to obtain a second average value; subtracting the first average value from the second average value to obtain the sampling timing error value.
In a preferred embodiment, when the signal-to-noise ratio is lower than a certain value and the sampling frequency offset estimation module calculates the sampling frequency offset estimation value, the sampling timing error auxiliary detection module is turned off, and the Farrow filter performs interpolation or decimation operation on the sampling signal according to the calculated sampling frequency offset estimation value and the piecewise parabolic polynomial algorithm.
The invention also provides a method for compensating the sampling frequency offset of the receiver of the OFDM system, which comprises the following steps: inputting the sampled data into a memory; the sampling frequency offset estimation module calculates a sampling frequency offset estimation value based on the beacon frame; the Farrow filter carries out interpolation or extraction operation on the sampling signal according to a sampling frequency offset estimation value initially set by the sampling frequency offset estimation module and a sectional type parabolic polynomial algorithm; the frame synchronization module carries out synchronous detection on the sampling data after the Farrow filter interpolation or extraction operation through cross-correlation operation, and outputs a pre-locking signal when a preamble symbol synchronous cyclic prefix is detected; the sampling timing error auxiliary detection module detects a sampling timing error value in real time according to the data output by the frame synchronization module after receiving the pre-locking signal; the proportional integral module performs proportional and integral operation on the sampling timing error value; the Farrow filter performs interpolation or extraction operation on the sampling signal according to a value obtained after proportional and integral operation is performed on the sampling timing error value and a sectional type parabolic polynomial algorithm, and the Farrow filter performs interpolation or extraction operation on the sampling signal according to a sampling frequency offset estimation value calculated by the sampling frequency offset estimation module and the sectional type parabolic polynomial algorithm.
In a preferred embodiment, inputting the sample data into the memory comprises: the sample data input to the memory is buffered in a half buffer of the memory when the frame synchronization module does not detect the preamble symbol synchronization cyclic prefix, and the sample data input to the memory is buffered in the entire buffer of the memory when the frame synchronization module detects the preamble symbol synchronization cyclic prefix.
In a preferred embodiment, the detecting the sampling timing error value in real time by the sampling timing error auxiliary detection module according to the data output by the frame synchronization module includes: the sampling timing error auxiliary detection module performs cross-correlation operation on data of a first half sampling period of each sampling moment and a local synchronous cyclic prefix (SYNCP symbol), the data after the cross-correlation operation are placed in a corresponding sliding window according to index values of the data, accumulation operation is performed, an absolute value is obtained, then each obtained absolute value is added, and the sum is divided by the total number of all data after the cross-correlation operation is performed, so that a first average value is obtained; the sampling timing error auxiliary detection module performs cross-correlation operation on data of a latter half sampling period at each sampling moment and local synchronous cyclic prefix (SYNCP symbol), the data after the cross-correlation operation are put into corresponding sliding windows according to index values of the data, accumulation operation is performed, absolute values are obtained, then each obtained absolute value is added, and the sum is divided by the total number of all data subjected to the cross-correlation operation, so that a second average value is obtained; subtracting the first average value from the second average value to obtain the sampling timing error value.
In a preferred embodiment, the method for compensating sampling frequency offset of the OFDM system receiver further includes: and when the signal-to-noise ratio is lower than a certain value and the sampling frequency offset estimation value is calculated by the sampling frequency offset estimation module, closing the sampling timing error auxiliary detection module, and carrying out interpolation or extraction operation on the sampling signal by the Farrow filter according to the calculated sampling frequency offset estimation value and the sectional type parabolic polynomial algorithm.
Compared with the prior art, the OFDM system receiver sampling frequency offset compensation device and method adopt a sectional type parabolic polynomial interpolation filter scheme with a Farrow structure, and on one hand, interpolation and extraction processing are carried out on input data based on the sampling frequency offset value estimated by a beacon frame; on the other hand, the sampling timing error auxiliary detection module performs special processing on the data output by the frame synchronization module, adopts a timing error detection scheme different from the traditional timing error detection scheme, namely, the output data of the frame synchronization module is delayed, segmented and subjected to double sliding window cross-correlation operation with proper length, then subtracting, and filtering the subtraction result to obtain real-time sampling timing error auxiliary information, the invention combines the sampling frequency offset value estimated based on the beacon frame with the real-time sampling timing error auxiliary information for use, does not require to insert continuous pilot signals into signals, does not singly depend on the beacon frame or carries out sampling timing error detection on the signals, and has better frequency offset compensation effect compared with the traditional frequency offset compensation scheme.
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Fig. 1 is a frame format schematic diagram of power line carrier communication according to the prior art;
fig. 2 is a sampling frequency offset compensation apparatus of an OFDM system receiver according to an embodiment of the present invention;
FIG. 3 is a block diagram of a sample timing error aided detection algorithm according to an embodiment of the invention.
Detailed Description
The following detailed description of the present invention is provided in conjunction with the accompanying drawings, but it should be understood that the scope of the present invention is not limited to the specific embodiments.
Throughout the specification and claims, unless explicitly stated otherwise, the word "comprise", or variations such as "comprises" or "comprising", will be understood to imply the inclusion of a stated element or component but not the exclusion of any other element or component.
In order to overcome various problems in the traditional frequency offset compensation scheme, the invention provides a sampling frequency offset compensation device and a method for an OFDM system receiver, wherein a sectional type parabolic polynomial interpolation filter scheme with a Farrow structure is adopted, and on one hand, interpolation and extraction processing are carried out on input data based on the sampling frequency offset value estimated by a beacon frame; on the other hand, the sampling timing error auxiliary detection module performs special processing on the data output by the frame synchronization module, and adopts a timing error detection scheme different from the traditional scheme, namely, the data output by the frame synchronization module is delayed, segmented, subjected to double sliding window cross-correlation operation with proper length, subtracted, and filtered to obtain real-time sampling timing error auxiliary information, and the sampling timing error information is utilized to perform real-time auxiliary adjustment on the interpolation phase of a Farrow filter. The invention combines the sampling frequency offset value estimated based on the beacon frame with the real-time sampling timing error auxiliary information for use, does not require to insert continuous pilot signals into the signals, does not singly depend on the beacon frame or carry out sampling timing error detection on the signals, and has better frequency offset compensation effect compared with the traditional frequency offset compensation scheme.
The present invention is described herein with reference to power line carrier communication as an embodiment of the present invention. The invention is not limited to the power line carrier communication system, and is suitable for frequency offset compensation application of all OFDM communication systems with leader sequences.
As shown in fig. 2, in an embodiment, the sampling frequency offset compensation apparatus of an OFDM system receiver includes: the device comprises a memory 10, a sampling frequency offset estimation module 11, a Farrow filter 12, a frame synchronization module 13, a sampling timing error auxiliary detection module 14 and a proportional integral module 15.
The memory 10 is used to store the sampled data. In an embodiment, according to the state of the frame synchronization module 13, the present invention buffers the input data in a half buffer or the entire buffer, specifically, when the frame synchronization module 13 does not reach the cyclic prefix of the preamble symbol, the input sample data is circularly buffered in the half buffer, and when the cyclic prefix of the preamble symbol occurs, the subsequently input sample data is circularly buffered in the entire buffer, so that it is effectively avoided that the input buffer is already or will overflow when valid frame data arrives, thereby increasing the success rate of communication. Specifically, the memory 10 may employ a dual-port DP512X12SRAM (static random access memory).
The sampling frequency offset estimation module 11 is configured to calculate a sampling frequency offset estimation value based on the beacon frame. Specifically, the sampling frequency offset estimate may be obtained by comparing the difference between the system network clock and the local network clock in the beacon frame.
The Farrow filter 12 is coupled to the memory 10 and the sampling frequency offset estimation module 11, and is configured to perform interpolation or decimation operation on the sampling signal according to the sampling frequency offset estimation value and the segmented parabolic polynomial algorithm.
The frame synchronization module 13 is coupled to the Farrow filter 12, and configured to perform synchronous detection on the sample data after the interpolation or decimation operation through a cross-correlation operation. The frame synchronization module 13 is further configured to detect a preamble symbol synchronization cyclic prefix SYNCP, and output a pre-lock signal to start the sampling timing error auxiliary detection module 14 to operate when the preamble symbol synchronization cyclic prefix SYNCP is detected.
The sampling timing error auxiliary detection module 14 is coupled to the frame synchronization module 13, and is configured to detect a sampling timing error value in real time according to data output by the frame synchronization module 13.
The proportional integral module 15 is coupled to the sampling timing error auxiliary detection module 14 and the Farrow filter 12, and is configured to perform proportional and integral operations on the sampling timing error value. The Farrow filter 12 is further configured to perform interpolation or decimation on the sampled signal according to the value of the sampling timing error value after proportional and integral operation and the piecewise parabolic polynomial algorithm.
In an embodiment, the frequency offset compensation method of the sampling frequency offset compensation apparatus of the OFDM system receiver is as follows:
firstly, after the sampling frequency offset compensation device is enabled, the received data is written into a dual-port DP512X12SRAM, along with the writing of the data, the Farrow filter 12 starts to read the previously written data from the buffer again and shifts the data into a 5-stage shift buffer, and along with the movement of the data in the shift buffer, the Farrow filter 12 performs interpolation and extraction operations on the data in the shift buffer according to an initial set sampling spectrum estimation value SFO (initial set SFO is 0), and the data in the 5-stage shift buffer is the input data of the real Farrow filter 12. A positive value of SFO means an interpolation operation and a negative value means a decimation operation, and an interpolation and decimation operation of Farrow filter 12 equal to 0 depends on the output of sample timing error auxiliary detection module 14.
Then, the sampling frequency offset compensation device buffers the input data in a half buffer DP512X12 or the whole buffer DP512X12 according to the synchronization state of the frame synchronization module 13, that is, when the frame synchronization module 13 does not reach the preamble symbol cyclic prefix, the input data circulates in the half buffer, and when the preamble symbol cyclic prefix occurs, the input data circulates in the whole buffer, so that the situation that the input buffer has or is about to overflow when the real preamble sequence SYNCP arrives can be effectively avoided. Because the sampling frequency offset compensation device cannot know when the preamble sequence SYNCP symbol reaches, the module can only continuously perform interpolation or extraction operation according to the sampling frequency offset estimation value SFO set by the MAC layer, but after long-time interpolation operation is performed, the buffer data volume input into the buffer exceeds the data volume read from the buffer, and overflow occurs when the exceeded data volume is larger than the depth of the buffer. The received data will be confused and may cause the communication to fail. The length of the half buffer is calculated according to the maximum SFO value, which can satisfy the length of the buffer amount of the input data caused by the sampling frequency offset of a complete frame, and in this embodiment, the length of the buffer is calculated according to the SFO maximum 120ppm (parts per million): when the system adopts a 50Mhz clock, the length of the data frame is 689652 × 2, and after the Farrow filter 12 performs interpolation through the SFO value of the sampling frequency offset estimation module 11, the deviation of the sampling points on both sides is 689652 × 2 × 120 ═ 165.5, that is, 166 data points are interpolated or extracted at most, therefore, 256 buffer lengths are selected to completely meet the requirement. After the half and whole buffer switching schemes are adopted, when the preamble sequence SYNCP arrives, the buffer depth (with the depth of 256) of at least half of the buffer is available, thereby effectively avoiding the overflow phenomenon.
Secondly, when the frame synchronization module 13 reaches the preamble cyclic prefix, on one hand, the input data circulates in the entire DP512X12buffer, and on the other hand, the frame synchronization module 13 starts to start the sampling timing error auxiliary detection module 14 to perform timing error detection. The sampling timing error auxiliary detection module 14 detects the first path data Do _0@25 Mhz-T/2 in the two paths of data Do _0@25 Mhz-T/2 and Do _1@25Mhz with the phase difference of 180 degrees output by the frame synchronization module 13. Do _0@25 Mhz-T/2 is the sample of the first half of the sample period of the current sample time, the sample frequency is 25MHz, and Do _1@25Mhz is the sample of the current sample time.
In one embodiment, a block diagram of a sample timing error aided detection algorithm is shown in fig. 3: the method comprises the steps of firstly delaying Do _0@25 Mhz-T/2 for a 25MHz sampling period to obtain Do _0@25Mhz + T/2, then conducting sliding cross-correlation operation on Do _0@25 Mhz-T/2 and Do _0@25Mhz + T/2 and a local SYNCP sequence with proper window length, conducting segmentation and taking an absolute value to increase the size of an operation result when an input data index is 1-m (m is a selected positive integer), and finally averaging and subtracting two paths of sliding cross-correlation outputs to obtain a sampling timing error value.
Specifically, the sample timing error auxiliary detection module 14 calculates the sample timing error value including: the sampling timing error auxiliary detection module 14 performs cross-correlation operation on data Do _0@25 Mhz-T/2 in the first half sampling period of each sampling time and a local synchronous cyclic prefix, puts the data after the cross-correlation operation into a corresponding sliding window according to an index value (in this embodiment, data with indexes of 1 to m may be put into one window, and data with other index numbers may be put into another window), then performs accumulation operation and calculates an absolute value (Abs), and then adds each calculated absolute value and divides the sum by the total number k of all data subjected to the cross-correlation operation to obtain a first average value; the sampling timing error auxiliary detection module 14 performs cross-correlation operation on data Do _0@25Mhz + T/2 in a second half sampling period after each sampling time and a local synchronous cyclic prefix (SYNCP) sequence, and places the data after the cross-correlation operation in a corresponding sliding window according to an index value (in this embodiment, data with an index of 1 to m may be placed in one window, and data with other index numbers may be placed in another window), and then performs accumulation operation and calculates an absolute value, and then adds each calculated absolute value and divides the sum by the total number of all data subjected to the cross-correlation operation to obtain a second average value; the first average value and the second average value are subtracted to obtain a sampling timing error value Te.
And finally, after a sampling timing error value Te is obtained, feeding the value back to a proportional integral module 15 of the sampling frequency offset compensation device in real time for proportional and integral operation, outputting the subsequent operation result to a Farrow filter 12, and carrying out interpolation or extraction operation on the sampling signal by the Farrow filter 12 according to the operation result by adopting a sectional type parabolic polynomial algorithm. If the sampling frequency offset estimation module 11 has already calculated SFO at this time, the interpolation phase control is performed on the Farrow filter 12 through the SFO, that is, the Farrow filter 12 performs interpolation or decimation operation on the sampling signal by using a segmented parabolic polynomial algorithm according to the SFO. In this embodiment, SFO based on beacon frame estimation is used in conjunction with the sample timing error assistance information without relying on either of the two alone.
The sampling timing error assists the detection module 14 in significantly increasing the immunity to sampling frequency offset. In the prior art, on one hand, because the beacon frame period is long, the system can estimate the SFO only when receiving enough beacon frames; on the other hand, under the condition of extremely low signal-to-noise ratio, the beacon frame itself may not be correctly received, and under both the conditions, the system cannot estimate the SFO in time, but in the scheme, the interpolation phase of the Farrow filter 12 is adjusted in real time by the auxiliary timing error information generated by the sampling timing error auxiliary detection module 14, so that the decoding success rate of the frame control data can be better improved, the capture of the system network clock and the SFO estimation are accelerated, and the defect that the SFO scheme is estimated only based on the beacon frame in the prior art is overcome.
In one embodiment, the frequency offset compensation method further includes: when the signal-to-noise ratio is lower than a certain value and the sampling frequency offset estimation module 11 calculates the sampling frequency offset estimation value, the sampling timing error auxiliary detection module 14 is turned off, and the Farrow filter 12 performs interpolation or extraction operation on the sampling signal according to the calculated sampling frequency offset estimation value and the segmented parabolic polynomial algorithm. Under the condition of extremely low signal-to-noise ratio, the sampling timing error auxiliary detection module 14 may have a poor detection effect, and therefore under such a condition, the sampling timing error auxiliary detection module 14 is only used before the terminal searches for the beacon frame to obtain the system network clock and SFO estimation, which is helpful for improving the decoding success rate of the frame control data and accelerating the capture of the system network clock, and after the SFO is estimated, the sampling timing error auxiliary detection module 14 may be closed, and the SFO based on the beacon frame estimation is directly used to perform interpolation phase control on the Farrow filter 12, so that the sampling frequency offset correction accuracy may be improved.
In summary, the sampling frequency offset compensation apparatus and method of the OFDM system receiver according to the present embodiment combines the sampling frequency offset value estimated based on the beacon frame with the real-time sampling timing error auxiliary information, interpolation phase control for Farrow filters requires neither the insertion of a continuous pilot signal in the signal, nor the single reliance on beacon frames or sample timing error detection for the signal, before the SFO estimated value is calculated, the interpolation phase control is carried out on the Farrow filter by real-time sampling timing error auxiliary information, which is helpful for improving the decoding success rate of frame control data and accelerating the capture of a system network clock, the Farrow filter can be interpolation phase controlled directly using the SFO based on beacon frame estimation, the method can improve the sampling frequency offset correction precision, and has better frequency offset compensation effect compared with the traditional frequency offset compensation scheme.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The foregoing descriptions of specific exemplary embodiments of the present invention have been presented for purposes of illustration and description. It is not intended to limit the invention to the precise form disclosed, and obviously many modifications and variations are possible in light of the above teaching. The exemplary embodiments were chosen and described in order to explain certain principles of the invention and its practical application to enable one skilled in the art to make and use various exemplary embodiments of the invention and various alternatives and modifications as are suited to the particular use contemplated. It is intended that the scope of the invention be defined by the claims and their equivalents.
Claims (8)
1. An apparatus for compensating for sampling frequency offset of a receiver of an OFDM system, comprising:
a memory for storing the sampled data;
a sampling frequency offset estimation module for calculating a sampling frequency offset estimation value based on the beacon frame;
the Farrow filter is coupled with the memory and the sampling frequency offset estimation module and is used for carrying out interpolation or extraction operation on the sampling signal according to the sampling frequency offset estimation value initially set by the sampling frequency offset estimation module and a sectional type parabolic polynomial algorithm;
the frame synchronization module is coupled with the Farrow filter and used for carrying out synchronous detection on the sampling data after interpolation or extraction operation through cross-correlation operation;
the sampling timing error auxiliary detection module is coupled with the frame synchronization module and is used for detecting a sampling timing error value in real time according to the data output by the frame synchronization module, and the frame synchronization module is also used for detecting a preamble symbol synchronous cyclic prefix and outputting a pre-locking signal when the preamble symbol synchronous cyclic prefix is detected so as to start the sampling timing error auxiliary detection module to work; and
and the Farrow filter is further used for carrying out interpolation or extraction operation on the sampling signal according to a value obtained after the sampling timing error value is subjected to proportional and integral operation and a piecewise parabolic polynomial algorithm, and the Farrow filter is further used for carrying out interpolation or extraction operation on the sampling signal according to a sampling frequency offset estimation value calculated by the sampling frequency offset estimation module and the piecewise parabolic polynomial algorithm.
2. The OFDM system receiver sampling frequency offset compensation apparatus of claim 1, wherein the sample data inputted to the memory is buffered in a half buffer of the memory when the preamble symbol synchronization cyclic prefix is not detected by the frame synchronization module, and the sample data inputted to the memory is buffered in an entire buffer of the memory when the preamble symbol synchronization cyclic prefix is detected by the frame synchronization module.
3. The apparatus for compensating for frequency offset in sampling of an OFDM system receiver of claim 1, wherein the sample timing error aided detection module detects the value of the sample timing error in real time according to the data outputted from the frame synchronization module comprises:
the sampling timing error auxiliary detection module performs cross-correlation operation on data of a first half sampling period of each sampling moment and a local synchronous cyclic prefix, the data after the cross-correlation operation are placed in a corresponding sliding window according to index values of the data, accumulation operation is performed, an absolute value is obtained, then each obtained absolute value is added, and the obtained absolute value is divided by the total number of all data after the cross-correlation operation is performed, so that a first average value is obtained;
the sampling timing error auxiliary detection module performs cross-correlation operation on data of a half sampling period after each sampling moment and a local synchronous cyclic prefix, the data after the cross-correlation operation are placed in a corresponding sliding window according to index values of the data, accumulation operation is performed, an absolute value is obtained, then each obtained absolute value is added, and the obtained absolute value is divided by the total number of all data after the cross-correlation operation is performed, so that a second average value is obtained; and
subtracting the first average value from the second average value to obtain the sampling timing error value.
4. The apparatus of claim 1, wherein when the snr is lower than a certain value and the sampling frequency offset estimation module calculates the sampling frequency offset estimation value, the sampling timing error auxiliary detection module is turned off, and a Farrow filter performs interpolation or decimation on the sampled signal according to the calculated sampling frequency offset estimation value and a piecewise parabolic polynomial algorithm.
5. A method for compensating sampling frequency offset of a receiver of an OFDM system is characterized by comprising the following steps:
inputting the sampled data into a memory;
the sampling frequency offset estimation module calculates a sampling frequency offset estimation value based on the beacon frame;
the Farrow filter carries out interpolation or extraction operation on the sampling signal according to the sampling frequency offset estimation value initially set by the sampling frequency offset estimation module and a sectional type parabolic polynomial algorithm;
the frame synchronization module carries out synchronous detection on the sampling data after the Farrow filter interpolation or extraction operation through cross-correlation operation, and outputs a pre-locking signal when a preamble symbol synchronous cyclic prefix is detected;
the sampling timing error auxiliary detection module detects a sampling timing error value in real time according to the data output by the frame synchronization module after receiving the pre-locking signal;
the proportional integral module performs proportional and integral operation on the sampling timing error value; and
the Farrow filter performs interpolation or extraction operation on the sampling signal according to a value obtained after proportional and integral operation is performed on the sampling timing error value and a sectional type parabolic polynomial algorithm, and the Farrow filter performs interpolation or extraction operation on the sampling signal according to a sampling frequency offset estimation value calculated by the sampling frequency offset estimation module and the sectional type parabolic polynomial algorithm.
6. The method of compensating for frequency offset in sampling of an OFDM system receiver as claimed in claim 5, wherein inputting the sampled data into the memory comprises:
the sample data input to the memory is buffered in a half buffer of the memory when the frame synchronization module does not detect the preamble symbol synchronization cyclic prefix, and the sample data input to the memory is buffered in the entire buffer of the memory when the frame synchronization module detects the preamble symbol synchronization cyclic prefix.
7. The method of compensating for frequency offset in sampling of an OFDM system receiver as claimed in claim 5, wherein said detecting the value of the sampling timing error in real time by said sampling timing error auxiliary detection module based on the data outputted from said frame synchronization module comprises:
the sampling timing error auxiliary detection module performs cross-correlation operation on data of a first half sampling period of each sampling moment and a local synchronous cyclic prefix, the data after the cross-correlation operation are placed in a corresponding sliding window according to index values of the data, accumulation operation is performed, an absolute value is obtained, then each obtained absolute value is added, and the sum is divided by the total number of all data after the cross-correlation operation is performed, so that a first average value is obtained;
the sampling timing error auxiliary detection module performs cross-correlation operation on data of a half sampling period after each sampling moment and a local synchronous cyclic prefix, the data after the cross-correlation operation are placed in a corresponding sliding window according to index values of the data, accumulation operation is performed, an absolute value is obtained, then each obtained absolute value is added, and the sum is divided by the total number of all data after the cross-correlation operation is performed, so that a second average value is obtained; and
subtracting the first average value from the second average value to obtain the sampling timing error value.
8. The OFDM system receiver sampling frequency offset compensation method of claim 5, wherein the OFDM system receiver sampling frequency offset compensation method further comprises:
and when the signal-to-noise ratio is lower than a certain value and the sampling frequency offset estimation value is calculated by the sampling frequency offset estimation module, closing the sampling timing error auxiliary detection module, and carrying out interpolation or extraction operation on the sampling signal by the Farrow filter according to the calculated sampling frequency offset estimation value and the sectional type parabolic polynomial algorithm.
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| CN110519193B (en) * | 2019-09-06 | 2022-03-15 | 中国传媒大学 | CE-OFDM phase demodulation system and demodulation method |
| CN112995078B (en) * | 2019-12-13 | 2022-11-15 | 丽水青达科技合伙企业(有限合伙) | Frequency offset compensation algorithm of OFDMA uplink |
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