CN110096109A - A kind of half Gao Banchang PCIe card on server master board - Google Patents
A kind of half Gao Banchang PCIe card on server master board Download PDFInfo
- Publication number
- CN110096109A CN110096109A CN201910290529.4A CN201910290529A CN110096109A CN 110096109 A CN110096109 A CN 110096109A CN 201910290529 A CN201910290529 A CN 201910290529A CN 110096109 A CN110096109 A CN 110096109A
- Authority
- CN
- China
- Prior art keywords
- pcie
- acp7360
- pcie card
- chip
- processor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/18—Packaging or power distribution
- G06F1/183—Internal mounting support structures, e.g. for printed circuit boards, internal connecting means
- G06F1/184—Mounting of motherboards
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Stored Programmes (AREA)
Abstract
The invention discloses half Gao Banchang PCIe cards on a kind of server master board, the core chips of the PCIe card uses MIPS framework ACP7360 processor, the ACP7360 processor connects DDR controller, the DDR controller connects the x16 DDR4 particle of 5 2GB sizes, the ACP7360 processor connects DS125DF410 chip, PCIe card is connected by PCIE X8 golden finger with server master board, it can support PCIE3.0, there is 4GB capacity EMMC chip MTFC4GACAJCN on the veneer of PCIe card and for storing U-BOOT program, CPU loads the SPI NOR FLASH chip of startup program when powering on.It can be realized ECC function, and enhance the processing capacity of processor, the driving capability of 10G ethernet signal can be enhanced, reduce the bit error rate.
Description
Technical field
The half Gao Banchang PCIe card the present invention relates to processor technical field, in particular on a kind of server master board.
Background technique
The common multi-core processor PCIe card of server is essentially all half long type of overall height, occupies server space and compares
Greatly, and many PCIe cards use DIMM item or SO-DIMM item, and under vibration environment, it is easy to appear even for memory bar
Connect illusive situation.
Summary of the invention
For above-mentioned deficiency in the prior art, the present invention provides half high half long PCIE on a kind of server master board
Card, can be realized ECC function, and enhance the processing capacity of processor, can enhance the driving energy of 10G ethernet signal
Power reduces the bit error rate.
In order to achieve the above object of the invention, the technical solution adopted by the present invention are as follows:
Half Gao Banchang PCIe card on a kind of server master board, the core chips of the PCIe card is using at MIPS framework ACP7360
Device is managed, the ACP7360 processor connects DDR controller, and the DDR controller connects the x16 DDR4 of 5 2GB sizes
Grain, the ACP7360 processor connect DS125DF410 chip, and PCIe card is connected by PCIE X8 golden finger and server master board
It connects, can support PCIE3.0, have 4GB capacity EMMC chip MTFC4GACAJCN on the veneer of PCIe card and for storing U-
BOOT program, when powering on CPU load startup program SPI NOR FLASH chip.
Further, the ACP7360 chip can support a variety of 10G/1G Ethernet protocols, including XFI/XAUI/
DXAUI/RXAUI/XLAUI/SGMII Ethernet protocol.
The invention has the benefit that
1.CPU uses ACP7360 chip, which can support a variety of 10G/1G Ethernet protocols, including XFI/XAUI/
DXAUI/RXAUI/XLAUI/SGMII Ethernet protocol.Two DDR controllers of 2.CPU are all used, and data throughout is increased.
3. having EEPROM and EMMC chip simultaneously on veneer, EEPROM can store veneer essential information, and EMMC chip can then be deposited
Put biggish data, such as operating system.If traditional PCIE board will use two DDR controllers, size at least needs
Overall height half is long.The present invention is enough under half Gao Banchang size, makes full use of two DDR controllers of CPU, increases data throughput energy
Power.
Detailed description of the invention
Fig. 1 is the structural diagram of the present invention.
Specific embodiment
In order that the present invention can be more clearly and readily understood, following will be combined with the drawings in the embodiments of the present invention,
Technical scheme in the embodiment of the invention is clearly and completely described.
As shown in Figure 1, half Gao Banchang PCIe card on a kind of server master board, the core chips of the PCIe card uses MIPS
Framework ACP7360 processor, the ACP7360 processor connect DDR controller, and the DDR controller connects 5 2GB sizes
X16 DDR4 particle, the ACP7360 processor connects DS125DF410 chip, PCIe card by PCIE X8 golden finger and
Server master board connection, can support PCIE3.0, have on the veneer of PCIe card 4GB capacity EMMC chip MTFC4GACAJCN and
CPU loads the SPI NOR FLASH chip of startup program when for storing U-BOOT program, powering on.
The ACP7360 chip can support a variety of 10G/1G Ethernet protocols, including XFI/XAUI/DXAUI/RXAUI/
XLAUI/SGMII Ethernet protocol.
When specifically used, half Gao Banchang is snapped on mainboard PCIE slot, after mainboard powers on, mainboard passes through again
PCIE loads the startup program of board, and after the completion of startup program, the operating system of guidance EMMC chip is started to work.Board has
Two 10,000,000,000 network interfaces, external data first pass through network interface and are transferred to CPU, and CPU, which can first be put into data on memory grain, to be delayed
It deposits, mainboard is passed to by PCIE golden finger again after then carrying out simple process, after mainboard carries out a series of processing, then passes through PCIE
Pass back to Computer card CPU, forwards data outward by 10,000,000,000 network interfaces after the processing of simple package.
The above description is only a preferred embodiment of the patent of the present invention, is not intended to limit the invention patent, all at this
Made any modifications, equivalent replacements, and improvements etc., should be included in the invention patent within the spirit and principle of patent of invention
Protection scope within.
Claims (2)
1. half Gao Banchang PCIe card on a kind of server master board, which is characterized in that the core chips of the PCIe card uses MIPS
Framework ACP7360 processor, the ACP7360 processor connect DDR controller, and the DDR controller connects 5 2GB sizes
X16 DDR4 particle, the ACP7360 processor connects DS125DF410 chip, PCIe card by PCIE X8 golden finger and
Server master board connection, can support PCIE3.0, have on the veneer of PCIe card 4GB capacity EMMC chip MTFC4GACAJCN and
CPU loads the SPI NOR FLASH chip of startup program when for storing U-BOOT program, powering on.
2. half Gao Banchang PCIe card on a kind of server master board according to claim 1, it is characterised in that: described
ACP7360 chip can support a variety of 10G/1G Ethernet protocols, including XFI/XAUI/DXAUI/RXAUI/XLAUI/SGMII
Ethernet protocol.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910290529.4A CN110096109A (en) | 2019-04-11 | 2019-04-11 | A kind of half Gao Banchang PCIe card on server master board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910290529.4A CN110096109A (en) | 2019-04-11 | 2019-04-11 | A kind of half Gao Banchang PCIe card on server master board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110096109A true CN110096109A (en) | 2019-08-06 |
Family
ID=67444735
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910290529.4A Pending CN110096109A (en) | 2019-04-11 | 2019-04-11 | A kind of half Gao Banchang PCIe card on server master board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110096109A (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106295372A (en) * | 2016-08-23 | 2017-01-04 | 记忆科技(深圳)有限公司 | A kind of encryption Hub device supporting multiple EMMC equipment |
| CN106339343A (en) * | 2015-07-10 | 2017-01-18 | 爱思开海力士有限公司 | Peripheral Component Interconnect Express Card |
| CN107102962A (en) * | 2017-04-27 | 2017-08-29 | 科大讯飞股份有限公司 | Board circuit and computer equipment based on PLD |
| CN107220196A (en) * | 2017-05-27 | 2017-09-29 | 郑州云海信息技术有限公司 | A kind of built-in high-end storage card for supporting Tri Mode |
-
2019
- 2019-04-11 CN CN201910290529.4A patent/CN110096109A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106339343A (en) * | 2015-07-10 | 2017-01-18 | 爱思开海力士有限公司 | Peripheral Component Interconnect Express Card |
| CN106295372A (en) * | 2016-08-23 | 2017-01-04 | 记忆科技(深圳)有限公司 | A kind of encryption Hub device supporting multiple EMMC equipment |
| CN107102962A (en) * | 2017-04-27 | 2017-08-29 | 科大讯飞股份有限公司 | Board circuit and computer equipment based on PLD |
| CN107220196A (en) * | 2017-05-27 | 2017-09-29 | 郑州云海信息技术有限公司 | A kind of built-in high-end storage card for supporting Tri Mode |
Non-Patent Citations (1)
| Title |
|---|
| 党磊: "一种智能网卡系统", 《计算机产品与流通》 * |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20190806 |
|
| RJ01 | Rejection of invention patent application after publication |