CN110087392A - Circuit board structure and preparation method thereof - Google Patents
Circuit board structure and preparation method thereof Download PDFInfo
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- CN110087392A CN110087392A CN201810072395.4A CN201810072395A CN110087392A CN 110087392 A CN110087392 A CN 110087392A CN 201810072395 A CN201810072395 A CN 201810072395A CN 110087392 A CN110087392 A CN 110087392A
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- layer
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- dielectric layer
- capacitance
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10015—Non-printed capacitor
Abstract
The present invention provides a kind of circuit board structure and preparation method thereof, circuit board structure include insulating layer, insulating layer opposite sides first line floor with the second line layer, through insulating layer to be electrically connected the conductive through hole of first line floor and the second line layer, capacitance dielectric layer, dielectric layer and reroute road floor.First line layer includes first capacitor electrode.Capacitance dielectric layer is located on first capacitor electrode.Dielectric layer covers first line layer and capacitance dielectric layer.Rerouting road floor includes rerouting road, in dielectric layer and the first conductive blind hole of connection first line floor and the second capacitance electrode in dielectric layer on the dielectric layer.The both ends of second capacitance electrode are in contact with capacitance dielectric layer and rewiring road respectively.Second capacitance electrode, capacitance dielectric layer and first capacitor electrode constitute capacitor.
Description
Technical field
The present invention relates to a kind of circuit board structure and preparation method thereof more particularly to a kind of circuit board structures with capacitor
And preparation method thereof.
Background technique
As the demand of electronic product is towards multifunction, signal transmission high speed and circuit element densification, integrate
The function that circuit chip is presented is stronger, and is directed to consumer electrical product, and the passive device quantity of collocation also hurriedly increases therewith.Again
Person, electronic product emphasize it is light and short when, how limited structure dress space in accommodate huge number electronic component,
As the technical bottleneck that electronic packaging dealer is anxious to be resolved and overcomes.In order to solve the problems, such as this one, structure dress technology gradually moves towards single
Structure fills system (System in Package；SIP system combination stage), especially multi-chip module (Multi-Chip
Module；MCM encapsulation).And wherein, built-in type active member and passive device technology (embedded technology) at
For key technology.By burying in element, encapsulation volume can be made significantly to reduce, more high functionality elements can be put into, with
Increase the layout area of substrate surface, to achieve the purpose that electronic product is thinned.
The general common passive capacity cell of built-in type is metal-insulator-metal capacitor (Metal-Insulator-
Metal Capacitor；MIM Capacitor) and metal-oxide body-metal capacitance (Metal-Oxide-Metal
Capacitor；MOM Capacitor) two kinds, it is commonly called as sandwich capacitance.However, in the passive capacity cell of built-in type above-mentioned
Manufacturing process in, two metal electrodes and insulator/oxysome between both of the aforesaid metal electrode that constitute capacitor
Three light shields with specific pattern are at least needed to define.In this way, it is upper complex in production and need to pay it is more at
This, thereby increases and it is possible to lead to the reduction of yield (yield).Therefore, in the production of the circuit board structure with built-in type passive device,
How to simplify the process in production and improve producing efficiency and yield, and the volume of circuit board structure can be further decreased, and
And cost of manufacture is reduced, the project for wanting to solve at present is had become in fact.
Summary of the invention
The present invention provides a kind of circuit board structure and preparation method thereof, can reduce the integral thickness of encapsulating structure and can be with
Producing efficiency and yield are improved, and cost of manufacture can be reduced.
The present invention provides a kind of circuit board structure comprising insulating layer, first line layer, the second line layer, conductive through hole,
Capacitance dielectric layer, dielectric layer and rewiring road floor.Insulating layer has the second surface of first surface and opposite first surface.
First line layer is located on the first surface of insulating layer.First line layer includes first capacitor electrode.Second line layer is located at exhausted
On the second surface of edge layer.Conductive through hole is through insulating layer to be electrically connected first line layer and the second line layer.Capacitive dielectric
Layer is located on the first capacitor electrode of first line layer.The first line layer of dielectric layer at least covering part and partial capacitor are situated between
Electric layer.Rerouting road floor includes rerouting road, the first conductive blind hole and the second capacitance electrode.It reroutes road and is located at dielectric layer
On.First conductive blind hole is located in dielectric layer and connects first line floor and reroutes road.Second capacitance electrode is located at dielectric layer
It is interior.Second capacitance electrode has opposite first end and second end, and first end is in contact with capacitance dielectric layer, second end and weight cloth
Route is in contact.Second capacitance electrode, capacitance dielectric layer and partial first line layer constitute capacitor.
In one embodiment of this invention, above-mentioned first end is less than in the orthographic projection on first surface and second end is in
Orthographic projection on one surface.
In one embodiment of this invention, the sum total of the thickness of the thickness and capacitance dielectric layer of the second above-mentioned capacitance electrode
About it is roughly equal to the thickness of the first conductive blind hole.
In one embodiment of this invention, the second above-mentioned capacitance electrode has the side for being connected to first end and second end
Wall, and side wall is inclined-plane.
In one embodiment of this invention, above-mentioned circuit board structure further includes multiple second conductive through holes and multiple thirds
Conductive through hole.Second conductive through hole and third conductive through hole are located in insulating layer, and part first line layer, the second route of part
Layer, these second conductive through holes and these third conductive through holes run through insulating layer in a spiral form and constitute three-dimensional inductance.
In one embodiment of this invention, above-mentioned circuit board structure further includes multiple conductive terminals.Conductive terminal configuration
It is electrically connected on rewiring road floor and with road floor is rerouted.
The production method of the production method of circuit board structure of the invention includes the following steps.Insulating layer is provided.Insulating layer
Second surface with first surface and opposite first surface.It is conductive to form first line layer, the second line layer and at least one
Through-hole.First line layer is located on the first surface of insulating layer, and first line layer includes first capacitor electrode.Second line layer
On the second surface of insulating layer.Conductive through hole is through insulating layer to be electrically connected first line layer and the second line layer.?
Capacitance dielectric layer is formed on first line layer, with the first line layer of covering part.On first line layer and capacitance dielectric layer
Upper formation dielectric layer.Dielectric layer has the first opening and the second opening, wherein the first opening exposes the first line of part
Layer, and the second opening exposes the capacitance dielectric layer of part.It is formed on first line floor and reroutes road floor.Reroute road floor packet
It includes and reroutes road, the first conductive blind hole and the second capacitance electrode.Road is rerouted to be located in the dielectric surface of dielectric layer.First leads
Electric blind hole is located in the first opening and connects first line floor and reroutes road.Second capacitance electrode be located at second opening in and with
Capacitance dielectric layer is in contact.Second capacitance electrode, capacitance dielectric layer and first capacitor electrode constitute capacitor.
In one embodiment of this invention, the first above-mentioned conductive blind hole and the second capacitance electrode be by same technique simultaneously
It is formed.
In one embodiment of this invention, above-mentioned rewiring road floor is formed to include the following steps.In dielectric layer and first
Patterning photoresist layer is formed on line layer, exposes the first opening and the second opening to the open air.On dielectric layer and first line layer
Form conductive material.In the first opening of conductive material filling, the second opening and patterning photoresist layer, wherein inserting the
The partially electronically conductive material of one opening constitutes the first conductive blind hole, and the partially electronically conductive material for inserting the second opening constitutes the second capacitor
Electrode.Patterning photoresist layer is removed, reroutes road to be formed.
In one embodiment of this invention, above-mentioned rewiring road floor is formed to include the following steps.In dielectric layer and first
Conductive material is formed on line layer.Conductive material covers the dielectric surface of dielectric layer and filling first is open and the second opening,
Wherein the partially electronically conductive material of the first opening of filling constitutes the first conductive blind hole, and inserts the partially electronically conductive material structure of the second opening
At the second capacitance electrode.The partially electronically conductive material for being covered in the dielectric surface of dielectric layer is removed, reroutes road to be formed.
In one embodiment of this invention, the production method of above-mentioned circuit board structure further includes the following steps.Yu Chongbu
Multiple conductive terminals are configured on line layer.Conductive terminal is electrically connected with road floor is rerouted.
Based on above-mentioned, the present invention first line floor of part and will be rerouted in the second capacitance electrode composition on the floor of road
Two electrodes of buried capacitor.In this way, can simplify production in the manufacturing process of the circuit board structure with imbedded capacitance
On process and improve producing efficiency and yield, and the cost of manufacture of circuit board structure can be reduced.And it is possible to by adjusting
The overlapping area of second capacitance electrode and first line layer, and can further adjust the capacitance of capacitor.Therefore, in capacitor
Manufacturing process on, it may have biggish technique degree of desire.
To make the foregoing features and advantages of the present invention clearer and more comprehensible, special embodiment below, and it is detailed to cooperate attached drawing to make
Carefully it is described as follows.
Detailed description of the invention
Figure 1A to Fig. 1 G is shown according to a kind of section of the manufacturing process of circuit board structure of the first embodiment of the present invention
It is intended to.
Fig. 1 H is the enlarged drawing of region R in Fig. 1 G.
Fig. 1 I is the upper schematic diagram of region R in Fig. 1 G.
Fig. 2 is the part upper schematic diagram according to a kind of circuit board structure of the second embodiment of the present invention.
Fig. 3 is the part upper schematic diagram according to a kind of circuit board structure of the third embodiment of the present invention.
Fig. 4 A is the part upper schematic diagram according to a kind of circuit board structure of the fourth embodiment of the present invention.
Fig. 4 B is the diagrammatic cross-section of the A-A ' hatching line along Fig. 4 A.
Fig. 4 C is the part isometric schematic diagram according to a kind of circuit board structure of the fourth embodiment of the present invention.
Description of symbols
100,200,300,400: circuit board structure；
10: capacitor；
20: inductance；
20a: magnetic flux axis；
110: circuit base plate；
111: insulating layer；
111a: first surface；
111b: second surface；
111c: perforation；
112: first line layer；
112a: first capacitor electrode；
113: the second line layers；
114: conductive through hole；
116: conductive through hole；
118: conductive through hole；
120: capacitance dielectric layer；
130: dielectric layer；
130a: dielectric surface；
131: the first openings；
132: the second openings；
141: the first conductive layers；
142: the second conductive layers；
150: rerouting road floor；
151,251: rerouting road；
251a: edge；
152: the first conductive blind holes；
153,353: the second capacitance electrode；
155: side wall；
153a, 353a: first end；
153b, 353b: second end；
154: connection gasket；
160: protective layer；
170: coating；
171: conductive terminal；
T1, T2, T3: thickness；
R: region.
Specific embodiment
For the present invention aforementioned and other technology contents, feature and effect refer to each implementation of attached drawing in following cooperation
In the detailed description of example, can clearly it present.The direction term being previously mentioned in following embodiment, such as: "upper", "lower",
"front", "rear", "left", "right" etc. are only the directions with reference to attached drawings.Therefore, the direction term used be for illustrating, and
It is not intended to limit the invention.Also, in following examples, the same or similar element will use the same or similar mark
Number.
Figure 1A to Fig. 1 G is illustrated according to a kind of section of the manufacturing process of circuit board structure of one embodiment of the invention
Figure.Fig. 1 H is the enlarged drawing of region R in Fig. 1 G.Fig. 1 I is the upper schematic diagram of region R in Fig. 1 G.For the sake of clarity, scheming
In 1I, omission shows the mold layer or component of part.
The production method of the circuit board structure 100 of the present embodiment includes the following steps.Firstly, please referring to Figure 1A, provide absolutely
Edge layer 111, wherein insulating layer 111 includes perforation (through hole) 111c, first surface 111a and second surface
111b, and first surface 111a and second surface 111b are relative to each other, and perforation 111c runs through insulating layer 111 to be connected to the first table
Face 111a and second surface 111b.The present embodiment can be formed for example using the mode of machine drilling or laser drill through insulation
The perforation 111c of layer 111, certainly, the present embodiment is only to for example, the present invention is not intended to limit the generation type of perforation 111c.
In the present embodiment, insulating layer 111 may include core layer, and core layer may include that macromolecule glass fibre is compound
Material substrate, glass substrate, ceramic substrate or polyimides (Polyimide；PI) glass fibre composite substrate, but the present invention is not
It is limited to this.In other embodiments, insulating layer 111 can be the dielectric layer with single-layer or multi-layer dielectric material, or
Outer layer is with dielectric material and internal layer is embedded with the single-layer or multi-layer wiring board of route.
Then, Figure 1B is please referred to, first line layer 112 can be formed on the first surface 111a of insulating layer 111, and in exhausted
The second line layer 113 is formed on the second surface 111b of edge layer 111.Specifically, first line layer 112 and the second line layer
113 production method can be for example including the following steps.Other suitable techniques such as depositing operation and/or electroplating technology can be passed through
Conductive materials are formed on the first surface 111a and second surface 111b of insulating layer 111.Also, conductive materials can be further
The perforation 111c of insulating layer 111 is inserted, and covers the side wall of perforation 111c, to form the conductive through hole of conductive matter
(conductive through hole)114.It then, can be for example, by photoetching and etch process with to being covered in insulating layer
Conductive materials on 111 first surface 111a and second surface 111b are patterned, to be respectively formed first line layer 112
With the second line layer 113.In the present embodiment, conductive materials are only covered in the side wall of perforation 111c, to constitute leading for hollow shape
Electric through-hole 114, however, the present invention is not limited thereto.In other examples, conductive materials can be filled in perforation 111c, with structure
At the conductive through hole 114 of solid shape.
In embodiment shown by Figure 1B, the quantity of conductive through hole 114 be for one, but the present invention is not limited to
This.
Then, it can be formed on first line layer 112 after forming first line layer 112 please continue to refer to Figure 1B
Capacitance dielectric layer 120, and the first line layer 112 of 120 covering part of capacitance dielectric layer.The material of capacitance dielectric layer 120 can be with
Including aluminium oxide (Aluminium oxide；Al2O3), aluminium nitride (Aluminium nitride；AlN), silica (Silicon
oxide；SiO2), silicon nitride (Silicon nitride；Si3N4) hafnium oxide (Hafnium dioxide；HfO2), zirconium oxide
(Zirconium dioxide；ZrO2), lanthana (Lanthanum oxide；La2O3), other similar metal oxide material
Material, metal nitride materials or other suitable high dielectric materials (high-K material).
Then, Fig. 1 C is please referred to, after forming capacitance dielectric layer 120, forms a dielectric layer 130.The material of dielectric layer 130
Material may include organic material, photosensitive type dielectric material, resin sheet (Prepreg), inorganic material (such as: silica, nitridation
Silicon, silicon oxynitride, other suitable materials or above-mentioned at least two kinds materials stack layer) or other suitable dielectric materials.
By taking organic dielectric material as an example, rubbing method, bonding method, sol-gal process (Sol-Gel method) or pressing method can be passed through
Or other suitable techniques form organic dielectric materials on the first surface 111a and second surface 111b of insulating layer 111, with
Afterwards, photopolymerization (photopolymerization) or baking (baking) work can be carried out according to the property of organic dielectric materials
Skill and solidify, to form dielectric layer 130.By taking inorganic dielectric material as an example, depositing operation or other suitable works can be passed through
Skill forms Inorganic Dielectric Material on the first surface 111a and second surface 111b of insulating layer 111, and is formed by dielectric layer
130 can cover first line layer 112, capacitance dielectric layer 120 and the second line layer 113.
In the present embodiment, the dielectric constant of capacitance dielectric layer 120 can be greater than the dielectric constant of dielectric layer 130, so that
The capacitor 10 (being illustrated in Fig. 1 G) being made of the capacitance dielectric layer 120 with above-mentioned material has preferable capacitance
(capacitance), however, the present invention is not limited thereto.
Then, Fig. 1 D is please referred to, forms multiple openings 131,132 from the dielectric surface 130a of dielectric layer 130.With organic
Material is formed by for dielectric layer 130, and opening 131,132 can pass through photoetching, etching, drilling or other suitable technique shapes
At.In another embodiment, by taking photosensitive type dielectric material is formed by dielectric layer 130 as an example, opening 131,132 can pass through exposure
It is formed with the photoetching process of development.In another embodiment, by taking inorganic material is formed by dielectric layer 130 as an example, opening can be with
It is formed by photoetching and etch process.In this way, which 131,132 side wall of being open substantially can be not have the table of concave-convex profile
Face.As shown in figure iD, in the present embodiment, on the section perpendicular to first surface 111a, the side wall of opening 131,132 can
Think an inclined-plane, however, the present invention is not limited thereto.
In the present embodiment, opening may include the first opening 131 and the second opening 132.First opening 131 is from dielectric
The dielectric surface 130a of layer 130 extends to first line layer 112, to expose the first line layer 112 of part.Second opening
132 extend from the dielectric surface 130a of dielectric layer 130 to capacitance dielectric layer 120, to expose the capacitance dielectric layer 120 of part.
In the present embodiment, the first opening 131 and the second opening 132 can be formed by similar technique.To pass through etch process
It is formed by for the first opening 131 and the second opening 132, the first opening 131 is using first line layer 112 as etch stop
Layer (etching stop layer), and the second opening 132 is using capacitance dielectric layer 120 as etching stopping layer.In this way,
It can simplify the process in production and improve producing efficiency and yield.In Fig. 1 D, the first opening 131 and/or the second opening 132
Quantity be the however, the present invention is not limited thereto for one.
Then, please refer to Fig. 1 E, optionally on the dielectric surface 130a of dielectric layer 130 and opening 131,132
Inside comprehensively form the first conductive layer 141.In other words, the first conductive layer 141 and dielectric layer 130 are conformal (conformal).
In the present embodiment, the first conductive layer 141 is, for example, that sputter is formed by kind of a crystal layer (seed layer), and common kind crystal layer has
Titanium layer and/or layers of copper, or for example, electroless plating is formed by chemical layers of copper.However, the real material of kind crystal layer depends on
The subsequent conductive material by the opening of filling first 131 and the second opening 132.
Then, Fig. 1 F is please referred to, is formed on first line floor 112 and reroutes road floor 150, and rerouting road floor 150 can
To include rerouting road 151, the first conductive blind hole 152 (conductive blind via hole) and the second capacitance electrode
153.Specifically, the production method for rerouting road floor 150 can be included the following steps for example using semi-additive process.It is possible, firstly, to
By photoetching process in formation pattern photoresist layer (not shown), pattern photoresist layer on the first conductive layer 141
The first conductive layer 141 of part is exposed, and pattern photoresist layer is not overlapped in the first opening 131 and the second opening 132,
Expose the first opening 131 and the second opening 132 to the open air.It then, such as can be by galvanoplastic (electroplating), in pattern
The second conductive layer of patterning 142 that conductive material is constituted is formed on the first conductive layer 141 that photoresist layer is exposed.
The first conductive layer of part 141 that second conductive layer 142 at least overlay pattern photoresist layer is exposed, and the second conductive layer
142 more the first 131 (being illustrated in Fig. 1 E) of opening of filling and the second 132 (being illustrated in Fig. 1 E) of opening are interior, with the first opening 131 of covering
The first conductive layer 141 in the second opening 132, is respectively formed the first conductive blind hole 152 and the second capacitance electrode 153.Then,
Can be by plasma incineration (plasma ashing) or etching method to remove photoresist layer, also, led with second
Electric layer 142 is removed the first conductive layer 141 that part is not covered by the second conductive layer 142 by exposure mask, in the second line layer 113
Upper formation reroutes road 151.
In other embodiments, (deposition, photoetching and the etching work of such as subtractive process similar way to above can also be passed through
Skill), to reroute road floor in formation on the second line layer 113.
Specifically, the production method for rerouting road floor 150 can also be for example including the following steps.Firstly, can for example lead to
Cross galvanoplastic (electroplating), with comprehensively form that a conductive material is constituted on the first conductive layer 141 one
Two conductive layers 142.Second conductive layer 142 at least covers the first conductive layer 141, and the second conductive layer 142 more inserts the first opening
131 (being illustrated in Fig. 1 E) and the second 132 (being illustrated in Fig. 1 E) of opening are interior, in covering the first opening 131 and the second opening 132
First conductive layer 141, to be respectively formed the first conductive blind hole 152 and the second capacitance electrode 153.It is then possible in the second conduction
Patterning photoresist layer (not shown) is formed on layer 142, with the conductive material that the removals such as etch process expose to the open air, that is, is moved
Except the second conductive layer of part 142, road 151 is rerouted to be formed.Finally by plasma incineration (plasma ashing) or
Etching method removes patterning photoresist layer.It also, is that exposure mask removes part not by the second conduction with the second conductive layer 142
The first conductive layer 141 that layer 142 is covered.
The first conductive layer 141 and the second conductive layer for structure, in filling 131 (being illustrated in Fig. 1 D) of the first opening
142 may be constructed the first conductive blind hole 152, the first conductive layer 141 and second in filling 132 (being illustrated in Fig. 1 D) of the second opening
Conductive layer 142 may be constructed the second capacitance electrode 153, and the first conductive blind hole 152 and the second capacitance electrode 153 electrically divide each other
From.Rest part the first conductive layer 141 and the second conductive layer 142 on the dielectric surface 130a of dielectric layer 130 can be with structures
At rewiring road 151, and the first conductive blind hole 152 can be electrically connected with the second capacitance electrode 153 by corresponding rewiring road 151
It is connected to other mold layer or component.In the present embodiment, the first conductive blind hole 152 be with the second capacitance electrode 153 can be by same
One technique is formed.In this way, can simplify the process in production and improve producing efficiency and yield, do not need using twice
Patterned photomask technique can reduce cost of manufacture.
Also, due to 152/ second capacitance electrode 153 of the first conductive blind hole be by conductive materials (such as: the first conductive layer 141
With the second conductive layer 142) filling first opening 131/ second opening 132 in constituted.Therefore, the first conductive blind hole 152/ second
The shape of capacitance electrode 153 is substantially consistent with the shape of corresponding first opening, 131/ second opening 132.For example,
The side wall 155 of one conductive blind hole, 152/ second capacitance electrode 153 substantially can be the surface for not having concave-convex profile.And in this reality
It applies in example, on the section perpendicular to first surface 111a, the side wall of 152/ second capacitance electrode 153 of the first conductive blind hole
155 can be an inclined-plane, however, the present invention is not limited thereto.
In addition, being using capacitance dielectric layer 120 as etch stop due in the technique for forming the second capacitance electrode 153
Layer, and the second capacitance electrode 153 is by the second opening of conductive materials (such as: the first conductive layer 141 and the second conductive layer 142) filling
It is constituted in 132.Therefore, as shown in Figure 1 I, on first surface 111a (such as: the paper of Fig. 1 I), the second capacitance electrode 153 in
Projected area on first surface 111a is less than capacitance dielectric layer 120 in the projected area on first surface 111a, and capacitor is situated between
Electric layer 120 is less than projected area of the first line layer 112 on first surface 111a in the projected area on first surface 111a.
Also, the second end 153b being in contact compared to the second capacitance electrode 153 with rewiring road 151, the second capacitance electrode 153 and electricity
Hold the first end 153a that dielectric layer 120 is in contact has lesser orthographic projection on first surface 111a.
For on circuit, the second capacitance electrode 153, capacitance dielectric layer 120 and with 153/ capacitor of the second capacitance electrode
The part first line layer 112 that dielectric layer 120 is overlapped may be constructed a capacitor 10.In general, the capacitance and structure of capacitor 10
At the weight of two capacitance electrodes (such as: constituting the second capacitance electrode 153 and first capacitor electrode 112a of capacitor 10) of capacitor 10
Folded area is related.As shown in Figure 1 I, in the present embodiment, due to the second capacitance electrode 153 in first surface 111a (such as: Fig. 1 I
Paper) on projected area be less than first line layer 112 in the projected area on first surface 111a.Therefore, can pass through
The opening area of the second 132 (being illustrated in Fig. 1 D) of opening is adjusted to adjust the weight of the second capacitance electrode 153 and first line layer 112
Folded area, and can further adjust the capacitance of capacitor 10.In this way, in the system of the capacitor 10 with certain capacitance
Make in process, it may have biggish technique permission (process window).
Then, Fig. 1 G is please referred to, it, can be in first surface 111a and/or the second table after forming rewiring road floor 150
Protective layer 160 is formed on the 111b of face, and protective layer 160 can expose the rewiring road 151 of part, and define connection gasket
154.Protective layer 160 can be soldermask layer (solder mask) or anti-welding dry film (dry film), however, the present invention is not limited thereto.
It can have conductive terminal 171 on connection gasket 154, so that rerouting road floor 150 passes through corresponding conductive terminal 171 and other films
Layer or element electrical connection.In addition, in some embodiments, can also have on connection gasket 154 and be coated with the metal layers such as nickel, palladium, gold
Or the coating 170 of alloy-layer, to promote the engaging force between connection gasket 154 and other film layers or element.
The production of the semiconductor package of the present embodiment can be substantially completed after above-mentioned technique.Please refer to Fig. 1 G
And Fig. 1 H, in structure for, the circuit board structure 100 of the present embodiment includes circuit base plate 110, capacitance dielectric layer 120, dielectric
Floor 130 and rewiring road floor 150.Circuit base plate 110 include insulating layer 111, first line layer 112, the second line layer 113 with
An and at least conductive through hole 114.Insulating layer 111 has the second surface of first surface 111a and opposite first surface 111a
111b.First line layer 112 is located on the first surface 111a of insulating layer 111.Second line layer 113 is located at insulating layer 111
On second surface 111b.Conductive through hole 114 is through insulating layer 111 to be electrically connected first line layer 112 and the second line layer
113.Capacitance dielectric layer 120 is located on the first line layer 112 of circuit base plate 110.The first line of 130 covering part of dielectric layer
The capacitance dielectric layer 120 of layer 112 and part.Rerouting road floor 150 includes rewiring road 151, the first conductive blind hole 152 and the
Two capacitance electrodes 153.Road 151 is rerouted to be located on dielectric layer 130.First conductive blind hole 152 is embedded in dielectric layer 130 and connects
First line layer 112.Second capacitance electrode 153 is embedded in dielectric layer 130, wherein the second capacitance electrode 153 has opposite first
153a and second end 153b, first end 153a is held to be in contact with capacitance dielectric layer 120, second end 153b and rewiring 151 phase of road
Contact.Second capacitance electrode 153, capacitance dielectric layer 120 and partial first line layer 112 constitute a capacitor 10.
One of electrode due to constituting capacitor 10 can be some of first line layer 112, and constitute capacitor 10
The second capacitance electrode 153 of another electrode can be through other blind holes for being identical to rerouting on road floor 150 (such as: the
One conductive blind hole 152) mode and/or step in formed.Therefore, in technique, other mold layer/components can formed
(as: formed first line floor 112 or reroute road floor 150 on other blind holes) the step of in together formed composition capacitor 10
Two electrodes.In this way, can simplify the process in production and improve producing efficiency and yield, and it is hardened to reduce route
The cost of manufacture of structure 100.
In the present embodiment, the first conductive blind hole 152 and the second capacitance electrode 153 are to be formed in the same way,
And the capacitance of capacitor 10 can be adjusted by adjusting the size of the second capacitance electrode 153.In this way, can simplify production
On process and improve producing efficiency and yield.In addition to this, by above-mentioned generation type, the second capacitance electrode can be made
The sum total of the 153 thickness T1 and thickness T2 of capacitance dielectric layer 120 is about roughly equal to the thickness T3 of the first conductive blind hole 152.
In the present embodiment, insulating layer 111 can be core layer, and the material of core layer can be different from capacitance dielectric layer
120 and/or dielectric layer 130 material.The material of core layer may include macromolecule glass fiber compound material, glass substrate,
Ceramic substrate, polyimides (Polyimide；PI) glass fibre composite substrate or other similar hard dielectric material.Change one
The circuit board structure 100 of kind saying, the present embodiment can be to have core (core) circuit board structure with core layer, but the present invention is not
It is limited to this.In other embodiments, the material of insulating layer 111 and the material of dielectric layer 130 are same or similar, that is to say, that absolutely
Edge layer 111 can be general dielectric layer, in this way, circuit board structure 100 then can be a centreless (coreless) circuit board structure,
Technique may be, for example, to incite somebody to action later in support plate with respect to above-mentioned capacitor 10 and/or other folded structure film layers is all formed on two surfaces
Support plate is removed to form two independent centreless circuit board structures 100.
Fig. 2 is the part upper schematic diagram according to a kind of circuit board structure of the second embodiment of the present invention.Specifically,
Fig. 2 can be the upper schematic diagram similar to the region R in Fig. 1 G.The circuit board structure 200 and previous embodiment of the present embodiment
Circuit board structure 100 it is similar, and circuit board structure 200 and circuit board structure 100 main difference is that: in first surface
On 111a (such as: the paper of Fig. 2), the projection of shape of the edge 251a on the rewiring road 251 on the second capacitance electrode 153 can
To have projection of shape that is similar and corresponding to first end 153a and/or second end 153b.
Fig. 3 is the part upper schematic diagram according to a kind of circuit board structure of the third embodiment of the present invention.Specifically,
Fig. 3 can be the upper schematic diagram similar to the region R in Fig. 1 G.The circuit board structure 300 and previous embodiment of the present embodiment
Circuit board structure 100 it is similar, and circuit board structure 300 and circuit board structure 100 main difference is that: in first surface
On 111a (such as: the paper of Fig. 3), the projection of shape of the first end 353a and/or second end 353b of the second capacitance electrode 353 can be with
Projection of shape with similar capacitance dielectric layer 120, and the projected area of first end 353a and second end 353b are situated between less than capacitor
The projected area of electric layer 120.
In the present embodiment, on first surface 111a (such as: the paper of Fig. 3), the projection of shape of first end 353a, second
The projection of shape of end 353b can be four similar side types with the projection of shape of capacitance dielectric layer 120, but the present invention is not limited to
This.
Fig. 4 A is the part upper schematic diagram according to a kind of circuit board structure of the fourth embodiment of the present invention.Fig. 4 B is edge
The diagrammatic cross-section of A-A ' hatching line in Fig. 4 A.Fig. 4 C is the part according to a kind of circuit board structure of the fourth embodiment of the present invention
Stereoscopic schematic diagram.Specifically, Fig. 4 C is one of them in a kind of circuit board structure according to the fourth embodiment of the present invention
The part isometric schematic diagram of three-dimensional inductance.In addition, for the sake of clarity, in Figure 4 A, omission shows the mold layer or structure of part
Part.
The circuit board structure 400 of the present embodiment and the circuit board structure 100 of previous embodiment are similar, and circuit board structure
400 with circuit board structure 100 main difference is that: circuit board structure 400 can be with more three-dimensional inductance 20.
Referring to Fig. 4 A to Fig. 4 C.Specifically, in the present embodiment, further include multiple conductive through holes 116 with it is more
A conductive through hole 118, and as shown in Fig. 4 A and/or Fig. 4 C, first line layer 112, conductive through hole 116, conductive through hole 118 and
Second line layer 113 may be constructed the three-dimensional inductance 20 with conductive coil.It is said differently, the conductive coil of three-dimensional inductance 20
It is in a spiral form through insulating layer 111.In this way, can make the magnetic flux axis 20a's of inductance 20 to be oriented parallel to the first table
Face 111a (that is, such as Fig. 4 A paper).
It buries and is integrated in this way, can will have in passive device of different nature (such as: capacitor 10 and inductance 20)
In circuit board structure 400, and reduce the volume of circuit board structure 400.
In conclusion the present invention will be in the second capacitance electrode composition on the first line floor of part and rewiring road floor
Two electrodes of buried capacitor.In this way, can simplify production in the manufacturing process of the circuit board structure with imbedded capacitance
On process and improve producing efficiency and yield, and the cost of manufacture of circuit board structure can be reduced.And it is possible to by adjusting
The overlapping area of second capacitance electrode and first line layer, and can further adjust the capacitance of capacitor.Therefore, in capacitor
Manufacturing process on, it may have biggish technique permission.
Although the present invention is disclosed as above with embodiment, however, it is not to limit the invention, any technical field
Middle technical staff, without departing from the spirit and scope of the present invention, when can make a little change and retouching, therefore protection of the invention
Range is subject to view as defined in claim.
Claims (11)
1. a kind of production method of circuit board structure characterized by comprising
Insulating layer is provided, the second surface with first surface and the relatively described first surface；
First line layer, the second line layer and an at least conductive through hole are formed, the first line layer is located at the insulating layer
On the first surface, and the first line layer includes first capacitor electrode, and second line layer is located at the insulating layer
The second surface on and an at least conductive through hole, the first line layer is electrically connected through the insulating layer
And second line layer；
Capacitance dielectric layer is formed on the first line layer, with the first capacitor electrode of covering part；
On the first line layer with form dielectric layer on the capacitance dielectric layer, the dielectric layer have the first opening and
Second opening, wherein first opening exposes the first line layer of part, and second opening exposes part
The capacitance dielectric layer；And
It is formed on the first line floor and reroutes road floor, the rewiring road floor includes rerouting road, the first conductive blind hole
With the second capacitance electrode, the rewiring road is located in the dielectric surface of the dielectric layer, and first conductive blind hole is located at institute
It states in the first opening and the connection first line floor and the rewiring road, second capacitance electrode is located at described second
It is in contact in opening and with the capacitance dielectric layer, and second capacitance electrode, the capacitance dielectric layer and described first
Capacitance electrode constitutes capacitor.
2. the production method of circuit board structure according to claim 1, wherein first conductive blind hole and described second
Capacitance electrode is formed simultaneously by same technique.
3. the production method of circuit board structure according to claim 1, wherein the step of forming rewiring road floor packet
It includes:
Patterning photoresist layer is formed on the dielectric layer and the first line layer, exposes first opening and institute to the open air
State the second opening；
Form conductive material on the dielectric layer and the first line layer, the conductive material filling first opening,
In second opening and the patterning photoresist layer, wherein inserting the part conduction material of first opening
Material constitutes first conductive blind hole, and the part conductive material for inserting second opening constitutes the second capacitor electricity
Pole；And
The patterning photoresist layer is removed, to form the rewiring road.
4. the production method of circuit board structure according to claim 1, wherein the step of forming rewiring road floor packet
It includes:
Conductive material is formed on the dielectric layer and the first line layer, the conductive material covers the institute of the dielectric layer
It states dielectric surface and filling described first is open and second opening, led described in the part of first opening wherein inserting
Electric material constitutes first conductive blind hole, and the part conductive material for inserting second opening constitutes second electricity
Hold electrode；And
The part conductive material for being covered in the dielectric surface of the dielectric layer is removed, to form the rewiring road.
5. the production method of circuit board structure according to claim 1, further includes:
Multiple conductive terminals are configured on rerouting road floor, the multiple conductive terminal is electrically connected with rewiring road floor.
6. a kind of circuit board structure characterized by comprising
Insulating layer, the second surface with first surface and the relatively described first surface；
First line layer, on the first surface of the insulating layer, the first line layer includes first capacitor electrode；
Second line layer, on the second surface of the insulating layer；
First conductive through hole is electrically connected the first line layer and second line layer through the insulating layer；
Capacitance dielectric layer, on the first capacitor electrode of the first line layer；
Dielectric layer, at least the first line layer and the partial capacitance dielectric layer of covering part；And
Road floor is rerouted, including reroutes road, the first conductive blind hole and the second capacitance electrode, the rewiring road, which is located at, to be given an account of
In electric layer, first conductive blind hole is located in the dielectric layer and connects the first line floor and the rewiring road, institute
The second capacitance electrode is stated to be located in the dielectric layer, wherein second capacitance electrode has opposite first end and second end,
The first end is in contact with the capacitance dielectric layer, and the second end is in contact with the rewiring road, and second electricity
Hold electrode, the capacitance dielectric layer and the first capacitor electrode and constitutes capacitor.
7. circuit board structure according to claim 6, wherein the first end is small in the orthographic projection on the first surface
In with the second end in the orthographic projection on the first surface.
8. circuit board structure according to claim 6, wherein the thickness of second capacitance electrode and the capacitive dielectric
The sum total of the thickness of layer is about roughly equal to the thickness of first conductive blind hole.
9. circuit board structure according to claim 6, wherein second capacitance electrode, which has, is connected to the first end
With the side wall of the second end, and the side wall be inclined-plane.
10. circuit board structure according to claim 6, wherein further including that multiple second conductive through holes and multiple thirds are conductive
Through-hole is located in the insulating layer, and the part first line layer, part second line layer, the multiple second leads
Electric through-hole and the multiple third conductive through hole run through the insulating layer in a spiral form and constitute three-dimensional inductance.
11. circuit board structure according to claim 6, further includes:
Multiple conductive terminals are configured on the floor of the rewiring road and are electrically connected with rewiring road floor.
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| CN201810072395.4A CN110087392B (en) | 2018-01-25 | 2018-01-25 | Circuit board structure and manufacturing method thereof |
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| CN201810072395.4A CN110087392B (en) | 2018-01-25 | 2018-01-25 | Circuit board structure and manufacturing method thereof |
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| Publication number | Publication date |
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| CN110087392B (en) | 2021-08-10 |
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