CN110085707B - III-nitride semiconductor tunnel junction and preparation method and application thereof - Google Patents
III-nitride semiconductor tunnel junction and preparation method and application thereof Download PDFInfo
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- H01S5/00—Semiconductor lasers
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Abstract
The invention discloses a III-nitride semiconductor tunnel junction and a preparation method and application thereof. The preparation method of the nitride semiconductor tunnel junction comprises the following steps: forming a tunnel junction comprising a p-type nitride layer and an n-type nitride layer; exposing at least a local region of the p-type nitride layer; and carrying out heat treatment on the tunnel junction to enable at least part of H in the p-type nitride layer to escape. By the method, the activation efficiency of the doped element in the p-type material in the tunnel junction can be effectively improved, the series resistance of the tunnel junction is reduced, the tunneling probability of the tunnel junction is improved, and when the tunnel junction is applied to semiconductor devices such as a light-emitting diode, a super-radiation light-emitting diode and a laser, the series resistance of the devices can be greatly reduced, and the output power and the reliability of the devices are effectively improved.
Description
Technical Field
The invention relates to a light emitting diode, in particular to a III-nitride semiconductor tunnel junction and a preparation method and application thereof, belonging to the technical field of semiconductor photoelectricity.
Background
The III-V group nitride semiconductor is called as a third-generation semiconductor material and has the advantages of large forbidden band width, good chemical stability, strong radiation resistance and the like; the forbidden band width covers the range from deep ultraviolet, whole visible light and near infrared, can be used for manufacturing semiconductor devices such as light emitting diodes, lasers, super-radiation light emitting diodes, high electron mobility transistors and the like, and has wide market application prospect.
In general, p-type nitride materials are required in III-V nitride semiconductor devices, and magnesium dicocene (CP) is generally used as the p-type nitride material2Mg) as a dopant, the hole concentration in p-type nitride materials is low, since the ionization energy of Mg acceptors in nitrides is high, and usually less than 10% of Mg acceptors ionizeThe resistance is large. On the other hand, the work function of p-type nitride is high (p-type GaN: 7.5eV), the specific contact resistivity of p-type ohmic contact is high, so that the working voltage of the device is high, the thermal power is high, and the performance and the reliability of the device are seriously influenced. Some researchers have proposed using a tunnel junction to convert electrons into holes, thereby avoiding the problem of high p-type ohmic contact resistance, as shown in CN 101427431B, CN 105977349 a. However, they neglect the problem that p-type material Mg in the tunnel junction is difficult to activate, resulting in higher resistance of the existing tunnel junction, and thus are difficult to be really applied in nitride semiconductor devices.
Conventional nitride semiconductor tunnel junctions, which are typically grown using Metal Organic Chemical Vapor Deposition (MOCVD) equipment, typically include a p-type heavily doped layer and an n-type heavily doped layer, wherein the p-type layer is below the n-type layer, and the growth requires the growth of the p-type layer followed by the growth of the n-type layer. When p-type nitride grows, an Mg acceptor in a p-type layer is easily passivated by H in a growth atmosphere to form an Mg-H complex, so that the p-type layer is in a high-resistance state, and Mg activation is carried out in a subsequent thermal annealing or electron beam irradiation mode to break an Mg-H bond and diffuse H. However, research shows that the diffusion barrier of H in a p-type layer is small (0.7eV), the diffusion barrier of H in an n-type material is large (3.4eV), and normally, the p-type layer in a tunnel junction is in the middle of a device and has n-type layers on the upper and lower surfaces, so that H in the p-type layer cannot diffuse out, and the p-type layer in the tunnel junction cannot be effectively activated. Even if Mg activation is carried out firstly when a tunnel junction is manufactured, and an n-type layer is grown, an originally activated Mg acceptor can be passivated again by H in a growth atmosphere when the n-type layer is grown subsequently, so that the Mg acceptor in a p-type layer can not be effectively activated, and the resistance of the tunnel junction is very large. In the annealing method, the distance of H to be diffused is longer, the area of H diffused out of the device is small, the required annealing temperature is higher, and the annealing time is longer. The active region of the device is easily degraded by long-term high-temperature annealing, and the performance of the device is influenced. Therefore, the conventional III-V nitride tunnel junction cannot be practically applied to a nitride semiconductor device.
In addition, the external quantum efficiency of the current ultraviolet light emitting diode is very low, especially the deep ultraviolet light emitting diode is generally less than 10%, and the main bottleneck is that the light extraction efficiency of the current ultraviolet light emitting diode is very low, only about 10%, which is much less than the external quantum efficiency (> 80%) of the blue light emitting diode. One of the main reasons for the low light extraction efficiency of the uv led is the absorption of the p-type GaN layer. For ultraviolet light emitting diodes, especially deep ultraviolet light emitting diodes, the energy of ultraviolet light emitted by a quantum well active region is larger than the forbidden bandwidth of a GaN material, and p-type GaN can strongly absorb the ultraviolet light, thereby seriously affecting the light extraction efficiency of the ultraviolet light emitting diodes. To avoid light absorption by the GaN layer, a p-type AlGaN material of high Al composition is generally used. However, the ionization energy of Mg acceptor in p-type AlGaN material with high Al composition is very high (GaN:170meV, AlN:470meV), and the hole concentration in p-type AlGaN material is very low, which results in larger series resistance of p-type material in the device. On the other hand, more importantly, the work function of the p-type AlGaN material with high Al content is very large and is far higher than that of all existing metals, so that p-type ohmic contact is difficult to realize, the voltage drop at the p-type contact position is very large when the device works and is far higher than the junction voltage of the device, so that the working voltage of the device is very high, and the performance and the reliability of the device are seriously influenced. In addition, in order to ensure sufficient optical confinement for a laser, a superluminescent light emitting diode, or the like, it is generally necessary to grow a p-type AlGaN optical confinement layer having a thickness of about 500nm, and thus the series resistance of the device is large. Meanwhile, the difference between the refractive index of the AlGaN optical confinement layer and the refractive index of the waveguide layer is small and is about 5%, so that the optical confinement factor of a laser or a super-radiation light-emitting diode quantum well is small and is about 2.5%, which is far smaller than that of a traditional III-V GaAs or InP-based semiconductor laser or a super-radiation light-emitting diode (8%), and therefore, the material gain required by the nitride semiconductor laser and the super-radiation light-emitting diode for lasing is higher, and the threshold current is larger. Moreover, because the difference between the refractive index of the AlGaN optical confinement layer and the refractive index of the waveguide layer is small, the optical field distribution range is large, about 50% of the optical field is distributed in the p-type layer, and a deep energy level center is formed by an Mg acceptor in the p-type layer, so that the absorption coefficient of the p-type AlGaN optical confinement layer is large, the internal loss of the laser or the super-radiation light emitting diode is large, the threshold current is high, and the performance and the reliability of the device are seriously influenced.
Disclosure of Invention
The main objective of the present invention is to provide a group III nitride semiconductor tunnel junction, and a method for fabricating the same and an application thereof, so as to overcome the disadvantages of the prior art.
In order to achieve the purpose, the technical scheme adopted by the invention comprises the following steps:
the embodiment of the invention provides a preparation method of a nitride semiconductor tunnel junction, which comprises the following steps:
forming a tunnel junction comprising a p-type nitride layer and an n-type nitride layer;
exposing at least a local region of the p-type nitride layer;
and carrying out heat treatment on the tunnel junction to enable at least part of H in the p-type nitride layer to escape.
In some embodiments, the method of making comprises: at least processing more than one hole on the structural layer covering the p-type nitride layer, and enabling one end of each hole to be exposed in the external environment and the other end of each hole to reach the surface or the inner part of the p-type nitride layer.
Further, the p-type nitride layer contains M-H bonds, M is a doping element (e.g., Mg, etc.), and the temperature of the heat treatment is sufficient to allow H within the M-H bonds to escape from the p-type nitride layer.
Further, the p-type nitride layer includes p-type Alx1Iny1Ga1-x1-y1The N heavily doped layer, wherein x1, y1 and (x1+ y1) are all more than or equal to 0 and less than or equal to 1.
Further, the n-type nitride layer includes n-type Alx2Iny2Ga1-x2-y2The N heavily doped layer, wherein x2, y2 and (x2+ y2) are all more than or equal to 0 and less than or equal to 1.
Embodiments of the present invention also provide a nitride semiconductor tunnel junction prepared by any of the foregoing methods.
The embodiment of the invention also provides a nitride semiconductor device which comprises an n-type contact layer, an active region, an electron blocking layer, a p-type layer and a tunnel junction which are sequentially arranged, wherein the tunnel junction adopts any one of the nitride semiconductor tunnel junctions, the tunnel junction comprises a p-type nitride layer and an n-type nitride layer covering the p-type nitride layer, and a local region of the p-type nitride layer is exposed out of the n-type nitride layer.
In some implementations, the n-type nitride layer has one or more holes formed therein to expose a localized area of the p-type nitride layer.
Further, the nitride semiconductor device includes a light emitting diode.
Embodiments of the present invention also provide a method of manufacturing the nitride semiconductor device, which includes:
providing an epitaxial layer, wherein the epitaxial layer comprises an n-type contact layer, an active region, an electron blocking layer, a p-type layer and a tunnel junction which are formed in sequence in a growing mode, and the tunnel junction comprises a p-type nitride layer and an n-type nitride layer which are formed in sequence in a growing mode;
removing at least part of the n-type nitride layer to expose a partial area of the p-type nitride layer, and performing heat treatment on the epitaxial layer to enable at least part of H in the p-type nitride layer to escape; and
and manufacturing a contact electrode, and enabling the contact electrode to form ohmic contact with the n-type contact layer and the n-type nitride layer respectively.
In some embodiments, the method of making further comprises:
more than one hole is processed in the n-type nitride layer of the tunnel junction, so that a local area of the p-type nitride layer is exposed, and then the epitaxial layer is subjected to heat treatment, so that at least part of H in the p-type nitride layer escapes.
The embodiment of the invention also provides a nitride semiconductor device which comprises a lower contact layer, a lower optical limiting layer, a lower waveguide layer, an active region, an upper waveguide layer, an electronic barrier layer and a tunnel junction which are sequentially arranged, wherein the tunnel junction is also provided with an upper optical limiting layer and an upper contact layer, and the tunnel junction adopts any one of the nitride semiconductor tunnel junctions.
Further, at least one of the upper and lower optical confinement layers is n-type.
Further, at least one of the upper and lower contact layers is n-type.
In some embodiments, the nitride semiconductor device includes a ridge structure having a depth reaching a surface or an interior of a p-type nitride layer within the tunnel junction.
Further, the nitride semiconductor device includes a nitride semiconductor laser or a superluminescent light emitting diode.
Embodiments of the present invention also provide a method of manufacturing the nitride semiconductor device, which includes:
providing an epitaxial layer which comprises a lower contact layer, a lower optical limiting layer, a lower waveguide layer, an active region, an upper waveguide layer, an electron blocking layer, a tunnel junction, an upper optical limiting layer and an upper contact layer which are sequentially grown, wherein the tunnel junction comprises a p-type nitride layer and an n-type nitride layer which are sequentially grown;
processing a ridge structure on the epitaxial layer, wherein the depth of the ridge structure reaches the surface or the inner part of the p-type nitride layer in the tunnel junction;
carrying out heat treatment on the epitaxial layer to enable at least part of H in the p-type nitride layer to escape; and
and manufacturing a contact electrode, and enabling the contact electrode to form ohmic contact with the upper contact layer and the lower contact layer respectively.
Embodiments of the present invention also provide a method of manufacturing the nitride semiconductor device, which includes:
providing an epitaxial layer, wherein the epitaxial layer comprises a lower contact layer, a lower optical limiting layer, a lower waveguide layer, an active region, an upper waveguide layer, an electron blocking layer, a tunnel junction and an upper contact layer which are sequentially grown and formed, and the tunnel junction comprises a p-type nitride layer and an n-type nitride layer which are sequentially grown and formed;
forming an upper optical confinement layer on the upper contact layer;
processing a ridge structure on the device structure comprising the epitaxial layer and the upper optical limiting layer, wherein the depth of the ridge structure reaches the surface or the inner part of the p-type nitride layer in the tunnel junction;
carrying out heat treatment on the device structure to enable at least part of H in the p-type nitride layer to escape; and
and manufacturing a contact electrode, and enabling the contact electrode to form ohmic contact with the lower contact layer and the upper contact layer respectively.
Compared with the prior art, the method has the advantages that the p-type nitride layer in the nitride semiconductor tunnel junction is exposed, so that H in M-H bonds (M is a doping element such as Mg) in the p-type nitride can escape from the p-type nitride layer, the activation efficiency of M in p-type materials in the tunnel junction is improved, the tunneling probability of the tunnel junction is improved, and the series resistance of the tunnel junction is reduced. In addition, the nitride semiconductor tunnel junction is applied to the interior of a semiconductor device such as a laser, and all or part of the p-type optical limiting layer is replaced by the n-type optical limiting layer or other materials, so that the optical limiting factor of the device can be greatly increased, the series resistance and optical loss of the device can be reduced, and the performance and reliability of the device can be greatly improved.
Drawings
Fig. 1 is a schematic view of an epitaxial structure of a nitride semiconductor light emitting diode in embodiment 1 of the present invention.
Fig. 2 is a schematic view of the epitaxial structure of fig. 1 after a small hole is formed therein.
Fig. 3 is a top view of the device structure shown in fig. 2.
Fig. 4 is a schematic diagram of the device structure of fig. 2 after etching an n-type mesa.
Fig. 5 is a schematic illustration of the device structure of fig. 4 after opening an n-type ohmic contact window.
Fig. 6 is a schematic illustration after ohmic contacts are formed on the device structure shown in fig. 5.
Fig. 7 is a schematic view of an epitaxial structure of a nitride semiconductor laser or a superluminescent light emitting diode in embodiment 2 of the present invention.
Fig. 8 is a schematic illustration of the epitaxial structure of fig. 7 after etching a ridge.
Fig. 9 is a schematic diagram after etching an n-type mesa on the device structure shown in fig. 8.
Fig. 10 is a schematic illustration of the device structure of fig. 9 after etching an n-type ohmic contact window.
Fig. 11 is a schematic view of the device structure of fig. 10 after an n-type ohmic contact electrode is formed thereon.
Fig. 12 is a schematic view of an epitaxial structure of a nitride semiconductor laser or a superluminescent light emitting diode in embodiment 3 of the present invention.
Fig. 13 is a schematic illustration of a device structure based on the epitaxial structure of fig. 12 after etching a ridge.
Fig. 14 is a schematic illustration of the device structure of fig. 13 after etching n-type mesas.
Fig. 15 is a schematic illustration of the device structure of fig. 14 after etching an n-type ohmic contact window.
Fig. 16 is a schematic view of the device structure of fig. 15 after an n-type ohmic contact electrode is formed thereon.
Fig. 17 is a schematic view of an epitaxial structure of a nitride semiconductor laser or a superluminescent light emitting diode in embodiment 4 of the present invention.
Fig. 18 is a schematic illustration of a device structure based on the epitaxial structure of fig. 17 after etching a ridge.
Fig. 19 is a schematic illustration of the device structure of fig. 18 after deposition of an insulating dielectric film thereon.
Fig. 20 is a schematic illustration of the device structure of fig. 19 after the fabrication of an upper, thickened electrode.
Fig. 21 is a schematic view of the device structure of fig. 20 after a lower ohmic contact electrode has been formed thereon.
Description of reference numerals: 101 is a substrate, 102 is an n-type contact layer, 103 is a multi-quantum well active region, 104 is an electron blocking layer, 105 is a p-type layer, 106 is a p-type nitride heavily doped layer in a tunnel junction (p-type heavily doped layer for short), 107 is an n-type nitride heavily doped layer in a tunnel junction (n-type heavily doped layer for short), 108 is an insulating dielectric film, 109 is a contact electrode, 201 is a substrate, 202 is an n-type contact layer, 203 is an n-type lower optical confinement layer, 204 is a lower waveguide layer, 205 is an active region, 206 is an upper waveguide layer, 207 is an electron blocking layer, 208 is a p-type heavily doped layer in a tunnel junction, 209 is an n-type heavily doped layer in a tunnel junction, 210 is an n-type upper optical confinement layer, 211 is an n-type upper contact layer, 212 is an insulating dielectric film, 213 is a contact electrode, 301 is a substrate, 302 is an n-type contact layer, 303 is an n-type lower optical confinement layer, 304 is a lower waveguide layer, 305 is an active region, and 306 is an upper waveguide layer, 307 is an electron blocking layer, 308 is a p-type heavily doped layer in the tunnel junction, 309 is an n-type heavily doped layer in the tunnel junction, 310 is an n-type ohmic contact, 311 is an upper optical confinement layer, 312 is an insulating dielectric film, 313 is a contact electrode, 401 is a substrate, 402 is an n-type contact layer, 403 is an n-type lower optical confinement layer, 404 is a lower waveguide layer, 405 is an active region, 406 is an upper waveguide layer, 407 is an electron blocking layer, 408 is a p-type optical confinement layer, 409 is a p-type heavily doped layer in the tunnel junction, 410 is an n-type heavily doped layer in the tunnel junction, 411 is an n-type upper optical confinement layer, 412 is an n-type upper contact layer, 413 is an insulating dielectric film, 414 is an upper contact electrode, and 415 is a lower contact electrode.
Detailed Description
In view of the deficiencies in the prior art, the inventors of the present invention have made extensive studies and extensive practices to provide technical solutions of the present invention. The technical solution, its implementation and principles, etc. will be further explained as follows. It is to be understood, however, that within the scope of the present invention, the above-described features of the present invention and those specifically described below (e.g., in the examples) may be combined with one another to form new or preferred embodiments. Not to be reiterated herein, but to the extent of space.
One aspect of the embodiments of the present invention provides a method for manufacturing a nitride semiconductor tunnel junction, including:
forming a tunnel junction comprising a p-type nitride layer and an n-type nitride layer;
exposing at least a local region of the p-type nitride layer;
and carrying out heat treatment on the tunnel junction to enable at least part of H in the p-type nitride layer to escape.
Further, the preparation method comprises the following steps: removing a portion of the structural layer covering the p-type nitride layer, thereby exposing at least a localized area of the p-type nitride layer.
The aforementioned structural layers include, but are not limited to, one or more layers of semiconductor material, metal material, insulating material, etc. or combinations thereof overlying the p-type nitride layer.
For example, in some embodiments, the structural layer comprises the n-type nitride layer.
In some embodiments, the method of making can further comprise: at least processing more than one hole on the structural layer covering the p-type nitride layer, and enabling one end of each hole to be exposed in the external environment and the other end of each hole to reach the surface or the inner part of the p-type nitride layer.
Furthermore, the number of the holes is more than two, and the distance between the adjacent holes is preferably 0mm-1 mm.
Further, the shape of the hole includes a regular or irregular shape, such as a circle, a circular ring, a quadrangle, a hexagon, an octagon, a dodecagon, etc., but is not limited thereto.
Further, the p-type nitride layer contains M-H bonds, M is a doping element (a doping metal element such as Mg), and the temperature of the heat treatment is sufficient to allow H within the M-H bonds to escape from the p-type nitride layer.
Wherein M includes doping elements such as Mg, etc., but is not limited thereto.
In some more specific embodiments, the p-type nitride layer comprises p-type Alx1Iny1Ga1-x1-y1The N heavily doped layer, wherein x1, y1 and (x1+ y1) are all more than or equal to 0 and less than or equal to 1.
In some more specific embodiments, the n-type nitride layer comprises n-type Alx2Iny2Ga1-x2-y2The N heavily doped layer, wherein x2, y2 and (x2+ y2) are all more than or equal to 0 and less than or equal to 1.
In some embodiments, the method of making further comprises: and processing the holes on the structural layer by at least adopting any one mode or the combination of more than two modes of dry etching, wet etching, electrochemical etching and photo-assisted electrochemical etching, wherein the structural layer is one material layer or more than two material layers which are arranged in a stacked mode. The material layer may be one or more of inorganic materials such as semiconductors, metals, metal oxides, and non-metal oxides, or organic materials such as polymers, and is preferably a semiconductor material.
Accordingly, embodiments of the present invention also provide a nitride semiconductor tunnel junction prepared by any one of the aforementioned methods.
The invention enables H in M-H bonds in the p-type nitride to escape from the surface of the p-type layer by exposing the p-type nitride layer in the nitride semiconductor tunnel junction, thereby improving the activation efficiency of the Mg acceptor in the p-type material of the tunnel junction, improving the tunneling probability, reducing the series resistance of the tunnel junction, improving the performance of the device, thereby overcoming the defects of seriously limited performance of the ultraviolet light-emitting diode and the like caused by very large p-type contact resistance, and solves the problems of poor performance of the nitride semiconductor laser or the super-radiation light-emitting diode and the like caused by larger p-type series resistance and p-type ohmic contact resistance, more serious optical loss caused by a p-type layer and the like, the method has great advantages and important practical value in semiconductor devices such as ultraviolet light emitting diodes, semiconductor lasers or super-radiation light emitting diodes and the like.
The embodiment of the invention also provides a nitride semiconductor device which comprises an n-type contact layer, an active region, an electron blocking layer, a p-type layer and a tunnel junction which are sequentially arranged, wherein the tunnel junction adopts any one of the nitride semiconductor tunnel junctions, the tunnel junction comprises a p-type nitride layer and an n-type nitride layer covering the p-type nitride layer, and a local area of the p-type nitride layer is exposed out of the n-type nitride layer.
In some implementations, the n-type nitride layer has one or more holes formed therein to expose a localized area of the p-type nitride layer.
In some embodiments, the surface of the device is further covered with an insulating medium layer, windows for allowing contact electrodes to pass through are distributed on the insulating medium layer, and the contact electrodes form ohmic contact with the n-type contact layer and the n-type nitride layer respectively.
Furthermore, the material of the insulating medium layer comprises SiO2、SiNx(silicon nitride), SiON, single crystal Si, polycrystalline Si, Al2O3、AlON、SiAlON、TiO2、Ta2O5And ZrO2Any one or a combination of two or more of them, but not limited thereto.
Further, the nitride semiconductor device includes a light emitting diode, such as an ultraviolet light emitting diode.
An embodiment of the present invention further provides a method for manufacturing the nitride semiconductor device, including:
providing an epitaxial layer, wherein the epitaxial layer comprises an n-type contact layer, an active region, an electron blocking layer, a p-type layer and a tunnel junction which are formed in sequence in a growing mode, and the tunnel junction comprises a p-type nitride layer and an n-type nitride layer which are formed in sequence in a growing mode;
removing at least part of the n-type nitride layer to expose a partial area of the p-type nitride layer, and performing heat treatment on the epitaxial layer to enable at least part of H in the p-type nitride layer to escape; and
and manufacturing a contact electrode, and enabling the contact electrode to form ohmic contact with the n-type contact layer and the n-type nitride layer respectively.
In some embodiments, the method of making can further comprise: more than one hole is processed in the n-type nitride layer of the tunnel junction, so that a local area of the p-type nitride layer is exposed, and then the epitaxial layer is subjected to heat treatment, so that at least part of H in the p-type nitride layer escapes.
Of course, a partial region of the p-type nitride layer of the tunnel junction may be exposed by removing a peripheral portion or a selected one of the regions of the n-type nitride layer of the tunnel junction by machining, physical etching, or chemical etching.
Preferably, the preparation method further comprises the following steps:
processing an n-type mesa on the epitaxial layer, and enabling the processing depth to reach an n-type contact layer;
covering an insulating medium layer on the surface of the epitaxial layer, and processing a window for a contact electrode to pass through on the insulating medium layer;
and manufacturing and forming the contact electrode in the window.
For example, in a more specific embodiment of the present invention, the preparation method may further include:
growing a nitride light emitting diode structure based on a tunnel junction on a substrate, wherein the nitride light emitting diode structure specifically comprises an n-type contact layer, an active region, an electron blocking layer, a p-type layer and the tunnel junction, and the tunnel junction at least comprises the p-type nitride heavily-doped layer and the n-type nitride heavily-doped layer.
Cleaning the epitaxial wafer, processing a plurality of holes on the surface of the epitaxial wafer through a photoetching process and the like to expose the p-type nitride heavily-doped layer, wherein the depth of the processed holes reaches the surface or the inner part of the p-type nitride heavily-doped layer in the tunnel junction, and then carrying out rapid thermal annealing to activate the p-type nitride heavily-doped layer in the device. In this process, the holes provide diffusion channels for H in the p-type heavily doped nitride layer, which greatly improves the activation efficiency of Mg and the like in the p-type heavily doped nitride layer, reduces the resistivity of the p-type heavily doped nitride layer, and thus greatly reduces the resistance of the tunnel junction. The holes may be circular, quadrangular, hexagonal, octagonal, dodecagonal or other shapes, etc., wherein the distance between holes is preferably 0-1 mm. And the processing method of the hole may include any one or a combination of two or more of dry etching, wet etching, electrochemical etching, photo-assisted electrochemical etching, and the like, without being limited thereto.
And etching an n-type mesa by photoetching, dry etching process and the like until the depth reaches the n-type contact layer for forming n-type ohmic contact. And depositing an insulating dielectric film to passivate the side wall of the hole, the exposed p-type nitride heavily-doped layer and the side wall of the n mesa, and then photoetching and etching to open a window for manufacturing n-type ohmic contact. The insulating dielectric film may be SiO2、SiNxSiON, single crystal Si, polycrystalline Si, Al2O3、AlON、SiAlON、TiO2、Ta2O5And ZrO2Any one or a combination of two or more of the above materials, not being restrictedAnd is limited thereto.
And depositing an n-type ohmic contact electrode on the surface of the tunnel junction device and the n-type contact layer of the n mesa through photoetching, metal deposition and stripping processes, and carrying out ohmic contact annealing to form better ohmic contact. The ohmic contact metal used in the method may be any one or a combination of two or more of materials such as Ni, Cr, Ag, Ti, Pd, Pt, Au, Al, AZO, TiN, ITO, and IGZO, but is not limited thereto.
And thinning the substrate by adopting methods of thinning, grinding, polishing and the like, and then splitting to form a single light-emitting diode core.
The substrate material may be any one or a combination of two or more of GaN, AlN, sapphire, SiC, Si, and the like, but is not limited thereto.
By the scheme, the serious influence on the performance of the light-emitting diode due to the fact that the contact resistance of the p-type contact is very large can be well overcome.
The nitride semiconductor device provided by the embodiment of the invention comprises a lower contact layer, a lower optical limiting layer, a lower waveguide layer, an active region, an upper waveguide layer, an electronic barrier layer and a tunnel junction which are sequentially arranged, wherein the tunnel junction is also provided with the upper optical limiting layer and the upper contact layer, and the tunnel junction can adopt any one of the nitride semiconductor tunnel junctions.
In some embodiments, the upper optical confinement layer and the upper contact layer may be sequentially formed on the tunnel junction.
In some embodiments, the upper contact layer and the upper optical confinement layer may also be formed sequentially on the tunnel junction.
Preferably, at least one of the upper and lower optical confinement layers is n-type.
More preferably, the upper optical confinement layer is n-type.
Further preferably, the upper optical confinement layer and the lower optical confinement layer are both n-type, so that the optical confinement factor of the laser or the superluminescent light emitting diode can be greatly increased, the series resistance and the optical loss of the device are reduced, and the performance and the reliability of the device are greatly improved.Further, the material of the upper optical confinement layer and the lower optical confinement layer includes, but is not limited to, Alx3Iny3Ga1-x3-y3N, ITO, AZO, IGZO, porous GaN, Ag, Al, ZnO, MgO, Si, SiO2、SiNx、TiO2、ZrO2、AlN、Al2O3、Ta2O5、HfO2、HfSiO4And AlON, wherein x3, y3 and (x3+ y3) are all more than or equal to 0 and less than or equal to 1.
In some embodiments, at least one of the upper and lower contact layers is n-type.
Preferably, the upper and lower contact layers are both n-type.
In some embodiments, the nitride semiconductor device includes a ridge structure having a depth reaching a surface or an interior of a p-type nitride layer within the tunnel junction.
Preferably, the width of the ridge structure is 0 to 500 μm.
In some embodiments, the nitride semiconductor device further includes an insulating dielectric layer at least covering the surface of the p-type nitride layer in the tunnel junction and the side wall of the ridge structure, wherein windows are distributed on the insulating dielectric layer and can be used for allowing contact electrodes to pass through, and the contact electrodes respectively form ohmic contact with the upper contact layer and the lower contact layer.
Further, the nitride semiconductor device includes a nitride semiconductor laser, a super luminescent diode, or the like, but is not limited thereto.
Embodiments of the present invention also provide a method for manufacturing a nitride semiconductor device, including:
providing an epitaxial layer which comprises a lower contact layer, a lower optical limiting layer, a lower waveguide layer, an active region, an upper waveguide layer, an electron blocking layer, a tunnel junction, an upper optical limiting layer and an upper contact layer which are sequentially grown, wherein the tunnel junction comprises a p-type nitride layer and an n-type nitride layer which are sequentially grown;
processing a ridge structure on the epitaxial layer, wherein the depth of the ridge structure reaches the surface or the inner part of the p-type nitride layer in the tunnel junction;
carrying out heat treatment on the epitaxial layer to enable at least part of H in the p-type nitride layer to escape; and
and manufacturing a contact electrode, and enabling the contact electrode to form ohmic contact with the upper contact layer and the lower contact layer respectively.
In some embodiments, the method of making further comprises:
processing an n mesa on the epitaxial layer, and enabling the processing depth to reach the lower contact layer;
covering an insulating medium layer on the surface of the epitaxial layer, and processing a window for a contact electrode to pass through on the insulating medium layer;
and manufacturing and forming the contact electrode in the window.
For example, in a more specific embodiment of the present invention, the preparation method may further include:
a nitride semiconductor laser or a super-radiation light-emitting diode structure based on a tunnel junction is grown on a substrate and specifically comprises an n-type lower contact layer, a lower optical limiting layer, a lower waveguide layer, an active region, an upper waveguide layer, an electron blocking layer, a tunnel junction, an n-type upper optical limiting layer and an n-type upper contact layer, wherein the tunnel junction at least comprises a p-type nitride heavily-doped layer and an n-type nitride heavily-doped layer.
Cleaning the epitaxial wafer, spin-coating photoresist on the surface of the epitaxial wafer for photoetching, etching the ridge of the device by adopting dry etching, wherein the width of the ridge is less than 500 mu m, the depth of the ridge reaches the surface or the inner part of the p-type nitride heavily-doped layer of the tunnel junction, and then carrying out rapid thermal annealing to activate the p-type nitride heavily-doped layer in the device.
And spin-coating photoresist on the surface of the epitaxial wafer, photoetching, and etching to the n-type lower contact layer by adopting a dry etching technology to form an n-type table top for manufacturing n-type ohmic contact.
And then depositing an insulating dielectric film on the surface of the laser, and carrying out ohmic contact windowing to form a current injection window.
And photoetching, metal deposition and stripping are carried out, and annealing is carried out to form two ohmic contact electrodes of the device.
And finally, thinning, grinding and polishing the substrate, and then carrying out cleavage, film coating and splitting to form the nitride laser or the superluminescent diode core.
Embodiments of the present invention also provide a method for manufacturing a nitride semiconductor device, including:
providing an epitaxial layer, wherein the epitaxial layer comprises a lower contact layer, a lower optical limiting layer, a lower waveguide layer, an active region, an upper waveguide layer, an electron blocking layer, a tunnel junction and an upper contact layer which are sequentially grown and formed, and the tunnel junction comprises a p-type nitride layer and an n-type nitride layer which are sequentially grown and formed;
forming an upper optical confinement layer on the upper contact layer;
processing a ridge structure on the device structure comprising the epitaxial layer and the upper optical limiting layer, wherein the depth of the ridge structure reaches the surface or the inner part of the p-type nitride layer in the tunnel junction;
carrying out heat treatment on the device structure to enable at least part of H in the p-type nitride layer to escape; and
and manufacturing a contact electrode, and enabling the contact electrode to form ohmic contact with the lower contact layer and the upper contact layer respectively.
In some embodiments, the method of making further comprises:
processing n table-boards on the device structure, and enabling the processing depth to reach the lower contact layer;
covering an insulating medium layer on the surface of the device structure, and processing a window for a contact electrode to pass through on the insulating medium layer;
and manufacturing and forming the contact electrode in the window.
For example, in a more specific embodiment of the present invention, the preparation method may further include:
a nitride semiconductor laser or a super-radiation light-emitting diode structure based on a tunnel junction is grown on a substrate and specifically comprises an n-type lower contact layer, a lower optical limiting layer, a lower waveguide layer, an active region, an upper waveguide layer, an electron blocking layer, a tunnel junction and an n-type upper contact layer, wherein the tunnel junction at least comprises a p-type nitride heavily-doped layer and an n-type nitride heavily-doped layer.
And cleaning the epitaxial wafer, and depositing an n-type ohmic contact and an upper optical limiting layer on the surface of the epitaxial wafer.
Cleaning the epitaxial wafer, spin-coating photoresist on the surface of the epitaxial wafer for photoetching, etching the ridge of the device by adopting dry etching, wherein the width of the ridge is less than 500 mu m, the depth of the ridge reaches the surface or the inner part of the p-type nitride heavily-doped layer of the tunnel junction, and then carrying out rapid thermal annealing to activate the p-type nitride heavily-doped layer in the device.
And spin-coating photoresist on the surface of the epitaxial wafer, photoetching, and etching to the n-type lower contact layer by adopting a dry etching technology to form an n-type table top for manufacturing n-type ohmic contact.
And then depositing an insulating dielectric film on the surface of the laser, and carrying out ohmic contact windowing to form a current injection window.
And photoetching, metal deposition and stripping are carried out, and annealing is carried out to form two ohmic contact electrodes of the device.
And finally, thinning, grinding and polishing the substrate, and then carrying out cleavage, film coating and splitting to form the nitride laser or the superluminescent diode core.
By the scheme, the defects that p-type series resistance and p-type ohmic contact resistance are large, optical loss caused by a p-type layer is serious and the like in the conventional nitride semiconductor laser or super-radiation light emitting diode can be effectively overcome, so that the nitride semiconductor laser or super-radiation light emitting diode has the advantages of large optical limiting factor, small series resistance, low optical loss and the like, and the performance and reliability of the device are expected to be greatly improved.
The technical solution of the present invention is described in more detail below with reference to several examples:
embodiment 1 a method for manufacturing an ultraviolet light emitting diode includes the steps of:
s1: growing a nitride 280nm ultraviolet light emitting diode structure based on a tunnel junction on a sapphire substrate, and particularly comprising 1000nm n-Al0.65Ga0.35N contact layer, 8 pairs of Al0.45Ga0.55N/Al0.65Ga0.35N multiple quantum well, wherein each layer of Al0.45Ga0.55N quantum well 2nm, each layer of Al0.65Ga0.35N barrier 8nm, 20nm p-Al0.9Ga0.1N-electron blocking layer, 20nm p-Al0.45Ga0.55N layer, 10nm p-Al0.45Ga0.55Heavily N-doped layer, 2.5nm p-In0.15Ga0.85Heavily N-doped layer, 50nm N-Al0.45Ga0.55The N heavily doped layer, as shown in fig. 1.
S2: cleaning the epitaxial wafer, etching the n-AlGaN heavily doped layer with the thickness of 50nm on the surface of the epitaxial wafer into a porous AlGaN structure by photoetching and electrochemical etching to expose the p-type layer, and then annealing for 5 minutes at 700 ℃ in a compressed air atmosphere by using a rapid annealing furnace, as shown in FIGS. 2 and 3. Wherein the shape of the holes can also be one or more of the combinations in fig. 3.
S3: and etching the n mesa by photolithography and dry etching to reach the n-type contact layer to form n-type ohmic contact, as shown in FIG. 4.
S4: deposition of 200nm SiO2And the insulating dielectric film is used for passivating the side wall of the n mesa, and then photoetching and RIE etching are carried out to etch a window for manufacturing the n-type ohmic contact, as shown in figure 5.
S5: through photoetching, metal deposition and stripping processes, 100nm Ti/20nm Pt/300nmAu is deposited on the n-type heavily doped layer on the surface of the tunnel junction and the n-type contact layer of the n mesa, and ohmic contact annealing is carried out to form better ohmic contact, as shown in figure 6.
S6: and thinning the substrate to 70 mu m by adopting methods of thinning, grinding, polishing and the like, and then splitting to form a single ultraviolet light-emitting diode core.
In order to verify the implementation effect of the present invention, the inventors also tested the device performance of the ultraviolet light emitting diode prepared in this example and the light emitting diode prepared by the conventional method. The test result shows that: the operating voltage of the ultraviolet light emitting diode prepared in the embodiment is 6.1V and the output power is 5.2mW under the current of 20mA, while the operating voltage of the light emitting diode prepared by the conventional method is 8.4V and the output power is only 3.9mW under the current of 20 mA. Therefore, by adopting the embodiment, the working voltage of the ultraviolet light-emitting diode can be greatly reduced, and the output power of the ultraviolet light-emitting diode is improved.
Example 2: a method for manufacturing a green laser or a super-radiation light-emitting diode comprises the following steps:
s1: growing a tunnel junction-based GaN-based green laser or super-radiation Light Emitting Diode (LED) on a Si substrate by using Metal Organic Chemical Vapor Deposition (MOCVD) equipment, wherein the LED specifically comprises a 1000nm n-GaN contact layer and 500nm GaN (Si:1 × 10)19cm-3) Highly doped layer, 130nm n-In0.05Ga0.95N lower waveguide layers, 3 pairs of In0.3Ga0.7N/GaN multiple quantum well with each layer of In0.3Ga0.72.5nm N quantum well, 15nm GaN barrier layer, 80nm unintentionally doped In0.05Ga0.95N upper waveguide layer, 20nm p-Al0.2Ga0.8N electron blocking layer, 15nm p-GaN heavily doped layer, 3nm InGaN undoped layer, 10nm N-GaN heavily doped layer, 500nm GaN (Si: 1X 10)19cm-3) Highly doped layer, 20nm n-GaN contact, as shown in fig. 7.
S2: cleaning the epitaxial wafer, spin-coating photoresist on the surface of the epitaxial wafer for photoetching, etching the ridge of the device by adopting ion beam etching, wherein the width of the ridge is 20 mu m, the depth of the ridge is 540nm, the ridge reaches the inside of the p-type heavily-doped layer of the tunnel junction, and then annealing for 3 minutes at 700 ℃ in a compressed air atmosphere by using a rapid annealing furnace to activate the p-type layer in the device, as shown in figure 8.
S3: spin-coating photoresist on the surface of the epitaxial wafer, performing photolithography, and then etching to the n-type lower contact layer by using an ICP dry etching technique to form an n-type mesa for making an n-type ohmic contact, as shown in fig. 9.
S4: and forming porous GaN by adopting an electrochemical corrosion method, and forming an upper optical limiting layer and a lower optical limiting layer of the laser or the super-radiation light-emitting diode.
S5: depositing 150nm SiO on the surface of the laser epitaxial wafer2The dielectric film is insulated and opened with ohmic contact by RIE to form a window for current injection, as shown in fig. 10.
S6: and photoetching, depositing 20nm Ti/50nm Al/100nm Ti/100nm Au, and then stripping to form two ohmic contact electrodes of the device, as shown in FIG. 11.
S7: and thinning, grinding and polishing the substrate, and then cleaving, coating and splitting to form the nitride laser or the super-radiation light-emitting diode core.
To verify the effect of the present invention, the present inventors tested the device performance of the green laser prepared in this example and the green laser prepared by the conventional method. The test result shows that: compared with the traditional green laser, the green laser has the advantages that the threshold current is reduced by 20%, and the series resistance is reduced by 65%. The performance of the green laser is greatly improved.
Example 3: a method for manufacturing a deep ultraviolet laser or a super-radiation light-emitting diode comprises the following steps:
s1: growing AlGaN-based ultraviolet laser or super-radiation light-emitting diode (LED) on AlN substrate by using Metal Organic Chemical Vapor Deposition (MOCVD) equipment, specifically comprising 2500nm n-Al0.6Ga0.4N contact layer, 150 pairs of N-Al0.8Ga0.2N/Al0.5Ga0.5N superlattice structure with each layer having thickness of 3nm as N-type optical confinement layer, 110nm N-Al0.55Ga0.45N lower waveguide layer, 3 pairs of Al0.45Ga0.55N/Al0.65Ga0.35N multiple quantum well, wherein each layer of Al0.45Ga0.55N quantum well 3nm, each layer of Al0.65Ga0.35N barrier 10nm, 100nm unintentionally doped Al0.55Ga0.45N upper waveguide layer, 20nm p-Al0.9Ga0.1N-electron blocking layer, 50 pairs of p-Al0.8Ga0.2N/Al0.5Ga0.5N superlattice structure, 10 p-Al0.8Ga0.2N/Al0.5Ga0.5Heavily doped layer of N-superlattice structure, wherein each layer has 2.5nm thick, 1nm InGaN undoped layer, and 20nm N-Al0.65Ga0.35Heavily N-doped layer, 20nm N-Al0.65Ga0.35N upper contact layer as shown in fig. 12.
S2: and cleaning the epitaxial wafer, and depositing 5nm Ti/300nm Al on the surface of the epitaxial wafer to be used as an n-type ohmic contact and an upper optical limiting layer.
S3: cleaning the epitaxial wafer, spin-coating photoresist on the surface of the epitaxial wafer for photoetching, etching the ridge of the device by adopting dry etching, wherein the width of the ridge is 30 mu m, the depth of the ridge is 350nm, the ridge reaches the p-type heavily-doped layer of the tunnel junction, and then annealing for 5 minutes at 650 ℃ in a nitrogen atmosphere by using a rapid annealing furnace to activate the p-type layer in the device, as shown in figure 13.
S4: spin-coating photoresist on the surface of the epitaxial wafer, performing photolithography, and then etching to the n-type lower contact layer by using a dry etching technique to form an n-type mesa for making an n-type ohmic contact, as shown in fig. 14.
S5: then depositing an insulating dielectric film of 100nm Al on the surface of the laser2O3And ohmic contact windowing is performed to form a window for current injection, as shown in fig. 15.
S6: photolithography was performed to deposit 50nm Cr/300nm Au, and then two ohmic contact electrodes forming the device were peeled off as shown in FIG. 16.
S7: and thinning, grinding and polishing the substrate, and then cleaving, coating and splitting to form the nitride laser or the super-radiation light-emitting diode core.
In order to verify the implementation effect of the present invention, the inventors also tested the device performance of the deep ultraviolet laser prepared in this example and the deep ultraviolet laser prepared by the conventional method. The test result shows that: compared with the traditional deep ultraviolet laser, the threshold current of the deep ultraviolet laser is reduced by 30%, and the series resistance is reduced by 75%. The performance of the deep ultraviolet laser is greatly improved.
Example 4: a method for manufacturing a violet laser or a super-radiation light-emitting diode comprises the following steps:
s1: a tunnel junction-based GaN-based violet laser or super-radiation light emitting diode structure grows on a GaN self-supporting substrate by adopting Metal Organic Chemical Vapor Deposition (MOCVD) equipment, and specifically comprises a 2000nm n-GaN contact layer and 100 pairs of n-Al0.16Ga0.84N/GaN superlattice structure with 2.5nm of thickness for each layer as N-type opticsConfinement layer, 100nm n-GaN lower waveguide layer, 3 pairs of In0.1Ga0.9N/GaN multiple quantum well with each layer of In0.1Ga0.92.5nm of N quantum well, 15nm of GaN barrier, 80nm of unintentionally doped GaN upper waveguide layer, and 20nm of p-Al0.2Ga0.8An N electron blocking layer, a 10nm p-GaN heavily doped layer, a 2nm InGaN non-doped layer, a 10nm N-GaN heavily doped layer, and a 500nm N-Al0.08Ga0.92N layer, 20nm N-GaN contact layer, as shown in fig. 17.
S2: cleaning the epitaxial wafer, spin-coating photoresist on the surface of the epitaxial wafer for photoetching, etching the ridge of the device by ion beam etching, wherein the width of the ridge is 5 microns, the depth of the ridge is 540nm, the ridge reaches the inside of the p-type heavily doped layer of the tunnel junction, and then annealing for 1.5 minutes in a rapid annealing furnace at 600 ℃ in a compressed air atmosphere to activate the p-type layer in the device, as shown in figure 18.
S3: 200nm SiN is deposited on the surface of the laserxThe dielectric film is insulated and peeled off as shown in fig. 19.
S4: photoetching, depositing 50nm Ti/100nm Pt/500nm Au, and stripping to form p-type thickened electrodes of the device, as shown in FIG. 20.
S5: the substrate was thinned, ground and polished, and 50nm Ti/100nm Al/50nm Ti/200nm Au was deposited to form the n-type ohmic contact electrode of the device as shown in FIG. 21.
S6: and (4) carrying out cleavage, film coating and splitting to form a nitride laser or a super-radiation light-emitting diode core.
In order to verify the implementation effect of the present invention, the inventors also tested the device performance of the violet laser prepared in this embodiment and the violet laser prepared by the conventional method. The test result shows that: compared with the traditional violet laser, the threshold current of the violet laser is reduced by 12%, and the series resistance is reduced by 59%. The performance of the violet laser is greatly improved.
It should be understood that the above-mentioned embodiments are merely illustrative of the technical concepts and features of the present invention, which are intended to enable those skilled in the art to understand the contents of the present invention and implement the present invention, and therefore, the protection scope of the present invention is not limited thereby. All equivalent changes and modifications made according to the spirit of the present invention should be covered within the protection scope of the present invention.
Claims (18)
1. A method for manufacturing a nitride semiconductor device, characterized by comprising:
providing an epitaxial layer which comprises a lower contact layer, a lower optical limiting layer, a lower waveguide layer, an active region, an upper waveguide layer, an electron blocking layer, a tunnel junction, an upper optical limiting layer and an upper contact layer which are sequentially grown, wherein the tunnel junction comprises a p-type nitride layer and an n-type nitride layer which are sequentially grown;
processing a ridge structure on the epitaxial layer, wherein the depth of the ridge structure reaches the surface or the inner part of the p-type nitride layer in the tunnel junction;
carrying out heat treatment on the epitaxial layer to enable at least part of H in the p-type nitride layer to escape; and
and manufacturing a contact electrode, and enabling the contact electrode to form ohmic contact with the upper contact layer and the lower contact layer respectively.
2. The method of claim 1, further comprising:
processing an n mesa on the epitaxial layer, and enabling the processing depth to reach the lower contact layer;
covering an insulating medium layer on the surface of the epitaxial layer, and processing a window for a contact electrode to pass through on the insulating medium layer;
and manufacturing and forming the contact electrode in the window.
3. The method of claim 1, wherein: at least one of the upper and lower optical confinement layers is n-type.
4. The production method according to claim 3, characterized in that: only the upper optical confinement layer is n-type, or both the upper and lower optical confinement layers are n-type.
5. The method of claim 1, wherein: the upper optical confinement layer and the lower optical confinement layer are made of Alx3Iny3Ga1-x3-y3N, ITO, AZO, IGZO, porous GaN, Ag, Al, ZnO, MgO, Si, SiO2Silicon nitride, TiO2、ZrO2、AlN、Al2O3、Ta2O5、HfO2、HfSiO4And AlON, wherein x3, y3 and (x3+ y3) are all more than or equal to 0 and less than or equal to 1.
6. The method of claim 1, wherein: at least one of the upper and lower contact layers is n-type.
7. The method of claim 6, wherein: the upper and lower contact layers are both n-type.
8. The method of claim 1, wherein: the width of the ridge structure is greater than 0 and less than or equal to 500 [ mu ] m.
9. The method of claim 1, wherein: the nitride semiconductor device includes a nitride semiconductor laser or a superluminescent light emitting diode.
10. A method for manufacturing a nitride semiconductor device, characterized by comprising:
providing an epitaxial layer, wherein the epitaxial layer comprises a lower contact layer, a lower optical limiting layer, a lower waveguide layer, an active region, an upper waveguide layer, an electron blocking layer, a tunnel junction and an upper contact layer which are sequentially grown and formed, and the tunnel junction comprises a p-type nitride layer and an n-type nitride layer which are sequentially grown and formed;
forming an upper optical confinement layer on the upper contact layer;
processing a ridge structure on the device structure comprising the epitaxial layer and the upper optical limiting layer, wherein the depth of the ridge structure reaches the surface or the inner part of the p-type nitride layer in the tunnel junction;
carrying out heat treatment on the device structure to enable at least part of H in the p-type nitride layer to escape; and
and manufacturing a contact electrode, and enabling the contact electrode to form ohmic contact with the lower contact layer and the upper contact layer respectively.
11. The method of claim 10, further comprising:
processing n table-boards on the device structure, and enabling the processing depth to reach the lower contact layer;
covering an insulating medium layer on the surface of the device structure, and processing a window for a contact electrode to pass through on the insulating medium layer;
and manufacturing and forming the contact electrode in the window.
12. The method of manufacturing according to claim 10, wherein: at least one of the upper and lower optical confinement layers is n-type.
13. The method of manufacturing according to claim 12, wherein: only the upper optical confinement layer is n-type, or both the upper and lower optical confinement layers are n-type.
14. The method of manufacturing according to claim 10, wherein: the upper optical confinement layer and the lower optical confinement layer are made of Alx3Iny3Ga1-x3-y3N, ITO, AZO, IGZO, porous GaN, Ag, Al, ZnO, MgO, Si, SiO2Silicon nitride, TiO2、ZrO2、AlN、Al2O3、Ta2O5、HfO2、HfSiO4And AlON, wherein x3, y3 and (x3+ y3) are all more than or equal to 0 and less than or equal to 1.
15. The method of manufacturing according to claim 10, wherein: at least one of the upper and lower contact layers is n-type.
16. The method of claim 15, wherein: the upper and lower contact layers are both n-type.
17. The method of manufacturing according to claim 10, wherein: the width of the ridge structure is greater than 0 and less than or equal to 500 [ mu ] m.
18. The method of manufacturing according to claim 10, wherein: the nitride semiconductor device includes a nitride semiconductor laser or a superluminescent light emitting diode.
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| CN111785818B (en) * | 2020-07-10 | 2022-11-01 | 中国科学院半导体研究所 | GaN fundamental waveguide device based on porous lower cladding layer and preparation method and application thereof |
| CN111900626A (en) * | 2020-07-15 | 2020-11-06 | 苏州长光华芯光电技术有限公司 | Double-active-area laser chip and preparation method thereof |
| CN112510130A (en) * | 2020-12-02 | 2021-03-16 | 武汉大学 | Design and manufacturing method of blue light Mico-LED chip with flip-chip structure |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105762236A (en) * | 2014-12-15 | 2016-07-13 | 中国科学院苏州纳米技术与纳米仿生研究所 | Nitride super luminescent diode and preparation method thereof |
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