CN110085597A - Utilize the three-dimensional flash memory and its manufacturing method of electrode layer and/or interlayer insulating film with different characteristic - Google Patents
Utilize the three-dimensional flash memory and its manufacturing method of electrode layer and/or interlayer insulating film with different characteristic Download PDFInfo
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- CN110085597A CN110085597A CN201811575987.4A CN201811575987A CN110085597A CN 110085597 A CN110085597 A CN 110085597A CN 201811575987 A CN201811575987 A CN 201811575987A CN 110085597 A CN110085597 A CN 110085597A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
- H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
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Abstract
The embodiment of the present invention by make multiple electrodes layer each physical structure or material etc. it is different, the threshold voltage that can improve multiple electrodes layer is spread, and therefore can improve the degree of belief during storing data maintenance process and read-write.
Description
The application is the Chinese patent application (applying date: on December 31st, 2014；Application number: 201480074446.7；Invention
Create title: using have different characteristic electrode layer and/or interlayer insulating film three-dimensional flash memory and its manufacturing method) division
Application.
Technical field
The present invention relates to a kind of three-dimensional flash memories and its system using the electrode layer and/or interlayer insulating film with different characteristic
Method is made, more specifically, is related to a kind of by making multiple electrodes layer be respectively provided with different features or making multiple layer insulations
Layer is respectively provided with different features, and the threshold voltage for calculating multiple electrodes layer is distributed (Threshold Voltage
Distribution) and make to be applied to each the average three-dimensional flash memory and its manufacture phase of pressure rating of multiple interlayer insulating films
The technology of pass.
Background technique
Flash element is as Electrically Erasable Programmable Read-Only Memory (EEPROM, Electrically Erasable
Programmable Read Only Memory), memory can be jointly used in for example computer, digital camera,
MP3 player, game system, memory stick (memory stick) etc..The flash element is according to F-N tunnel-effect (Fowler-
Nordheim tunneling) or thermoelectron injection (hot electron injection) electric control data input/output.
If the flash element from the viewpoint of the circuit, described there are NAND-type flash memory element and NOR type flash element
NAND-type flash memory element has the following structure: N number of cell transistor (cell transistor) series connection forms unit string
(string) and this unit string (string) in bit line (bit line) and is grounded in parallel, NOR between (ground line)
Type flash element has the following structure: each unit transistor is in parallel between bit line and ground line.
The flash element must be designed to store the data of high capacity.Therefore, it necessarily is formed in unit chip more
A cell transistor.But it is not easy in restriction level area inner height integrated unit transistor.
Three-dimensional memory structure improves the limit of the two dimension scaling (Scaling) of nand flash memory.Three dimensional NAND flash memory
Structure includes such as embedded-type electric flow sensor (BICS, Built-In Current Sensor) structure and improvement BICS knot
Expansible (BiCS, the Bit Cost Scalable) NAND flash memory structure of the position cost of the duct type (Piped Typed) of structure.
The embodiment of the present invention is different by the physical structure or the material that make multiple electrodes layer etc., provides a kind of improvement
The three-dimensional flash memory and its manufacturing method of the threshold voltage distribution of multiple electrodes layer.
Also, the embodiment of the present invention passes through the physical structure or material for not only making multiple electrodes layer but also making interlayer insulating film
Material etc. is different, provides a kind of three-dimensional flash memory and its manufacturer for keeping the pressure rating for being applied to each interlayer insulating film average
Method.
Summary of the invention
Three-dimensional flash memory according to an embodiment of the invention, comprising: channel layer；Multiple electrodes layer, with the channel layer
Connection, and stacked vertical；It with multiple interlayer insulating films, connect with the channel layer, and is alternately arranged with the multiple electrode layer,
And stacked vertical, wherein each of the multiple electrode layer is with mutually different physical structure, or by different
Substance formed.
The thickness of first electrode layer compares the second of the upper layer for being present in the first electrode layer in the multiple electrode layer
The thickness of electrode layer is formed as thicker.
The multiple electrode layer each length or the pattern that is formed on each surface of the multiple electrode layer it is mutual
It is not identical.
The material that first electrode layer is formed in the multiple electrode layer compares the upper layer for being present in the first electrode layer
The material of the second electrode lay has more excellent characteristics of electrical conductivity.
At least two electrode layers are formed by mutually different substance in the multiple electrode layer.
Interlayer oxide film, silicon oxide film and tunnel are configured between each of the multiple electrode layer and the channel layer
Oxidation film.
Three-dimensional flash memory according to another embodiment of the present invention, comprising: channel layer；Multiple electrodes layer connects with the channel layer
It connects, and stacked vertical；It with multiple interlayer insulating films, connect with the channel layer, and is alternately arranged with the multiple electrode layer, and
And stacked vertical, wherein each of the multiple interlayer insulating film is formed or had different by mutually different substance
Physical structure.
The material that the first interlayer insulating film is formed in the multiple interlayer insulating film is exhausted compared to first interlayer is present in
The material of second interlayer insulating film on the upper layer of edge layer has stronger anti-compression property.
At least two interlayer insulating films are formed by mutually different substance in the multiple interlayer insulating film.
The thickness of the first interlayer insulating film, which is compared, in the multiple interlayer insulating film is present in first interlayer insulating film
The thickness of the second interlayer insulating film on upper layer be formed as thicker.
The multiple interlayer insulating film each length or be formed on each surface of the multiple interlayer insulating film
Pattern it is different.
Interlayer oxide film, silicon oxide film and tunnel are configured between each of the multiple electrode layer and the channel layer
Oxidation film.
Three-dimensional flash memory according to another embodiment of the present invention, comprising: channel layer；Multiple electrodes layer connects with the channel layer
It connects, and stacked vertical；It with multiple interlayer insulating films, connect with the channel layer, and is alternately arranged with the multiple electrode layer, and
And stacked vertical, wherein each of the multiple interlayer insulating film is formed or had different by mutually different substance
Physical structure, and each of the multiple electrode layer is formed by mutually different substance or is had mutually different physics
Property structure.
The embodiment of the present invention is different by the physical structure or the material that make multiple electrodes layer etc., it is possible to provide Yi Zhonggai
The three-dimensional flash memory and its manufacturing method of the threshold voltage distribution of kind multiple electrodes layer.Therefore, it can be improved and be stored in three-dimensional flash memory
Data degree of belief.
Also, the embodiment of the present invention passes through the physical structure or material for not only making multiple electrodes layer but also making interlayer insulating film
Material etc. is different, it is possible to provide a kind of three-dimensional flash memory and its manufacture for keeping the pressure rating for being applied to each interlayer insulating film average
Method.
Detailed description of the invention
Fig. 1 shows the general cross-sectional view of three-dimensional flash memory.
Fig. 2 shows include that the three-dimensional of multiple interlayer insulating films formed by same substance and with uniform physical structure dodges
The cross-sectional view deposited.
It includes being formed by mutually different substance and having uniform physical structure that Fig. 3, which shows embodiment according to the present invention,
Multiple interlayer insulating films three-dimensional flash memory cross-sectional view.
It includes being formed and being had different physical by mutually different substance that Fig. 4, which shows embodiment according to the present invention,
The cross-sectional view of the three-dimensional flash memory of multiple interlayer insulating films of structure.
Fig. 5 shows the three-dimensional flash memory of the multiple electrodes layer including being formed with uniform physical structure and by same substance
Cross-sectional view.
It includes being formed with mutually different physical structure and by same substance that Fig. 6, which shows embodiment according to the present invention,
Multiple electrodes layer three-dimensional flash memory cross-sectional view.
It includes with mutually different physical structure and by mutually different object that Fig. 7, which shows embodiment according to the present invention,
The cross-sectional view of the three-dimensional flash memory for the multiple electrodes layer that matter is formed.
Fig. 8 is the diagram for showing the storage device according to an embodiment of the invention including three-dimensional flash memory.
Fig. 9 is shown including with uniform physical structure and the three-dimensional flash memory of multiple electrodes layer that is formed by same substance
Structure diagram.
Figure 10 is to show the chart that threshold voltage is distributed in three-dimensional flash memory shown in Fig. 9.
Figure 11 is to show the chart that threshold voltage is distributed in the three-dimensional flash memory according to each thickness of multiple electrodes layer.
Specific embodiment
Hereinafter, the embodiment of the present invention is described in detail with reference to attached drawing.But the present invention does not limit to or is defined in implementation
Example.Also, the same reference symbol shown in each attached drawing indicates the same part.
Fig. 1 shows the general cross-sectional view of three-dimensional flash memory.
With reference to Fig. 1, three-dimensional flash memory includes the channel layer 110 as vertical structure object.That is, channel layer 110 is directed to substrate (not
Diagram) it vertically forms.Here, channel layer can be formed by monocrystalline silicon, such as can be raw using the selective epitaxial of substrate by sheet
Long technique or phase transfer epitaxy technique etc. and formed.
It can be formed with tunnel oxide film 120, silicon oxide film 130 and interlayer oxide film 140 on 110 periphery of channel layer, and more
A 150 stacked vertical of electrode layer.Though also, be not shown in Fig. 1, it can be alternately arranged between multiple electrodes layer 150 multiple
Interlayer insulating film.
Although will be made below being described in detail, it is formed in tunnel oxide film 120, the silicon oxide film on 110 periphery of channel layer
130 and interlayer oxide film 140 by capture charge can storing data.But the external pressure occurred during capturing charge
Intrinsic pressure or with time going by the diffusion of charge will occur data interference.At this point, during capturing charge
The external pressure or intrinsic pressure of generation act on multiple interlayer insulating films respectively differently.For example, being present in the layer of upper layer part
Between insulating layer will receive the pressure of inferior grade, the interlayer insulating film for being present in lower layer part will receive high-grade pressure.
Also, since the resistivity of the channel layer of three-dimensional flash memory 110 is different according to position, multiple electrodes layer 150
The difference of the threshold voltage of each occurs, so that threshold voltage distribution can be spread.The diffusion of this threshold voltage distribution can make
Degree of belief decline in the data maintenance process and reading process of storage.At this point, due to being flowed in each in multiple electrodes layer 150
The current density crossed is different, therefore difference can occur for multiple electrodes layer 150 each threshold voltage.For example, being present in upper layer
The electrode layer in portion has high current density, and the electrode layer for being present in lower layer part has relatively low current density.
Fig. 2 shows include that the three-dimensional of multiple interlayer insulating films formed by same substance and with uniform physical structure dodges
The cross-sectional view deposited.
It is exhausted in the multiple interlayers being alternately arranged with multiple electrodes layer 210 due to the structure problem of three-dimensional flash memory with reference to Fig. 2
Pressure of the interlayer insulating film in the portion at the middle and upper levels of edge layer 220 by inferior grade, on the contrary in the interlayer insulating film of lower layer part by high
The pressure of grade.
In this way, each of multiple interlayer insulating films 220 can be become by the pressure of different grade reduces storage number
According to degree of belief the reason of.Therefore, the embodiment of the present invention in order to make multiple interlayer insulating films 220 each be substantially subjected to
The pressure of uniform grade and the material or physical structure that suggested multiple interlayer insulating films 220.
It includes being formed by mutually different substance and having uniform physical structure that Fig. 3, which shows embodiment according to the present invention,
Multiple interlayer insulating films three-dimensional flash memory cross-sectional view.
With reference to Fig. 3, multiple electrodes layer is arranged respectively at using the formation of mutually different substance in an embodiment of the present invention
Multiple interlayer insulating films 320 between 310.For example, multiple interlayer insulating films 320 may include substance 1 interlayer insulating film 330,
The interlayer insulating film 333 of the interlayer insulating film 331 of substance 2, the interlayer insulating film 332 of substance 3 and substance 4.
Multiple interlayer insulating films 320 are carried out for the purpose of planarizing or insulating using and may include with SiO2, DSG
(SiOF), the CVD such as TFOS, BPSG film forming gas material and with spin-coating glass (SOG, Spin-On-Glass/Shiroki
It Acid is) coating material (SOD) of representative.The material of these multiplicity is in mechanical strength, dielectric constant, dielectric loss, chemistry
Property degree of safety, thermal safety, conductivity etc. there is the feature of diversified material, this feature determines and intrinsic pressure or external
The relevant durability degree of pressure.
At this point, in an embodiment of the present invention, in order to be present in the layer insulation of upper layer part in multiple interlayer insulating films 320
The material relatively weak for pressure can be used in layer, in order to be present in the interlayer insulating film of lower layer part, can be used for pressure phase
To stronger material.Therefore, the grade for being respectively applied to the pressure of multiple interlayer insulating films 320 can be made average.
It includes being formed and being had different physical by mutually different substance that Fig. 4, which shows embodiment according to the present invention,
The cross-sectional view of the three-dimensional flash memory of multiple interlayer insulating films of structure.
With reference to Fig. 4, in an embodiment of the present invention, as shown in figure 3, in order to multiple interlayer insulating films each, can make
With mutually different substance, and each physical structure of multiple interlayer insulating films can also be designed as different.Here,
Physical structure by multiple interlayer insulating films each thickness, length etc. and be determined.At this point, multiple interlayer insulating films include
Upper interlayer insulating film, lowermost position interlayer insulating film and intermediate interlayer insulating film.Therefore, by multiple interlayer insulating films each
Physical structure be designed as different meaning that each physical structure is designed as by multiple intermediate interlayer insulating films
It is different.
Referring again to Fig. 4, in an embodiment of the present invention, the multiple interlayers being respectively present between multiple electrodes layer 410 are exhausted
Edge layer 420 may include 432 and of interlayer insulating film of the interlayer insulating film 430 of substance 1, the interlayer insulating film 431 of substance 2, substance 3
The interlayer insulating film 433 of substance 4.At this point, the layer of the interlayer insulating film 431 of the interlayer insulating film 430 of substance 1, substance 2, substance 3
Between the interlayer insulating film 433 of insulating layer 432 and substance 4 each thickness can be decided to be it is different.For example, substance 1
The thickness of interlayer insulating film 430 is formed as comparing the interlayer insulating film 432 and object of the interlayer insulating film 431 of substance 2, substance 3
The thickness of the interlayer insulating film 433 of matter 4 is thicker, and the grade for being respectively applied to the pressure of multiple interlayer insulating films 420 can be made flat
?.
Although in Fig. 4 by the variation of multiple 420 each thickness of interlayer insulating film to the change of physical structure into
Explanation is gone, but the embodiment of the present invention may include different lengths, be formed on multiple each surface of interlayer insulating film 420
The variation of pattern etc..
In this way, in an embodiment of the present invention, not only being formed but also being had mutually not by different substance although suggested
Multiple interlayer insulating films 420 of same physical structure, but it does not limit to or is defined in this, can also suggest by same substance shape
At and only with different physical structure multiple interlayer insulating films 420.
Fig. 5 shows the three-dimensional flash memory of the multiple electrodes layer including being formed with uniform physical structure and by same substance
Cross-sectional view.
With reference to Fig. 5, since the structure problem of three-dimensional flash memory is (for example, the resistivity for the channel layer that three-dimensional flash memory includes is based on
Position and the problem of change), the current density of the electrode layer of upper layer part is flowed through in multiple electrodes layer 510 and flows through lower layer part
The current density of electrode layer is different, therefore difference can occur for multiple electrodes layer 150 each threshold voltage.
In this way, multiple electrodes layer 510 each threshold voltage the difference diffusion that brings threshold voltage to be distributed, and threshold value
The diffusion of voltage can become the reason of degree of belief decline in the data maintenance process and reading process that make storage.Therefore, this hair
Bright embodiment in order to make multiple electrodes layer 510 each substantially there is uniform threshold voltage, it is proposed that multiple electrodes
The material or physical structure of layer 510.At this point, can also have with multiple interlayer insulating films 520 that multiple electrodes layer 510 is alternately arranged
There are the material or physical structure of the above-mentioned pressure for being applicable in uniform grade substantive respectively.
Fig. 6 shows embodiment according to the present invention with mutually different physical structure and including being formed by same substance
Multiple electrodes layer three-dimensional flash memory cross-sectional view.
With reference to Fig. 6, in an embodiment of the present invention, can design make multiple electrodes layer 610 each physical structure it is mutual
It is not identical.Here, physical structure is determined by each thickness, the length etc. of multiple electrodes layer 610.At this point, multiple electrodes layer
610 include upper electrode layer, lowermost position electrode layer and intermediate electrode layer.Therefore, hereinafter, by multiple electrodes layer 610 each
Physical structure be designed as different meaning that each physical structure is designed as mutually not by multiple intermediate electrode layers
It is identical.
For example, multiple electrodes layer 610 may include the electrode layer 1 (620) with different thickness, electrode layer 2 (621),
Electrode layer 3 (622) and electrode layer 4 (623).At this point, the thickness of electrode layer 1 (620) is formed as compared to electrode layer 2 (621), electricity
Pole layer 3 (622) and electrode layer 4 (623) thickness it is thicker, can make multiple electrodes layer 610 each threshold voltage be averaged.
Although being carried out by the variation of 610 each thickness of multiple electrodes layer to the change of physical structure in Fig. 6
Illustrate, but the embodiment of the present invention may include different lengths, the pattern being formed on each surface of multiple electrodes layer 610 etc.
Variation.
At this point, can also have with multiple interlayer insulating films 630 that multiple electrodes layer 610 is alternately arranged above-mentioned substantive respectively
It is applicable in the material or physical structure of the pressure of uniform grade.
It includes with mutually different physical structure and by mutually different object that Fig. 7, which shows embodiment according to the present invention,
The cross-sectional view of the three-dimensional flash memory for the multiple electrodes layer that matter is formed.
With reference to Fig. 7, in an embodiment of the present invention, as shown in fig. 6, can be by each physical structure of multiple electrodes layer
Be designed as it is different, and simultaneously in order to multiple electrodes layer each, applicable mutually different substance.
Referring again to Fig. 7, in an embodiment of the present invention, multiple electrodes layer 710 may include electrode layer 720, the substance of substance 1
The electrode layer 723 of 2 electrode layer 721, the electrode layer 722 of substance 3 and substance 4.
Here, in an embodiment of the present invention, the electrode layer of upper layer part is present in multiple electrodes layer 710, it can
Using the relatively weak material of characteristics of electrical conductivity, in order to be present in the electrode layer of lower layer part, characteristics of electrical conductivity can be used relatively
Good material.For example, the characteristics of electrical conductivity of the electrode layer 720 of substance 1 is better than the characteristics of electrical conductivity of the electrode layer 723 of substance 4.Cause
This, each the threshold voltage of multiple electrodes layer 710 can be changed uniform.
At this point, can also have with multiple interlayer insulating films 730 that multiple electrodes layer 710 is alternately arranged above-mentioned substantive respectively
It is applicable in the material or physical structure of the pressure of uniform grade.
Also, in an embodiment of the present invention, although suggested with different physical structure and by different
The multiple electrodes layer 710 that substance is formed, but it does not limit to or is defined in this, can also suggest having uniform physical structure and only
The multiple electrodes layer 710 formed by different substance.
Fig. 8 is the diagram for showing the storage device according to an embodiment of the invention including three-dimensional flash memory.
With reference to Fig. 8, memory 810 is connect with Memory Controller 820 in system 800.At this point, memory 810 means
Above-mentioned three-dimensional flash memory.Memory 810 not only can be nand flash memory, can also be the NOR flash memory using inventive concept.
Memory Controller 820 provides input signal to control the movement of memory 810.
System for example when be written storage card Memory Controller and memory relationship when convey host order into
And input/output data is controlled, or a variety of data of the control signal control memory based on application.
This structure can be applied not only to simple storage card and can be applied to the digital equipment without using memory, from
And it is applicable to carrying digital camera, mobile phone etc. and needs in all digital equipments of memory.
Fig. 9 is the three-dimensional flash memory shown with uniform physical structure and including the multiple electrodes layer formed by same substance
Structure diagram.
With reference to Fig. 9, three-dimensional flash memory is illustrated by the situation for the nand flash memory having the following structure, and nand flash memory has
Such as flowering structure: cell transistor (cell transistor) series connection forms unit string (string) and this unit string
(string) in parallel between bit line (bit line) and ground line (ground line).At this point, with reference to Fig. 9 a it is found that string
Length is longer, and the resistance of channel layer increases, and is applied to the read-write electric current of bit line according to channel laminar flow, current density is got over towards string
Lower layer part more die down.Hereinafter, as shown in figure 9b, being recorded to following test: the unit that will include in string in Figure 10
Stacking number carries out different differentiations by 10 layers, 30 layers and 50 layers, and applies 10V's respectively to the unit on top and the unit of lower part
Program BIOS confirms the drain current according to grid voltage when executing the read-write motion of storing data.
Figure 10 is to show the chart that threshold voltage is distributed in three-dimensional flash memory shown in Fig. 9.
With reference to Figure 10, it is known that the drain electrode at top (top) and bottom (bottom) when the stacking number of unit is 30 layers
Electric current 1030,1040 compared to unit stacking number be 10 layers when top (top) and bottom (bottom) drain current 1010,
1020 are reduced, and can learn the top (top) when the stacking number of unit is 50 layers and the drain current of bottom (bottom)
1050, the drain current 1030,1040 at top (top) and bottom (bottom) when 1060 stacking numbers for comparing unit are 30 layers
It reduces.
Also, the grid voltage difference based on unit stacking number is as shown in table 1 below.
Table 1
Watch table 1 it is known that with three dimensional NAND flash memory stacking number increase, superposed unit and be located at lower part
Unit between the difference of threshold voltage have the tendency that becoming larger.That is, elementary layer a few hours, the threshold based on cell position
The difference of threshold voltage is little, if but the number of plies of unit become larger, the distribution of threshold voltage will be spread.It is this as a result, in particular, will
Reduce the reading and writing data stored in the multilevel-cell (MLC, Multi Level Cell) for storing every two information above of unit
Degree of belief in the process.
Figure 11 is to show the chart that threshold voltage is distributed in the three-dimensional flash memory according to each thickness of multiple electrodes layer.
With reference to Figure 11, by adjusting each thickness of grid layer, that is, multiple electrodes layer of three-dimensional flash memory, compare based on variation
Thickness threshold voltage spread.
As shown in a, it is known that when by each thickness fixed by the 40nm setting of multiple electrodes layer, multiple electrodes
The difference of threshold voltage 1110,1120 between the electrode layer of layer middle and upper part and the electrode layer of lower part is 0.2082.
Also, as shown in b, it is known that being pressed for each thickness of multiple electrodes layer when by the electrode layer on top
70nm carry out set and the electrode layer of lower part is set by 40nm, when more upward thickness more increases, in multiple electrodes layer on
The difference of threshold voltage 1130,1140 between the electrode layer in portion and the electrode layer of lower part is 0.3918.
Also, as shown by c, it is known that being pressed for each thickness of multiple electrodes layer when by the electrode layer on top
10nm carry out set and the electrode layer of lower part is set by 40nm, when more upward thickness more reduces, in multiple electrodes layer on
The difference of threshold voltage 1150,1160 between the electrode layer in portion and the electrode layer of lower part is -0.2198.
Also, as shown in d, it is known that being pressed for each thickness of multiple electrodes layer when by the electrode layer on top
20nm carry out set and the electrode layer of lower part is set by 40nm, when more upward thickness more reduces, in multiple electrodes layer on
The difference of threshold voltage 1170,1180 between the electrode layer in portion and the electrode layer of lower part is 0.0039.
I.e., it is possible to learn, is formed, can be changed and by multiple electrodes layer each thickness by gradually thickeing towards lower part
Kind threshold voltage is spread.Therefore, it is present in first electrode layer as comparing the thickness of first electrode layer in multiple electrodes layer
The thickness of the second electrode lay on upper layer is formed as thicker, carries out mutually not phase by each the physical structure by multiple electrodes layer
It designs together, the threshold voltage that can improve multiple electrodes layer is spread.
As described above, although the embodiment and attached drawing according to defined by embodiment are illustrated, to the art
It can carry out various modifications and deform from above-mentioned record for technical staff with general knowledge.For example, according to explanation
Technology illustrated in method mutually different sequence carry out, and/or according to system, structure, device, the circuit etc. with explanation
The mutually different form of method illustrated by constituent element is combined or combines, or is carried out according to other constituent elements or equipollent
Replacement or displacement also may achieve effect appropriate.
Therefore, other embody, other embodiments and with scope of the claims is mutually impartial belongs to the power
Benefit requires protected range.
Claims (13)
1. a kind of three-dimensional flash memory, comprising:
Channel layer；
Multiple electrodes layer is connect with the channel layer, and stacked vertical；With
Multiple interlayer insulating films are connect with the channel layer, and are alternately arranged with the multiple electrode layer, and stacked vertical,
Wherein, each of the multiple electrode layer is with mutually different physical structure, or by mutually different substance shape
At.
2. three-dimensional flash memory as described in claim 1, which is characterized in that the thickness phase of first electrode layer in the multiple electrode layer
Thickness than being present in the second electrode lay on the upper layer of the first electrode layer is formed as thicker.
3. three-dimensional flash memory as described in claim 1, which is characterized in that the multiple electrode layer each length or be formed in
Pattern on each surface of the multiple electrode layer is different.
4. three-dimensional flash memory as described in claim 1, which is characterized in that form the material of first electrode layer in the multiple electrode layer
Material has more excellent characteristics of electrical conductivity compared to the material of the second electrode lay on the upper layer for being present in the first electrode layer.
5. three-dimensional flash memory as described in claim 1, which is characterized in that at least two electrode layers are by mutual in the multiple electrode layer
Different substance is formed.
6. three-dimensional flash memory as described in claim 1, which is characterized in that each of the multiple electrode layer and the channel layer
Between be configured with interlayer oxide film, silicon oxide film and tunnel oxide film.
7. a kind of three-dimensional flash memory, comprising:
Channel layer；
Multiple electrodes layer is connect with the channel layer, and stacked vertical；With
Multiple interlayer insulating films are connect with the channel layer, and are alternately arranged with the multiple electrode layer, and stacked vertical,
Wherein, each of the multiple interlayer insulating film is formed or is had mutually different physical by mutually different substance
Structure.
8. three-dimensional flash memory as claimed in claim 7, which is characterized in that it is exhausted to form the first interlayer in the multiple interlayer insulating film
The material of edge layer compares the material for being present in second interlayer insulating film on upper layer of first interlayer insulating film with stronger
Anti-compression property.
9. three-dimensional flash memory as claimed in claim 7, which is characterized in that at least two interlayers are exhausted in the multiple interlayer insulating film
Edge layer is formed by mutually different substance.
10. three-dimensional flash memory as claimed in claim 7, which is characterized in that the first layer insulation in the multiple interlayer insulating film
The thickness of layer is formed as thicker compared to the thickness of second interlayer insulating film on the upper layer for being present in first interlayer insulating film.
11. three-dimensional flash memory as claimed in claim 7, which is characterized in that the multiple interlayer insulating film each length or
The pattern being formed on each surface of the multiple interlayer insulating film is different.
12. three-dimensional flash memory as claimed in claim 7, which is characterized in that each of the multiple electrode layer and the channel
Interlayer oxide film, silicon oxide film and tunnel oxide film are configured between layer.
13. a kind of three-dimensional flash memory, comprising:
Channel layer；
Multiple electrodes layer is connect with the channel layer, and stacked vertical；With
Multiple interlayer insulating films are connect with the channel layer, and are alternately arranged with the multiple electrode layer, and stacked vertical,
Wherein, each of the multiple interlayer insulating film is formed or is had mutually different physical by mutually different substance
Structure, and
Each of the multiple electrode layer is formed by mutually different substance or is had mutually different physical structure.
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| KR1020140122650A KR101622036B1 (en) | 2014-01-28 | 2014-09-16 | Three dimensional flash memory using electrode layer and/or inter-layer with different characteristic and manufacturing method |
| CN201480074446.7A CN105940492B (en) | 2014-01-28 | 2014-12-31 | Utilize the three-dimensional flash memory and its manufacturing method of electrode layer and/or interlayer insulating film with different characteristic |
| CN201811575987.4A CN110085597B (en) | 2014-01-28 | 2014-12-31 | Three-dimensional flash memory using electrode layers and/or interlayer insulating layers having different characteristics |
| PCT/KR2014/013095 WO2015115739A1 (en) | 2014-01-28 | 2014-12-31 | Three dimensional flash memory using electrode layers and/or interlayer insulation layers having different properties, and preparation method therefor |
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