CN110061012A - A kind of array substrate and preparation method thereof and display panel - Google Patents

A kind of array substrate and preparation method thereof and display panel Download PDF

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Publication number
CN110061012A
CN110061012A CN201910278652.4A CN201910278652A CN110061012A CN 110061012 A CN110061012 A CN 110061012A CN 201910278652 A CN201910278652 A CN 201910278652A CN 110061012 A CN110061012 A CN 110061012A
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China
Prior art keywords
area
conducting wire
pattern
channelizing line
matrix
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Granted
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CN201910278652.4A
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Chinese (zh)
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CN110061012B (en
Inventor
胡建平
杨文萍
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to CN201910278652.4A priority Critical patent/CN110061012B/en
Priority to PCT/CN2019/084260 priority patent/WO2020206752A1/en
Publication of CN110061012A publication Critical patent/CN110061012A/en
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1337Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/1296Multistep manufacturing methods adapted to increase the uniformity of device parameters

Abstract

This application involves a kind of array substrate and preparation method thereof and display panel, which includes: matrix, and matrix includes sequentially connected viewing area, fanout area and binding area;A plurality of conducting wire, a plurality of conducting wire are set on matrix, and fanout area formed it is multiple it is spaced gather pattern, gather conducting wire in pattern and extend from the junction of viewing area and fanout area to binding area, and the distance extended is longer, spaces between smaller;A plurality of channelizing line, a plurality of channelizing line be set to it is two neighboring gather between pattern, and to far from viewing area direction extend.In this way, " inverted v-shaped " pattern of fanout area in existing design is redesigned, brightness irregularities problem at edge of display area caused by avoid the blocking spread due to " inverted v-shaped " pattern to alignment liquid, and then improve the quality of display panel.

Description

A kind of array substrate and preparation method thereof and display panel
[technical field]
This application involves field of display technology, and in particular to a kind of array substrate and preparation method thereof and display panel.
[background technique]
In array substrate, to guarantee that pattern density is consistent, fanout area " sector " pattern is adopted with " sector " pattern junction With " inverted v-shaped " pattern.
But due to the design of liquid crystal display panel of thin film transistor (TFT LCD) narrow frame, array substrate viewing area distance Fanout area route is excessively close.In alignment film processing procedure, alignment liquid edge of display area diffusion by fanout area " inverted v-shaped " pattern Blocking, cause alignment liquid to be accumulated at edge of display area, the phenomenon that edge of display area brightness irregularities occur, influence display surface The quality of plate.
[summary of the invention]
The application's is designed to provide a kind of array substrate and preparation method thereof and display panel, by existing " inverted v-shaped " pattern of fanout area is redesigned in design, to avoid what is spread due to " inverted v-shaped " pattern to alignment liquid Brightness irregularities problem at edge of display area caused by blocking, and then improve the quality of display panel.
To solve the above-mentioned problems, the embodiment of the present application provides a kind of array substrate, which includes: matrix, Matrix includes sequentially connected viewing area, fanout area and binding area;A plurality of conducting wire, a plurality of conducting wire are set on matrix, and Fanout area formed it is multiple it is spaced gather pattern, gather conducting wire in pattern from the junction of viewing area and fanout area to tying up Determine Qu Yanshen, and the distance extended is longer, spaces between smaller;A plurality of channelizing line, a plurality of channelizing line are set to adjacent Two are gathered between pattern, and are extended to the direction far from viewing area.
Wherein, a plurality of channelizing line is axisymmetricly arranged, and be located at symmetry axis at channelizing line perpendicular to viewing area be fanned out to The Contact Boundary in area.
Wherein, the angle between the channelizing line and Contact Boundary of symmetry axis two sides is less than 90 degree.
Wherein, a plurality of channelizing line parallel interval setting, and perpendicular to the Contact Boundary of viewing area and fanout area.
Wherein, the extension path of channelizing line is straight line or curve.
Wherein, the material of channelizing line and the material of conducting wire be not identical.
To solve the above-mentioned problems, the embodiment of the present application also provides a kind of production method of array substrate, this method packets It includes: matrix is provided, matrix includes sequentially connected viewing area, fanout area and binding area;Formed on matrix a plurality of conducting wire and A plurality of channelizing line, wherein a plurality of conducting wire fanout area formed it is multiple it is spaced gather pattern, gather conducting wire in pattern from The junction of viewing area and fanout area to binding area extend, and extend distance it is longer, space between it is smaller, it is a plurality of to lead Streamline is gathered between pattern positioned at two neighboring, and extends to the direction far from viewing area.
Wherein, it the step of forming a plurality of conducting wire and a plurality of channelizing line on matrix, specifically includes: utilizing the first mask plate, A plurality of conducting wire is formed on matrix;Insulating layer is formed on conducting wire;Using the second mask plate, a plurality of water conservancy diversion is formed on the insulating layer Line.
Wherein, it the step of forming a plurality of conducting wire and a plurality of channelizing line on matrix, specifically includes: being formed on matrix a plurality of Conducting wire and a plurality of channelizing line, and the pixel of array substrate is formed on viewing area, pixel connect with conducting wire.
To solve the above-mentioned problems, the embodiment of the present application also provides a kind of display panel, which includes: first Substrate, the second substrate and liquid crystal layer;Wherein, first substrate and/or the second substrate are the array substrate of any of the above-described, liquid Crystal layer is between first substrate and the second substrate.
The beneficial effect of the application is: being different from the prior art, array substrate provided by the present application, which includes Matrix, a plurality of conducting wire and a plurality of channelizing line, wherein matrix include sequentially connected viewing area, fanout area and binding area, A plurality of conducting wire is set on matrix, and fanout area formed it is multiple it is spaced gather pattern, gather conducting wire in pattern from The junction of viewing area and fanout area to binding area extend, and extend distance it is longer, space between it is smaller, it is a plurality of to lead Streamline be set to it is two neighboring gather between pattern, and to far from viewing area direction extend, in this way, by using a plurality of water conservancy diversion Line design substitutes original " inverted v-shaped " design, can be avoided the blocking spread due to " inverted v-shaped " pattern to alignment liquid Caused by brightness irregularities problem at edge of display area, and then improve the quality of display panel.
[Detailed description of the invention]
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for For those skilled in the art, without creative efforts, it can also be obtained according to these attached drawings other attached Figure.
Fig. 1 is the structural schematic diagram for the array substrate that the prior art provides;
Fig. 2 is the structural schematic diagram of array substrate provided by the embodiments of the present application;
Fig. 3 is another structural schematic diagram of array substrate provided by the embodiments of the present application;
Fig. 4 is another structural schematic diagram of array substrate provided by the embodiments of the present application;
Fig. 5 is another structural schematic diagram of array substrate provided by the embodiments of the present application;
Fig. 6 is the flow diagram of the production method of array substrate provided by the embodiments of the present application;
Fig. 7 is the structural schematic diagram of display panel provided by the embodiments of the present application.
[specific embodiment]
With reference to the accompanying drawings and examples, the application is described in further detail.It is emphasized that following implement Example is merely to illustrate the application, but is not defined to scope of the present application.Likewise, following embodiment is only the portion of the application Point embodiment and not all embodiments, institute obtained by those of ordinary skill in the art without making creative efforts There are other embodiments, shall fall in the protection scope of this application.
Referring to Fig. 1, Fig. 1 is the structural schematic diagram for the array substrate that the prior art provides.As shown in Figure 1, array substrate 10 include sequentially connected viewing area A, fanout area B and binding area C, to guarantee that pattern density is consistent, " the fan of B in fanout area Shape " pattern 111 and 111 junction of " sector " pattern use " inverted v-shaped " pattern 112.But in subsequent alignment film processing procedure, match Blocking of the diffusion by fanout area B " inverted v-shaped " pattern 112 to liquid at the viewing area edge A, causes alignment liquid in viewing area A , there is the non-uniform phenomenon of viewing area A edge brightness, influences the quality of display panel 10 in edge accumulation.To solve above-mentioned skill Art problem, the application substitute original " inverted v-shaped " design using the design of a plurality of channelizing line, can be avoided due to " the word of falling V Brightness irregularities problem at edge of display area caused by the blocking that shape " pattern spreads alignment liquid, and then improve display panel Quality.
Referring to Fig. 2, Fig. 2 is the structural schematic diagram of array substrate provided by the embodiments of the present application.As shown in Fig. 2, array Substrate 20 includes matrix 21, a plurality of conducting wire 22 and a plurality of channelizing line 23, wherein matrix 21 includes sequentially connected viewing area A, fanout area B and binding area C, a plurality of conducting wire 22 is set on matrix 21, and is formed in fanout area B multiple spaced Gather pattern 22B, the conducting wire 22 gathered in pattern 22B extends from the junction of viewing area A and fanout area B to binding area C, and prolongs The distance stretched is longer, space between it is smaller, a plurality of channelizing line 23 be set to it is two neighboring gather between pattern 22B, and Extend to the direction far from viewing area A.
Wherein, matrix 21 can be glass substrate or the resin substrate of hard, or be used to prepare flexible array The flexible base board of substrate.The material of conducting wire 22 can have the material of low-resistivity for aluminium, copper, silver etc..The material of channelizing line 23 Can be identical as the material of conducting wire 22 or not identical, the material of channelizing line 23 can be that the conductive materials such as aluminium, copper, silver can also With insulating materials such as epoxy resin, acryl resins.
In a specific embodiment, array substrate 20 further includes being set to the pixel (not shown) of viewing area A, as Element includes the thin film transistor (TFT) set gradually in substrate 21, organic luminescent device.Wherein, conducting wire 22 is in the A of viewing area along row Direction or the arrangement of column direction parallel interval, and be electrically connected with pixel.Conducting wire 22 extends to viewing area A and is fanned out to out of viewing area A Behind the junction of area B, several conducting wire groups can be divided into and continue to be extended from the junction of viewing area A and fanout area B to binding area C, And closer to binding area C, conducting wire group inside conductor 22 is smaller with the distance between conducting wire 22, to form multiple gather in fanout area B Pattern 22B.After conducting wire 22 extends to the junction between binding area C and fanout area B, conducting wire 22 can continue in binding area C Interior extension, and connect with the driver interface (not shown) for being located at binding area C, driving signal is sent to the picture Element.In this way, conducting wire 22 is connect by after fanout area B gathers, then with the driver interface of binding area C, driver can reduce Occupied space, and preferably the driving signal of input lead 22 is controlled.
Further, in order to guarantee the consistency of fanout area B pattern density, gather between pattern 22B two neighboring Region is equipped with a plurality of channelizing line 23.Wherein, a plurality of 23 parallel interval of channelizing line setting, and perpendicular to viewing area A and fanout area B Contact Boundary, in order in subsequent alignment film processing procedure alignment liquid in the diffusion of the viewing area edge A.
Specifically, channelizing line 23 is in the two neighboring distribution density gathered between pattern 22B in region and conducting wire 22 poly- The distribution density held together in pattern 22B is identical or can satisfy the requirement of fanout area B pattern density CONSENSUS.Further, such as Fig. 3 It is shown, gather the conducting wire 22 in pattern 22B extend to binding area C and fanout area B between junction after, can continue binding Extend in area C, be correspondingly formed rectangular patterns 22C, " inverted v-shaped " pattern 24 can be formed between two neighboring rectangular patterns 22C, To guarantee the consistency of binding area C pattern density.
In an alternative embodiment, as shown in figure 4, a plurality of channelizing line 23 is axisymmetricly arranged, and it is located at symmetry axis Z Channelizing line 23 perpendicular to viewing area A boundary.Wherein, positioned at the two sides symmetry axis Z channelizing line 23 and viewing area A boundary it Between angle less than 90 degree, for example, a plurality of channelizing line 23 in Fig. 4 is in tree-shaped arrangement, be conducive to match in subsequent alignment film processing procedure Diffusion to liquid in the viewing area edge A.
In other alternate embodiments, as shown in figure 5, the extension path in the B of fanout area of channelizing line 23 can be straight Line or curve.Also, channelizing line 23 and conducting wire 22, which can be same layer setting, may not be same layer setting.For example, conducting wire 22 is set It is placed on matrix 21, is provided on conducting wire 22 insulating layer (not shown), insulating layer covers conducting wire 22 and its peripheral regions, channelizing line 23 are set on insulating layer.
It is different from the prior art, the array substrate in the present embodiment, by being replaced in fanout area using the design of a plurality of channelizing line For original " inverted v-shaped " design, caused by can be avoided the blocking spread due to " inverted v-shaped " pattern to alignment liquid Brightness irregularities problem at edge of display area, and then improve the quality of display panel.
Referring to Fig. 6, Fig. 6 is the flow diagram of the production method of array substrate provided by the embodiments of the present application.The battle array The production method of column substrate the following steps are included:
S61: providing matrix, and matrix includes sequentially connected viewing area, fanout area and binding area.
Wherein, matrix can be glass substrate or the resin substrate of hard, or be used to prepare flexible array base The flexible base board of plate.
S62: a plurality of conducting wire and a plurality of channelizing line are formed on matrix, wherein a plurality of conducting wire forms multiple in fanout area Gather pattern every setting, the conducting wire gathered in pattern extends from the junction of viewing area and fanout area to binding area, and extends Distance it is longer, space between it is smaller, a plurality of channelizing line be located at it is two neighboring gather between pattern, and to far from display The direction in area extends.
Wherein, the material of conducting wire can have the material of low-resistivity for aluminium, copper, silver etc..The material of channelizing line can be with The material of conducting wire is identical can not also be identical, and the material of channelizing line can be that the conductive materials such as aluminium, copper, silver can also be with asphalt mixtures modified by epoxy resin The insulating materials such as rouge, acryl resin.
In one embodiment, S62 can be with are as follows:
A plurality of conducting wire and a plurality of channelizing line are formed on matrix, and the pixel of array substrate, pixel are formed on viewing area It is connect with conducting wire.
Specifically, conducting wire is arranged in viewing area along line direction or column direction parallel interval, is extended out of viewing area in conducting wire After to the junction of viewing area and fanout area, several conducting wire groups that conducting wire can be divided into continue the junction by viewing area and fanout area Extend to binding area, and closer to binding area, the distance between conducting wire group inside conductor and conducting wire are smaller, more to be formed in fanout area It is a to gather pattern.After conducting wire extends to the junction between binding area and fanout area, conducting wire can continue to prolong in binding area It stretches, and is connect with the driver interface for being located at binding area, driving signal is sent to the pixel.In this way, conducting wire passes through After fanout area is gathered, then with binding area driver interface connect, can reduce the occupied space of driver, and preferably right The driving signal of input lead is controlled.
Further, a plurality of channelizing line parallel interval be set to it is two neighboring gather between pattern, and perpendicular to viewing area With the Contact Boundary of fanout area, in order to diffusion of the alignment liquid at edge of display area in subsequent alignment film processing procedure.Specifically, it leads Streamline the two neighboring distribution density gathered between pattern in region and conducting wire gather the distribution density in pattern it is identical or It can satisfy the requirement of fanout area pattern density consistency.
In an alternative embodiment, a plurality of channelizing line is axisymmetricly arranged, and the channelizing line being located at symmetry axis is vertical In the boundary of viewing area.Wherein, the angle between the channelizing line of symmetry axis two sides and the boundary of viewing area is less than 90 degree, example Such as, a plurality of channelizing line is in tree-shaped arrangement, is conducive to diffusion of the alignment liquid at edge of display area in subsequent alignment film processing procedure.
In other alternate embodiments, channelizing line extends to the direction far from viewing area, and its extension path can be straight Line or curve.
In another embodiment, S62 can be with specifically:
Using same mask plate, conducting wire and water conservancy diversion are formed on matrix by techniques such as deposition, exposure and etchings Line.
In yet another embodiment, S62 can with specifically includes the following steps:
Using the first mask plate, a plurality of conducting wire is formed on matrix by techniques such as deposition, exposure and etchings;
Insulating layer is formed on conducting wire, wherein insulating layer covers conducting wire and its peripheral regions;
Using the second mask plate, a plurality of channelizing line is formed on the insulating layer by techniques such as deposition, exposure and etchings.
It is different from the prior art, the production method of the array substrate in the present embodiment, by being led in fanout area using a plurality of Streamline Design substitutes original " inverted v-shaped " design, can be avoided the resistance spread due to " inverted v-shaped " pattern to alignment liquid Brightness irregularities problem at edge of display area caused by gear, and then improve the quality of display panel.
Referring to Fig. 7, Fig. 7 is the structural schematic diagram of display panel provided by the embodiments of the present application.The display panel 70 packet It includes: first substrate 71, the second substrate 72 and liquid crystal layer 73, wherein liquid crystal layer 73 is located at first substrate 71 and the second substrate 72 Between.
First substrate 71 and/or the second substrate 72 are the array substrate of any of the above-described embodiment, including matrix, a plurality of are led Line and a plurality of channelizing line, wherein matrix includes that sequentially connected viewing area, fanout area and binding area, a plurality of conducting wire are set Be placed on matrix, and fanout area formed it is multiple it is spaced gather pattern, gather conducting wire in pattern from viewing area and fan The junction in area extends to binding area out, and the distance extended is longer, spaces between smaller, and a plurality of channelizing line is set to It is two neighboring to gather between pattern, and extend to the direction far from viewing area.
It is different from the prior art, the display panel in the present embodiment, by being replaced in fanout area using the design of a plurality of channelizing line For original " inverted v-shaped " design, caused by can be avoided the blocking spread due to " inverted v-shaped " pattern to alignment liquid Brightness irregularities problem at edge of display area, and then improve the quality of display panel.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all in essence of the invention Made any modifications, equivalent replacements, and improvements etc., should all be included in the protection scope of the present invention within mind and principle.

Claims (10)

1. a kind of array substrate characterized by comprising
Matrix, described matrix include sequentially connected viewing area, fanout area and binding area;
A plurality of conducting wire, a plurality of conducting wire are set in described matrix, and are formed in the fanout area multiple spaced poly- Hold together pattern, the conducting wire gathered in pattern prolongs from the junction of the viewing area and the fanout area to the binding area It stretches, and the distance extended is longer, spaces between smaller;
A plurality of channelizing line, a plurality of channelizing line be set to it is two neighboring it is described gather between pattern, and to far from the display The direction in area extends.
2. array substrate according to claim 1, which is characterized in that a plurality of channelizing line is axisymmetricly arranged, and position The Contact Boundary of the channelizing line at symmetry axis perpendicular to the viewing area and the fanout area.
3. array substrate according to claim 2, which is characterized in that positioned at the symmetry axis two sides the channelizing line with Angle between the Contact Boundary is less than 90 degree.
4. array substrate according to claim 1, which is characterized in that a plurality of channelizing line parallel interval setting, and hang down Directly in the Contact Boundary of the viewing area and the fanout area.
5. array substrate according to claim 1, which is characterized in that the extension path of the channelizing line is straight line or song Line.
6. array substrate according to claim 1, which is characterized in that the material of the material of the channelizing line and the conducting wire It is not identical.
7. a kind of production method of array substrate characterized by comprising
Matrix is provided, described matrix includes sequentially connected viewing area, fanout area and binding area;
A plurality of conducting wire and a plurality of channelizing line are formed on the matrix, wherein a plurality of conducting wire forms more in the fanout area It is a spaced to gather pattern, junction of the conducting wire gathered in pattern from the viewing area and the fanout area To the binding area extend, and extend distance it is longer, space between it is smaller, a plurality of channelizing line be located at adjacent two Gather between pattern described in a, and extends to the direction far from the viewing area.
8. production method according to claim 7, which is characterized in that a plurality of conducting wire and more of being formed on the matrix It the step of channelizing line, specifically includes:
Using the first mask plate, a plurality of conducting wire is formed on the matrix;
Insulating layer is formed on the conducting wire;
Using the second mask plate, it is formed on the insulating layer a plurality of channelizing line.
9. the production method of array substrate according to claim 7, which is characterized in that the formation on the matrix is more It the step of bar conducting wire and a plurality of channelizing line, specifically includes:
The a plurality of conducting wire and a plurality of channelizing line are formed on the matrix, and the array is formed on the viewing area The pixel of substrate, the pixel are connect with the conducting wire.
10. a kind of display panel characterized by comprising
First substrate, the second substrate and liquid crystal layer;
Wherein, the first substrate and/or the second substrate are array substrate described in any one of claims 1-6, the liquid crystal Layer is between the first substrate and the second substrate.
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